x86/dell/dcdbas.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  *  dcdbas.h: Definitions for Dell Systems Management Base driver
0004  *
0005  *  Copyright (C) 1995-2005 Dell Inc.
0006  */
0007
0008 #ifndef _DCDBAS_H_
0009 #define _DCDBAS_H_
0010
0011 #include <linux/device.h>
0012 #include <linux/sysfs.h>
0013 #include <linux/types.h>
0014
0015 #define MAX_SMI_DATA_BUF_SIZE           (256 * 1024)
0016
0017 #define HC_ACTION_NONE              (0)
0018 #define HC_ACTION_HOST_CONTROL_POWEROFF     BIT(1)
0019 #define HC_ACTION_HOST_CONTROL_POWERCYCLE   BIT(2)
0020
0021 #define HC_SMITYPE_NONE             (0)
0022 #define HC_SMITYPE_TYPE1            (1)
0023 #define HC_SMITYPE_TYPE2            (2)
0024 #define HC_SMITYPE_TYPE3            (3)
0025
0026 #define ESM_APM_CMD             (0x0A0)
0027 #define ESM_APM_POWER_CYCLE         (0x10)
0028 #define ESM_STATUS_CMD_UNSUCCESSFUL     (-1)
0029
0030 #define CMOS_BASE_PORT              (0x070)
0031 #define CMOS_PAGE1_INDEX_PORT           (0)
0032 #define CMOS_PAGE1_DATA_PORT            (1)
0033 #define CMOS_PAGE2_INDEX_PORT_PIIX4     (2)
0034 #define CMOS_PAGE2_DATA_PORT_PIIX4      (3)
0035 #define PE1400_APM_CONTROL_PORT         (0x0B0)
0036 #define PCAT_APM_CONTROL_PORT           (0x0B2)
0037 #define PCAT_APM_STATUS_PORT            (0x0B3)
0038 #define PE1300_CMOS_CMD_STRUCT_PTR      (0x38)
0039 #define PE1400_CMOS_CMD_STRUCT_PTR      (0x70)
0040
0041 #define MAX_SYSMGMT_SHORTCMD_PARMBUF_LEN    (14)
0042 #define MAX_SYSMGMT_LONGCMD_SGENTRY_NUM     (16)
0043
0044 #define TIMEOUT_USEC_SHORT_SEMA_BLOCKING    (10000)
0045 #define EXPIRED_TIMER               (0)
0046
0047 #define SMI_CMD_MAGIC               (0x534D4931)
0048 #define SMM_EPS_SIG             "$SCB"
0049
0050 #define DCDBAS_DEV_ATTR_RW(_name) \
0051     DEVICE_ATTR(_name,0600,_name##_show,_name##_store);
0052
0053 #define DCDBAS_DEV_ATTR_RO(_name) \
0054     DEVICE_ATTR(_name,0400,_name##_show,NULL);
0055
0056 #define DCDBAS_DEV_ATTR_WO(_name) \
0057     DEVICE_ATTR(_name,0200,NULL,_name##_store);
0058
0059 #define DCDBAS_BIN_ATTR_RW(_name) \
0060 struct bin_attribute bin_attr_##_name = { \
0061     .attr =  { .name = __stringify(_name), \
0062            .mode = 0600 }, \
0063     .read =  _name##_read, \
0064     .write = _name##_write, \
0065 }
0066
0067 struct smi_cmd {
0068     __u32 magic;
0069     __u32 ebx;
0070     __u32 ecx;
0071     __u16 command_address;
0072     __u8 command_code;
0073     __u8 reserved;
0074     __u8 command_buffer[1];
0075 } __attribute__ ((packed));
0076
0077 struct apm_cmd {
0078     __u8 command;
0079     __s8 status;
0080     __u16 reserved;
0081     union {
0082         struct {
0083             __u8 parm[MAX_SYSMGMT_SHORTCMD_PARMBUF_LEN];
0084         } __attribute__ ((packed)) shortreq;
0085
0086         struct {
0087             __u16 num_sg_entries;
0088             struct {
0089                 __u32 size;
0090                 __u64 addr;
0091             } __attribute__ ((packed))
0092                 sglist[MAX_SYSMGMT_LONGCMD_SGENTRY_NUM];
0093         } __attribute__ ((packed)) longreq;
0094     } __attribute__ ((packed)) parameters;
0095 } __attribute__ ((packed));
0096
0097 int dcdbas_smi_request(struct smi_cmd *smi_cmd);
0098
0099 struct smm_eps_table {
0100     char smm_comm_buff_anchor[4];
0101     u8 length;
0102     u8 checksum;
0103     u8 version;
0104     u64 smm_comm_buff_addr;
0105     u64 num_of_4k_pages;
0106 } __packed;
0107
0108 struct smi_buffer {
0109     u8 *virt;
0110     unsigned long size;
0111     dma_addr_t dma;
0112 };
0113
0114 int dcdbas_smi_alloc(struct smi_buffer *smi_buffer, unsigned long size);
0115 void dcdbas_smi_free(struct smi_buffer *smi_buffer);
0116
0117 #endif /* _DCDBAS_H_ */
0118