pinctrl/uniphier/pinctrl-uniphier.h

0001 /* SPDX-License-Identifier: GPL-2.0+ */
0002 /*
0003  * Copyright (C) 2015-2017 Socionext Inc.
0004  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
0005  */
0006
0007 #ifndef __PINCTRL_UNIPHIER_H__
0008 #define __PINCTRL_UNIPHIER_H__
0009
0010 #include <linux/bits.h>
0011 #include <linux/build_bug.h>
0012 #include <linux/kernel.h>
0013 #include <linux/types.h>
0014
0015 struct platform_device;
0016
0017 /* input enable control register bit */
0018 #define UNIPHIER_PIN_IECTRL_SHIFT   0
0019 #define UNIPHIER_PIN_IECTRL_BITS    3
0020 #define UNIPHIER_PIN_IECTRL_MASK    ((1UL << (UNIPHIER_PIN_IECTRL_BITS)) \
0021                      - 1)
0022
0023 /* drive strength control register number */
0024 #define UNIPHIER_PIN_DRVCTRL_SHIFT  ((UNIPHIER_PIN_IECTRL_SHIFT) + \
0025                     (UNIPHIER_PIN_IECTRL_BITS))
0026 #define UNIPHIER_PIN_DRVCTRL_BITS   9
0027 #define UNIPHIER_PIN_DRVCTRL_MASK   ((1UL << (UNIPHIER_PIN_DRVCTRL_BITS)) \
0028                      - 1)
0029
0030 /* drive control type */
0031 #define UNIPHIER_PIN_DRV_TYPE_SHIFT ((UNIPHIER_PIN_DRVCTRL_SHIFT) + \
0032                      (UNIPHIER_PIN_DRVCTRL_BITS))
0033 #define UNIPHIER_PIN_DRV_TYPE_BITS  3
0034 #define UNIPHIER_PIN_DRV_TYPE_MASK  ((1UL << (UNIPHIER_PIN_DRV_TYPE_BITS)) \
0035                      - 1)
0036
0037 /* pull-up / pull-down register number */
0038 #define UNIPHIER_PIN_PUPDCTRL_SHIFT ((UNIPHIER_PIN_DRV_TYPE_SHIFT) + \
0039                      (UNIPHIER_PIN_DRV_TYPE_BITS))
0040 #define UNIPHIER_PIN_PUPDCTRL_BITS  9
0041 #define UNIPHIER_PIN_PUPDCTRL_MASK  ((1UL << (UNIPHIER_PIN_PUPDCTRL_BITS))\
0042                      - 1)
0043
0044 /* direction of pull register */
0045 #define UNIPHIER_PIN_PULL_DIR_SHIFT ((UNIPHIER_PIN_PUPDCTRL_SHIFT) + \
0046                      (UNIPHIER_PIN_PUPDCTRL_BITS))
0047 #define UNIPHIER_PIN_PULL_DIR_BITS  3
0048 #define UNIPHIER_PIN_PULL_DIR_MASK  ((1UL << (UNIPHIER_PIN_PULL_DIR_BITS))\
0049                      - 1)
0050
0051 #if UNIPHIER_PIN_PULL_DIR_SHIFT + UNIPHIER_PIN_PULL_DIR_BITS > BITS_PER_LONG
0052 #error "unable to pack pin attributes."
0053 #endif
0054
0055 #define UNIPHIER_PIN_IECTRL_NONE    (UNIPHIER_PIN_IECTRL_MASK)
0056 #define UNIPHIER_PIN_IECTRL_EXIST   0
0057
0058 /* drive control type */
0059 enum uniphier_pin_drv_type {
0060     UNIPHIER_PIN_DRV_1BIT,      /* 2 level control: 4/8 mA */
0061     UNIPHIER_PIN_DRV_2BIT,      /* 4 level control: 8/12/16/20 mA */
0062     UNIPHIER_PIN_DRV_3BIT,      /* 8 level control: 4/5/7/9/11/12/14/16 mA */
0063     UNIPHIER_PIN_DRV_FIXED4,    /* fixed to 4mA */
0064     UNIPHIER_PIN_DRV_FIXED5,    /* fixed to 5mA */
0065     UNIPHIER_PIN_DRV_FIXED8,    /* fixed to 8mA */
0066     UNIPHIER_PIN_DRV_NONE,      /* no support (input only pin) */
0067 };
0068
0069 /* direction of pull register (no pin supports bi-directional pull biasing) */
0070 enum uniphier_pin_pull_dir {
0071     UNIPHIER_PIN_PULL_UP,       /* pull-up or disabled */
0072     UNIPHIER_PIN_PULL_DOWN,     /* pull-down or disabled */
0073     UNIPHIER_PIN_PULL_UP_FIXED, /* always pull-up */
0074     UNIPHIER_PIN_PULL_DOWN_FIXED,   /* always pull-down */
0075     UNIPHIER_PIN_PULL_NONE,     /* no pull register */
0076 };
0077
0078 #define UNIPHIER_PIN_IECTRL(x) \
0079     (((x) & (UNIPHIER_PIN_IECTRL_MASK)) << (UNIPHIER_PIN_IECTRL_SHIFT))
0080 #define UNIPHIER_PIN_DRVCTRL(x) \
0081     (((x) & (UNIPHIER_PIN_DRVCTRL_MASK)) << (UNIPHIER_PIN_DRVCTRL_SHIFT))
0082 #define UNIPHIER_PIN_DRV_TYPE(x) \
0083     (((x) & (UNIPHIER_PIN_DRV_TYPE_MASK)) << (UNIPHIER_PIN_DRV_TYPE_SHIFT))
0084 #define UNIPHIER_PIN_PUPDCTRL(x) \
0085     (((x) & (UNIPHIER_PIN_PUPDCTRL_MASK)) << (UNIPHIER_PIN_PUPDCTRL_SHIFT))
0086 #define UNIPHIER_PIN_PULL_DIR(x) \
0087     (((x) & (UNIPHIER_PIN_PULL_DIR_MASK)) << (UNIPHIER_PIN_PULL_DIR_SHIFT))
0088
0089 #define UNIPHIER_PIN_ATTR_PACKED(iectrl, drvctrl, drv_type, pupdctrl, pull_dir)\
0090                 (UNIPHIER_PIN_IECTRL(iectrl) |      \
0091                  UNIPHIER_PIN_DRVCTRL(drvctrl) |    \
0092                  UNIPHIER_PIN_DRV_TYPE(drv_type) |  \
0093                  UNIPHIER_PIN_PUPDCTRL(pupdctrl) |  \
0094                  UNIPHIER_PIN_PULL_DIR(pull_dir))
0095
0096 static inline unsigned int uniphier_pin_get_iectrl(void *drv_data)
0097 {
0098     return ((unsigned long)drv_data >> UNIPHIER_PIN_IECTRL_SHIFT) &
0099                         UNIPHIER_PIN_IECTRL_MASK;
0100 }
0101
0102 static inline unsigned int uniphier_pin_get_drvctrl(void *drv_data)
0103 {
0104     return ((unsigned long)drv_data >> UNIPHIER_PIN_DRVCTRL_SHIFT) &
0105                         UNIPHIER_PIN_DRVCTRL_MASK;
0106 }
0107
0108 static inline unsigned int uniphier_pin_get_drv_type(void *drv_data)
0109 {
0110     return ((unsigned long)drv_data >> UNIPHIER_PIN_DRV_TYPE_SHIFT) &
0111                         UNIPHIER_PIN_DRV_TYPE_MASK;
0112 }
0113
0114 static inline unsigned int uniphier_pin_get_pupdctrl(void *drv_data)
0115 {
0116     return ((unsigned long)drv_data >> UNIPHIER_PIN_PUPDCTRL_SHIFT) &
0117                         UNIPHIER_PIN_PUPDCTRL_MASK;
0118 }
0119
0120 static inline unsigned int uniphier_pin_get_pull_dir(void *drv_data)
0121 {
0122     return ((unsigned long)drv_data >> UNIPHIER_PIN_PULL_DIR_SHIFT) &
0123                         UNIPHIER_PIN_PULL_DIR_MASK;
0124 }
0125
0126 struct uniphier_pinctrl_group {
0127     const char *name;
0128     const unsigned *pins;
0129     unsigned num_pins;
0130     const int *muxvals;
0131 };
0132
0133 struct uniphier_pinmux_function {
0134     const char *name;
0135     const char * const *groups;
0136     unsigned num_groups;
0137 };
0138
0139 struct uniphier_pinctrl_socdata {
0140     const struct pinctrl_pin_desc *pins;
0141     unsigned int npins;
0142     const struct uniphier_pinctrl_group *groups;
0143     int groups_count;
0144     const struct uniphier_pinmux_function *functions;
0145     int functions_count;
0146     int (*get_gpio_muxval)(unsigned int pin, unsigned int gpio_offset);
0147     unsigned int caps;
0148 #define UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL BIT(1)
0149 #define UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE   BIT(0)
0150 };
0151
0152 #define UNIPHIER_PINCTRL_PIN(a, b, c, d, e, f, g)           \
0153 {                                   \
0154     .number = a,                            \
0155     .name = b,                          \
0156     .drv_data = (void *)UNIPHIER_PIN_ATTR_PACKED(c, d, e, f, g),    \
0157 }
0158
0159 #define __UNIPHIER_PINCTRL_GROUP(grp, mux)              \
0160     {                               \
0161         .name = #grp,                       \
0162         .pins = grp##_pins,                 \
0163         .num_pins = ARRAY_SIZE(grp##_pins),         \
0164         .muxvals = mux,                     \
0165     }
0166
0167 #define UNIPHIER_PINCTRL_GROUP(grp)                 \
0168     __UNIPHIER_PINCTRL_GROUP(grp,                   \
0169             grp##_muxvals +                 \
0170             BUILD_BUG_ON_ZERO(ARRAY_SIZE(grp##_pins) != \
0171                       ARRAY_SIZE(grp##_muxvals)))
0172
0173 #define UNIPHIER_PINCTRL_GROUP_GPIO(grp)                \
0174     __UNIPHIER_PINCTRL_GROUP(grp, NULL)
0175
0176 #define UNIPHIER_PINMUX_FUNCTION(func)                  \
0177     {                               \
0178         .name = #func,                      \
0179         .groups = func##_groups,                \
0180         .num_groups = ARRAY_SIZE(func##_groups),        \
0181     }
0182
0183 int uniphier_pinctrl_probe(struct platform_device *pdev,
0184                const struct uniphier_pinctrl_socdata *socdata);
0185
0186 extern const struct dev_pm_ops uniphier_pinctrl_pm_ops;
0187
0188 #endif /* __PINCTRL_UNIPHIER_H__ */