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OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Pinctrl data for the NVIDIA Tegra124 pinmux
0004  *
0005  * Author: Ashwini Ghuge <aghuge@nvidia.com>
0006  *
0007  * Copyright (c) 2013-2014, NVIDIA CORPORATION.  All rights reserved.
0008  */
0009 
0010 #include <linux/init.h>
0011 #include <linux/of.h>
0012 #include <linux/platform_device.h>
0013 #include <linux/pinctrl/pinctrl.h>
0014 #include <linux/pinctrl/pinmux.h>
0015 
0016 #include "pinctrl-tegra.h"
0017 
0018 /*
0019  * Most pins affected by the pinmux can also be GPIOs. Define these first.
0020  * These must match how the GPIO driver names/numbers its pins.
0021  */
0022 #define _GPIO(offset)               (offset)
0023 
0024 #define TEGRA_PIN_CLK_32K_OUT_PA0       _GPIO(0)
0025 #define TEGRA_PIN_UART3_CTS_N_PA1       _GPIO(1)
0026 #define TEGRA_PIN_DAP2_FS_PA2           _GPIO(2)
0027 #define TEGRA_PIN_DAP2_SCLK_PA3         _GPIO(3)
0028 #define TEGRA_PIN_DAP2_DIN_PA4          _GPIO(4)
0029 #define TEGRA_PIN_DAP2_DOUT_PA5         _GPIO(5)
0030 #define TEGRA_PIN_SDMMC3_CLK_PA6        _GPIO(6)
0031 #define TEGRA_PIN_SDMMC3_CMD_PA7        _GPIO(7)
0032 #define TEGRA_PIN_PB0               _GPIO(8)
0033 #define TEGRA_PIN_PB1               _GPIO(9)
0034 #define TEGRA_PIN_SDMMC3_DAT3_PB4       _GPIO(12)
0035 #define TEGRA_PIN_SDMMC3_DAT2_PB5       _GPIO(13)
0036 #define TEGRA_PIN_SDMMC3_DAT1_PB6       _GPIO(14)
0037 #define TEGRA_PIN_SDMMC3_DAT0_PB7       _GPIO(15)
0038 #define TEGRA_PIN_UART3_RTS_N_PC0       _GPIO(16)
0039 #define TEGRA_PIN_UART2_TXD_PC2         _GPIO(18)
0040 #define TEGRA_PIN_UART2_RXD_PC3         _GPIO(19)
0041 #define TEGRA_PIN_GEN1_I2C_SCL_PC4      _GPIO(20)
0042 #define TEGRA_PIN_GEN1_I2C_SDA_PC5      _GPIO(21)
0043 #define TEGRA_PIN_PC7               _GPIO(23)
0044 #define TEGRA_PIN_PG0               _GPIO(48)
0045 #define TEGRA_PIN_PG1               _GPIO(49)
0046 #define TEGRA_PIN_PG2               _GPIO(50)
0047 #define TEGRA_PIN_PG3               _GPIO(51)
0048 #define TEGRA_PIN_PG4               _GPIO(52)
0049 #define TEGRA_PIN_PG5               _GPIO(53)
0050 #define TEGRA_PIN_PG6               _GPIO(54)
0051 #define TEGRA_PIN_PG7               _GPIO(55)
0052 #define TEGRA_PIN_PH0               _GPIO(56)
0053 #define TEGRA_PIN_PH1               _GPIO(57)
0054 #define TEGRA_PIN_PH2               _GPIO(58)
0055 #define TEGRA_PIN_PH3               _GPIO(59)
0056 #define TEGRA_PIN_PH4               _GPIO(60)
0057 #define TEGRA_PIN_PH5               _GPIO(61)
0058 #define TEGRA_PIN_PH6               _GPIO(62)
0059 #define TEGRA_PIN_PH7               _GPIO(63)
0060 #define TEGRA_PIN_PI0               _GPIO(64)
0061 #define TEGRA_PIN_PI1               _GPIO(65)
0062 #define TEGRA_PIN_PI2               _GPIO(66)
0063 #define TEGRA_PIN_PI3               _GPIO(67)
0064 #define TEGRA_PIN_PI4               _GPIO(68)
0065 #define TEGRA_PIN_PI5               _GPIO(69)
0066 #define TEGRA_PIN_PI6               _GPIO(70)
0067 #define TEGRA_PIN_PI7               _GPIO(71)
0068 #define TEGRA_PIN_PJ0               _GPIO(72)
0069 #define TEGRA_PIN_PJ2               _GPIO(74)
0070 #define TEGRA_PIN_UART2_CTS_N_PJ5       _GPIO(77)
0071 #define TEGRA_PIN_UART2_RTS_N_PJ6       _GPIO(78)
0072 #define TEGRA_PIN_PJ7               _GPIO(79)
0073 #define TEGRA_PIN_PK0               _GPIO(80)
0074 #define TEGRA_PIN_PK1               _GPIO(81)
0075 #define TEGRA_PIN_PK2               _GPIO(82)
0076 #define TEGRA_PIN_PK3               _GPIO(83)
0077 #define TEGRA_PIN_PK4               _GPIO(84)
0078 #define TEGRA_PIN_SPDIF_OUT_PK5         _GPIO(85)
0079 #define TEGRA_PIN_SPDIF_IN_PK6          _GPIO(86)
0080 #define TEGRA_PIN_PK7               _GPIO(87)
0081 #define TEGRA_PIN_DAP1_FS_PN0           _GPIO(104)
0082 #define TEGRA_PIN_DAP1_DIN_PN1          _GPIO(105)
0083 #define TEGRA_PIN_DAP1_DOUT_PN2         _GPIO(106)
0084 #define TEGRA_PIN_DAP1_SCLK_PN3         _GPIO(107)
0085 #define TEGRA_PIN_USB_VBUS_EN0_PN4      _GPIO(108)
0086 #define TEGRA_PIN_USB_VBUS_EN1_PN5      _GPIO(109)
0087 #define TEGRA_PIN_HDMI_INT_PN7          _GPIO(111)
0088 #define TEGRA_PIN_ULPI_DATA7_PO0        _GPIO(112)
0089 #define TEGRA_PIN_ULPI_DATA0_PO1        _GPIO(113)
0090 #define TEGRA_PIN_ULPI_DATA1_PO2        _GPIO(114)
0091 #define TEGRA_PIN_ULPI_DATA2_PO3        _GPIO(115)
0092 #define TEGRA_PIN_ULPI_DATA3_PO4        _GPIO(116)
0093 #define TEGRA_PIN_ULPI_DATA4_PO5        _GPIO(117)
0094 #define TEGRA_PIN_ULPI_DATA5_PO6        _GPIO(118)
0095 #define TEGRA_PIN_ULPI_DATA6_PO7        _GPIO(119)
0096 #define TEGRA_PIN_DAP3_FS_PP0           _GPIO(120)
0097 #define TEGRA_PIN_DAP3_DIN_PP1          _GPIO(121)
0098 #define TEGRA_PIN_DAP3_DOUT_PP2         _GPIO(122)
0099 #define TEGRA_PIN_DAP3_SCLK_PP3         _GPIO(123)
0100 #define TEGRA_PIN_DAP4_FS_PP4           _GPIO(124)
0101 #define TEGRA_PIN_DAP4_DIN_PP5          _GPIO(125)
0102 #define TEGRA_PIN_DAP4_DOUT_PP6         _GPIO(126)
0103 #define TEGRA_PIN_DAP4_SCLK_PP7         _GPIO(127)
0104 #define TEGRA_PIN_KB_COL0_PQ0           _GPIO(128)
0105 #define TEGRA_PIN_KB_COL1_PQ1           _GPIO(129)
0106 #define TEGRA_PIN_KB_COL2_PQ2           _GPIO(130)
0107 #define TEGRA_PIN_KB_COL3_PQ3           _GPIO(131)
0108 #define TEGRA_PIN_KB_COL4_PQ4           _GPIO(132)
0109 #define TEGRA_PIN_KB_COL5_PQ5           _GPIO(133)
0110 #define TEGRA_PIN_KB_COL6_PQ6           _GPIO(134)
0111 #define TEGRA_PIN_KB_COL7_PQ7           _GPIO(135)
0112 #define TEGRA_PIN_KB_ROW0_PR0           _GPIO(136)
0113 #define TEGRA_PIN_KB_ROW1_PR1           _GPIO(137)
0114 #define TEGRA_PIN_KB_ROW2_PR2           _GPIO(138)
0115 #define TEGRA_PIN_KB_ROW3_PR3           _GPIO(139)
0116 #define TEGRA_PIN_KB_ROW4_PR4           _GPIO(140)
0117 #define TEGRA_PIN_KB_ROW5_PR5           _GPIO(141)
0118 #define TEGRA_PIN_KB_ROW6_PR6           _GPIO(142)
0119 #define TEGRA_PIN_KB_ROW7_PR7           _GPIO(143)
0120 #define TEGRA_PIN_KB_ROW8_PS0           _GPIO(144)
0121 #define TEGRA_PIN_KB_ROW9_PS1           _GPIO(145)
0122 #define TEGRA_PIN_KB_ROW10_PS2          _GPIO(146)
0123 #define TEGRA_PIN_KB_ROW11_PS3          _GPIO(147)
0124 #define TEGRA_PIN_KB_ROW12_PS4          _GPIO(148)
0125 #define TEGRA_PIN_KB_ROW13_PS5          _GPIO(149)
0126 #define TEGRA_PIN_KB_ROW14_PS6          _GPIO(150)
0127 #define TEGRA_PIN_KB_ROW15_PS7          _GPIO(151)
0128 #define TEGRA_PIN_KB_ROW16_PT0          _GPIO(152)
0129 #define TEGRA_PIN_KB_ROW17_PT1          _GPIO(153)
0130 #define TEGRA_PIN_GEN2_I2C_SCL_PT5      _GPIO(157)
0131 #define TEGRA_PIN_GEN2_I2C_SDA_PT6      _GPIO(158)
0132 #define TEGRA_PIN_SDMMC4_CMD_PT7        _GPIO(159)
0133 #define TEGRA_PIN_PU0               _GPIO(160)
0134 #define TEGRA_PIN_PU1               _GPIO(161)
0135 #define TEGRA_PIN_PU2               _GPIO(162)
0136 #define TEGRA_PIN_PU3               _GPIO(163)
0137 #define TEGRA_PIN_PU4               _GPIO(164)
0138 #define TEGRA_PIN_PU5               _GPIO(165)
0139 #define TEGRA_PIN_PU6               _GPIO(166)
0140 #define TEGRA_PIN_PV0               _GPIO(168)
0141 #define TEGRA_PIN_PV1               _GPIO(169)
0142 #define TEGRA_PIN_SDMMC3_CD_N_PV2       _GPIO(170)
0143 #define TEGRA_PIN_SDMMC1_WP_N_PV3       _GPIO(171)
0144 #define TEGRA_PIN_DDC_SCL_PV4           _GPIO(172)
0145 #define TEGRA_PIN_DDC_SDA_PV5           _GPIO(173)
0146 #define TEGRA_PIN_GPIO_W2_AUD_PW2       _GPIO(178)
0147 #define TEGRA_PIN_GPIO_W3_AUD_PW3       _GPIO(179)
0148 #define TEGRA_PIN_DAP_MCLK1_PW4         _GPIO(180)
0149 #define TEGRA_PIN_CLK2_OUT_PW5          _GPIO(181)
0150 #define TEGRA_PIN_UART3_TXD_PW6         _GPIO(182)
0151 #define TEGRA_PIN_UART3_RXD_PW7         _GPIO(183)
0152 #define TEGRA_PIN_DVFS_PWM_PX0          _GPIO(184)
0153 #define TEGRA_PIN_GPIO_X1_AUD_PX1       _GPIO(185)
0154 #define TEGRA_PIN_DVFS_CLK_PX2          _GPIO(186)
0155 #define TEGRA_PIN_GPIO_X3_AUD_PX3       _GPIO(187)
0156 #define TEGRA_PIN_GPIO_X4_AUD_PX4       _GPIO(188)
0157 #define TEGRA_PIN_GPIO_X5_AUD_PX5       _GPIO(189)
0158 #define TEGRA_PIN_GPIO_X6_AUD_PX6       _GPIO(190)
0159 #define TEGRA_PIN_GPIO_X7_AUD_PX7       _GPIO(191)
0160 #define TEGRA_PIN_ULPI_CLK_PY0          _GPIO(192)
0161 #define TEGRA_PIN_ULPI_DIR_PY1          _GPIO(193)
0162 #define TEGRA_PIN_ULPI_NXT_PY2          _GPIO(194)
0163 #define TEGRA_PIN_ULPI_STP_PY3          _GPIO(195)
0164 #define TEGRA_PIN_SDMMC1_DAT3_PY4       _GPIO(196)
0165 #define TEGRA_PIN_SDMMC1_DAT2_PY5       _GPIO(197)
0166 #define TEGRA_PIN_SDMMC1_DAT1_PY6       _GPIO(198)
0167 #define TEGRA_PIN_SDMMC1_DAT0_PY7       _GPIO(199)
0168 #define TEGRA_PIN_SDMMC1_CLK_PZ0        _GPIO(200)
0169 #define TEGRA_PIN_SDMMC1_CMD_PZ1        _GPIO(201)
0170 #define TEGRA_PIN_PWR_I2C_SCL_PZ6       _GPIO(206)
0171 #define TEGRA_PIN_PWR_I2C_SDA_PZ7       _GPIO(207)
0172 #define TEGRA_PIN_SDMMC4_DAT0_PAA0      _GPIO(208)
0173 #define TEGRA_PIN_SDMMC4_DAT1_PAA1      _GPIO(209)
0174 #define TEGRA_PIN_SDMMC4_DAT2_PAA2      _GPIO(210)
0175 #define TEGRA_PIN_SDMMC4_DAT3_PAA3      _GPIO(211)
0176 #define TEGRA_PIN_SDMMC4_DAT4_PAA4      _GPIO(212)
0177 #define TEGRA_PIN_SDMMC4_DAT5_PAA5      _GPIO(213)
0178 #define TEGRA_PIN_SDMMC4_DAT6_PAA6      _GPIO(214)
0179 #define TEGRA_PIN_SDMMC4_DAT7_PAA7      _GPIO(215)
0180 #define TEGRA_PIN_PBB0              _GPIO(216)
0181 #define TEGRA_PIN_CAM_I2C_SCL_PBB1      _GPIO(217)
0182 #define TEGRA_PIN_CAM_I2C_SDA_PBB2      _GPIO(218)
0183 #define TEGRA_PIN_PBB3              _GPIO(219)
0184 #define TEGRA_PIN_PBB4              _GPIO(220)
0185 #define TEGRA_PIN_PBB5              _GPIO(221)
0186 #define TEGRA_PIN_PBB6              _GPIO(222)
0187 #define TEGRA_PIN_PBB7              _GPIO(223)
0188 #define TEGRA_PIN_CAM_MCLK_PCC0         _GPIO(224)
0189 #define TEGRA_PIN_PCC1              _GPIO(225)
0190 #define TEGRA_PIN_PCC2              _GPIO(226)
0191 #define TEGRA_PIN_SDMMC4_CLK_PCC4       _GPIO(228)
0192 #define TEGRA_PIN_CLK2_REQ_PCC5         _GPIO(229)
0193 #define TEGRA_PIN_PEX_L0_RST_N_PDD1     _GPIO(233)
0194 #define TEGRA_PIN_PEX_L0_CLKREQ_N_PDD2      _GPIO(234)
0195 #define TEGRA_PIN_PEX_WAKE_N_PDD3       _GPIO(235)
0196 #define TEGRA_PIN_PEX_L1_RST_N_PDD5     _GPIO(237)
0197 #define TEGRA_PIN_PEX_L1_CLKREQ_N_PDD6      _GPIO(238)
0198 #define TEGRA_PIN_CLK3_OUT_PEE0         _GPIO(240)
0199 #define TEGRA_PIN_CLK3_REQ_PEE1         _GPIO(241)
0200 #define TEGRA_PIN_DAP_MCLK1_REQ_PEE2        _GPIO(242)
0201 #define TEGRA_PIN_HDMI_CEC_PEE3         _GPIO(243)
0202 #define TEGRA_PIN_SDMMC3_CLK_LB_OUT_PEE4    _GPIO(244)
0203 #define TEGRA_PIN_SDMMC3_CLK_LB_IN_PEE5     _GPIO(245)
0204 #define TEGRA_PIN_DP_HPD_PFF0           _GPIO(248)
0205 #define TEGRA_PIN_USB_VBUS_EN2_PFF1     _GPIO(249)
0206 #define TEGRA_PIN_PFF2              _GPIO(250)
0207 
0208 /* All non-GPIO pins follow */
0209 #define NUM_GPIOS               (TEGRA_PIN_PFF2 + 1)
0210 #define _PIN(offset)                (NUM_GPIOS + (offset))
0211 
0212 /* Non-GPIO pins */
0213 #define TEGRA_PIN_CORE_PWR_REQ          _PIN(0)
0214 #define TEGRA_PIN_CPU_PWR_REQ           _PIN(1)
0215 #define TEGRA_PIN_PWR_INT_N         _PIN(2)
0216 #define TEGRA_PIN_GMI_CLK_LB            _PIN(3)
0217 #define TEGRA_PIN_RESET_OUT_N           _PIN(4)
0218 #define TEGRA_PIN_OWR               _PIN(5)
0219 #define TEGRA_PIN_CLK_32K_IN            _PIN(6)
0220 #define TEGRA_PIN_JTAG_RTCK         _PIN(7)
0221 #define TEGRA_PIN_DSI_B_CLK_P           _PIN(8)
0222 #define TEGRA_PIN_DSI_B_CLK_N           _PIN(9)
0223 #define TEGRA_PIN_DSI_B_D0_P            _PIN(10)
0224 #define TEGRA_PIN_DSI_B_D0_N            _PIN(11)
0225 #define TEGRA_PIN_DSI_B_D1_P            _PIN(12)
0226 #define TEGRA_PIN_DSI_B_D1_N            _PIN(13)
0227 #define TEGRA_PIN_DSI_B_D2_P            _PIN(14)
0228 #define TEGRA_PIN_DSI_B_D2_N            _PIN(15)
0229 #define TEGRA_PIN_DSI_B_D3_P            _PIN(16)
0230 #define TEGRA_PIN_DSI_B_D3_N            _PIN(17)
0231 
0232 static const struct pinctrl_pin_desc tegra124_pins[] = {
0233     PINCTRL_PIN(TEGRA_PIN_CLK_32K_OUT_PA0, "CLK_32K_OUT PA0"),
0234     PINCTRL_PIN(TEGRA_PIN_UART3_CTS_N_PA1, "UART3_CTS_N PA1"),
0235     PINCTRL_PIN(TEGRA_PIN_DAP2_FS_PA2, "DAP2_FS PA2"),
0236     PINCTRL_PIN(TEGRA_PIN_DAP2_SCLK_PA3, "DAP2_SCLK PA3"),
0237     PINCTRL_PIN(TEGRA_PIN_DAP2_DIN_PA4, "DAP2_DIN PA4"),
0238     PINCTRL_PIN(TEGRA_PIN_DAP2_DOUT_PA5, "DAP2_DOUT PA5"),
0239     PINCTRL_PIN(TEGRA_PIN_SDMMC3_CLK_PA6, "SDMMC3_CLK PA6"),
0240     PINCTRL_PIN(TEGRA_PIN_SDMMC3_CMD_PA7, "SDMMC3_CMD PA7"),
0241     PINCTRL_PIN(TEGRA_PIN_PB0, "PB0"),
0242     PINCTRL_PIN(TEGRA_PIN_PB1, "PB1"),
0243     PINCTRL_PIN(TEGRA_PIN_SDMMC3_DAT3_PB4, "SDMMC3_DAT3 PB4"),
0244     PINCTRL_PIN(TEGRA_PIN_SDMMC3_DAT2_PB5, "SDMMC3_DAT2 PB5"),
0245     PINCTRL_PIN(TEGRA_PIN_SDMMC3_DAT1_PB6, "SDMMC3_DAT1 PB6"),
0246     PINCTRL_PIN(TEGRA_PIN_SDMMC3_DAT0_PB7, "SDMMC3_DAT0 PB7"),
0247     PINCTRL_PIN(TEGRA_PIN_UART3_RTS_N_PC0, "UART3_RTS_N PC0"),
0248     PINCTRL_PIN(TEGRA_PIN_UART2_TXD_PC2, "UART2_TXD PC2"),
0249     PINCTRL_PIN(TEGRA_PIN_UART2_RXD_PC3, "UART2_RXD PC3"),
0250     PINCTRL_PIN(TEGRA_PIN_GEN1_I2C_SCL_PC4, "GEN1_I2C_SCL PC4"),
0251     PINCTRL_PIN(TEGRA_PIN_GEN1_I2C_SDA_PC5, "GEN1_I2C_SDA PC5"),
0252     PINCTRL_PIN(TEGRA_PIN_PC7, "PC7"),
0253     PINCTRL_PIN(TEGRA_PIN_PG0, "PG0"),
0254     PINCTRL_PIN(TEGRA_PIN_PG1, "PG1"),
0255     PINCTRL_PIN(TEGRA_PIN_PG2, "PG2"),
0256     PINCTRL_PIN(TEGRA_PIN_PG3, "PG3"),
0257     PINCTRL_PIN(TEGRA_PIN_PG4, "PG4"),
0258     PINCTRL_PIN(TEGRA_PIN_PG5, "PG5"),
0259     PINCTRL_PIN(TEGRA_PIN_PG6, "PG6"),
0260     PINCTRL_PIN(TEGRA_PIN_PG7, "PG7"),
0261     PINCTRL_PIN(TEGRA_PIN_PH0, "PH0"),
0262     PINCTRL_PIN(TEGRA_PIN_PH1, "PH1"),
0263     PINCTRL_PIN(TEGRA_PIN_PH2, "PH2"),
0264     PINCTRL_PIN(TEGRA_PIN_PH3, "PH3"),
0265     PINCTRL_PIN(TEGRA_PIN_PH4, "PH4"),
0266     PINCTRL_PIN(TEGRA_PIN_PH5, "PH5"),
0267     PINCTRL_PIN(TEGRA_PIN_PH6, "PH6"),
0268     PINCTRL_PIN(TEGRA_PIN_PH7, "PH7"),
0269     PINCTRL_PIN(TEGRA_PIN_PI0, "PI0"),
0270     PINCTRL_PIN(TEGRA_PIN_PI1, "PI1"),
0271     PINCTRL_PIN(TEGRA_PIN_PI2, "PI2"),
0272     PINCTRL_PIN(TEGRA_PIN_PI3, "PI3"),
0273     PINCTRL_PIN(TEGRA_PIN_PI4, "PI4"),
0274     PINCTRL_PIN(TEGRA_PIN_PI5, "PI5"),
0275     PINCTRL_PIN(TEGRA_PIN_PI6, "PI6"),
0276     PINCTRL_PIN(TEGRA_PIN_PI7, "PI7"),
0277     PINCTRL_PIN(TEGRA_PIN_PJ0, "PJ0"),
0278     PINCTRL_PIN(TEGRA_PIN_PJ2, "PJ2"),
0279     PINCTRL_PIN(TEGRA_PIN_UART2_CTS_N_PJ5, "UART2_CTS_N PJ5"),
0280     PINCTRL_PIN(TEGRA_PIN_UART2_RTS_N_PJ6, "UART2_RTS_N PJ6"),
0281     PINCTRL_PIN(TEGRA_PIN_PJ7, "PJ7"),
0282     PINCTRL_PIN(TEGRA_PIN_PK0, "PK0"),
0283     PINCTRL_PIN(TEGRA_PIN_PK1, "PK1"),
0284     PINCTRL_PIN(TEGRA_PIN_PK2, "PK2"),
0285     PINCTRL_PIN(TEGRA_PIN_PK3, "PK3"),
0286     PINCTRL_PIN(TEGRA_PIN_PK4, "PK4"),
0287     PINCTRL_PIN(TEGRA_PIN_SPDIF_OUT_PK5, "SPDIF_OUT PK5"),
0288     PINCTRL_PIN(TEGRA_PIN_SPDIF_IN_PK6, "SPDIF_IN PK6"),
0289     PINCTRL_PIN(TEGRA_PIN_PK7, "PK7"),
0290     PINCTRL_PIN(TEGRA_PIN_DAP1_FS_PN0, "DAP1_FS PN0"),
0291     PINCTRL_PIN(TEGRA_PIN_DAP1_DIN_PN1, "DAP1_DIN PN1"),
0292     PINCTRL_PIN(TEGRA_PIN_DAP1_DOUT_PN2, "DAP1_DOUT PN2"),
0293     PINCTRL_PIN(TEGRA_PIN_DAP1_SCLK_PN3, "DAP1_SCLK PN3"),
0294     PINCTRL_PIN(TEGRA_PIN_USB_VBUS_EN0_PN4, "USB_VBUS_EN0 PN4"),
0295     PINCTRL_PIN(TEGRA_PIN_USB_VBUS_EN1_PN5, "USB_VBUS_EN1 PN5"),
0296     PINCTRL_PIN(TEGRA_PIN_HDMI_INT_PN7, "HDMI_INT PN7"),
0297     PINCTRL_PIN(TEGRA_PIN_ULPI_DATA7_PO0, "ULPI_DATA7 PO0"),
0298     PINCTRL_PIN(TEGRA_PIN_ULPI_DATA0_PO1, "ULPI_DATA0 PO1"),
0299     PINCTRL_PIN(TEGRA_PIN_ULPI_DATA1_PO2, "ULPI_DATA1 PO2"),
0300     PINCTRL_PIN(TEGRA_PIN_ULPI_DATA2_PO3, "ULPI_DATA2 PO3"),
0301     PINCTRL_PIN(TEGRA_PIN_ULPI_DATA3_PO4, "ULPI_DATA3 PO4"),
0302     PINCTRL_PIN(TEGRA_PIN_ULPI_DATA4_PO5, "ULPI_DATA4 PO5"),
0303     PINCTRL_PIN(TEGRA_PIN_ULPI_DATA5_PO6, "ULPI_DATA5 PO6"),
0304     PINCTRL_PIN(TEGRA_PIN_ULPI_DATA6_PO7, "ULPI_DATA6 PO7"),
0305     PINCTRL_PIN(TEGRA_PIN_DAP3_FS_PP0, "DAP3_FS PP0"),
0306     PINCTRL_PIN(TEGRA_PIN_DAP3_DIN_PP1, "DAP3_DIN PP1"),
0307     PINCTRL_PIN(TEGRA_PIN_DAP3_DOUT_PP2, "DAP3_DOUT PP2"),
0308     PINCTRL_PIN(TEGRA_PIN_DAP3_SCLK_PP3, "DAP3_SCLK PP3"),
0309     PINCTRL_PIN(TEGRA_PIN_DAP4_FS_PP4, "DAP4_FS PP4"),
0310     PINCTRL_PIN(TEGRA_PIN_DAP4_DIN_PP5, "DAP4_DIN PP5"),
0311     PINCTRL_PIN(TEGRA_PIN_DAP4_DOUT_PP6, "DAP4_DOUT PP6"),
0312     PINCTRL_PIN(TEGRA_PIN_DAP4_SCLK_PP7, "DAP4_SCLK PP7"),
0313     PINCTRL_PIN(TEGRA_PIN_KB_COL0_PQ0, "KB_COL0 PQ0"),
0314     PINCTRL_PIN(TEGRA_PIN_KB_COL1_PQ1, "KB_COL1 PQ1"),
0315     PINCTRL_PIN(TEGRA_PIN_KB_COL2_PQ2, "KB_COL2 PQ2"),
0316     PINCTRL_PIN(TEGRA_PIN_KB_COL3_PQ3, "KB_COL3 PQ3"),
0317     PINCTRL_PIN(TEGRA_PIN_KB_COL4_PQ4, "KB_COL4 PQ4"),
0318     PINCTRL_PIN(TEGRA_PIN_KB_COL5_PQ5, "KB_COL5 PQ5"),
0319     PINCTRL_PIN(TEGRA_PIN_KB_COL6_PQ6, "KB_COL6 PQ6"),
0320     PINCTRL_PIN(TEGRA_PIN_KB_COL7_PQ7, "KB_COL7 PQ7"),
0321     PINCTRL_PIN(TEGRA_PIN_KB_ROW0_PR0, "KB_ROW0 PR0"),
0322     PINCTRL_PIN(TEGRA_PIN_KB_ROW1_PR1, "KB_ROW1 PR1"),
0323     PINCTRL_PIN(TEGRA_PIN_KB_ROW2_PR2, "KB_ROW2 PR2"),
0324     PINCTRL_PIN(TEGRA_PIN_KB_ROW3_PR3, "KB_ROW3 PR3"),
0325     PINCTRL_PIN(TEGRA_PIN_KB_ROW4_PR4, "KB_ROW4 PR4"),
0326     PINCTRL_PIN(TEGRA_PIN_KB_ROW5_PR5, "KB_ROW5 PR5"),
0327     PINCTRL_PIN(TEGRA_PIN_KB_ROW6_PR6, "KB_ROW6 PR6"),
0328     PINCTRL_PIN(TEGRA_PIN_KB_ROW7_PR7, "KB_ROW7 PR7"),
0329     PINCTRL_PIN(TEGRA_PIN_KB_ROW8_PS0, "KB_ROW8 PS0"),
0330     PINCTRL_PIN(TEGRA_PIN_KB_ROW9_PS1, "KB_ROW9 PS1"),
0331     PINCTRL_PIN(TEGRA_PIN_KB_ROW10_PS2, "KB_ROW10 PS2"),
0332     PINCTRL_PIN(TEGRA_PIN_KB_ROW11_PS3, "KB_ROW11 PS3"),
0333     PINCTRL_PIN(TEGRA_PIN_KB_ROW12_PS4, "KB_ROW12 PS4"),
0334     PINCTRL_PIN(TEGRA_PIN_KB_ROW13_PS5, "KB_ROW13 PS5"),
0335     PINCTRL_PIN(TEGRA_PIN_KB_ROW14_PS6, "KB_ROW14 PS6"),
0336     PINCTRL_PIN(TEGRA_PIN_KB_ROW15_PS7, "KB_ROW15 PS7"),
0337     PINCTRL_PIN(TEGRA_PIN_KB_ROW16_PT0, "KB_ROW16 PT0"),
0338     PINCTRL_PIN(TEGRA_PIN_KB_ROW17_PT1, "KB_ROW17 PT1"),
0339     PINCTRL_PIN(TEGRA_PIN_GEN2_I2C_SCL_PT5, "GEN2_I2C_SCL PT5"),
0340     PINCTRL_PIN(TEGRA_PIN_GEN2_I2C_SDA_PT6, "GEN2_I2C_SDA PT6"),
0341     PINCTRL_PIN(TEGRA_PIN_SDMMC4_CMD_PT7, "SDMMC4_CMD PT7"),
0342     PINCTRL_PIN(TEGRA_PIN_PU0, "PU0"),
0343     PINCTRL_PIN(TEGRA_PIN_PU1, "PU1"),
0344     PINCTRL_PIN(TEGRA_PIN_PU2, "PU2"),
0345     PINCTRL_PIN(TEGRA_PIN_PU3, "PU3"),
0346     PINCTRL_PIN(TEGRA_PIN_PU4, "PU4"),
0347     PINCTRL_PIN(TEGRA_PIN_PU5, "PU5"),
0348     PINCTRL_PIN(TEGRA_PIN_PU6, "PU6"),
0349     PINCTRL_PIN(TEGRA_PIN_PV0, "PV0"),
0350     PINCTRL_PIN(TEGRA_PIN_PV1, "PV1"),
0351     PINCTRL_PIN(TEGRA_PIN_SDMMC3_CD_N_PV2, "SDMMC3_CD_N PV2"),
0352     PINCTRL_PIN(TEGRA_PIN_SDMMC1_WP_N_PV3, "SDMMC1_WP_N PV3"),
0353     PINCTRL_PIN(TEGRA_PIN_DDC_SCL_PV4, "DDC_SCL PV4"),
0354     PINCTRL_PIN(TEGRA_PIN_DDC_SDA_PV5, "DDC_SDA PV5"),
0355     PINCTRL_PIN(TEGRA_PIN_GPIO_W2_AUD_PW2, "GPIO_W2_AUD PW2"),
0356     PINCTRL_PIN(TEGRA_PIN_GPIO_W3_AUD_PW3, "GPIO_W3_AUD PW3"),
0357     PINCTRL_PIN(TEGRA_PIN_DAP_MCLK1_PW4, "DAP_MCLK1 PW4"),
0358     PINCTRL_PIN(TEGRA_PIN_CLK2_OUT_PW5, "CLK2_OUT PW5"),
0359     PINCTRL_PIN(TEGRA_PIN_UART3_TXD_PW6, "UART3_TXD PW6"),
0360     PINCTRL_PIN(TEGRA_PIN_UART3_RXD_PW7, "UART3_RXD PW7"),
0361     PINCTRL_PIN(TEGRA_PIN_DVFS_PWM_PX0, "DVFS_PWM PX0"),
0362     PINCTRL_PIN(TEGRA_PIN_GPIO_X1_AUD_PX1, "GPIO_X1_AUD PX1"),
0363     PINCTRL_PIN(TEGRA_PIN_DVFS_CLK_PX2, "DVFS_CLK PX2"),
0364     PINCTRL_PIN(TEGRA_PIN_GPIO_X3_AUD_PX3, "GPIO_X3_AUD PX3"),
0365     PINCTRL_PIN(TEGRA_PIN_GPIO_X4_AUD_PX4, "GPIO_X4_AUD PX4"),
0366     PINCTRL_PIN(TEGRA_PIN_GPIO_X5_AUD_PX5, "GPIO_X5_AUD PX5"),
0367     PINCTRL_PIN(TEGRA_PIN_GPIO_X6_AUD_PX6, "GPIO_X6_AUD PX6"),
0368     PINCTRL_PIN(TEGRA_PIN_GPIO_X7_AUD_PX7, "GPIO_X7_AUD PX7"),
0369     PINCTRL_PIN(TEGRA_PIN_ULPI_CLK_PY0, "ULPI_CLK PY0"),
0370     PINCTRL_PIN(TEGRA_PIN_ULPI_DIR_PY1, "ULPI_DIR PY1"),
0371     PINCTRL_PIN(TEGRA_PIN_ULPI_NXT_PY2, "ULPI_NXT PY2"),
0372     PINCTRL_PIN(TEGRA_PIN_ULPI_STP_PY3, "ULPI_STP PY3"),
0373     PINCTRL_PIN(TEGRA_PIN_SDMMC1_DAT3_PY4, "SDMMC1_DAT3 PY4"),
0374     PINCTRL_PIN(TEGRA_PIN_SDMMC1_DAT2_PY5, "SDMMC1_DAT2 PY5"),
0375     PINCTRL_PIN(TEGRA_PIN_SDMMC1_DAT1_PY6, "SDMMC1_DAT1 PY6"),
0376     PINCTRL_PIN(TEGRA_PIN_SDMMC1_DAT0_PY7, "SDMMC1_DAT0 PY7"),
0377     PINCTRL_PIN(TEGRA_PIN_SDMMC1_CLK_PZ0, "SDMMC1_CLK PZ0"),
0378     PINCTRL_PIN(TEGRA_PIN_SDMMC1_CMD_PZ1, "SDMMC1_CMD PZ1"),
0379     PINCTRL_PIN(TEGRA_PIN_PWR_I2C_SCL_PZ6, "PWR_I2C_SCL PZ6"),
0380     PINCTRL_PIN(TEGRA_PIN_PWR_I2C_SDA_PZ7, "PWR_I2C_SDA PZ7"),
0381     PINCTRL_PIN(TEGRA_PIN_SDMMC4_DAT0_PAA0, "SDMMC4_DAT0 PAA0"),
0382     PINCTRL_PIN(TEGRA_PIN_SDMMC4_DAT1_PAA1, "SDMMC4_DAT1 PAA1"),
0383     PINCTRL_PIN(TEGRA_PIN_SDMMC4_DAT2_PAA2, "SDMMC4_DAT2 PAA2"),
0384     PINCTRL_PIN(TEGRA_PIN_SDMMC4_DAT3_PAA3, "SDMMC4_DAT3 PAA3"),
0385     PINCTRL_PIN(TEGRA_PIN_SDMMC4_DAT4_PAA4, "SDMMC4_DAT4 PAA4"),
0386     PINCTRL_PIN(TEGRA_PIN_SDMMC4_DAT5_PAA5, "SDMMC4_DAT5 PAA5"),
0387     PINCTRL_PIN(TEGRA_PIN_SDMMC4_DAT6_PAA6, "SDMMC4_DAT6 PAA6"),
0388     PINCTRL_PIN(TEGRA_PIN_SDMMC4_DAT7_PAA7, "SDMMC4_DAT7 PAA7"),
0389     PINCTRL_PIN(TEGRA_PIN_PBB0, "PBB0"),
0390     PINCTRL_PIN(TEGRA_PIN_CAM_I2C_SCL_PBB1, "CAM_I2C_SCL PBB1"),
0391     PINCTRL_PIN(TEGRA_PIN_CAM_I2C_SDA_PBB2, "CAM_I2C_SDA PBB2"),
0392     PINCTRL_PIN(TEGRA_PIN_PBB3, "PBB3"),
0393     PINCTRL_PIN(TEGRA_PIN_PBB4, "PBB4"),
0394     PINCTRL_PIN(TEGRA_PIN_PBB5, "PBB5"),
0395     PINCTRL_PIN(TEGRA_PIN_PBB6, "PBB6"),
0396     PINCTRL_PIN(TEGRA_PIN_PBB7, "PBB7"),
0397     PINCTRL_PIN(TEGRA_PIN_CAM_MCLK_PCC0, "CAM_MCLK PCC0"),
0398     PINCTRL_PIN(TEGRA_PIN_PCC1, "PCC1"),
0399     PINCTRL_PIN(TEGRA_PIN_PCC2, "PCC2"),
0400     PINCTRL_PIN(TEGRA_PIN_SDMMC4_CLK_PCC4, "SDMMC4_CLK PCC4"),
0401     PINCTRL_PIN(TEGRA_PIN_CLK2_REQ_PCC5, "CLK2_REQ PCC5"),
0402     PINCTRL_PIN(TEGRA_PIN_PEX_L0_RST_N_PDD1, "PEX_L0_RST_N PDD1"),
0403     PINCTRL_PIN(TEGRA_PIN_PEX_L0_CLKREQ_N_PDD2, "PEX_L0_CLKREQ_N PDD2"),
0404     PINCTRL_PIN(TEGRA_PIN_PEX_WAKE_N_PDD3, "PEX_WAKE_N PDD3"),
0405     PINCTRL_PIN(TEGRA_PIN_PEX_L1_RST_N_PDD5, "PEX_L1_RST_N PDD5"),
0406     PINCTRL_PIN(TEGRA_PIN_PEX_L1_CLKREQ_N_PDD6, "PEX_L1_CLKREQ_N PDD6"),
0407     PINCTRL_PIN(TEGRA_PIN_CLK3_OUT_PEE0, "CLK3_OUT PEE0"),
0408     PINCTRL_PIN(TEGRA_PIN_CLK3_REQ_PEE1, "CLK3_REQ PEE1"),
0409     PINCTRL_PIN(TEGRA_PIN_DAP_MCLK1_REQ_PEE2, "DAP_MCLK1_REQ PEE2"),
0410     PINCTRL_PIN(TEGRA_PIN_HDMI_CEC_PEE3, "HDMI_CEC PEE3"),
0411     PINCTRL_PIN(TEGRA_PIN_SDMMC3_CLK_LB_OUT_PEE4, "SDMMC3_CLK_LB_OUT PEE4"),
0412     PINCTRL_PIN(TEGRA_PIN_SDMMC3_CLK_LB_IN_PEE5, "SDMMC3_CLK_LB_IN PEE5"),
0413     PINCTRL_PIN(TEGRA_PIN_DP_HPD_PFF0, "DP_HPD PFF0"),
0414     PINCTRL_PIN(TEGRA_PIN_USB_VBUS_EN2_PFF1, "USB_VBUS_EN2 PFF1"),
0415     PINCTRL_PIN(TEGRA_PIN_PFF2, "PFF2"),
0416     PINCTRL_PIN(TEGRA_PIN_CORE_PWR_REQ, "CORE_PWR_REQ"),
0417     PINCTRL_PIN(TEGRA_PIN_CPU_PWR_REQ, "CPU_PWR_REQ"),
0418     PINCTRL_PIN(TEGRA_PIN_PWR_INT_N, "PWR_INT_N"),
0419     PINCTRL_PIN(TEGRA_PIN_GMI_CLK_LB, "GMI_CLK_LB"),
0420     PINCTRL_PIN(TEGRA_PIN_RESET_OUT_N, "RESET_OUT_N"),
0421     PINCTRL_PIN(TEGRA_PIN_OWR, "OWR"),
0422     PINCTRL_PIN(TEGRA_PIN_CLK_32K_IN, "CLK_32K_IN"),
0423     PINCTRL_PIN(TEGRA_PIN_JTAG_RTCK, "JTAG_RTCK"),
0424     PINCTRL_PIN(TEGRA_PIN_DSI_B_CLK_P, "DSI_B_CLK_P"),
0425     PINCTRL_PIN(TEGRA_PIN_DSI_B_CLK_N, "DSI_B_CLK_N"),
0426     PINCTRL_PIN(TEGRA_PIN_DSI_B_D0_P, "DSI_B_D0_P"),
0427     PINCTRL_PIN(TEGRA_PIN_DSI_B_D0_N, "DSI_B_D0_N"),
0428     PINCTRL_PIN(TEGRA_PIN_DSI_B_D1_P, "DSI_B_D1_P"),
0429     PINCTRL_PIN(TEGRA_PIN_DSI_B_D1_N, "DSI_B_D1_N"),
0430     PINCTRL_PIN(TEGRA_PIN_DSI_B_D2_P, "DSI_B_D2_P"),
0431     PINCTRL_PIN(TEGRA_PIN_DSI_B_D2_N, "DSI_B_D2_N"),
0432     PINCTRL_PIN(TEGRA_PIN_DSI_B_D3_P, "DSI_B_D3_P"),
0433     PINCTRL_PIN(TEGRA_PIN_DSI_B_D3_N, "DSI_B_D3_N"),
0434 };
0435 
0436 static const unsigned clk_32k_out_pa0_pins[] = {
0437     TEGRA_PIN_CLK_32K_OUT_PA0,
0438 };
0439 
0440 static const unsigned uart3_cts_n_pa1_pins[] = {
0441     TEGRA_PIN_UART3_CTS_N_PA1,
0442 };
0443 
0444 static const unsigned dap2_fs_pa2_pins[] = {
0445     TEGRA_PIN_DAP2_FS_PA2,
0446 };
0447 
0448 static const unsigned dap2_sclk_pa3_pins[] = {
0449     TEGRA_PIN_DAP2_SCLK_PA3,
0450 };
0451 
0452 static const unsigned dap2_din_pa4_pins[] = {
0453     TEGRA_PIN_DAP2_DIN_PA4,
0454 };
0455 
0456 static const unsigned dap2_dout_pa5_pins[] = {
0457     TEGRA_PIN_DAP2_DOUT_PA5,
0458 };
0459 
0460 static const unsigned sdmmc3_clk_pa6_pins[] = {
0461     TEGRA_PIN_SDMMC3_CLK_PA6,
0462 };
0463 
0464 static const unsigned sdmmc3_cmd_pa7_pins[] = {
0465     TEGRA_PIN_SDMMC3_CMD_PA7,
0466 };
0467 
0468 static const unsigned pb0_pins[] = {
0469     TEGRA_PIN_PB0,
0470 };
0471 
0472 static const unsigned pb1_pins[] = {
0473     TEGRA_PIN_PB1,
0474 };
0475 
0476 static const unsigned sdmmc3_dat3_pb4_pins[] = {
0477     TEGRA_PIN_SDMMC3_DAT3_PB4,
0478 };
0479 
0480 static const unsigned sdmmc3_dat2_pb5_pins[] = {
0481     TEGRA_PIN_SDMMC3_DAT2_PB5,
0482 };
0483 
0484 static const unsigned sdmmc3_dat1_pb6_pins[] = {
0485     TEGRA_PIN_SDMMC3_DAT1_PB6,
0486 };
0487 
0488 static const unsigned sdmmc3_dat0_pb7_pins[] = {
0489     TEGRA_PIN_SDMMC3_DAT0_PB7,
0490 };
0491 
0492 static const unsigned uart3_rts_n_pc0_pins[] = {
0493     TEGRA_PIN_UART3_RTS_N_PC0,
0494 };
0495 
0496 static const unsigned uart2_txd_pc2_pins[] = {
0497     TEGRA_PIN_UART2_TXD_PC2,
0498 };
0499 
0500 static const unsigned uart2_rxd_pc3_pins[] = {
0501     TEGRA_PIN_UART2_RXD_PC3,
0502 };
0503 
0504 static const unsigned gen1_i2c_scl_pc4_pins[] = {
0505     TEGRA_PIN_GEN1_I2C_SCL_PC4,
0506 };
0507 
0508 static const unsigned gen1_i2c_sda_pc5_pins[] = {
0509     TEGRA_PIN_GEN1_I2C_SDA_PC5,
0510 };
0511 
0512 static const unsigned pc7_pins[] = {
0513     TEGRA_PIN_PC7,
0514 };
0515 
0516 static const unsigned pg0_pins[] = {
0517     TEGRA_PIN_PG0,
0518 };
0519 
0520 static const unsigned pg1_pins[] = {
0521     TEGRA_PIN_PG1,
0522 };
0523 
0524 static const unsigned pg2_pins[] = {
0525     TEGRA_PIN_PG2,
0526 };
0527 
0528 static const unsigned pg3_pins[] = {
0529     TEGRA_PIN_PG3,
0530 };
0531 
0532 static const unsigned pg4_pins[] = {
0533     TEGRA_PIN_PG4,
0534 };
0535 
0536 static const unsigned pg5_pins[] = {
0537     TEGRA_PIN_PG5,
0538 };
0539 
0540 static const unsigned pg6_pins[] = {
0541     TEGRA_PIN_PG6,
0542 };
0543 
0544 static const unsigned pg7_pins[] = {
0545     TEGRA_PIN_PG7,
0546 };
0547 
0548 static const unsigned ph0_pins[] = {
0549     TEGRA_PIN_PH0,
0550 };
0551 
0552 static const unsigned ph1_pins[] = {
0553     TEGRA_PIN_PH1,
0554 };
0555 
0556 static const unsigned ph2_pins[] = {
0557     TEGRA_PIN_PH2,
0558 };
0559 
0560 static const unsigned ph3_pins[] = {
0561     TEGRA_PIN_PH3,
0562 };
0563 
0564 static const unsigned ph4_pins[] = {
0565     TEGRA_PIN_PH4,
0566 };
0567 
0568 static const unsigned ph5_pins[] = {
0569     TEGRA_PIN_PH5,
0570 };
0571 
0572 static const unsigned ph6_pins[] = {
0573     TEGRA_PIN_PH6,
0574 };
0575 
0576 static const unsigned ph7_pins[] = {
0577     TEGRA_PIN_PH7,
0578 };
0579 
0580 static const unsigned pi0_pins[] = {
0581     TEGRA_PIN_PI0,
0582 };
0583 
0584 static const unsigned pi1_pins[] = {
0585     TEGRA_PIN_PI1,
0586 };
0587 
0588 static const unsigned pi2_pins[] = {
0589     TEGRA_PIN_PI2,
0590 };
0591 
0592 static const unsigned pi3_pins[] = {
0593     TEGRA_PIN_PI3,
0594 };
0595 
0596 static const unsigned pi4_pins[] = {
0597     TEGRA_PIN_PI4,
0598 };
0599 
0600 static const unsigned pi5_pins[] = {
0601     TEGRA_PIN_PI5,
0602 };
0603 
0604 static const unsigned pi6_pins[] = {
0605     TEGRA_PIN_PI6,
0606 };
0607 
0608 static const unsigned pi7_pins[] = {
0609     TEGRA_PIN_PI7,
0610 };
0611 
0612 static const unsigned pj0_pins[] = {
0613     TEGRA_PIN_PJ0,
0614 };
0615 
0616 static const unsigned pj2_pins[] = {
0617     TEGRA_PIN_PJ2,
0618 };
0619 
0620 static const unsigned uart2_cts_n_pj5_pins[] = {
0621     TEGRA_PIN_UART2_CTS_N_PJ5,
0622 };
0623 
0624 static const unsigned uart2_rts_n_pj6_pins[] = {
0625     TEGRA_PIN_UART2_RTS_N_PJ6,
0626 };
0627 
0628 static const unsigned pj7_pins[] = {
0629     TEGRA_PIN_PJ7,
0630 };
0631 
0632 static const unsigned pk0_pins[] = {
0633     TEGRA_PIN_PK0,
0634 };
0635 
0636 static const unsigned pk1_pins[] = {
0637     TEGRA_PIN_PK1,
0638 };
0639 
0640 static const unsigned pk2_pins[] = {
0641     TEGRA_PIN_PK2,
0642 };
0643 
0644 static const unsigned pk3_pins[] = {
0645     TEGRA_PIN_PK3,
0646 };
0647 
0648 static const unsigned pk4_pins[] = {
0649     TEGRA_PIN_PK4,
0650 };
0651 
0652 static const unsigned spdif_out_pk5_pins[] = {
0653     TEGRA_PIN_SPDIF_OUT_PK5,
0654 };
0655 
0656 static const unsigned spdif_in_pk6_pins[] = {
0657     TEGRA_PIN_SPDIF_IN_PK6,
0658 };
0659 
0660 static const unsigned pk7_pins[] = {
0661     TEGRA_PIN_PK7,
0662 };
0663 
0664 static const unsigned dap1_fs_pn0_pins[] = {
0665     TEGRA_PIN_DAP1_FS_PN0,
0666 };
0667 
0668 static const unsigned dap1_din_pn1_pins[] = {
0669     TEGRA_PIN_DAP1_DIN_PN1,
0670 };
0671 
0672 static const unsigned dap1_dout_pn2_pins[] = {
0673     TEGRA_PIN_DAP1_DOUT_PN2,
0674 };
0675 
0676 static const unsigned dap1_sclk_pn3_pins[] = {
0677     TEGRA_PIN_DAP1_SCLK_PN3,
0678 };
0679 
0680 static const unsigned usb_vbus_en0_pn4_pins[] = {
0681     TEGRA_PIN_USB_VBUS_EN0_PN4,
0682 };
0683 
0684 static const unsigned usb_vbus_en1_pn5_pins[] = {
0685     TEGRA_PIN_USB_VBUS_EN1_PN5,
0686 };
0687 
0688 static const unsigned hdmi_int_pn7_pins[] = {
0689     TEGRA_PIN_HDMI_INT_PN7,
0690 };
0691 
0692 static const unsigned ulpi_data7_po0_pins[] = {
0693     TEGRA_PIN_ULPI_DATA7_PO0,
0694 };
0695 
0696 static const unsigned ulpi_data0_po1_pins[] = {
0697     TEGRA_PIN_ULPI_DATA0_PO1,
0698 };
0699 
0700 static const unsigned ulpi_data1_po2_pins[] = {
0701     TEGRA_PIN_ULPI_DATA1_PO2,
0702 };
0703 
0704 static const unsigned ulpi_data2_po3_pins[] = {
0705     TEGRA_PIN_ULPI_DATA2_PO3,
0706 };
0707 
0708 static const unsigned ulpi_data3_po4_pins[] = {
0709     TEGRA_PIN_ULPI_DATA3_PO4,
0710 };
0711 
0712 static const unsigned ulpi_data4_po5_pins[] = {
0713     TEGRA_PIN_ULPI_DATA4_PO5,
0714 };
0715 
0716 static const unsigned ulpi_data5_po6_pins[] = {
0717     TEGRA_PIN_ULPI_DATA5_PO6,
0718 };
0719 
0720 static const unsigned ulpi_data6_po7_pins[] = {
0721     TEGRA_PIN_ULPI_DATA6_PO7,
0722 };
0723 
0724 static const unsigned dap3_fs_pp0_pins[] = {
0725     TEGRA_PIN_DAP3_FS_PP0,
0726 };
0727 
0728 static const unsigned dap3_din_pp1_pins[] = {
0729     TEGRA_PIN_DAP3_DIN_PP1,
0730 };
0731 
0732 static const unsigned dap3_dout_pp2_pins[] = {
0733     TEGRA_PIN_DAP3_DOUT_PP2,
0734 };
0735 
0736 static const unsigned dap3_sclk_pp3_pins[] = {
0737     TEGRA_PIN_DAP3_SCLK_PP3,
0738 };
0739 
0740 static const unsigned dap4_fs_pp4_pins[] = {
0741     TEGRA_PIN_DAP4_FS_PP4,
0742 };
0743 
0744 static const unsigned dap4_din_pp5_pins[] = {
0745     TEGRA_PIN_DAP4_DIN_PP5,
0746 };
0747 
0748 static const unsigned dap4_dout_pp6_pins[] = {
0749     TEGRA_PIN_DAP4_DOUT_PP6,
0750 };
0751 
0752 static const unsigned dap4_sclk_pp7_pins[] = {
0753     TEGRA_PIN_DAP4_SCLK_PP7,
0754 };
0755 
0756 static const unsigned kb_col0_pq0_pins[] = {
0757     TEGRA_PIN_KB_COL0_PQ0,
0758 };
0759 
0760 static const unsigned kb_col1_pq1_pins[] = {
0761     TEGRA_PIN_KB_COL1_PQ1,
0762 };
0763 
0764 static const unsigned kb_col2_pq2_pins[] = {
0765     TEGRA_PIN_KB_COL2_PQ2,
0766 };
0767 
0768 static const unsigned kb_col3_pq3_pins[] = {
0769     TEGRA_PIN_KB_COL3_PQ3,
0770 };
0771 
0772 static const unsigned kb_col4_pq4_pins[] = {
0773     TEGRA_PIN_KB_COL4_PQ4,
0774 };
0775 
0776 static const unsigned kb_col5_pq5_pins[] = {
0777     TEGRA_PIN_KB_COL5_PQ5,
0778 };
0779 
0780 static const unsigned kb_col6_pq6_pins[] = {
0781     TEGRA_PIN_KB_COL6_PQ6,
0782 };
0783 
0784 static const unsigned kb_col7_pq7_pins[] = {
0785     TEGRA_PIN_KB_COL7_PQ7,
0786 };
0787 
0788 static const unsigned kb_row0_pr0_pins[] = {
0789     TEGRA_PIN_KB_ROW0_PR0,
0790 };
0791 
0792 static const unsigned kb_row1_pr1_pins[] = {
0793     TEGRA_PIN_KB_ROW1_PR1,
0794 };
0795 
0796 static const unsigned kb_row2_pr2_pins[] = {
0797     TEGRA_PIN_KB_ROW2_PR2,
0798 };
0799 
0800 static const unsigned kb_row3_pr3_pins[] = {
0801     TEGRA_PIN_KB_ROW3_PR3,
0802 };
0803 
0804 static const unsigned kb_row4_pr4_pins[] = {
0805     TEGRA_PIN_KB_ROW4_PR4,
0806 };
0807 
0808 static const unsigned kb_row5_pr5_pins[] = {
0809     TEGRA_PIN_KB_ROW5_PR5,
0810 };
0811 
0812 static const unsigned kb_row6_pr6_pins[] = {
0813     TEGRA_PIN_KB_ROW6_PR6,
0814 };
0815 
0816 static const unsigned kb_row7_pr7_pins[] = {
0817     TEGRA_PIN_KB_ROW7_PR7,
0818 };
0819 
0820 static const unsigned kb_row8_ps0_pins[] = {
0821     TEGRA_PIN_KB_ROW8_PS0,
0822 };
0823 
0824 static const unsigned kb_row9_ps1_pins[] = {
0825     TEGRA_PIN_KB_ROW9_PS1,
0826 };
0827 
0828 static const unsigned kb_row10_ps2_pins[] = {
0829     TEGRA_PIN_KB_ROW10_PS2,
0830 };
0831 
0832 static const unsigned kb_row11_ps3_pins[] = {
0833     TEGRA_PIN_KB_ROW11_PS3,
0834 };
0835 
0836 static const unsigned kb_row12_ps4_pins[] = {
0837     TEGRA_PIN_KB_ROW12_PS4,
0838 };
0839 
0840 static const unsigned kb_row13_ps5_pins[] = {
0841     TEGRA_PIN_KB_ROW13_PS5,
0842 };
0843 
0844 static const unsigned kb_row14_ps6_pins[] = {
0845     TEGRA_PIN_KB_ROW14_PS6,
0846 };
0847 
0848 static const unsigned kb_row15_ps7_pins[] = {
0849     TEGRA_PIN_KB_ROW15_PS7,
0850 };
0851 
0852 static const unsigned kb_row16_pt0_pins[] = {
0853     TEGRA_PIN_KB_ROW16_PT0,
0854 };
0855 
0856 static const unsigned kb_row17_pt1_pins[] = {
0857     TEGRA_PIN_KB_ROW17_PT1,
0858 };
0859 
0860 static const unsigned gen2_i2c_scl_pt5_pins[] = {
0861     TEGRA_PIN_GEN2_I2C_SCL_PT5,
0862 };
0863 
0864 static const unsigned gen2_i2c_sda_pt6_pins[] = {
0865     TEGRA_PIN_GEN2_I2C_SDA_PT6,
0866 };
0867 
0868 static const unsigned sdmmc4_cmd_pt7_pins[] = {
0869     TEGRA_PIN_SDMMC4_CMD_PT7,
0870 };
0871 
0872 static const unsigned pu0_pins[] = {
0873     TEGRA_PIN_PU0,
0874 };
0875 
0876 static const unsigned pu1_pins[] = {
0877     TEGRA_PIN_PU1,
0878 };
0879 
0880 static const unsigned pu2_pins[] = {
0881     TEGRA_PIN_PU2,
0882 };
0883 
0884 static const unsigned pu3_pins[] = {
0885     TEGRA_PIN_PU3,
0886 };
0887 
0888 static const unsigned pu4_pins[] = {
0889     TEGRA_PIN_PU4,
0890 };
0891 
0892 static const unsigned pu5_pins[] = {
0893     TEGRA_PIN_PU5,
0894 };
0895 
0896 static const unsigned pu6_pins[] = {
0897     TEGRA_PIN_PU6,
0898 };
0899 
0900 static const unsigned pv0_pins[] = {
0901     TEGRA_PIN_PV0,
0902 };
0903 
0904 static const unsigned pv1_pins[] = {
0905     TEGRA_PIN_PV1,
0906 };
0907 
0908 static const unsigned sdmmc3_cd_n_pv2_pins[] = {
0909     TEGRA_PIN_SDMMC3_CD_N_PV2,
0910 };
0911 
0912 static const unsigned sdmmc1_wp_n_pv3_pins[] = {
0913     TEGRA_PIN_SDMMC1_WP_N_PV3,
0914 };
0915 
0916 static const unsigned ddc_scl_pv4_pins[] = {
0917     TEGRA_PIN_DDC_SCL_PV4,
0918 };
0919 
0920 static const unsigned ddc_sda_pv5_pins[] = {
0921     TEGRA_PIN_DDC_SDA_PV5,
0922 };
0923 
0924 static const unsigned gpio_w2_aud_pw2_pins[] = {
0925     TEGRA_PIN_GPIO_W2_AUD_PW2,
0926 };
0927 
0928 static const unsigned gpio_w3_aud_pw3_pins[] = {
0929     TEGRA_PIN_GPIO_W3_AUD_PW3,
0930 };
0931 
0932 static const unsigned dap_mclk1_pw4_pins[] = {
0933     TEGRA_PIN_DAP_MCLK1_PW4,
0934 };
0935 
0936 static const unsigned clk2_out_pw5_pins[] = {
0937     TEGRA_PIN_CLK2_OUT_PW5,
0938 };
0939 
0940 static const unsigned uart3_txd_pw6_pins[] = {
0941     TEGRA_PIN_UART3_TXD_PW6,
0942 };
0943 
0944 static const unsigned uart3_rxd_pw7_pins[] = {
0945     TEGRA_PIN_UART3_RXD_PW7,
0946 };
0947 
0948 static const unsigned dvfs_pwm_px0_pins[] = {
0949     TEGRA_PIN_DVFS_PWM_PX0,
0950 };
0951 
0952 static const unsigned gpio_x1_aud_px1_pins[] = {
0953     TEGRA_PIN_GPIO_X1_AUD_PX1,
0954 };
0955 
0956 static const unsigned dvfs_clk_px2_pins[] = {
0957     TEGRA_PIN_DVFS_CLK_PX2,
0958 };
0959 
0960 static const unsigned gpio_x3_aud_px3_pins[] = {
0961     TEGRA_PIN_GPIO_X3_AUD_PX3,
0962 };
0963 
0964 static const unsigned gpio_x4_aud_px4_pins[] = {
0965     TEGRA_PIN_GPIO_X4_AUD_PX4,
0966 };
0967 
0968 static const unsigned gpio_x5_aud_px5_pins[] = {
0969     TEGRA_PIN_GPIO_X5_AUD_PX5,
0970 };
0971 
0972 static const unsigned gpio_x6_aud_px6_pins[] = {
0973     TEGRA_PIN_GPIO_X6_AUD_PX6,
0974 };
0975 
0976 static const unsigned gpio_x7_aud_px7_pins[] = {
0977     TEGRA_PIN_GPIO_X7_AUD_PX7,
0978 };
0979 
0980 static const unsigned ulpi_clk_py0_pins[] = {
0981     TEGRA_PIN_ULPI_CLK_PY0,
0982 };
0983 
0984 static const unsigned ulpi_dir_py1_pins[] = {
0985     TEGRA_PIN_ULPI_DIR_PY1,
0986 };
0987 
0988 static const unsigned ulpi_nxt_py2_pins[] = {
0989     TEGRA_PIN_ULPI_NXT_PY2,
0990 };
0991 
0992 static const unsigned ulpi_stp_py3_pins[] = {
0993     TEGRA_PIN_ULPI_STP_PY3,
0994 };
0995 
0996 static const unsigned sdmmc1_dat3_py4_pins[] = {
0997     TEGRA_PIN_SDMMC1_DAT3_PY4,
0998 };
0999 
1000 static const unsigned sdmmc1_dat2_py5_pins[] = {
1001     TEGRA_PIN_SDMMC1_DAT2_PY5,
1002 };
1003 
1004 static const unsigned sdmmc1_dat1_py6_pins[] = {
1005     TEGRA_PIN_SDMMC1_DAT1_PY6,
1006 };
1007 
1008 static const unsigned sdmmc1_dat0_py7_pins[] = {
1009     TEGRA_PIN_SDMMC1_DAT0_PY7,
1010 };
1011 
1012 static const unsigned sdmmc1_clk_pz0_pins[] = {
1013     TEGRA_PIN_SDMMC1_CLK_PZ0,
1014 };
1015 
1016 static const unsigned sdmmc1_cmd_pz1_pins[] = {
1017     TEGRA_PIN_SDMMC1_CMD_PZ1,
1018 };
1019 
1020 static const unsigned pwr_i2c_scl_pz6_pins[] = {
1021     TEGRA_PIN_PWR_I2C_SCL_PZ6,
1022 };
1023 
1024 static const unsigned pwr_i2c_sda_pz7_pins[] = {
1025     TEGRA_PIN_PWR_I2C_SDA_PZ7,
1026 };
1027 
1028 static const unsigned sdmmc4_dat0_paa0_pins[] = {
1029     TEGRA_PIN_SDMMC4_DAT0_PAA0,
1030 };
1031 
1032 static const unsigned sdmmc4_dat1_paa1_pins[] = {
1033     TEGRA_PIN_SDMMC4_DAT1_PAA1,
1034 };
1035 
1036 static const unsigned sdmmc4_dat2_paa2_pins[] = {
1037     TEGRA_PIN_SDMMC4_DAT2_PAA2,
1038 };
1039 
1040 static const unsigned sdmmc4_dat3_paa3_pins[] = {
1041     TEGRA_PIN_SDMMC4_DAT3_PAA3,
1042 };
1043 
1044 static const unsigned sdmmc4_dat4_paa4_pins[] = {
1045     TEGRA_PIN_SDMMC4_DAT4_PAA4,
1046 };
1047 
1048 static const unsigned sdmmc4_dat5_paa5_pins[] = {
1049     TEGRA_PIN_SDMMC4_DAT5_PAA5,
1050 };
1051 
1052 static const unsigned sdmmc4_dat6_paa6_pins[] = {
1053     TEGRA_PIN_SDMMC4_DAT6_PAA6,
1054 };
1055 
1056 static const unsigned sdmmc4_dat7_paa7_pins[] = {
1057     TEGRA_PIN_SDMMC4_DAT7_PAA7,
1058 };
1059 
1060 static const unsigned pbb0_pins[] = {
1061     TEGRA_PIN_PBB0,
1062 };
1063 
1064 static const unsigned cam_i2c_scl_pbb1_pins[] = {
1065     TEGRA_PIN_CAM_I2C_SCL_PBB1,
1066 };
1067 
1068 static const unsigned cam_i2c_sda_pbb2_pins[] = {
1069     TEGRA_PIN_CAM_I2C_SDA_PBB2,
1070 };
1071 
1072 static const unsigned pbb3_pins[] = {
1073     TEGRA_PIN_PBB3,
1074 };
1075 
1076 static const unsigned pbb4_pins[] = {
1077     TEGRA_PIN_PBB4,
1078 };
1079 
1080 static const unsigned pbb5_pins[] = {
1081     TEGRA_PIN_PBB5,
1082 };
1083 
1084 static const unsigned pbb6_pins[] = {
1085     TEGRA_PIN_PBB6,
1086 };
1087 
1088 static const unsigned pbb7_pins[] = {
1089     TEGRA_PIN_PBB7,
1090 };
1091 
1092 static const unsigned cam_mclk_pcc0_pins[] = {
1093     TEGRA_PIN_CAM_MCLK_PCC0,
1094 };
1095 
1096 static const unsigned pcc1_pins[] = {
1097     TEGRA_PIN_PCC1,
1098 };
1099 
1100 static const unsigned pcc2_pins[] = {
1101     TEGRA_PIN_PCC2,
1102 };
1103 
1104 static const unsigned sdmmc4_clk_pcc4_pins[] = {
1105     TEGRA_PIN_SDMMC4_CLK_PCC4,
1106 };
1107 
1108 static const unsigned clk2_req_pcc5_pins[] = {
1109     TEGRA_PIN_CLK2_REQ_PCC5,
1110 };
1111 
1112 static const unsigned pex_l0_rst_n_pdd1_pins[] = {
1113     TEGRA_PIN_PEX_L0_RST_N_PDD1,
1114 };
1115 
1116 static const unsigned pex_l0_clkreq_n_pdd2_pins[] = {
1117     TEGRA_PIN_PEX_L0_CLKREQ_N_PDD2,
1118 };
1119 
1120 static const unsigned pex_wake_n_pdd3_pins[] = {
1121     TEGRA_PIN_PEX_WAKE_N_PDD3,
1122 };
1123 
1124 static const unsigned pex_l1_rst_n_pdd5_pins[] = {
1125     TEGRA_PIN_PEX_L1_RST_N_PDD5,
1126 };
1127 
1128 static const unsigned pex_l1_clkreq_n_pdd6_pins[] = {
1129     TEGRA_PIN_PEX_L1_CLKREQ_N_PDD6,
1130 };
1131 
1132 static const unsigned clk3_out_pee0_pins[] = {
1133     TEGRA_PIN_CLK3_OUT_PEE0,
1134 };
1135 
1136 static const unsigned clk3_req_pee1_pins[] = {
1137     TEGRA_PIN_CLK3_REQ_PEE1,
1138 };
1139 
1140 static const unsigned dap_mclk1_req_pee2_pins[] = {
1141     TEGRA_PIN_DAP_MCLK1_REQ_PEE2,
1142 };
1143 
1144 static const unsigned hdmi_cec_pee3_pins[] = {
1145     TEGRA_PIN_HDMI_CEC_PEE3,
1146 };
1147 
1148 static const unsigned sdmmc3_clk_lb_out_pee4_pins[] = {
1149     TEGRA_PIN_SDMMC3_CLK_LB_OUT_PEE4,
1150 };
1151 
1152 static const unsigned sdmmc3_clk_lb_in_pee5_pins[] = {
1153     TEGRA_PIN_SDMMC3_CLK_LB_IN_PEE5,
1154 };
1155 
1156 static const unsigned dp_hpd_pff0_pins[] = {
1157     TEGRA_PIN_DP_HPD_PFF0,
1158 };
1159 
1160 static const unsigned usb_vbus_en2_pff1_pins[] = {
1161     TEGRA_PIN_USB_VBUS_EN2_PFF1,
1162 };
1163 
1164 static const unsigned pff2_pins[] = {
1165     TEGRA_PIN_PFF2,
1166 };
1167 
1168 static const unsigned core_pwr_req_pins[] = {
1169     TEGRA_PIN_CORE_PWR_REQ,
1170 };
1171 
1172 static const unsigned cpu_pwr_req_pins[] = {
1173     TEGRA_PIN_CPU_PWR_REQ,
1174 };
1175 
1176 static const unsigned pwr_int_n_pins[] = {
1177     TEGRA_PIN_PWR_INT_N,
1178 };
1179 
1180 static const unsigned gmi_clk_lb_pins[] = {
1181     TEGRA_PIN_GMI_CLK_LB,
1182 };
1183 
1184 static const unsigned reset_out_n_pins[] = {
1185     TEGRA_PIN_RESET_OUT_N,
1186 };
1187 
1188 static const unsigned owr_pins[] = {
1189     TEGRA_PIN_OWR,
1190 };
1191 
1192 static const unsigned clk_32k_in_pins[] = {
1193     TEGRA_PIN_CLK_32K_IN,
1194 };
1195 
1196 static const unsigned jtag_rtck_pins[] = {
1197     TEGRA_PIN_JTAG_RTCK,
1198 };
1199 
1200 static const unsigned drive_ao1_pins[] = {
1201     TEGRA_PIN_KB_ROW0_PR0,
1202     TEGRA_PIN_KB_ROW1_PR1,
1203     TEGRA_PIN_KB_ROW2_PR2,
1204     TEGRA_PIN_KB_ROW3_PR3,
1205     TEGRA_PIN_KB_ROW4_PR4,
1206     TEGRA_PIN_KB_ROW5_PR5,
1207     TEGRA_PIN_KB_ROW6_PR6,
1208     TEGRA_PIN_KB_ROW7_PR7,
1209     TEGRA_PIN_PWR_I2C_SCL_PZ6,
1210     TEGRA_PIN_PWR_I2C_SDA_PZ7,
1211 };
1212 
1213 static const unsigned drive_ao2_pins[] = {
1214     TEGRA_PIN_CLK_32K_OUT_PA0,
1215     TEGRA_PIN_CLK_32K_IN,
1216     TEGRA_PIN_KB_COL0_PQ0,
1217     TEGRA_PIN_KB_COL1_PQ1,
1218     TEGRA_PIN_KB_COL2_PQ2,
1219     TEGRA_PIN_KB_COL3_PQ3,
1220     TEGRA_PIN_KB_COL4_PQ4,
1221     TEGRA_PIN_KB_COL5_PQ5,
1222     TEGRA_PIN_KB_COL6_PQ6,
1223     TEGRA_PIN_KB_COL7_PQ7,
1224     TEGRA_PIN_KB_ROW8_PS0,
1225     TEGRA_PIN_KB_ROW9_PS1,
1226     TEGRA_PIN_KB_ROW10_PS2,
1227     TEGRA_PIN_KB_ROW11_PS3,
1228     TEGRA_PIN_KB_ROW12_PS4,
1229     TEGRA_PIN_KB_ROW13_PS5,
1230     TEGRA_PIN_KB_ROW14_PS6,
1231     TEGRA_PIN_KB_ROW15_PS7,
1232     TEGRA_PIN_KB_ROW16_PT0,
1233     TEGRA_PIN_KB_ROW17_PT1,
1234     TEGRA_PIN_SDMMC3_CD_N_PV2,
1235     TEGRA_PIN_CORE_PWR_REQ,
1236     TEGRA_PIN_CPU_PWR_REQ,
1237     TEGRA_PIN_PWR_INT_N,
1238 };
1239 
1240 static const unsigned drive_at1_pins[] = {
1241     TEGRA_PIN_PH0,
1242     TEGRA_PIN_PH1,
1243     TEGRA_PIN_PH2,
1244     TEGRA_PIN_PH3,
1245 };
1246 
1247 static const unsigned drive_at2_pins[] = {
1248     TEGRA_PIN_PG0,
1249     TEGRA_PIN_PG1,
1250     TEGRA_PIN_PG2,
1251     TEGRA_PIN_PG3,
1252     TEGRA_PIN_PG4,
1253     TEGRA_PIN_PG5,
1254     TEGRA_PIN_PG6,
1255     TEGRA_PIN_PG7,
1256     TEGRA_PIN_PI0,
1257     TEGRA_PIN_PI1,
1258     TEGRA_PIN_PI3,
1259     TEGRA_PIN_PI4,
1260     TEGRA_PIN_PI7,
1261     TEGRA_PIN_PK0,
1262     TEGRA_PIN_PK2,
1263 };
1264 
1265 static const unsigned drive_at3_pins[] = {
1266     TEGRA_PIN_PC7,
1267     TEGRA_PIN_PJ0,
1268 };
1269 
1270 static const unsigned drive_at4_pins[] = {
1271     TEGRA_PIN_PB0,
1272     TEGRA_PIN_PB1,
1273     TEGRA_PIN_PJ0,
1274     TEGRA_PIN_PJ7,
1275     TEGRA_PIN_PK7,
1276 };
1277 
1278 static const unsigned drive_at5_pins[] = {
1279     TEGRA_PIN_GEN2_I2C_SCL_PT5,
1280     TEGRA_PIN_GEN2_I2C_SDA_PT6,
1281 };
1282 
1283 static const unsigned drive_cdev1_pins[] = {
1284     TEGRA_PIN_DAP_MCLK1_PW4,
1285     TEGRA_PIN_DAP_MCLK1_REQ_PEE2,
1286 };
1287 
1288 static const unsigned drive_cdev2_pins[] = {
1289     TEGRA_PIN_CLK2_OUT_PW5,
1290     TEGRA_PIN_CLK2_REQ_PCC5,
1291 };
1292 
1293 static const unsigned drive_dap1_pins[] = {
1294     TEGRA_PIN_DAP1_FS_PN0,
1295     TEGRA_PIN_DAP1_DIN_PN1,
1296     TEGRA_PIN_DAP1_DOUT_PN2,
1297     TEGRA_PIN_DAP1_SCLK_PN3,
1298 };
1299 
1300 static const unsigned drive_dap2_pins[] = {
1301     TEGRA_PIN_DAP2_FS_PA2,
1302     TEGRA_PIN_DAP2_SCLK_PA3,
1303     TEGRA_PIN_DAP2_DIN_PA4,
1304     TEGRA_PIN_DAP2_DOUT_PA5,
1305 };
1306 
1307 static const unsigned drive_dap3_pins[] = {
1308     TEGRA_PIN_DAP3_FS_PP0,
1309     TEGRA_PIN_DAP3_DIN_PP1,
1310     TEGRA_PIN_DAP3_DOUT_PP2,
1311     TEGRA_PIN_DAP3_SCLK_PP3,
1312 };
1313 
1314 static const unsigned drive_dap4_pins[] = {
1315     TEGRA_PIN_DAP4_FS_PP4,
1316     TEGRA_PIN_DAP4_DIN_PP5,
1317     TEGRA_PIN_DAP4_DOUT_PP6,
1318     TEGRA_PIN_DAP4_SCLK_PP7,
1319 };
1320 
1321 static const unsigned drive_dbg_pins[] = {
1322     TEGRA_PIN_GEN1_I2C_SCL_PC4,
1323     TEGRA_PIN_GEN1_I2C_SDA_PC5,
1324     TEGRA_PIN_PU0,
1325     TEGRA_PIN_PU1,
1326     TEGRA_PIN_PU2,
1327     TEGRA_PIN_PU3,
1328     TEGRA_PIN_PU4,
1329     TEGRA_PIN_PU5,
1330     TEGRA_PIN_PU6,
1331 };
1332 
1333 static const unsigned drive_sdio3_pins[] = {
1334     TEGRA_PIN_SDMMC3_CLK_PA6,
1335     TEGRA_PIN_SDMMC3_CMD_PA7,
1336     TEGRA_PIN_SDMMC3_DAT3_PB4,
1337     TEGRA_PIN_SDMMC3_DAT2_PB5,
1338     TEGRA_PIN_SDMMC3_DAT1_PB6,
1339     TEGRA_PIN_SDMMC3_DAT0_PB7,
1340     TEGRA_PIN_SDMMC3_CLK_LB_OUT_PEE4,
1341     TEGRA_PIN_SDMMC3_CLK_LB_IN_PEE5,
1342 };
1343 
1344 static const unsigned drive_spi_pins[] = {
1345     TEGRA_PIN_DVFS_PWM_PX0,
1346     TEGRA_PIN_GPIO_X1_AUD_PX1,
1347     TEGRA_PIN_DVFS_CLK_PX2,
1348     TEGRA_PIN_GPIO_X3_AUD_PX3,
1349     TEGRA_PIN_GPIO_X4_AUD_PX4,
1350     TEGRA_PIN_GPIO_X5_AUD_PX5,
1351     TEGRA_PIN_GPIO_X6_AUD_PX6,
1352     TEGRA_PIN_GPIO_X7_AUD_PX7,
1353     TEGRA_PIN_GPIO_W2_AUD_PW2,
1354     TEGRA_PIN_GPIO_W3_AUD_PW3,
1355 };
1356 
1357 static const unsigned drive_uaa_pins[] = {
1358     TEGRA_PIN_ULPI_DATA0_PO1,
1359     TEGRA_PIN_ULPI_DATA1_PO2,
1360     TEGRA_PIN_ULPI_DATA2_PO3,
1361     TEGRA_PIN_ULPI_DATA3_PO4,
1362 };
1363 
1364 static const unsigned drive_uab_pins[] = {
1365     TEGRA_PIN_ULPI_DATA7_PO0,
1366     TEGRA_PIN_ULPI_DATA4_PO5,
1367     TEGRA_PIN_ULPI_DATA5_PO6,
1368     TEGRA_PIN_ULPI_DATA6_PO7,
1369     TEGRA_PIN_PV0,
1370     TEGRA_PIN_PV1,
1371 };
1372 
1373 static const unsigned drive_uart2_pins[] = {
1374     TEGRA_PIN_UART2_TXD_PC2,
1375     TEGRA_PIN_UART2_RXD_PC3,
1376     TEGRA_PIN_UART2_CTS_N_PJ5,
1377     TEGRA_PIN_UART2_RTS_N_PJ6,
1378 };
1379 
1380 static const unsigned drive_uart3_pins[] = {
1381     TEGRA_PIN_UART3_CTS_N_PA1,
1382     TEGRA_PIN_UART3_RTS_N_PC0,
1383     TEGRA_PIN_UART3_TXD_PW6,
1384     TEGRA_PIN_UART3_RXD_PW7,
1385 };
1386 
1387 static const unsigned drive_sdio1_pins[] = {
1388     TEGRA_PIN_SDMMC1_DAT3_PY4,
1389     TEGRA_PIN_SDMMC1_DAT2_PY5,
1390     TEGRA_PIN_SDMMC1_DAT1_PY6,
1391     TEGRA_PIN_SDMMC1_DAT0_PY7,
1392     TEGRA_PIN_SDMMC1_CLK_PZ0,
1393     TEGRA_PIN_SDMMC1_CMD_PZ1,
1394 };
1395 
1396 static const unsigned drive_ddc_pins[] = {
1397     TEGRA_PIN_DDC_SCL_PV4,
1398     TEGRA_PIN_DDC_SDA_PV5,
1399 };
1400 
1401 static const unsigned drive_gma_pins[] = {
1402     TEGRA_PIN_SDMMC4_CLK_PCC4,
1403     TEGRA_PIN_SDMMC4_CMD_PT7,
1404     TEGRA_PIN_SDMMC4_DAT0_PAA0,
1405     TEGRA_PIN_SDMMC4_DAT1_PAA1,
1406     TEGRA_PIN_SDMMC4_DAT2_PAA2,
1407     TEGRA_PIN_SDMMC4_DAT3_PAA3,
1408     TEGRA_PIN_SDMMC4_DAT4_PAA4,
1409     TEGRA_PIN_SDMMC4_DAT5_PAA5,
1410     TEGRA_PIN_SDMMC4_DAT6_PAA6,
1411     TEGRA_PIN_SDMMC4_DAT7_PAA7,
1412 };
1413 
1414 static const unsigned drive_gme_pins[] = {
1415     TEGRA_PIN_PBB0,
1416     TEGRA_PIN_CAM_I2C_SCL_PBB1,
1417     TEGRA_PIN_CAM_I2C_SDA_PBB2,
1418     TEGRA_PIN_PBB3,
1419     TEGRA_PIN_PCC2,
1420 };
1421 
1422 static const unsigned drive_gmf_pins[] = {
1423     TEGRA_PIN_PBB4,
1424     TEGRA_PIN_PBB5,
1425     TEGRA_PIN_PBB6,
1426     TEGRA_PIN_PBB7,
1427 };
1428 
1429 static const unsigned drive_gmg_pins[] = {
1430     TEGRA_PIN_CAM_MCLK_PCC0,
1431 };
1432 
1433 static const unsigned drive_gmh_pins[] = {
1434     TEGRA_PIN_PCC1,
1435 };
1436 
1437 static const unsigned drive_owr_pins[] = {
1438     TEGRA_PIN_SDMMC3_CD_N_PV2,
1439     TEGRA_PIN_OWR,
1440 };
1441 
1442 static const unsigned drive_uda_pins[] = {
1443     TEGRA_PIN_ULPI_CLK_PY0,
1444     TEGRA_PIN_ULPI_DIR_PY1,
1445     TEGRA_PIN_ULPI_NXT_PY2,
1446     TEGRA_PIN_ULPI_STP_PY3,
1447 };
1448 
1449 static const unsigned drive_gpv_pins[] = {
1450     TEGRA_PIN_PEX_L0_RST_N_PDD1,
1451     TEGRA_PIN_PEX_L0_CLKREQ_N_PDD2,
1452     TEGRA_PIN_PEX_WAKE_N_PDD3,
1453     TEGRA_PIN_PEX_L1_RST_N_PDD5,
1454     TEGRA_PIN_PEX_L1_CLKREQ_N_PDD6,
1455     TEGRA_PIN_USB_VBUS_EN2_PFF1,
1456     TEGRA_PIN_PFF2,
1457 };
1458 
1459 static const unsigned drive_dev3_pins[] = {
1460     TEGRA_PIN_CLK3_OUT_PEE0,
1461     TEGRA_PIN_CLK3_REQ_PEE1,
1462 };
1463 
1464 static const unsigned drive_cec_pins[] = {
1465     TEGRA_PIN_HDMI_CEC_PEE3,
1466 };
1467 
1468 static const unsigned drive_at6_pins[] = {
1469     TEGRA_PIN_PK1,
1470     TEGRA_PIN_PK3,
1471     TEGRA_PIN_PK4,
1472     TEGRA_PIN_PI2,
1473     TEGRA_PIN_PI5,
1474     TEGRA_PIN_PI6,
1475     TEGRA_PIN_PH4,
1476     TEGRA_PIN_PH5,
1477     TEGRA_PIN_PH6,
1478     TEGRA_PIN_PH7,
1479 };
1480 
1481 static const unsigned drive_dap5_pins[] = {
1482     TEGRA_PIN_SPDIF_IN_PK6,
1483     TEGRA_PIN_SPDIF_OUT_PK5,
1484     TEGRA_PIN_DP_HPD_PFF0,
1485 };
1486 
1487 static const unsigned drive_usb_vbus_en_pins[] = {
1488     TEGRA_PIN_USB_VBUS_EN0_PN4,
1489     TEGRA_PIN_USB_VBUS_EN1_PN5,
1490 };
1491 
1492 static const unsigned drive_ao3_pins[] = {
1493     TEGRA_PIN_RESET_OUT_N,
1494 };
1495 
1496 static const unsigned drive_ao0_pins[] = {
1497     TEGRA_PIN_JTAG_RTCK,
1498 };
1499 
1500 static const unsigned drive_hv0_pins[] = {
1501     TEGRA_PIN_HDMI_INT_PN7,
1502 };
1503 
1504 static const unsigned drive_sdio4_pins[] = {
1505     TEGRA_PIN_SDMMC1_WP_N_PV3,
1506 };
1507 
1508 static const unsigned drive_ao4_pins[] = {
1509     TEGRA_PIN_JTAG_RTCK,
1510 };
1511 
1512 static const unsigned mipi_pad_ctrl_dsi_b_pins[] = {
1513     TEGRA_PIN_DSI_B_CLK_P,
1514     TEGRA_PIN_DSI_B_CLK_N,
1515     TEGRA_PIN_DSI_B_D0_P,
1516     TEGRA_PIN_DSI_B_D0_N,
1517     TEGRA_PIN_DSI_B_D1_P,
1518     TEGRA_PIN_DSI_B_D1_N,
1519     TEGRA_PIN_DSI_B_D2_P,
1520     TEGRA_PIN_DSI_B_D2_N,
1521     TEGRA_PIN_DSI_B_D3_P,
1522     TEGRA_PIN_DSI_B_D3_N,
1523 };
1524 
1525 enum tegra_mux {
1526     TEGRA_MUX_BLINK,
1527     TEGRA_MUX_CCLA,
1528     TEGRA_MUX_CEC,
1529     TEGRA_MUX_CLDVFS,
1530     TEGRA_MUX_CLK,
1531     TEGRA_MUX_CLK12,
1532     TEGRA_MUX_CPU,
1533     TEGRA_MUX_CSI,
1534     TEGRA_MUX_DAP,
1535     TEGRA_MUX_DAP1,
1536     TEGRA_MUX_DAP2,
1537     TEGRA_MUX_DEV3,
1538     TEGRA_MUX_DISPLAYA,
1539     TEGRA_MUX_DISPLAYA_ALT,
1540     TEGRA_MUX_DISPLAYB,
1541     TEGRA_MUX_DP,
1542     TEGRA_MUX_DSI_B,
1543     TEGRA_MUX_DTV,
1544     TEGRA_MUX_EXTPERIPH1,
1545     TEGRA_MUX_EXTPERIPH2,
1546     TEGRA_MUX_EXTPERIPH3,
1547     TEGRA_MUX_GMI,
1548     TEGRA_MUX_GMI_ALT,
1549     TEGRA_MUX_HDA,
1550     TEGRA_MUX_HSI,
1551     TEGRA_MUX_I2C1,
1552     TEGRA_MUX_I2C2,
1553     TEGRA_MUX_I2C3,
1554     TEGRA_MUX_I2C4,
1555     TEGRA_MUX_I2CPWR,
1556     TEGRA_MUX_I2S0,
1557     TEGRA_MUX_I2S1,
1558     TEGRA_MUX_I2S2,
1559     TEGRA_MUX_I2S3,
1560     TEGRA_MUX_I2S4,
1561     TEGRA_MUX_IRDA,
1562     TEGRA_MUX_KBC,
1563     TEGRA_MUX_OWR,
1564     TEGRA_MUX_PE,
1565     TEGRA_MUX_PE0,
1566     TEGRA_MUX_PE1,
1567     TEGRA_MUX_PMI,
1568     TEGRA_MUX_PWM0,
1569     TEGRA_MUX_PWM1,
1570     TEGRA_MUX_PWM2,
1571     TEGRA_MUX_PWM3,
1572     TEGRA_MUX_PWRON,
1573     TEGRA_MUX_RESET_OUT_N,
1574     TEGRA_MUX_RSVD1,
1575     TEGRA_MUX_RSVD2,
1576     TEGRA_MUX_RSVD3,
1577     TEGRA_MUX_RSVD4,
1578     TEGRA_MUX_RTCK,
1579     TEGRA_MUX_SATA,
1580     TEGRA_MUX_SDMMC1,
1581     TEGRA_MUX_SDMMC2,
1582     TEGRA_MUX_SDMMC3,
1583     TEGRA_MUX_SDMMC4,
1584     TEGRA_MUX_SOC,
1585     TEGRA_MUX_SPDIF,
1586     TEGRA_MUX_SPI1,
1587     TEGRA_MUX_SPI2,
1588     TEGRA_MUX_SPI3,
1589     TEGRA_MUX_SPI4,
1590     TEGRA_MUX_SPI5,
1591     TEGRA_MUX_SPI6,
1592     TEGRA_MUX_SYS,
1593     TEGRA_MUX_TMDS,
1594     TEGRA_MUX_TRACE,
1595     TEGRA_MUX_UARTA,
1596     TEGRA_MUX_UARTB,
1597     TEGRA_MUX_UARTC,
1598     TEGRA_MUX_UARTD,
1599     TEGRA_MUX_ULPI,
1600     TEGRA_MUX_USB,
1601     TEGRA_MUX_VGP1,
1602     TEGRA_MUX_VGP2,
1603     TEGRA_MUX_VGP3,
1604     TEGRA_MUX_VGP4,
1605     TEGRA_MUX_VGP5,
1606     TEGRA_MUX_VGP6,
1607     TEGRA_MUX_VI,
1608     TEGRA_MUX_VI_ALT1,
1609     TEGRA_MUX_VI_ALT3,
1610     TEGRA_MUX_VIMCLK2,
1611     TEGRA_MUX_VIMCLK2_ALT,
1612 };
1613 
1614 #define FUNCTION(fname)                 \
1615     {                       \
1616         .name = #fname,             \
1617     }
1618 
1619 static struct tegra_function tegra124_functions[] = {
1620     FUNCTION(blink),
1621     FUNCTION(ccla),
1622     FUNCTION(cec),
1623     FUNCTION(cldvfs),
1624     FUNCTION(clk),
1625     FUNCTION(clk12),
1626     FUNCTION(cpu),
1627     FUNCTION(csi),
1628     FUNCTION(dap),
1629     FUNCTION(dap1),
1630     FUNCTION(dap2),
1631     FUNCTION(dev3),
1632     FUNCTION(displaya),
1633     FUNCTION(displaya_alt),
1634     FUNCTION(displayb),
1635     FUNCTION(dp),
1636     FUNCTION(dsi_b),
1637     FUNCTION(dtv),
1638     FUNCTION(extperiph1),
1639     FUNCTION(extperiph2),
1640     FUNCTION(extperiph3),
1641     FUNCTION(gmi),
1642     FUNCTION(gmi_alt),
1643     FUNCTION(hda),
1644     FUNCTION(hsi),
1645     FUNCTION(i2c1),
1646     FUNCTION(i2c2),
1647     FUNCTION(i2c3),
1648     FUNCTION(i2c4),
1649     FUNCTION(i2cpwr),
1650     FUNCTION(i2s0),
1651     FUNCTION(i2s1),
1652     FUNCTION(i2s2),
1653     FUNCTION(i2s3),
1654     FUNCTION(i2s4),
1655     FUNCTION(irda),
1656     FUNCTION(kbc),
1657     FUNCTION(owr),
1658     FUNCTION(pe),
1659     FUNCTION(pe0),
1660     FUNCTION(pe1),
1661     FUNCTION(pmi),
1662     FUNCTION(pwm0),
1663     FUNCTION(pwm1),
1664     FUNCTION(pwm2),
1665     FUNCTION(pwm3),
1666     FUNCTION(pwron),
1667     FUNCTION(reset_out_n),
1668     FUNCTION(rsvd1),
1669     FUNCTION(rsvd2),
1670     FUNCTION(rsvd3),
1671     FUNCTION(rsvd4),
1672     FUNCTION(rtck),
1673     FUNCTION(sata),
1674     FUNCTION(sdmmc1),
1675     FUNCTION(sdmmc2),
1676     FUNCTION(sdmmc3),
1677     FUNCTION(sdmmc4),
1678     FUNCTION(soc),
1679     FUNCTION(spdif),
1680     FUNCTION(spi1),
1681     FUNCTION(spi2),
1682     FUNCTION(spi3),
1683     FUNCTION(spi4),
1684     FUNCTION(spi5),
1685     FUNCTION(spi6),
1686     FUNCTION(sys),
1687     FUNCTION(tmds),
1688     FUNCTION(trace),
1689     FUNCTION(uarta),
1690     FUNCTION(uartb),
1691     FUNCTION(uartc),
1692     FUNCTION(uartd),
1693     FUNCTION(ulpi),
1694     FUNCTION(usb),
1695     FUNCTION(vgp1),
1696     FUNCTION(vgp2),
1697     FUNCTION(vgp3),
1698     FUNCTION(vgp4),
1699     FUNCTION(vgp5),
1700     FUNCTION(vgp6),
1701     FUNCTION(vi),
1702     FUNCTION(vi_alt1),
1703     FUNCTION(vi_alt3),
1704     FUNCTION(vimclk2),
1705     FUNCTION(vimclk2_alt),
1706 };
1707 
1708 #define DRV_PINGROUP_REG_A      0x868   /* bank 0 */
1709 #define PINGROUP_REG_A          0x3000  /* bank 1 */
1710 #define MIPI_PAD_CTRL_PINGROUP_REG_A    0x820   /* bank 2 */
1711 
1712 #define DRV_PINGROUP_REG(r)     ((r) - DRV_PINGROUP_REG_A)
1713 #define PINGROUP_REG(r)         ((r) - PINGROUP_REG_A)
1714 #define MIPI_PAD_CTRL_PINGROUP_REG_Y(r) ((r) - MIPI_PAD_CTRL_PINGROUP_REG_A)
1715 
1716 #define PINGROUP_BIT_Y(b)       (b)
1717 #define PINGROUP_BIT_N(b)       (-1)
1718 
1719 #define PINGROUP(pg_name, f0, f1, f2, f3, r, od, ior, rcv_sel)      \
1720     {                               \
1721         .name = #pg_name,                   \
1722         .pins = pg_name##_pins,                 \
1723         .npins = ARRAY_SIZE(pg_name##_pins),            \
1724         .funcs = {                      \
1725             TEGRA_MUX_##f0,                 \
1726             TEGRA_MUX_##f1,                 \
1727             TEGRA_MUX_##f2,                 \
1728             TEGRA_MUX_##f3,                 \
1729         },                          \
1730         .mux_reg = PINGROUP_REG(r),             \
1731         .mux_bank = 1,                      \
1732         .mux_bit = 0,                       \
1733         .pupd_reg = PINGROUP_REG(r),                \
1734         .pupd_bank = 1,                     \
1735         .pupd_bit = 2,                      \
1736         .tri_reg = PINGROUP_REG(r),             \
1737         .tri_bank = 1,                      \
1738         .tri_bit = 4,                       \
1739         .einput_bit = 5,                    \
1740         .odrain_bit = PINGROUP_BIT_##od(6),         \
1741         .lock_bit = 7,                      \
1742         .ioreset_bit = PINGROUP_BIT_##ior(8),           \
1743         .rcv_sel_bit = PINGROUP_BIT_##rcv_sel(9),       \
1744         .drv_reg = -1,                      \
1745         .parked_bitmask = 0,                    \
1746     }
1747 
1748 #define DRV_PINGROUP(pg_name, r, hsm_b, schmitt_b, lpmd_b, drvdn_b, \
1749              drvdn_w, drvup_b, drvup_w, slwr_b, slwr_w,     \
1750              slwf_b, slwf_w, drvtype)               \
1751     {                               \
1752         .name = "drive_" #pg_name,              \
1753         .pins = drive_##pg_name##_pins,             \
1754         .npins = ARRAY_SIZE(drive_##pg_name##_pins),        \
1755         .mux_reg = -1,                      \
1756         .pupd_reg = -1,                     \
1757         .tri_reg = -1,                      \
1758         .einput_bit = -1,                   \
1759         .odrain_bit = -1,                   \
1760         .lock_bit = -1,                     \
1761         .ioreset_bit = -1,                  \
1762         .rcv_sel_bit = -1,                  \
1763         .drv_reg = DRV_PINGROUP_REG(r),             \
1764         .drv_bank = 0,                      \
1765         .hsm_bit = hsm_b,                   \
1766         .schmitt_bit = schmitt_b,               \
1767         .lpmd_bit = lpmd_b,                 \
1768         .drvdn_bit = drvdn_b,                   \
1769         .drvdn_width = drvdn_w,                 \
1770         .drvup_bit = drvup_b,                   \
1771         .drvup_width = drvup_w,                 \
1772         .slwr_bit = slwr_b,                 \
1773         .slwr_width = slwr_w,                   \
1774         .slwf_bit = slwf_b,                 \
1775         .slwf_width = slwf_w,                   \
1776         .drvtype_bit = PINGROUP_BIT_##drvtype(6),       \
1777         .parked_bitmask = 0,                    \
1778     }
1779 
1780 #define MIPI_PAD_CTRL_PINGROUP(pg_name, r, b, f0, f1)           \
1781     {                               \
1782         .name = "mipi_pad_ctrl_" #pg_name,          \
1783         .pins = mipi_pad_ctrl_##pg_name##_pins,         \
1784         .npins = ARRAY_SIZE(mipi_pad_ctrl_##pg_name##_pins),    \
1785         .funcs = {                      \
1786             TEGRA_MUX_ ## f0,               \
1787             TEGRA_MUX_ ## f1,               \
1788             TEGRA_MUX_RSVD3,                \
1789             TEGRA_MUX_RSVD4,                \
1790         },                          \
1791         .mux_reg = MIPI_PAD_CTRL_PINGROUP_REG_Y(r),     \
1792         .mux_bank = 2,                      \
1793         .mux_bit = b,                       \
1794         .pupd_reg = -1,                     \
1795         .tri_reg = -1,                      \
1796         .einput_bit = -1,                   \
1797         .odrain_bit = -1,                   \
1798         .lock_bit = -1,                     \
1799         .ioreset_bit = -1,                  \
1800         .rcv_sel_bit = -1,                  \
1801         .drv_reg = -1,                      \
1802     }
1803 
1804 static const struct tegra_pingroup tegra124_groups[] = {
1805     /*       pg_name,                f0,         f1,         f2,           f3,          r,      od, ior, rcv_sel */
1806     PINGROUP(ulpi_data0_po1,         SPI3,       HSI,        UARTA,        ULPI,        0x3000, N,   N,  N),
1807     PINGROUP(ulpi_data1_po2,         SPI3,       HSI,        UARTA,        ULPI,        0x3004, N,   N,  N),
1808     PINGROUP(ulpi_data2_po3,         SPI3,       HSI,        UARTA,        ULPI,        0x3008, N,   N,  N),
1809     PINGROUP(ulpi_data3_po4,         SPI3,       HSI,        UARTA,        ULPI,        0x300c, N,   N,  N),
1810     PINGROUP(ulpi_data4_po5,         SPI2,       HSI,        UARTA,        ULPI,        0x3010, N,   N,  N),
1811     PINGROUP(ulpi_data5_po6,         SPI2,       HSI,        UARTA,        ULPI,        0x3014, N,   N,  N),
1812     PINGROUP(ulpi_data6_po7,         SPI2,       HSI,        UARTA,        ULPI,        0x3018, N,   N,  N),
1813     PINGROUP(ulpi_data7_po0,         SPI2,       HSI,        UARTA,        ULPI,        0x301c, N,   N,  N),
1814     PINGROUP(ulpi_clk_py0,           SPI1,       SPI5,       UARTD,        ULPI,        0x3020, N,   N,  N),
1815     PINGROUP(ulpi_dir_py1,           SPI1,       SPI5,       UARTD,        ULPI,        0x3024, N,   N,  N),
1816     PINGROUP(ulpi_nxt_py2,           SPI1,       SPI5,       UARTD,        ULPI,        0x3028, N,   N,  N),
1817     PINGROUP(ulpi_stp_py3,           SPI1,       SPI5,       UARTD,        ULPI,        0x302c, N,   N,  N),
1818     PINGROUP(dap3_fs_pp0,            I2S2,       SPI5,       DISPLAYA,     DISPLAYB,    0x3030, N,   N,  N),
1819     PINGROUP(dap3_din_pp1,           I2S2,       SPI5,       DISPLAYA,     DISPLAYB,    0x3034, N,   N,  N),
1820     PINGROUP(dap3_dout_pp2,          I2S2,       SPI5,       DISPLAYA,     RSVD4,       0x3038, N,   N,  N),
1821     PINGROUP(dap3_sclk_pp3,          I2S2,       SPI5,       RSVD3,        DISPLAYB,    0x303c, N,   N,  N),
1822     PINGROUP(pv0,                    RSVD1,      RSVD2,      RSVD3,        RSVD4,       0x3040, N,   N,  N),
1823     PINGROUP(pv1,                    RSVD1,      RSVD2,      RSVD3,        RSVD4,       0x3044, N,   N,  N),
1824     PINGROUP(sdmmc1_clk_pz0,         SDMMC1,     CLK12,      RSVD3,        RSVD4,       0x3048, N,   N,  N),
1825     PINGROUP(sdmmc1_cmd_pz1,         SDMMC1,     SPDIF,      SPI4,         UARTA,       0x304c, N,   N,  N),
1826     PINGROUP(sdmmc1_dat3_py4,        SDMMC1,     SPDIF,      SPI4,         UARTA,       0x3050, N,   N,  N),
1827     PINGROUP(sdmmc1_dat2_py5,        SDMMC1,     PWM0,       SPI4,         UARTA,       0x3054, N,   N,  N),
1828     PINGROUP(sdmmc1_dat1_py6,        SDMMC1,     PWM1,       SPI4,         UARTA,       0x3058, N,   N,  N),
1829     PINGROUP(sdmmc1_dat0_py7,        SDMMC1,     RSVD2,      SPI4,         UARTA,       0x305c, N,   N,  N),
1830     PINGROUP(clk2_out_pw5,           EXTPERIPH2, RSVD2,      RSVD3,        RSVD4,       0x3068, N,   N,  N),
1831     PINGROUP(clk2_req_pcc5,          DAP,        RSVD2,      RSVD3,        RSVD4,       0x306c, N,   N,  N),
1832     PINGROUP(hdmi_int_pn7,           RSVD1,      RSVD2,      RSVD3,        RSVD4,       0x3110, N,   N,  Y),
1833     PINGROUP(ddc_scl_pv4,            I2C4,       RSVD2,      RSVD3,        RSVD4,       0x3114, N,   N,  Y),
1834     PINGROUP(ddc_sda_pv5,            I2C4,       RSVD2,      RSVD3,        RSVD4,       0x3118, N,   N,  Y),
1835     PINGROUP(uart2_rxd_pc3,          IRDA,       SPDIF,      UARTA,        SPI4,        0x3164, N,   N,  N),
1836     PINGROUP(uart2_txd_pc2,          IRDA,       SPDIF,      UARTA,        SPI4,        0x3168, N,   N,  N),
1837     PINGROUP(uart2_rts_n_pj6,        UARTA,      UARTB,      GMI,          SPI4,        0x316c, N,   N,  N),
1838     PINGROUP(uart2_cts_n_pj5,        UARTA,      UARTB,      GMI,          SPI4,        0x3170, N,   N,  N),
1839     PINGROUP(uart3_txd_pw6,          UARTC,      RSVD2,      GMI,          SPI4,        0x3174, N,   N,  N),
1840     PINGROUP(uart3_rxd_pw7,          UARTC,      RSVD2,      GMI,          SPI4,        0x3178, N,   N,  N),
1841     PINGROUP(uart3_cts_n_pa1,        UARTC,      SDMMC1,     DTV,          GMI,         0x317c, N,   N,  N),
1842     PINGROUP(uart3_rts_n_pc0,        UARTC,      PWM0,       DTV,          GMI,         0x3180, N,   N,  N),
1843     PINGROUP(pu0,                    OWR,        UARTA,      GMI,          RSVD4,       0x3184, N,   N,  N),
1844     PINGROUP(pu1,                    RSVD1,      UARTA,      GMI,          RSVD4,       0x3188, N,   N,  N),
1845     PINGROUP(pu2,                    RSVD1,      UARTA,      GMI,          RSVD4,       0x318c, N,   N,  N),
1846     PINGROUP(pu3,                    PWM0,       UARTA,      GMI,          DISPLAYB,    0x3190, N,   N,  N),
1847     PINGROUP(pu4,                    PWM1,       UARTA,      GMI,          DISPLAYB,    0x3194, N,   N,  N),
1848     PINGROUP(pu5,                    PWM2,       UARTA,      GMI,          DISPLAYB,    0x3198, N,   N,  N),
1849     PINGROUP(pu6,                    PWM3,       UARTA,      RSVD3,        GMI,         0x319c, N,   N,  N),
1850     PINGROUP(gen1_i2c_sda_pc5,       I2C1,       RSVD2,      RSVD3,        RSVD4,       0x31a0, Y,   N,  N),
1851     PINGROUP(gen1_i2c_scl_pc4,       I2C1,       RSVD2,      RSVD3,        RSVD4,       0x31a4, Y,   N,  N),
1852     PINGROUP(dap4_fs_pp4,            I2S3,       GMI,        DTV,          RSVD4,       0x31a8, N,   N,  N),
1853     PINGROUP(dap4_din_pp5,           I2S3,       GMI,        RSVD3,        RSVD4,       0x31ac, N,   N,  N),
1854     PINGROUP(dap4_dout_pp6,          I2S3,       GMI,        DTV,          RSVD4,       0x31b0, N,   N,  N),
1855     PINGROUP(dap4_sclk_pp7,          I2S3,       GMI,        RSVD3,        RSVD4,       0x31b4, N,   N,  N),
1856     PINGROUP(clk3_out_pee0,          EXTPERIPH3, RSVD2,      RSVD3,        RSVD4,       0x31b8, N,   N,  N),
1857     PINGROUP(clk3_req_pee1,          DEV3,       RSVD2,      RSVD3,        RSVD4,       0x31bc, N,   N,  N),
1858     PINGROUP(pc7,                    RSVD1,      RSVD2,      GMI,          GMI_ALT,     0x31c0, N,   N,  N),
1859     PINGROUP(pi5,                    SDMMC2,     RSVD2,      GMI,          RSVD4,       0x31c4, N,   N,  N),
1860     PINGROUP(pi7,                    RSVD1,      TRACE,      GMI,          DTV,         0x31c8, N,   N,  N),
1861     PINGROUP(pk0,                    RSVD1,      SDMMC3,     GMI,          SOC,         0x31cc, N,   N,  N),
1862     PINGROUP(pk1,                    SDMMC2,     TRACE,      GMI,          RSVD4,       0x31d0, N,   N,  N),
1863     PINGROUP(pj0,                    RSVD1,      RSVD2,      GMI,          USB,         0x31d4, N,   N,  N),
1864     PINGROUP(pj2,                    RSVD1,      RSVD2,      GMI,          SOC,         0x31d8, N,   N,  N),
1865     PINGROUP(pk3,                    SDMMC2,     TRACE,      GMI,          CCLA,        0x31dc, N,   N,  N),
1866     PINGROUP(pk4,                    SDMMC2,     RSVD2,      GMI,          GMI_ALT,     0x31e0, N,   N,  N),
1867     PINGROUP(pk2,                    RSVD1,      RSVD2,      GMI,          RSVD4,       0x31e4, N,   N,  N),
1868     PINGROUP(pi3,                    RSVD1,      RSVD2,      GMI,          SPI4,        0x31e8, N,   N,  N),
1869     PINGROUP(pi6,                    RSVD1,      RSVD2,      GMI,          SDMMC2,      0x31ec, N,   N,  N),
1870     PINGROUP(pg0,                    RSVD1,      RSVD2,      GMI,          RSVD4,       0x31f0, N,   N,  N),
1871     PINGROUP(pg1,                    RSVD1,      RSVD2,      GMI,          RSVD4,       0x31f4, N,   N,  N),
1872     PINGROUP(pg2,                    RSVD1,      TRACE,      GMI,          RSVD4,       0x31f8, N,   N,  N),
1873     PINGROUP(pg3,                    RSVD1,      TRACE,      GMI,          RSVD4,       0x31fc, N,   N,  N),
1874     PINGROUP(pg4,                    RSVD1,      TMDS,       GMI,          SPI4,        0x3200, N,   N,  N),
1875     PINGROUP(pg5,                    RSVD1,      RSVD2,      GMI,          SPI4,        0x3204, N,   N,  N),
1876     PINGROUP(pg6,                    RSVD1,      RSVD2,      GMI,          SPI4,        0x3208, N,   N,  N),
1877     PINGROUP(pg7,                    RSVD1,      RSVD2,      GMI,          SPI4,        0x320c, N,   N,  N),
1878     PINGROUP(ph0,                    PWM0,       TRACE,      GMI,          DTV,         0x3210, N,   N,  N),
1879     PINGROUP(ph1,                    PWM1,       TMDS,       GMI,          DISPLAYA,    0x3214, N,   N,  N),
1880     PINGROUP(ph2,                    PWM2,       TMDS,       GMI,          CLDVFS,      0x3218, N,   N,  N),
1881     PINGROUP(ph3,                    PWM3,       SPI4,       GMI,          CLDVFS,      0x321c, N,   N,  N),
1882     PINGROUP(ph4,                    SDMMC2,     RSVD2,      GMI,          RSVD4,       0x3220, N,   N,  N),
1883     PINGROUP(ph5,                    SDMMC2,     RSVD2,      GMI,          RSVD4,       0x3224, N,   N,  N),
1884     PINGROUP(ph6,                    SDMMC2,     TRACE,      GMI,          DTV,         0x3228, N,   N,  N),
1885     PINGROUP(ph7,                    SDMMC2,     TRACE,      GMI,          DTV,         0x322c, N,   N,  N),
1886     PINGROUP(pj7,                    UARTD,      RSVD2,      GMI,          GMI_ALT,     0x3230, N,   N,  N),
1887     PINGROUP(pb0,                    UARTD,      RSVD2,      GMI,          RSVD4,       0x3234, N,   N,  N),
1888     PINGROUP(pb1,                    UARTD,      RSVD2,      GMI,          RSVD4,       0x3238, N,   N,  N),
1889     PINGROUP(pk7,                    UARTD,      RSVD2,      GMI,          RSVD4,       0x323c, N,   N,  N),
1890     PINGROUP(pi0,                    RSVD1,      RSVD2,      GMI,          RSVD4,       0x3240, N,   N,  N),
1891     PINGROUP(pi1,                    RSVD1,      RSVD2,      GMI,          RSVD4,       0x3244, N,   N,  N),
1892     PINGROUP(pi2,                    SDMMC2,     TRACE,      GMI,          RSVD4,       0x3248, N,   N,  N),
1893     PINGROUP(pi4,                    SPI4,       TRACE,      GMI,          DISPLAYA,    0x324c, N,   N,  N),
1894     PINGROUP(gen2_i2c_scl_pt5,       I2C2,       RSVD2,      GMI,          RSVD4,       0x3250, Y,   N,  N),
1895     PINGROUP(gen2_i2c_sda_pt6,       I2C2,       RSVD2,      GMI,          RSVD4,       0x3254, Y,   N,  N),
1896     PINGROUP(sdmmc4_clk_pcc4,        SDMMC4,     RSVD2,      GMI,          RSVD4,       0x3258, N,   Y,  N),
1897     PINGROUP(sdmmc4_cmd_pt7,         SDMMC4,     RSVD2,      GMI,          RSVD4,       0x325c, N,   Y,  N),
1898     PINGROUP(sdmmc4_dat0_paa0,       SDMMC4,     SPI3,       GMI,          RSVD4,       0x3260, N,   Y,  N),
1899     PINGROUP(sdmmc4_dat1_paa1,       SDMMC4,     SPI3,       GMI,          RSVD4,       0x3264, N,   Y,  N),
1900     PINGROUP(sdmmc4_dat2_paa2,       SDMMC4,     SPI3,       GMI,          RSVD4,       0x3268, N,   Y,  N),
1901     PINGROUP(sdmmc4_dat3_paa3,       SDMMC4,     SPI3,       GMI,          RSVD4,       0x326c, N,   Y,  N),
1902     PINGROUP(sdmmc4_dat4_paa4,       SDMMC4,     SPI3,       GMI,          RSVD4,       0x3270, N,   Y,  N),
1903     PINGROUP(sdmmc4_dat5_paa5,       SDMMC4,     SPI3,       RSVD3,        RSVD4,       0x3274, N,   Y,  N),
1904     PINGROUP(sdmmc4_dat6_paa6,       SDMMC4,     SPI3,       GMI,          RSVD4,       0x3278, N,   Y,  N),
1905     PINGROUP(sdmmc4_dat7_paa7,       SDMMC4,     RSVD2,      GMI,          RSVD4,       0x327c, N,   Y,  N),
1906     PINGROUP(cam_mclk_pcc0,          VI,         VI_ALT1,    VI_ALT3,      SDMMC2,      0x3284, N,   N,  N),
1907     PINGROUP(pcc1,                   I2S4,       RSVD2,      RSVD3,        SDMMC2,      0x3288, N,   N,  N),
1908     PINGROUP(pbb0,                   VGP6,       VIMCLK2,    SDMMC2,       VIMCLK2_ALT, 0x328c, N,   N,  N),
1909     PINGROUP(cam_i2c_scl_pbb1,       VGP1,       I2C3,       RSVD3,        SDMMC2,      0x3290, Y,   N,  N),
1910     PINGROUP(cam_i2c_sda_pbb2,       VGP2,       I2C3,       RSVD3,        SDMMC2,      0x3294, Y,   N,  N),
1911     PINGROUP(pbb3,                   VGP3,       DISPLAYA,   DISPLAYB,     SDMMC2,      0x3298, N,   N,  N),
1912     PINGROUP(pbb4,                   VGP4,       DISPLAYA,   DISPLAYB,     SDMMC2,      0x329c, N,   N,  N),
1913     PINGROUP(pbb5,                   VGP5,       DISPLAYA,   RSVD3,        SDMMC2,      0x32a0, N,   N,  N),
1914     PINGROUP(pbb6,                   I2S4,       RSVD2,      DISPLAYB,     SDMMC2,      0x32a4, N,   N,  N),
1915     PINGROUP(pbb7,                   I2S4,       RSVD2,      RSVD3,        SDMMC2,      0x32a8, N,   N,  N),
1916     PINGROUP(pcc2,                   I2S4,       RSVD2,      SDMMC3,       SDMMC2,      0x32ac, N,   N,  N),
1917     PINGROUP(jtag_rtck,              RTCK,       RSVD2,      RSVD3,        RSVD4,       0x32b0, N,   N,  N),
1918     PINGROUP(pwr_i2c_scl_pz6,        I2CPWR,     RSVD2,      RSVD3,        RSVD4,       0x32b4, Y,   N,  N),
1919     PINGROUP(pwr_i2c_sda_pz7,        I2CPWR,     RSVD2,      RSVD3,        RSVD4,       0x32b8, Y,   N,  N),
1920     PINGROUP(kb_row0_pr0,            KBC,        RSVD2,      RSVD3,        RSVD4,       0x32bc, N,   N,  N),
1921     PINGROUP(kb_row1_pr1,            KBC,        RSVD2,      RSVD3,        RSVD4,       0x32c0, N,   N,  N),
1922     PINGROUP(kb_row2_pr2,            KBC,        RSVD2,      RSVD3,        RSVD4,       0x32c4, N,   N,  N),
1923     PINGROUP(kb_row3_pr3,            KBC,        DISPLAYA,   SYS,          DISPLAYB,    0x32c8, N,   N,  N),
1924     PINGROUP(kb_row4_pr4,            KBC,        DISPLAYA,   RSVD3,        DISPLAYB,    0x32cc, N,   N,  N),
1925     PINGROUP(kb_row5_pr5,            KBC,        DISPLAYA,   RSVD3,        DISPLAYB,    0x32d0, N,   N,  N),
1926     PINGROUP(kb_row6_pr6,            KBC,        DISPLAYA,   DISPLAYA_ALT, DISPLAYB,    0x32d4, N,   N,  N),
1927     PINGROUP(kb_row7_pr7,            KBC,        RSVD2,      CLDVFS,       UARTA,       0x32d8, N,   N,  N),
1928     PINGROUP(kb_row8_ps0,            KBC,        RSVD2,      CLDVFS,       UARTA,       0x32dc, N,   N,  N),
1929     PINGROUP(kb_row9_ps1,            KBC,        RSVD2,      RSVD3,        UARTA,       0x32e0, N,   N,  N),
1930     PINGROUP(kb_row10_ps2,           KBC,        RSVD2,      RSVD3,        UARTA,       0x32e4, N,   N,  N),
1931     PINGROUP(kb_row11_ps3,           KBC,        RSVD2,      RSVD3,        IRDA,        0x32e8, N,   N,  N),
1932     PINGROUP(kb_row12_ps4,           KBC,        RSVD2,      RSVD3,        IRDA,        0x32ec, N,   N,  N),
1933     PINGROUP(kb_row13_ps5,           KBC,        RSVD2,      SPI2,         RSVD4,       0x32f0, N,   N,  N),
1934     PINGROUP(kb_row14_ps6,           KBC,        RSVD2,      SPI2,         RSVD4,       0x32f4, N,   N,  N),
1935     PINGROUP(kb_row15_ps7,           KBC,        SOC,        RSVD3,        RSVD4,       0x32f8, N,   N,  N),
1936     PINGROUP(kb_col0_pq0,            KBC,        RSVD2,      SPI2,         RSVD4,       0x32fc, N,   N,  N),
1937     PINGROUP(kb_col1_pq1,            KBC,        RSVD2,      SPI2,         RSVD4,       0x3300, N,   N,  N),
1938     PINGROUP(kb_col2_pq2,            KBC,        RSVD2,      SPI2,         RSVD4,       0x3304, N,   N,  N),
1939     PINGROUP(kb_col3_pq3,            KBC,        DISPLAYA,   PWM2,         UARTA,       0x3308, N,   N,  N),
1940     PINGROUP(kb_col4_pq4,            KBC,        OWR,        SDMMC3,       UARTA,       0x330c, N,   N,  N),
1941     PINGROUP(kb_col5_pq5,            KBC,        RSVD2,      SDMMC3,       RSVD4,       0x3310, N,   N,  N),
1942     PINGROUP(kb_col6_pq6,            KBC,        RSVD2,      SPI2,         UARTD,       0x3314, N,   N,  N),
1943     PINGROUP(kb_col7_pq7,            KBC,        RSVD2,      SPI2,         UARTD,       0x3318, N,   N,  N),
1944     PINGROUP(clk_32k_out_pa0,        BLINK,      SOC,        RSVD3,        RSVD4,       0x331c, N,   N,  N),
1945     PINGROUP(core_pwr_req,           PWRON,      RSVD2,      RSVD3,        RSVD4,       0x3324, N,   N,  N),
1946     PINGROUP(cpu_pwr_req,            CPU,        RSVD2,      RSVD3,        RSVD4,       0x3328, N,   N,  N),
1947     PINGROUP(pwr_int_n,              PMI,        RSVD2,      RSVD3,        RSVD4,       0x332c, N,   N,  N),
1948     PINGROUP(clk_32k_in,             CLK,        RSVD2,      RSVD3,        RSVD4,       0x3330, N,   N,  N),
1949     PINGROUP(owr,                    OWR,        RSVD2,      RSVD3,        RSVD4,       0x3334, N,   N,  Y),
1950     PINGROUP(dap1_fs_pn0,            I2S0,       HDA,        GMI,          RSVD4,       0x3338, N,   N,  N),
1951     PINGROUP(dap1_din_pn1,           I2S0,       HDA,        GMI,          RSVD4,       0x333c, N,   N,  N),
1952     PINGROUP(dap1_dout_pn2,          I2S0,       HDA,        GMI,          SATA,        0x3340, N,   N,  N),
1953     PINGROUP(dap1_sclk_pn3,          I2S0,       HDA,        GMI,          RSVD4,       0x3344, N,   N,  N),
1954     PINGROUP(dap_mclk1_req_pee2,     DAP,        DAP1,       SATA,         RSVD4,       0x3348, N,   N,  N),
1955     PINGROUP(dap_mclk1_pw4,          EXTPERIPH1, DAP2,       RSVD3,        RSVD4,       0x334c, N,   N,  N),
1956     PINGROUP(spdif_in_pk6,           SPDIF,      RSVD2,      RSVD3,        I2C3,        0x3350, N,   N,  N),
1957     PINGROUP(spdif_out_pk5,          SPDIF,      RSVD2,      RSVD3,        I2C3,        0x3354, N,   N,  N),
1958     PINGROUP(dap2_fs_pa2,            I2S1,       HDA,        GMI,          RSVD4,       0x3358, N,   N,  N),
1959     PINGROUP(dap2_din_pa4,           I2S1,       HDA,        GMI,          RSVD4,       0x335c, N,   N,  N),
1960     PINGROUP(dap2_dout_pa5,          I2S1,       HDA,        GMI,          RSVD4,       0x3360, N,   N,  N),
1961     PINGROUP(dap2_sclk_pa3,          I2S1,       HDA,        GMI,          RSVD4,       0x3364, N,   N,  N),
1962     PINGROUP(dvfs_pwm_px0,           SPI6,       CLDVFS,     GMI,          RSVD4,       0x3368, N,   N,  N),
1963     PINGROUP(gpio_x1_aud_px1,        SPI6,       RSVD2,      GMI,          RSVD4,       0x336c, N,   N,  N),
1964     PINGROUP(gpio_x3_aud_px3,        SPI6,       SPI1,       GMI,          RSVD4,       0x3370, N,   N,  N),
1965     PINGROUP(dvfs_clk_px2,           SPI6,       CLDVFS,     GMI,          RSVD4,       0x3374, N,   N,  N),
1966     PINGROUP(gpio_x4_aud_px4,        GMI,        SPI1,       SPI2,         DAP2,        0x3378, N,   N,  N),
1967     PINGROUP(gpio_x5_aud_px5,        GMI,        SPI1,       SPI2,         RSVD4,       0x337c, N,   N,  N),
1968     PINGROUP(gpio_x6_aud_px6,        SPI6,       SPI1,       SPI2,         GMI,         0x3380, N,   N,  N),
1969     PINGROUP(gpio_x7_aud_px7,        RSVD1,      SPI1,       SPI2,         RSVD4,       0x3384, N,   N,  N),
1970     PINGROUP(sdmmc3_clk_pa6,         SDMMC3,     RSVD2,      RSVD3,        SPI3,        0x3390, N,   N,  N),
1971     PINGROUP(sdmmc3_cmd_pa7,         SDMMC3,     PWM3,       UARTA,        SPI3,        0x3394, N,   N,  N),
1972     PINGROUP(sdmmc3_dat0_pb7,        SDMMC3,     RSVD2,      RSVD3,        SPI3,        0x3398, N,   N,  N),
1973     PINGROUP(sdmmc3_dat1_pb6,        SDMMC3,     PWM2,       UARTA,        SPI3,        0x339c, N,   N,  N),
1974     PINGROUP(sdmmc3_dat2_pb5,        SDMMC3,     PWM1,       DISPLAYA,     SPI3,        0x33a0, N,   N,  N),
1975     PINGROUP(sdmmc3_dat3_pb4,        SDMMC3,     PWM0,       DISPLAYB,     SPI3,        0x33a4, N,   N,  N),
1976     PINGROUP(pex_l0_rst_n_pdd1,      PE0,        RSVD2,      RSVD3,        RSVD4,       0x33bc, N,   N,  N),
1977     PINGROUP(pex_l0_clkreq_n_pdd2,   PE0,        RSVD2,      RSVD3,        RSVD4,       0x33c0, N,   N,  N),
1978     PINGROUP(pex_wake_n_pdd3,        PE,         RSVD2,      RSVD3,        RSVD4,       0x33c4, N,   N,  N),
1979     PINGROUP(pex_l1_rst_n_pdd5,      PE1,        RSVD2,      RSVD3,        RSVD4,       0x33cc, N,   N,  N),
1980     PINGROUP(pex_l1_clkreq_n_pdd6,   PE1,        RSVD2,      RSVD3,        RSVD4,       0x33d0, N,   N,  N),
1981     PINGROUP(hdmi_cec_pee3,          CEC,        RSVD2,      RSVD3,        RSVD4,       0x33e0, Y,   N,  N),
1982     PINGROUP(sdmmc1_wp_n_pv3,        SDMMC1,     CLK12,      SPI4,         UARTA,       0x33e4, N,   N,  N),
1983     PINGROUP(sdmmc3_cd_n_pv2,        SDMMC3,     OWR,        RSVD3,        RSVD4,       0x33e8, N,   N,  N),
1984     PINGROUP(gpio_w2_aud_pw2,        SPI6,       RSVD2,      SPI2,         I2C1,        0x33ec, N,   N,  N),
1985     PINGROUP(gpio_w3_aud_pw3,        SPI6,       SPI1,       SPI2,         I2C1,        0x33f0, N,   N,  N),
1986     PINGROUP(usb_vbus_en0_pn4,       USB,        RSVD2,      RSVD3,        RSVD4,       0x33f4, Y,   N,  N),
1987     PINGROUP(usb_vbus_en1_pn5,       USB,        RSVD2,      RSVD3,        RSVD4,       0x33f8, Y,   N,  N),
1988     PINGROUP(sdmmc3_clk_lb_in_pee5,  SDMMC3,     RSVD2,      RSVD3,        RSVD4,       0x33fc, N,   N,  N),
1989     PINGROUP(sdmmc3_clk_lb_out_pee4, SDMMC3,     RSVD2,      RSVD3,        RSVD4,       0x3400, N,   N,  N),
1990     PINGROUP(gmi_clk_lb,             SDMMC2,     RSVD2,      GMI,          RSVD4,       0x3404, N,   N,  N),
1991     PINGROUP(reset_out_n,            RSVD1,      RSVD2,      RSVD3,        RESET_OUT_N, 0x3408, N,   N,  N),
1992     PINGROUP(kb_row16_pt0,           KBC,        RSVD2,      RSVD3,        UARTC,       0x340c, N,   N,  N),
1993     PINGROUP(kb_row17_pt1,           KBC,        RSVD2,      RSVD3,        UARTC,       0x3410, N,   N,  N),
1994     PINGROUP(usb_vbus_en2_pff1,      USB,        RSVD2,      RSVD3,        RSVD4,       0x3414, Y,   N,  N),
1995     PINGROUP(pff2,                   SATA,       RSVD2,      RSVD3,        RSVD4,       0x3418, Y,   N,  N),
1996     PINGROUP(dp_hpd_pff0,            DP,         RSVD2,      RSVD3,        RSVD4,       0x3430, N,   N,  N),
1997 
1998     /* pg_name, r, hsm_b, schmitt_b, lpmd_b, drvdn_b, drvdn_w, drvup_b, drvup_w, slwr_b, slwr_w, slwf_b, slwf_w, drvtype */
1999     DRV_PINGROUP(ao1,         0x868,  2,  3,  4,  12,  5,  20,  5,  28,  2,  30,  2,  N),
2000     DRV_PINGROUP(ao2,         0x86c,  2,  3,  4,  12,  5,  20,  5,  28,  2,  30,  2,  N),
2001     DRV_PINGROUP(at1,         0x870,  2,  3,  4,  12,  7,  20,  7,  28,  2,  30,  2,  Y),
2002     DRV_PINGROUP(at2,         0x874,  2,  3,  4,  12,  7,  20,  7,  28,  2,  30,  2,  Y),
2003     DRV_PINGROUP(at3,         0x878,  2,  3,  4,  12,  7,  20,  7,  28,  2,  30,  2,  Y),
2004     DRV_PINGROUP(at4,         0x87c,  2,  3,  4,  12,  7,  20,  7,  28,  2,  30,  2,  Y),
2005     DRV_PINGROUP(at5,         0x880,  2,  3,  4,  14,  5,  19,  5,  28,  2,  30,  2,  N),
2006     DRV_PINGROUP(cdev1,       0x884,  2,  3,  4,  12,  5,  20,  5,  28,  2,  30,  2,  N),
2007     DRV_PINGROUP(cdev2,       0x888,  2,  3,  4,  12,  5,  20,  5,  28,  2,  30,  2,  N),
2008     DRV_PINGROUP(dap1,        0x890,  2,  3,  4,  12,  5,  20,  5,  28,  2,  30,  2,  N),
2009     DRV_PINGROUP(dap2,        0x894,  2,  3,  4,  12,  5,  20,  5,  28,  2,  30,  2,  N),
2010     DRV_PINGROUP(dap3,        0x898,  2,  3,  4,  12,  5,  20,  5,  28,  2,  30,  2,  N),
2011     DRV_PINGROUP(dap4,        0x89c,  2,  3,  4,  12,  5,  20,  5,  28,  2,  30,  2,  N),
2012     DRV_PINGROUP(dbg,         0x8a0,  2,  3,  4,  12,  5,  20,  5,  28,  2,  30,  2,  N),
2013     DRV_PINGROUP(sdio3,       0x8b0,  2,  3, -1,  12,  7,  20,  7,  28,  2,  30,  2,  N),
2014     DRV_PINGROUP(spi,         0x8b4,  2,  3,  4,  12,  5,  20,  5,  28,  2,  30,  2,  N),
2015     DRV_PINGROUP(uaa,         0x8b8,  2,  3,  4,  12,  5,  20,  5,  28,  2,  30,  2,  N),
2016     DRV_PINGROUP(uab,         0x8bc,  2,  3,  4,  12,  5,  20,  5,  28,  2,  30,  2,  N),
2017     DRV_PINGROUP(uart2,       0x8c0,  2,  3,  4,  12,  5,  20,  5,  28,  2,  30,  2,  N),
2018     DRV_PINGROUP(uart3,       0x8c4,  2,  3,  4,  12,  5,  20,  5,  28,  2,  30,  2,  N),
2019     DRV_PINGROUP(sdio1,       0x8ec,  2,  3, -1,  12,  7,  20,  7,  28,  2,  30,  2,  N),
2020     DRV_PINGROUP(ddc,         0x8fc,  2,  3,  4,  12,  5,  20,  5,  28,  2,  30,  2,  N),
2021     DRV_PINGROUP(gma,         0x900,  2,  3,  4,  14,  5,  20,  5,  28,  2,  30,  2,  Y),
2022     DRV_PINGROUP(gme,         0x910,  2,  3,  4,  14,  5,  19,  5,  28,  2,  30,  2,  N),
2023     DRV_PINGROUP(gmf,         0x914,  2,  3,  4,  14,  5,  19,  5,  28,  2,  30,  2,  N),
2024     DRV_PINGROUP(gmg,         0x918,  2,  3,  4,  14,  5,  19,  5,  28,  2,  30,  2,  N),
2025     DRV_PINGROUP(gmh,         0x91c,  2,  3,  4,  14,  5,  19,  5,  28,  2,  30,  2,  N),
2026     DRV_PINGROUP(owr,         0x920,  2,  3,  4,  12,  5,  20,  5,  28,  2,  30,  2,  N),
2027     DRV_PINGROUP(uda,         0x924,  2,  3,  4,  12,  5,  20,  5,  28,  2,  30,  2,  N),
2028     DRV_PINGROUP(gpv,         0x928,  2,  3,  4,  12,  5,  20,  5,  28,  2,  30,  2,  N),
2029     DRV_PINGROUP(dev3,        0x92c,  2,  3,  4,  12,  5,  20,  5,  28,  2,  30,  2,  N),
2030     DRV_PINGROUP(cec,         0x938,  2,  3,  4,  12,  5,  20,  5,  28,  2,  30,  2,  N),
2031     DRV_PINGROUP(at6,         0x994,  2,  3,  4,  12,  7,  20,  7,  28,  2,  30,  2,  Y),
2032     DRV_PINGROUP(dap5,        0x998,  2,  3,  4,  12,  5,  20,  5,  28,  2,  30,  2,  N),
2033     DRV_PINGROUP(usb_vbus_en, 0x99c,  2,  3,  4,  12,  5,  20,  5,  28,  2,  30,  2,  N),
2034     DRV_PINGROUP(ao3,         0x9a8,  2,  3,  4,  12,  5,  -1, -1,  28,  2,  -1, -1,  N),
2035     DRV_PINGROUP(ao0,         0x9b0,  2,  3,  4,  12,  5,  20,  5,  28,  2,  30,  2,  N),
2036     DRV_PINGROUP(hv0,         0x9b4,  2,  3,  4,  12,  5,  -1, -1,  28,  2,  -1, -1,  N),
2037     DRV_PINGROUP(sdio4,       0x9c4,  2,  3,  4,  12,  5,  20,  5,  28,  2,  30,  2,  N),
2038     DRV_PINGROUP(ao4,         0x9c8,  2,  3,  4,  12,  7,  20,  7,  28,  2,  30,  2,  Y),
2039 
2040     /*                     pg_name, r,     b, f0,  f1 */
2041     MIPI_PAD_CTRL_PINGROUP(dsi_b,   0x820, 1, CSI, DSI_B),
2042 };
2043 
2044 static const struct tegra_pinctrl_soc_data tegra124_pinctrl = {
2045     .ngpios = NUM_GPIOS,
2046     .gpio_compatible = "nvidia,tegra124-gpio",
2047     .pins = tegra124_pins,
2048     .npins = ARRAY_SIZE(tegra124_pins),
2049     .functions = tegra124_functions,
2050     .nfunctions = ARRAY_SIZE(tegra124_functions),
2051     .groups = tegra124_groups,
2052     .ngroups = ARRAY_SIZE(tegra124_groups),
2053     .hsm_in_mux = false,
2054     .schmitt_in_mux = false,
2055     .drvtype_in_mux = false,
2056 };
2057 
2058 static int tegra124_pinctrl_probe(struct platform_device *pdev)
2059 {
2060     return tegra_pinctrl_probe(pdev, &tegra124_pinctrl);
2061 }
2062 
2063 static const struct of_device_id tegra124_pinctrl_of_match[] = {
2064     { .compatible = "nvidia,tegra124-pinmux", },
2065     { },
2066 };
2067 
2068 static struct platform_driver tegra124_pinctrl_driver = {
2069     .driver = {
2070         .name = "tegra124-pinctrl",
2071         .of_match_table = tegra124_pinctrl_of_match,
2072     },
2073     .probe = tegra124_pinctrl_probe,
2074 };
2075 
2076 static int __init tegra124_pinctrl_init(void)
2077 {
2078     return platform_driver_register(&tegra124_pinctrl_driver);
2079 }
2080 arch_initcall(tegra124_pinctrl_init);
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