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OSCL-LXR
 
 

     

0001 /*
0002  * Allwinner new F-series F1C100s SoC (suniv) pinctrl driver.
0003  *
0004  * Copyright (C) 2018 Icenowy Zheng
0005  *
0006  * Icenowy Zheng <icenowy@aosc.io>
0007  *
0008  * Copyright (C) 2014 Jackie Hwang
0009  *
0010  * Jackie Hwang <huangshr@allwinnertech.com>
0011  *
0012  * Copyright (C) 2014 Chen-Yu Tsai
0013  *
0014  * Chen-Yu Tsai <wens@csie.org>
0015  *
0016  * Copyright (C) 2014 Maxime Ripard
0017  *
0018  * Maxime Ripard <maxime.ripard@free-electrons.com>
0019  *
0020  * This file is licensed under the terms of the GNU General Public
0021  * License version 2.  This program is licensed "as is" without any
0022  * warranty of any kind, whether express or implied.
0023  */
0024 
0025 #include <linux/module.h>
0026 #include <linux/platform_device.h>
0027 #include <linux/of.h>
0028 #include <linux/of_device.h>
0029 #include <linux/pinctrl/pinctrl.h>
0030 
0031 #include "pinctrl-sunxi.h"
0032 static const struct sunxi_desc_pin suniv_f1c100s_pins[] = {
0033     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
0034           SUNXI_FUNCTION(0x0, "gpio_in"),
0035           SUNXI_FUNCTION(0x1, "gpio_out"),
0036           SUNXI_FUNCTION(0x2, "rtp"),       /* X1 */
0037           SUNXI_FUNCTION(0x4, "i2s"),       /* BCLK */
0038           SUNXI_FUNCTION(0x5, "uart1"),     /* RTS */
0039           SUNXI_FUNCTION(0x6, "spi1")),     /* CS */
0040     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
0041           SUNXI_FUNCTION(0x0, "gpio_in"),
0042           SUNXI_FUNCTION(0x1, "gpio_out"),
0043           SUNXI_FUNCTION(0x2, "rtp"),       /* X2 */
0044           SUNXI_FUNCTION(0x4, "i2s"),       /* LRCK */
0045           SUNXI_FUNCTION(0x5, "uart1"),     /* CTS */
0046           SUNXI_FUNCTION(0x6, "spi1")),     /* MOSI */
0047     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
0048           SUNXI_FUNCTION(0x0, "gpio_in"),
0049           SUNXI_FUNCTION(0x1, "gpio_out"),
0050           SUNXI_FUNCTION(0x2, "rtp"),       /* Y1 */
0051           SUNXI_FUNCTION(0x3, "pwm0"),      /* PWM0 */
0052           SUNXI_FUNCTION(0x4, "i2s"),       /* IN */
0053           SUNXI_FUNCTION(0x5, "uart1"),     /* RX */
0054           SUNXI_FUNCTION(0x6, "spi1")),     /* CLK */
0055     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
0056           SUNXI_FUNCTION(0x0, "gpio_in"),
0057           SUNXI_FUNCTION(0x1, "gpio_out"),
0058           SUNXI_FUNCTION(0x2, "rtp"),       /* Y2 */
0059           SUNXI_FUNCTION(0x3, "ir0"),       /* RX */
0060           SUNXI_FUNCTION(0x4, "i2s"),       /* OUT */
0061           SUNXI_FUNCTION(0x5, "uart1"),     /* TX */
0062           SUNXI_FUNCTION(0x6, "spi1")),     /* MISO */
0063     /* Hole */
0064     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
0065           SUNXI_FUNCTION(0x0, "gpio_in"),
0066           SUNXI_FUNCTION(0x1, "gpio_out"),
0067           SUNXI_FUNCTION(0x2, "dram"),      /* DQS0 */
0068           SUNXI_FUNCTION(0x3, "i2c1"),      /* SCK */
0069           SUNXI_FUNCTION(0x4, "i2s"),       /* BCLK */
0070           SUNXI_FUNCTION(0x5, "uart1"),     /* RTS */
0071           SUNXI_FUNCTION(0x6, "spi1")),     /* CS */
0072     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
0073           SUNXI_FUNCTION(0x0, "gpio_in"),
0074           SUNXI_FUNCTION(0x1, "gpio_out"),
0075           SUNXI_FUNCTION(0x2, "dram"),      /* DQS1 */
0076           SUNXI_FUNCTION(0x3, "i2c1"),      /* SDA */
0077           SUNXI_FUNCTION(0x4, "i2s"),       /* LRCK */
0078           SUNXI_FUNCTION(0x5, "uart1"),     /* CTS */
0079           SUNXI_FUNCTION(0x6, "spi1")),     /* MOSI */
0080     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
0081           SUNXI_FUNCTION(0x0, "gpio_in"),
0082           SUNXI_FUNCTION(0x1, "gpio_out"),
0083           SUNXI_FUNCTION(0x2, "dram"),      /* CKE */
0084           SUNXI_FUNCTION(0x3, "pwm0"),      /* PWM0 */
0085           SUNXI_FUNCTION(0x4, "i2s"),       /* IN */
0086           SUNXI_FUNCTION(0x5, "uart1"),     /* RX */
0087           SUNXI_FUNCTION(0x6, "spi1")),     /* CLK */
0088     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
0089           SUNXI_FUNCTION(0x0, "gpio_in"),
0090           SUNXI_FUNCTION(0x1, "gpio_out"),
0091           SUNXI_FUNCTION(0x2, "dram"),      /* DDR_REF_D */
0092           SUNXI_FUNCTION(0x3, "ir0"),       /* RX */
0093           SUNXI_FUNCTION(0x4, "i2s"),       /* OUT */
0094           SUNXI_FUNCTION(0x5, "uart1"),     /* TX */
0095           SUNXI_FUNCTION(0x6, "spi1")),     /* MISO */
0096     /* Hole */
0097     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
0098           SUNXI_FUNCTION(0x1, "gpio_out"),
0099           SUNXI_FUNCTION(0x2, "spi0"),      /* CLK */
0100           SUNXI_FUNCTION(0x3, "mmc1")),     /* CLK */
0101     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
0102           SUNXI_FUNCTION(0x0, "gpio_in"),
0103           SUNXI_FUNCTION(0x1, "gpio_out"),
0104           SUNXI_FUNCTION(0x2, "spi0"),      /* CS */
0105           SUNXI_FUNCTION(0x3, "mmc1")),     /* CMD */
0106     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
0107           SUNXI_FUNCTION(0x0, "gpio_in"),
0108           SUNXI_FUNCTION(0x1, "gpio_out"),
0109           SUNXI_FUNCTION(0x2, "spi0"),      /* MISO */
0110           SUNXI_FUNCTION(0x3, "mmc1")),     /* D0 */
0111     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
0112           SUNXI_FUNCTION(0x0, "gpio_in"),
0113           SUNXI_FUNCTION(0x1, "gpio_out"),
0114           SUNXI_FUNCTION(0x2, "spi0"),      /* MOSI */
0115           SUNXI_FUNCTION(0x3, "uart0")),    /* TX */
0116     /* Hole */
0117     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
0118           SUNXI_FUNCTION(0x0, "gpio_in"),
0119           SUNXI_FUNCTION(0x1, "gpio_out"),
0120           SUNXI_FUNCTION(0x2, "lcd"),       /* D2 */
0121           SUNXI_FUNCTION(0x3, "i2c0"),      /* SDA */
0122           SUNXI_FUNCTION(0x4, "rsb"),       /* SDA */
0123           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),
0124     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
0125           SUNXI_FUNCTION(0x0, "gpio_in"),
0126           SUNXI_FUNCTION(0x1, "gpio_out"),
0127           SUNXI_FUNCTION(0x2, "lcd"),       /* D3 */
0128           SUNXI_FUNCTION(0x3, "uart1"),     /* RTS */
0129           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),
0130     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
0131           SUNXI_FUNCTION(0x0, "gpio_in"),
0132           SUNXI_FUNCTION(0x1, "gpio_out"),
0133           SUNXI_FUNCTION(0x2, "lcd"),       /* D4*/
0134           SUNXI_FUNCTION(0x3, "uart1"),     /* CTS */
0135           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),
0136     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
0137           SUNXI_FUNCTION(0x0, "gpio_in"),
0138           SUNXI_FUNCTION(0x1, "gpio_out"),
0139           SUNXI_FUNCTION(0x2, "lcd"),       /* D5 */
0140           SUNXI_FUNCTION(0x3, "uart1"),     /* RX */
0141           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),
0142     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
0143           SUNXI_FUNCTION(0x0, "gpio_in"),
0144           SUNXI_FUNCTION(0x1, "gpio_out"),
0145           SUNXI_FUNCTION(0x2, "lcd"),       /* D6 */
0146           SUNXI_FUNCTION(0x3, "uart1"),     /* TX */
0147           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),
0148     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
0149           SUNXI_FUNCTION(0x0, "gpio_in"),
0150           SUNXI_FUNCTION(0x1, "gpio_out"),
0151           SUNXI_FUNCTION(0x2, "lcd"),       /* D7 */
0152           SUNXI_FUNCTION(0x3, "i2c1"),      /* SCK */
0153           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),
0154     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
0155           SUNXI_FUNCTION(0x0, "gpio_in"),
0156           SUNXI_FUNCTION(0x1, "gpio_out"),
0157           SUNXI_FUNCTION(0x2, "lcd"),       /* D10 */
0158           SUNXI_FUNCTION(0x3, "i2c1"),      /* SDA */
0159           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),
0160     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
0161           SUNXI_FUNCTION(0x0, "gpio_in"),
0162           SUNXI_FUNCTION(0x1, "gpio_out"),
0163           SUNXI_FUNCTION(0x2, "lcd"),       /* D11 */
0164           SUNXI_FUNCTION(0x3, "i2s"),       /* MCLK */
0165           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),
0166     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
0167           SUNXI_FUNCTION(0x0, "gpio_in"),
0168           SUNXI_FUNCTION(0x1, "gpio_out"),
0169           SUNXI_FUNCTION(0x2, "lcd"),       /* D12 */
0170           SUNXI_FUNCTION(0x3, "i2s"),       /* BCLK */
0171           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),
0172     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
0173           SUNXI_FUNCTION(0x0, "gpio_in"),
0174           SUNXI_FUNCTION(0x1, "gpio_out"),
0175           SUNXI_FUNCTION(0x2, "lcd"),       /* D13 */
0176           SUNXI_FUNCTION(0x3, "i2s"),       /* LRCK */
0177           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),
0178     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
0179           SUNXI_FUNCTION(0x0, "gpio_in"),
0180           SUNXI_FUNCTION(0x1, "gpio_out"),
0181           SUNXI_FUNCTION(0x2, "lcd"),       /* D14 */
0182           SUNXI_FUNCTION(0x3, "i2s"),       /* IN */
0183           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)),
0184     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
0185           SUNXI_FUNCTION(0x0, "gpio_in"),
0186           SUNXI_FUNCTION(0x1, "gpio_out"),
0187           SUNXI_FUNCTION(0x2, "lcd"),       /* D15 */
0188           SUNXI_FUNCTION(0x3, "i2s"),       /* OUT */
0189           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)),
0190     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
0191           SUNXI_FUNCTION(0x0, "gpio_in"),
0192           SUNXI_FUNCTION(0x1, "gpio_out"),
0193           SUNXI_FUNCTION(0x2, "lcd"),       /* D18 */
0194           SUNXI_FUNCTION(0x3, "i2c0"),      /* SCK */
0195           SUNXI_FUNCTION(0x4, "rsb"),       /* SCK */
0196           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 12)),
0197     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
0198           SUNXI_FUNCTION(0x0, "gpio_in"),
0199           SUNXI_FUNCTION(0x1, "gpio_out"),
0200           SUNXI_FUNCTION(0x2, "lcd"),       /* D19 */
0201           SUNXI_FUNCTION(0x3, "uart2"),     /* TX */
0202           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 13)),
0203     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
0204           SUNXI_FUNCTION(0x0, "gpio_in"),
0205           SUNXI_FUNCTION(0x1, "gpio_out"),
0206           SUNXI_FUNCTION(0x2, "lcd"),       /* D20 */
0207           SUNXI_FUNCTION(0x3, "uart2"),     /* RX */
0208           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 14)),
0209     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
0210           SUNXI_FUNCTION(0x0, "gpio_in"),
0211           SUNXI_FUNCTION(0x1, "gpio_out"),
0212           SUNXI_FUNCTION(0x2, "lcd"),       /* D21 */
0213           SUNXI_FUNCTION(0x3, "uart2"),     /* RTS */
0214           SUNXI_FUNCTION(0x4, "i2c2"),      /* SCK */
0215           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 15)),
0216     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
0217           SUNXI_FUNCTION(0x0, "gpio_in"),
0218           SUNXI_FUNCTION(0x1, "gpio_out"),
0219           SUNXI_FUNCTION(0x2, "lcd"),       /* D22 */
0220           SUNXI_FUNCTION(0x3, "uart2"),     /* CTS */
0221           SUNXI_FUNCTION(0x4, "i2c2"),      /* SDA */
0222           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 16)),
0223     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
0224           SUNXI_FUNCTION(0x0, "gpio_in"),
0225           SUNXI_FUNCTION(0x1, "gpio_out"),
0226           SUNXI_FUNCTION(0x2, "lcd"),       /* D23 */
0227           SUNXI_FUNCTION(0x3, "spdif"),     /* OUT */
0228           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 17)),
0229     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
0230           SUNXI_FUNCTION(0x0, "gpio_in"),
0231           SUNXI_FUNCTION(0x1, "gpio_out"),
0232           SUNXI_FUNCTION(0x2, "lcd"),       /* CLK */
0233           SUNXI_FUNCTION(0x3, "spi0"),      /* CS */
0234           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 18)),
0235     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
0236           SUNXI_FUNCTION(0x0, "gpio_in"),
0237           SUNXI_FUNCTION(0x1, "gpio_out"),
0238           SUNXI_FUNCTION(0x2, "lcd"),       /* DE */
0239           SUNXI_FUNCTION(0x3, "spi0"),      /* MOSI */
0240           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 19)),
0241     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
0242           SUNXI_FUNCTION(0x0, "gpio_in"),
0243           SUNXI_FUNCTION(0x1, "gpio_out"),
0244           SUNXI_FUNCTION(0x2, "lcd"),       /* HYSNC */
0245           SUNXI_FUNCTION(0x3, "spi0"),      /* CLK */
0246           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 20)),
0247     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
0248           SUNXI_FUNCTION(0x0, "gpio_in"),
0249           SUNXI_FUNCTION(0x1, "gpio_out"),
0250           SUNXI_FUNCTION(0x2, "lcd"),       /* VSYNC */
0251           SUNXI_FUNCTION(0x3, "spi0"),      /* MISO */
0252           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 21)),
0253     /* Hole */
0254     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
0255           SUNXI_FUNCTION(0x0, "gpio_in"),
0256           SUNXI_FUNCTION(0x1, "gpio_out"),
0257           SUNXI_FUNCTION(0x2, "csi"),       /* HSYNC */
0258           SUNXI_FUNCTION(0x3, "lcd"),       /* D0 */
0259           SUNXI_FUNCTION(0x4, "i2c2"),      /* SCK */
0260           SUNXI_FUNCTION(0x5, "uart0"),     /* RX */
0261           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)),
0262     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
0263           SUNXI_FUNCTION(0x0, "gpio_in"),
0264           SUNXI_FUNCTION(0x1, "gpio_out"),
0265           SUNXI_FUNCTION(0x2, "csi"),       /* VSYNC */
0266           SUNXI_FUNCTION(0x3, "lcd"),       /* D1 */
0267           SUNXI_FUNCTION(0x4, "i2c2"),      /* SDA */
0268           SUNXI_FUNCTION(0x5, "uart0"),     /* TX */
0269           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)),
0270     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
0271           SUNXI_FUNCTION(0x0, "gpio_in"),
0272           SUNXI_FUNCTION(0x1, "gpio_out"),
0273           SUNXI_FUNCTION(0x2, "csi"),       /* PCLK */
0274           SUNXI_FUNCTION(0x3, "lcd"),       /* D8 */
0275           SUNXI_FUNCTION(0x4, "clk"),       /* OUT */
0276           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2)),
0277     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
0278           SUNXI_FUNCTION(0x0, "gpio_in"),
0279           SUNXI_FUNCTION(0x1, "gpio_out"),
0280           SUNXI_FUNCTION(0x2, "csi"),       /* D0 */
0281           SUNXI_FUNCTION(0x3, "lcd"),       /* D9 */
0282           SUNXI_FUNCTION(0x4, "i2s"),       /* BCLK */
0283           SUNXI_FUNCTION(0x5, "rsb"),       /* SCK */
0284           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)),
0285     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
0286           SUNXI_FUNCTION(0x0, "gpio_in"),
0287           SUNXI_FUNCTION(0x1, "gpio_out"),
0288           SUNXI_FUNCTION(0x2, "csi"),       /* D1 */
0289           SUNXI_FUNCTION(0x3, "lcd"),       /* D16 */
0290           SUNXI_FUNCTION(0x4, "i2s"),       /* LRCK */
0291           SUNXI_FUNCTION(0x5, "rsb"),       /* SDA */
0292           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)),
0293     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
0294           SUNXI_FUNCTION(0x0, "gpio_in"),
0295           SUNXI_FUNCTION(0x1, "gpio_out"),
0296           SUNXI_FUNCTION(0x2, "csi"),       /* D2 */
0297           SUNXI_FUNCTION(0x3, "lcd"),       /* D17 */
0298           SUNXI_FUNCTION(0x4, "i2s"),       /* IN */
0299           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 5)),
0300     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
0301           SUNXI_FUNCTION(0x0, "gpio_in"),
0302           SUNXI_FUNCTION(0x1, "gpio_out"),
0303           SUNXI_FUNCTION(0x2, "csi"),       /* D3 */
0304           SUNXI_FUNCTION(0x3, "pwm1"),      /* PWM1 */
0305           SUNXI_FUNCTION(0x4, "i2s"),       /* OUT */
0306           SUNXI_FUNCTION(0x5, "spdif"),     /* OUT */
0307           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 6)),
0308     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
0309           SUNXI_FUNCTION(0x0, "gpio_in"),
0310           SUNXI_FUNCTION(0x1, "gpio_out"),
0311           SUNXI_FUNCTION(0x2, "csi"),       /* D4 */
0312           SUNXI_FUNCTION(0x3, "uart2"),     /* TX */
0313           SUNXI_FUNCTION(0x4, "spi1"),      /* CS */
0314           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 7)),
0315     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
0316           SUNXI_FUNCTION(0x0, "gpio_in"),
0317           SUNXI_FUNCTION(0x1, "gpio_out"),
0318           SUNXI_FUNCTION(0x2, "csi"),       /* D5 */
0319           SUNXI_FUNCTION(0x3, "uart2"),     /* RX */
0320           SUNXI_FUNCTION(0x4, "spi1"),      /* MOSI */
0321           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 8)),
0322     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
0323           SUNXI_FUNCTION(0x0, "gpio_in"),
0324           SUNXI_FUNCTION(0x1, "gpio_out"),
0325           SUNXI_FUNCTION(0x2, "csi"),       /* D6 */
0326           SUNXI_FUNCTION(0x3, "uart2"),     /* RTS */
0327           SUNXI_FUNCTION(0x4, "spi1"),      /* CLK */
0328           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 9)),
0329     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
0330           SUNXI_FUNCTION(0x0, "gpio_in"),
0331           SUNXI_FUNCTION(0x1, "gpio_out"),
0332           SUNXI_FUNCTION(0x2, "csi"),       /* D7 */
0333           SUNXI_FUNCTION(0x3, "uart2"),     /* CTS */
0334           SUNXI_FUNCTION(0x4, "spi1"),      /* MISO */
0335           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 10)),
0336     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
0337           SUNXI_FUNCTION(0x0, "gpio_in"),
0338           SUNXI_FUNCTION(0x1, "gpio_out"),
0339           SUNXI_FUNCTION(0x2, "clk0"),      /* OUT */
0340           SUNXI_FUNCTION(0x3, "i2c0"),      /* SCK */
0341           SUNXI_FUNCTION(0x4, "ir"),        /* RX */
0342           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 11)),
0343     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
0344           SUNXI_FUNCTION(0x0, "gpio_in"),
0345           SUNXI_FUNCTION(0x1, "gpio_out"),
0346           SUNXI_FUNCTION(0x2, "i2s"),       /* MCLK */
0347           SUNXI_FUNCTION(0x3, "i2c0"),      /* SDA */
0348           SUNXI_FUNCTION(0x4, "pwm0"),      /* PWM0 */
0349           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 12)),
0350 
0351     /* Hole */
0352     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
0353           SUNXI_FUNCTION(0x0, "gpio_in"),
0354           SUNXI_FUNCTION(0x1, "gpio_out"),
0355           SUNXI_FUNCTION(0x2, "mmc0"),      /* D1 */
0356           SUNXI_FUNCTION(0x3, "jtag"),      /* MS */
0357           SUNXI_FUNCTION(0x4, "ir0"),       /* MS */
0358           SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 0)),
0359     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
0360           SUNXI_FUNCTION(0x0, "gpio_in"),
0361           SUNXI_FUNCTION(0x1, "gpio_out"),
0362           SUNXI_FUNCTION(0x2, "mmc0"),      /* D0 */
0363           SUNXI_FUNCTION(0x3, "dgb0"),      /* DI */
0364           SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 1)),
0365     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
0366           SUNXI_FUNCTION(0x0, "gpio_in"),
0367           SUNXI_FUNCTION(0x1, "gpio_out"),
0368           SUNXI_FUNCTION(0x2, "mmc0"),      /* CLK */
0369           SUNXI_FUNCTION(0x3, "uart0"),     /* TX */
0370           SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 2)),
0371     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
0372           SUNXI_FUNCTION(0x0, "gpio_in"),
0373           SUNXI_FUNCTION(0x1, "gpio_out"),
0374           SUNXI_FUNCTION(0x2, "mmc0"),      /* CMD */
0375           SUNXI_FUNCTION(0x3, "jtag"),      /* DO */
0376           SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 3)),
0377     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
0378           SUNXI_FUNCTION(0x0, "gpio_in"),
0379           SUNXI_FUNCTION(0x1, "gpio_out"),
0380           SUNXI_FUNCTION(0x2, "mmc0"),      /* D3 */
0381           SUNXI_FUNCTION(0x3, "uart0"),     /* TX */
0382           SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 4)),
0383     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
0384           SUNXI_FUNCTION(0x0, "gpio_in"),
0385           SUNXI_FUNCTION(0x1, "gpio_out"),
0386           SUNXI_FUNCTION(0x2, "mmc0"),      /* D2 */
0387           SUNXI_FUNCTION(0x3, "jtag"),      /* CK */
0388           SUNXI_FUNCTION(0x4, "pwm1"),      /* PWM1 */
0389           SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 5)),
0390 };
0391 
0392 static const struct sunxi_pinctrl_desc suniv_f1c100s_pinctrl_data = {
0393     .pins = suniv_f1c100s_pins,
0394     .npins = ARRAY_SIZE(suniv_f1c100s_pins),
0395     .irq_banks = 3,
0396 };
0397 
0398 static int suniv_pinctrl_probe(struct platform_device *pdev)
0399 {
0400     return sunxi_pinctrl_init(pdev,
0401                   &suniv_f1c100s_pinctrl_data);
0402 }
0403 
0404 static const struct of_device_id suniv_f1c100s_pinctrl_match[] = {
0405     { .compatible = "allwinner,suniv-f1c100s-pinctrl", },
0406     {}
0407 };
0408 
0409 static struct platform_driver suniv_f1c100s_pinctrl_driver = {
0410     .probe  = suniv_pinctrl_probe,
0411     .driver = {
0412         .name       = "suniv-f1c100s-pinctrl",
0413         .of_match_table = suniv_f1c100s_pinctrl_match,
0414     },
0415 };
0416 builtin_platform_driver(suniv_f1c100s_pinctrl_driver);
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