Back to home page

OSCL-LXR

 
 

    


0001 /*
0002  * Allwinner H3 SoCs pinctrl driver.
0003  *
0004  * Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
0005  *
0006  * Based on pinctrl-sun8i-a23.c, which is:
0007  * Copyright (C) 2014 Chen-Yu Tsai <wens@csie.org>
0008  * Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com>
0009  *
0010  * This file is licensed under the terms of the GNU General Public
0011  * License version 2.  This program is licensed "as is" without any
0012  * warranty of any kind, whether express or implied.
0013  */
0014 
0015 #include <linux/module.h>
0016 #include <linux/platform_device.h>
0017 #include <linux/of.h>
0018 #include <linux/of_device.h>
0019 #include <linux/pinctrl/pinctrl.h>
0020 
0021 #include "pinctrl-sunxi.h"
0022 
0023 static const struct sunxi_desc_pin sun8i_h3_pins[] = {
0024     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
0025           SUNXI_FUNCTION(0x0, "gpio_in"),
0026           SUNXI_FUNCTION(0x1, "gpio_out"),
0027           SUNXI_FUNCTION(0x2, "uart2"),     /* TX */
0028           SUNXI_FUNCTION(0x3, "jtag"),      /* MS */
0029           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),  /* PA_EINT0 */
0030     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
0031           SUNXI_FUNCTION(0x0, "gpio_in"),
0032           SUNXI_FUNCTION(0x1, "gpio_out"),
0033           SUNXI_FUNCTION(0x2, "uart2"),     /* RX */
0034           SUNXI_FUNCTION(0x3, "jtag"),      /* CK */
0035           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),  /* PA_EINT1 */
0036     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
0037           SUNXI_FUNCTION(0x0, "gpio_in"),
0038           SUNXI_FUNCTION(0x1, "gpio_out"),
0039           SUNXI_FUNCTION(0x2, "uart2"),     /* RTS */
0040           SUNXI_FUNCTION(0x3, "jtag"),      /* DO */
0041           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),  /* PA_EINT2 */
0042     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
0043           SUNXI_FUNCTION(0x0, "gpio_in"),
0044           SUNXI_FUNCTION(0x1, "gpio_out"),
0045           SUNXI_FUNCTION(0x2, "uart2"),     /* CTS */
0046           SUNXI_FUNCTION(0x3, "jtag"),      /* DI */
0047           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),  /* PA_EINT3 */
0048     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
0049           SUNXI_FUNCTION(0x0, "gpio_in"),
0050           SUNXI_FUNCTION(0x1, "gpio_out"),
0051           SUNXI_FUNCTION(0x2, "uart0"),     /* TX */
0052           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),  /* PA_EINT4 */
0053     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
0054           SUNXI_FUNCTION(0x0, "gpio_in"),
0055           SUNXI_FUNCTION(0x1, "gpio_out"),
0056           SUNXI_FUNCTION(0x2, "uart0"),     /* RX */
0057           SUNXI_FUNCTION(0x3, "pwm0"),
0058           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),  /* PA_EINT5 */
0059     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
0060           SUNXI_FUNCTION(0x0, "gpio_in"),
0061           SUNXI_FUNCTION(0x1, "gpio_out"),
0062           SUNXI_FUNCTION(0x2, "sim"),       /* PWREN */
0063           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),  /* PA_EINT6 */
0064     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
0065           SUNXI_FUNCTION(0x0, "gpio_in"),
0066           SUNXI_FUNCTION(0x1, "gpio_out"),
0067           SUNXI_FUNCTION(0x2, "sim"),       /* CLK */
0068           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),  /* PA_EINT7 */
0069     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
0070           SUNXI_FUNCTION(0x0, "gpio_in"),
0071           SUNXI_FUNCTION(0x1, "gpio_out"),
0072           SUNXI_FUNCTION(0x2, "sim"),       /* DATA */
0073           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),  /* PA_EINT8 */
0074     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
0075           SUNXI_FUNCTION(0x0, "gpio_in"),
0076           SUNXI_FUNCTION(0x1, "gpio_out"),
0077           SUNXI_FUNCTION(0x2, "sim"),       /* RST */
0078           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),  /* PA_EINT9 */
0079     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10),
0080           SUNXI_FUNCTION(0x0, "gpio_in"),
0081           SUNXI_FUNCTION(0x1, "gpio_out"),
0082           SUNXI_FUNCTION(0x2, "sim"),       /* DET */
0083           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), /* PA_EINT10 */
0084     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11),
0085           SUNXI_FUNCTION(0x0, "gpio_in"),
0086           SUNXI_FUNCTION(0x1, "gpio_out"),
0087           SUNXI_FUNCTION(0x2, "i2c0"),      /* SCK */
0088           SUNXI_FUNCTION(0x3, "di"),        /* TX */
0089           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)), /* PA_EINT11 */
0090     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12),
0091           SUNXI_FUNCTION(0x0, "gpio_in"),
0092           SUNXI_FUNCTION(0x1, "gpio_out"),
0093           SUNXI_FUNCTION(0x2, "i2c0"),      /* SDA */
0094           SUNXI_FUNCTION(0x3, "di"),        /* RX */
0095           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 12)), /* PA_EINT12 */
0096     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 13),
0097           SUNXI_FUNCTION(0x0, "gpio_in"),
0098           SUNXI_FUNCTION(0x1, "gpio_out"),
0099           SUNXI_FUNCTION(0x2, "spi1"),      /* CS */
0100           SUNXI_FUNCTION(0x3, "uart3"),     /* TX */
0101           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 13)), /* PA_EINT13 */
0102     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 14),
0103           SUNXI_FUNCTION(0x0, "gpio_in"),
0104           SUNXI_FUNCTION(0x1, "gpio_out"),
0105           SUNXI_FUNCTION(0x2, "spi1"),      /* CLK */
0106           SUNXI_FUNCTION(0x3, "uart3"),     /* RX */
0107           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 14)), /* PA_EINT14 */
0108     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 15),
0109           SUNXI_FUNCTION(0x0, "gpio_in"),
0110           SUNXI_FUNCTION(0x1, "gpio_out"),
0111           SUNXI_FUNCTION(0x2, "spi1"),      /* MOSI */
0112           SUNXI_FUNCTION(0x3, "uart3"),     /* RTS */
0113           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 15)), /* PA_EINT15 */
0114     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 16),
0115           SUNXI_FUNCTION(0x0, "gpio_in"),
0116           SUNXI_FUNCTION(0x1, "gpio_out"),
0117           SUNXI_FUNCTION(0x2, "spi1"),      /* MISO */
0118           SUNXI_FUNCTION(0x3, "uart3"),     /* CTS */
0119           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 16)), /* PA_EINT16 */
0120     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 17),
0121           SUNXI_FUNCTION(0x0, "gpio_in"),
0122           SUNXI_FUNCTION(0x1, "gpio_out"),
0123           SUNXI_FUNCTION(0x2, "spdif"),     /* OUT */
0124           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 17)), /* PA_EINT17 */
0125     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 18),
0126           SUNXI_FUNCTION(0x0, "gpio_in"),
0127           SUNXI_FUNCTION(0x1, "gpio_out"),
0128           SUNXI_FUNCTION(0x2, "i2s0"),      /* SYNC */
0129           SUNXI_FUNCTION(0x3, "i2c1"),      /* SCK */
0130           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 18)), /* PA_EINT18 */
0131     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 19),
0132           SUNXI_FUNCTION(0x0, "gpio_in"),
0133           SUNXI_FUNCTION(0x1, "gpio_out"),
0134           SUNXI_FUNCTION(0x2, "i2s0"),      /* CLK */
0135           SUNXI_FUNCTION(0x3, "i2c1"),      /* SDA */
0136           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 19)), /* PA_EINT19 */
0137     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 20),
0138           SUNXI_FUNCTION(0x0, "gpio_in"),
0139           SUNXI_FUNCTION(0x1, "gpio_out"),
0140           SUNXI_FUNCTION(0x2, "i2s0"),      /* DOUT */
0141           SUNXI_FUNCTION(0x3, "sim"),       /* VPPEN */
0142           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 20)), /* PA_EINT20 */
0143     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 21),
0144           SUNXI_FUNCTION(0x0, "gpio_in"),
0145           SUNXI_FUNCTION(0x1, "gpio_out"),
0146           SUNXI_FUNCTION(0x2, "i2s0"),      /* DIN */
0147           SUNXI_FUNCTION(0x3, "sim"),       /* VPPPP */
0148           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 21)), /* PA_EINT21 */
0149     /* Hole */
0150     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
0151           SUNXI_FUNCTION(0x0, "gpio_in"),
0152           SUNXI_FUNCTION(0x1, "gpio_out"),
0153           SUNXI_FUNCTION(0x2, "nand0"),     /* WE */
0154           SUNXI_FUNCTION(0x3, "spi0")),     /* MOSI */
0155     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
0156           SUNXI_FUNCTION(0x0, "gpio_in"),
0157           SUNXI_FUNCTION(0x1, "gpio_out"),
0158           SUNXI_FUNCTION(0x2, "nand0"),     /* ALE */
0159           SUNXI_FUNCTION(0x3, "spi0")),     /* MISO */
0160     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
0161           SUNXI_FUNCTION(0x0, "gpio_in"),
0162           SUNXI_FUNCTION(0x1, "gpio_out"),
0163           SUNXI_FUNCTION(0x2, "nand0"),     /* CLE */
0164           SUNXI_FUNCTION(0x3, "spi0")),     /* CLK */
0165     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
0166           SUNXI_FUNCTION(0x0, "gpio_in"),
0167           SUNXI_FUNCTION(0x1, "gpio_out"),
0168           SUNXI_FUNCTION(0x2, "nand0"),     /* CE1 */
0169           SUNXI_FUNCTION(0x3, "spi0")),     /* CS */
0170     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
0171           SUNXI_FUNCTION(0x0, "gpio_in"),
0172           SUNXI_FUNCTION(0x1, "gpio_out"),
0173           SUNXI_FUNCTION(0x2, "nand0")),    /* CE0 */
0174     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
0175           SUNXI_FUNCTION(0x0, "gpio_in"),
0176           SUNXI_FUNCTION(0x1, "gpio_out"),
0177           SUNXI_FUNCTION(0x2, "nand0"),     /* RE */
0178           SUNXI_FUNCTION(0x3, "mmc2")),     /* CLK */
0179     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
0180           SUNXI_FUNCTION(0x0, "gpio_in"),
0181           SUNXI_FUNCTION(0x1, "gpio_out"),
0182           SUNXI_FUNCTION(0x2, "nand0"),     /* RB0 */
0183           SUNXI_FUNCTION(0x3, "mmc2")),     /* CMD */
0184     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
0185           SUNXI_FUNCTION(0x0, "gpio_in"),
0186           SUNXI_FUNCTION(0x1, "gpio_out"),
0187           SUNXI_FUNCTION(0x2, "nand0")),    /* RB1 */
0188     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
0189           SUNXI_FUNCTION(0x0, "gpio_in"),
0190           SUNXI_FUNCTION(0x1, "gpio_out"),
0191           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ0 */
0192           SUNXI_FUNCTION(0x3, "mmc2")),     /* D0 */
0193     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
0194           SUNXI_FUNCTION(0x0, "gpio_in"),
0195           SUNXI_FUNCTION(0x1, "gpio_out"),
0196           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ1 */
0197           SUNXI_FUNCTION(0x3, "mmc2")),     /* D1 */
0198     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
0199           SUNXI_FUNCTION(0x0, "gpio_in"),
0200           SUNXI_FUNCTION(0x1, "gpio_out"),
0201           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ2 */
0202           SUNXI_FUNCTION(0x3, "mmc2")),     /* D2 */
0203     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
0204           SUNXI_FUNCTION(0x0, "gpio_in"),
0205           SUNXI_FUNCTION(0x1, "gpio_out"),
0206           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ3 */
0207           SUNXI_FUNCTION(0x3, "mmc2")),     /* D3 */
0208     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
0209           SUNXI_FUNCTION(0x0, "gpio_in"),
0210           SUNXI_FUNCTION(0x1, "gpio_out"),
0211           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ4 */
0212           SUNXI_FUNCTION(0x3, "mmc2")),     /* D4 */
0213     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
0214           SUNXI_FUNCTION(0x0, "gpio_in"),
0215           SUNXI_FUNCTION(0x1, "gpio_out"),
0216           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ5 */
0217           SUNXI_FUNCTION(0x3, "mmc2")),     /* D5 */
0218     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
0219           SUNXI_FUNCTION(0x0, "gpio_in"),
0220           SUNXI_FUNCTION(0x1, "gpio_out"),
0221           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ6 */
0222           SUNXI_FUNCTION(0x3, "mmc2")),     /* D6 */
0223     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
0224           SUNXI_FUNCTION(0x0, "gpio_in"),
0225           SUNXI_FUNCTION(0x1, "gpio_out"),
0226           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ7 */
0227           SUNXI_FUNCTION(0x3, "mmc2")),     /* D7 */
0228     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
0229           SUNXI_FUNCTION(0x0, "gpio_in"),
0230           SUNXI_FUNCTION(0x1, "gpio_out"),
0231           SUNXI_FUNCTION(0x2, "nand0"),     /* DQS */
0232           SUNXI_FUNCTION(0x3, "mmc2")),     /* RST */
0233     /* Hole */
0234     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
0235           SUNXI_FUNCTION(0x0, "gpio_in"),
0236           SUNXI_FUNCTION(0x1, "gpio_out"),
0237           SUNXI_FUNCTION(0x2, "emac")),     /* RXD3 */
0238     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
0239           SUNXI_FUNCTION(0x0, "gpio_in"),
0240           SUNXI_FUNCTION(0x1, "gpio_out"),
0241           SUNXI_FUNCTION(0x2, "emac")),     /* RXD2 */
0242     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
0243           SUNXI_FUNCTION(0x0, "gpio_in"),
0244           SUNXI_FUNCTION(0x1, "gpio_out"),
0245           SUNXI_FUNCTION(0x2, "emac")),     /* RXD1 */
0246     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
0247           SUNXI_FUNCTION(0x0, "gpio_in"),
0248           SUNXI_FUNCTION(0x1, "gpio_out"),
0249           SUNXI_FUNCTION(0x2, "emac")),     /* RXD0 */
0250     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
0251           SUNXI_FUNCTION(0x0, "gpio_in"),
0252           SUNXI_FUNCTION(0x1, "gpio_out"),
0253           SUNXI_FUNCTION(0x2, "emac")),     /* RXCK */
0254     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
0255           SUNXI_FUNCTION(0x0, "gpio_in"),
0256           SUNXI_FUNCTION(0x1, "gpio_out"),
0257           SUNXI_FUNCTION(0x2, "emac")),     /* RXCTL/RXDV */
0258     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
0259           SUNXI_FUNCTION(0x0, "gpio_in"),
0260           SUNXI_FUNCTION(0x1, "gpio_out"),
0261           SUNXI_FUNCTION(0x2, "emac")),     /* RXERR */
0262     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
0263           SUNXI_FUNCTION(0x0, "gpio_in"),
0264           SUNXI_FUNCTION(0x1, "gpio_out"),
0265           SUNXI_FUNCTION(0x2, "emac")),     /* TXD3 */
0266     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
0267           SUNXI_FUNCTION(0x0, "gpio_in"),
0268           SUNXI_FUNCTION(0x1, "gpio_out"),
0269           SUNXI_FUNCTION(0x2, "emac")),     /* TXD2 */
0270     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
0271           SUNXI_FUNCTION(0x0, "gpio_in"),
0272           SUNXI_FUNCTION(0x1, "gpio_out"),
0273           SUNXI_FUNCTION(0x2, "emac")),     /* TXD1 */
0274     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
0275           SUNXI_FUNCTION(0x0, "gpio_in"),
0276           SUNXI_FUNCTION(0x1, "gpio_out"),
0277           SUNXI_FUNCTION(0x2, "emac")),     /* TXD0 */
0278     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
0279           SUNXI_FUNCTION(0x0, "gpio_in"),
0280           SUNXI_FUNCTION(0x1, "gpio_out"),
0281           SUNXI_FUNCTION(0x2, "emac")),     /* CRS */
0282     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
0283           SUNXI_FUNCTION(0x0, "gpio_in"),
0284           SUNXI_FUNCTION(0x1, "gpio_out"),
0285           SUNXI_FUNCTION(0x2, "emac")),     /* TXCK */
0286     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
0287           SUNXI_FUNCTION(0x0, "gpio_in"),
0288           SUNXI_FUNCTION(0x1, "gpio_out"),
0289           SUNXI_FUNCTION(0x2, "emac")),     /* TXCTL/TXEN */
0290     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
0291           SUNXI_FUNCTION(0x0, "gpio_in"),
0292           SUNXI_FUNCTION(0x1, "gpio_out"),
0293           SUNXI_FUNCTION(0x2, "emac")),     /* TXERR */
0294     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
0295           SUNXI_FUNCTION(0x0, "gpio_in"),
0296           SUNXI_FUNCTION(0x1, "gpio_out"),
0297           SUNXI_FUNCTION(0x2, "emac")),     /* CLKIN/COL */
0298     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
0299           SUNXI_FUNCTION(0x0, "gpio_in"),
0300           SUNXI_FUNCTION(0x1, "gpio_out"),
0301           SUNXI_FUNCTION(0x2, "emac")),     /* MDC */
0302     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
0303           SUNXI_FUNCTION(0x0, "gpio_in"),
0304           SUNXI_FUNCTION(0x1, "gpio_out"),
0305           SUNXI_FUNCTION(0x2, "emac")),     /* MDIO */
0306     /* Hole */
0307     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
0308           SUNXI_FUNCTION(0x0, "gpio_in"),
0309           SUNXI_FUNCTION(0x1, "gpio_out"),
0310           SUNXI_FUNCTION(0x2, "csi"),       /* PCLK */
0311           SUNXI_FUNCTION(0x3, "ts")),       /* CLK */
0312     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
0313           SUNXI_FUNCTION(0x0, "gpio_in"),
0314           SUNXI_FUNCTION(0x1, "gpio_out"),
0315           SUNXI_FUNCTION(0x2, "csi"),       /* MCLK */
0316           SUNXI_FUNCTION(0x3, "ts")),       /* ERR */
0317     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
0318           SUNXI_FUNCTION(0x0, "gpio_in"),
0319           SUNXI_FUNCTION(0x1, "gpio_out"),
0320           SUNXI_FUNCTION(0x2, "csi"),       /* HSYNC */
0321           SUNXI_FUNCTION(0x3, "ts")),       /* SYNC */
0322     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
0323           SUNXI_FUNCTION(0x0, "gpio_in"),
0324           SUNXI_FUNCTION(0x1, "gpio_out"),
0325           SUNXI_FUNCTION(0x2, "csi"),       /* VSYNC */
0326           SUNXI_FUNCTION(0x3, "ts")),       /* DVLD */
0327     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
0328           SUNXI_FUNCTION(0x0, "gpio_in"),
0329           SUNXI_FUNCTION(0x1, "gpio_out"),
0330           SUNXI_FUNCTION(0x2, "csi"),       /* D0 */
0331           SUNXI_FUNCTION(0x3, "ts")),       /* D0 */
0332     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
0333           SUNXI_FUNCTION(0x0, "gpio_in"),
0334           SUNXI_FUNCTION(0x1, "gpio_out"),
0335           SUNXI_FUNCTION(0x2, "csi"),       /* D1 */
0336           SUNXI_FUNCTION(0x3, "ts")),       /* D1 */
0337     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
0338           SUNXI_FUNCTION(0x0, "gpio_in"),
0339           SUNXI_FUNCTION(0x1, "gpio_out"),
0340           SUNXI_FUNCTION(0x2, "csi"),       /* D2 */
0341           SUNXI_FUNCTION(0x3, "ts")),       /* D2 */
0342     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
0343           SUNXI_FUNCTION(0x0, "gpio_in"),
0344           SUNXI_FUNCTION(0x1, "gpio_out"),
0345           SUNXI_FUNCTION(0x2, "csi"),       /* D3 */
0346           SUNXI_FUNCTION(0x3, "ts")),       /* D3 */
0347     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
0348           SUNXI_FUNCTION(0x0, "gpio_in"),
0349           SUNXI_FUNCTION(0x1, "gpio_out"),
0350           SUNXI_FUNCTION(0x2, "csi"),       /* D4 */
0351           SUNXI_FUNCTION(0x3, "ts")),       /* D4 */
0352     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
0353           SUNXI_FUNCTION(0x0, "gpio_in"),
0354           SUNXI_FUNCTION(0x1, "gpio_out"),
0355           SUNXI_FUNCTION(0x2, "csi"),       /* D5 */
0356           SUNXI_FUNCTION(0x3, "ts")),       /* D5 */
0357     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
0358           SUNXI_FUNCTION(0x0, "gpio_in"),
0359           SUNXI_FUNCTION(0x1, "gpio_out"),
0360           SUNXI_FUNCTION(0x2, "csi"),       /* D6 */
0361           SUNXI_FUNCTION(0x3, "ts")),       /* D6 */
0362     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
0363           SUNXI_FUNCTION(0x0, "gpio_in"),
0364           SUNXI_FUNCTION(0x1, "gpio_out"),
0365           SUNXI_FUNCTION(0x2, "csi"),       /* D7 */
0366           SUNXI_FUNCTION(0x3, "ts")),       /* D7 */
0367     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
0368           SUNXI_FUNCTION(0x0, "gpio_in"),
0369           SUNXI_FUNCTION(0x1, "gpio_out"),
0370           SUNXI_FUNCTION(0x2, "csi"),       /* SCK */
0371           SUNXI_FUNCTION(0x3, "i2c2")),     /* SCK */
0372     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13),
0373           SUNXI_FUNCTION(0x0, "gpio_in"),
0374           SUNXI_FUNCTION(0x1, "gpio_out"),
0375           SUNXI_FUNCTION(0x2, "csi"),       /* SDA */
0376           SUNXI_FUNCTION(0x3, "i2c2")),     /* SDA */
0377     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14),
0378           SUNXI_FUNCTION(0x0, "gpio_in"),
0379           SUNXI_FUNCTION(0x1, "gpio_out")),
0380     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15),
0381           SUNXI_FUNCTION(0x0, "gpio_in"),
0382           SUNXI_FUNCTION(0x1, "gpio_out")),
0383     /* Hole */
0384     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
0385           SUNXI_FUNCTION(0x0, "gpio_in"),
0386           SUNXI_FUNCTION(0x1, "gpio_out"),
0387           SUNXI_FUNCTION(0x2, "mmc0"),      /* D1 */
0388           SUNXI_FUNCTION(0x3, "jtag")),     /* MS */
0389     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
0390           SUNXI_FUNCTION(0x0, "gpio_in"),
0391           SUNXI_FUNCTION(0x1, "gpio_out"),
0392           SUNXI_FUNCTION(0x2, "mmc0"),      /* D0 */
0393           SUNXI_FUNCTION(0x3, "jtag")),     /* DI */
0394     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
0395           SUNXI_FUNCTION(0x0, "gpio_in"),
0396           SUNXI_FUNCTION(0x1, "gpio_out"),
0397           SUNXI_FUNCTION(0x2, "mmc0"),      /* CLK */
0398           SUNXI_FUNCTION(0x3, "uart0")),    /* TX */
0399     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
0400           SUNXI_FUNCTION(0x0, "gpio_in"),
0401           SUNXI_FUNCTION(0x1, "gpio_out"),
0402           SUNXI_FUNCTION(0x2, "mmc0"),      /* CMD */
0403           SUNXI_FUNCTION(0x3, "jtag")),     /* DO */
0404     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
0405           SUNXI_FUNCTION(0x0, "gpio_in"),
0406           SUNXI_FUNCTION(0x1, "gpio_out"),
0407           SUNXI_FUNCTION(0x2, "mmc0"),      /* D3 */
0408           SUNXI_FUNCTION(0x3, "uart0")),    /* RX */
0409     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
0410           SUNXI_FUNCTION(0x0, "gpio_in"),
0411           SUNXI_FUNCTION(0x1, "gpio_out"),
0412           SUNXI_FUNCTION(0x2, "mmc0"),      /* D2 */
0413           SUNXI_FUNCTION(0x3, "jtag")),     /* CK */
0414     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 6),
0415           SUNXI_FUNCTION(0x0, "gpio_in"),
0416           SUNXI_FUNCTION(0x1, "gpio_out")),
0417     /* Hole */
0418     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
0419           SUNXI_FUNCTION(0x0, "gpio_in"),
0420           SUNXI_FUNCTION(0x1, "gpio_out"),
0421           SUNXI_FUNCTION(0x2, "mmc1"),      /* CLK */
0422           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)),  /* PG_EINT0 */
0423     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
0424           SUNXI_FUNCTION(0x0, "gpio_in"),
0425           SUNXI_FUNCTION(0x1, "gpio_out"),
0426           SUNXI_FUNCTION(0x2, "mmc1"),      /* CMD */
0427           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)),  /* PG_EINT1 */
0428     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
0429           SUNXI_FUNCTION(0x0, "gpio_in"),
0430           SUNXI_FUNCTION(0x1, "gpio_out"),
0431           SUNXI_FUNCTION(0x2, "mmc1"),      /* D0 */
0432           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2)),  /* PG_EINT2 */
0433     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
0434           SUNXI_FUNCTION(0x0, "gpio_in"),
0435           SUNXI_FUNCTION(0x1, "gpio_out"),
0436           SUNXI_FUNCTION(0x2, "mmc1"),      /* D1 */
0437           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)),  /* PG_EINT3 */
0438     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
0439           SUNXI_FUNCTION(0x0, "gpio_in"),
0440           SUNXI_FUNCTION(0x1, "gpio_out"),
0441           SUNXI_FUNCTION(0x2, "mmc1"),      /* D2 */
0442           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)),  /* PG_EINT4 */
0443     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
0444           SUNXI_FUNCTION(0x0, "gpio_in"),
0445           SUNXI_FUNCTION(0x1, "gpio_out"),
0446           SUNXI_FUNCTION(0x2, "mmc1"),      /* D3 */
0447           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 5)),  /* PG_EINT5 */
0448     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
0449           SUNXI_FUNCTION(0x0, "gpio_in"),
0450           SUNXI_FUNCTION(0x1, "gpio_out"),
0451           SUNXI_FUNCTION(0x2, "uart1"),     /* TX */
0452           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 6)),  /* PG_EINT6 */
0453     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
0454           SUNXI_FUNCTION(0x0, "gpio_in"),
0455           SUNXI_FUNCTION(0x1, "gpio_out"),
0456           SUNXI_FUNCTION(0x2, "uart1"),     /* RX */
0457           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 7)),  /* PG_EINT7 */
0458     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
0459           SUNXI_FUNCTION(0x0, "gpio_in"),
0460           SUNXI_FUNCTION(0x1, "gpio_out"),
0461           SUNXI_FUNCTION(0x2, "uart1"),     /* RTS */
0462           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 8)),  /* PG_EINT8 */
0463     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
0464           SUNXI_FUNCTION(0x0, "gpio_in"),
0465           SUNXI_FUNCTION(0x1, "gpio_out"),
0466           SUNXI_FUNCTION(0x2, "uart1"),     /* CTS */
0467           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 9)),  /* PG_EINT9 */
0468     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
0469           SUNXI_FUNCTION(0x0, "gpio_in"),
0470           SUNXI_FUNCTION(0x1, "gpio_out"),
0471           SUNXI_FUNCTION(0x2, "i2s1"),      /* SYNC */
0472           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 10)), /* PG_EINT10 */
0473     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
0474           SUNXI_FUNCTION(0x0, "gpio_in"),
0475           SUNXI_FUNCTION(0x1, "gpio_out"),
0476           SUNXI_FUNCTION(0x2, "i2s1"),      /* CLK */
0477           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 11)), /* PG_EINT11 */
0478     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12),
0479           SUNXI_FUNCTION(0x0, "gpio_in"),
0480           SUNXI_FUNCTION(0x1, "gpio_out"),
0481           SUNXI_FUNCTION(0x2, "i2s1"),      /* DOUT */
0482           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 12)), /* PG_EINT12 */
0483     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13),
0484           SUNXI_FUNCTION(0x0, "gpio_in"),
0485           SUNXI_FUNCTION(0x1, "gpio_out"),
0486           SUNXI_FUNCTION(0x2, "i2s1"),      /* DIN */
0487           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 13)), /* PG_EINT13 */
0488 };
0489 
0490 static const struct sunxi_pinctrl_desc sun8i_h3_pinctrl_data = {
0491     .pins = sun8i_h3_pins,
0492     .npins = ARRAY_SIZE(sun8i_h3_pins),
0493     .irq_banks = 2,
0494     .irq_read_needs_mux = true,
0495     .disable_strict_mode = true,
0496 };
0497 
0498 static int sun8i_h3_pinctrl_probe(struct platform_device *pdev)
0499 {
0500     return sunxi_pinctrl_init(pdev,
0501                   &sun8i_h3_pinctrl_data);
0502 }
0503 
0504 static const struct of_device_id sun8i_h3_pinctrl_match[] = {
0505     { .compatible = "allwinner,sun8i-h3-pinctrl", },
0506     {}
0507 };
0508 
0509 static struct platform_driver sun8i_h3_pinctrl_driver = {
0510     .probe  = sun8i_h3_pinctrl_probe,
0511     .driver = {
0512         .name       = "sun8i-h3-pinctrl",
0513         .of_match_table = sun8i_h3_pinctrl_match,
0514     },
0515 };
0516 builtin_platform_driver(sun8i_h3_pinctrl_driver);