pinctrl/sunxi/pinctrl-sun8i-h3-r.c

0001 /*
0002  * Allwinner H3 SoCs pinctrl driver.
0003  *
0004  * Copyright (C) 2016 Krzysztof Adamski <k@japko.eu>
0005  *
0006  * This file is licensed under the terms of the GNU General Public
0007  * License version 2.  This program is licensed "as is" without any
0008  * warranty of any kind, whether express or implied.
0009  */
0010
0011 #include <linux/module.h>
0012 #include <linux/platform_device.h>
0013 #include <linux/of.h>
0014 #include <linux/of_device.h>
0015 #include <linux/pinctrl/pinctrl.h>
0016
0017 #include "pinctrl-sunxi.h"
0018
0019 static const struct sunxi_desc_pin sun8i_h3_r_pins[] = {
0020     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
0021           SUNXI_FUNCTION(0x0, "gpio_in"),
0022           SUNXI_FUNCTION(0x1, "gpio_out"),
0023           SUNXI_FUNCTION(0x2, "s_i2c"),         /* SCK */
0024           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),  /* PL_EINT0 */
0025     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
0026           SUNXI_FUNCTION(0x0, "gpio_in"),
0027           SUNXI_FUNCTION(0x1, "gpio_out"),
0028           SUNXI_FUNCTION(0x2, "s_i2c"),         /* SDA */
0029           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),  /* PL_EINT1 */
0030     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
0031           SUNXI_FUNCTION(0x0, "gpio_in"),
0032           SUNXI_FUNCTION(0x1, "gpio_out"),
0033           SUNXI_FUNCTION(0x2, "s_uart"),        /* TX */
0034           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),  /* PL_EINT2 */
0035     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
0036           SUNXI_FUNCTION(0x0, "gpio_in"),
0037           SUNXI_FUNCTION(0x1, "gpio_out"),
0038           SUNXI_FUNCTION(0x2, "s_uart"),        /* RX */
0039           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),  /* PL_EINT3 */
0040     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
0041           SUNXI_FUNCTION(0x0, "gpio_in"),
0042           SUNXI_FUNCTION(0x1, "gpio_out"),
0043           SUNXI_FUNCTION(0x2, "s_jtag"),        /* MS */
0044           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),  /* PL_EINT4 */
0045     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
0046           SUNXI_FUNCTION(0x0, "gpio_in"),
0047           SUNXI_FUNCTION(0x1, "gpio_out"),
0048           SUNXI_FUNCTION(0x2, "s_jtag"),        /* CK */
0049           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),  /* PL_EINT5 */
0050     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
0051           SUNXI_FUNCTION(0x0, "gpio_in"),
0052           SUNXI_FUNCTION(0x1, "gpio_out"),
0053           SUNXI_FUNCTION(0x2, "s_jtag"),        /* DO */
0054           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),  /* PL_EINT6 */
0055     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
0056           SUNXI_FUNCTION(0x0, "gpio_in"),
0057           SUNXI_FUNCTION(0x1, "gpio_out"),
0058           SUNXI_FUNCTION(0x2, "s_jtag"),        /* DI */
0059           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),  /* PL_EINT7 */
0060     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
0061           SUNXI_FUNCTION(0x0, "gpio_in"),
0062           SUNXI_FUNCTION(0x1, "gpio_out"),
0063           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),  /* PL_EINT8 */
0064     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9),
0065           SUNXI_FUNCTION(0x0, "gpio_in"),
0066           SUNXI_FUNCTION(0x1, "gpio_out"),
0067           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),  /* PL_EINT9 */
0068     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10),
0069           SUNXI_FUNCTION(0x0, "gpio_in"),
0070           SUNXI_FUNCTION(0x1, "gpio_out"),
0071           SUNXI_FUNCTION(0x2, "s_pwm"),
0072           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), /* PL_EINT10 */
0073     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 11),
0074           SUNXI_FUNCTION(0x0, "gpio_in"),
0075           SUNXI_FUNCTION(0x1, "gpio_out"),
0076           SUNXI_FUNCTION(0x2, "s_cir_rx"),
0077           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)), /* PL_EINT11 */
0078 };
0079
0080 static const struct sunxi_pinctrl_desc sun8i_h3_r_pinctrl_data = {
0081     .pins = sun8i_h3_r_pins,
0082     .npins = ARRAY_SIZE(sun8i_h3_r_pins),
0083     .irq_banks = 1,
0084     .pin_base = PL_BASE,
0085     .irq_read_needs_mux = true,
0086     .disable_strict_mode = true,
0087 };
0088
0089 static int sun8i_h3_r_pinctrl_probe(struct platform_device *pdev)
0090 {
0091     return sunxi_pinctrl_init(pdev,
0092                   &sun8i_h3_r_pinctrl_data);
0093 }
0094
0095 static const struct of_device_id sun8i_h3_r_pinctrl_match[] = {
0096     { .compatible = "allwinner,sun8i-h3-r-pinctrl", },
0097     {}
0098 };
0099
0100 static struct platform_driver sun8i_h3_r_pinctrl_driver = {
0101     .probe  = sun8i_h3_r_pinctrl_probe,
0102     .driver = {
0103         .name       = "sun8i-h3-r-pinctrl",
0104         .of_match_table = sun8i_h3_r_pinctrl_match,
0105     },
0106 };
0107 builtin_platform_driver(sun8i_h3_r_pinctrl_driver);