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0001 /*
0002  * Allwinner A83T SoCs special pins pinctrl driver.
0003  *
0004  * Copyright (C) 2017 Chen-Yu Tsai
0005  * Chen-Yu Tsai <wens@csie.org>
0006  *
0007  * Based on pinctrl-sun50i-a64-r.c
0008  *
0009  * Copyright (C) 2016 Icenowy Zheng
0010  * Icenowy Zheng <icenowy@aosc.xyz>
0011  *
0012  * Copyright (C) 2014 Chen-Yu Tsai
0013  * Chen-Yu Tsai <wens@csie.org>
0014  *
0015  * Copyright (C) 2014 Boris Brezillon
0016  * Boris Brezillon <boris.brezillon@free-electrons.com>
0017  *
0018  * Copyright (C) 2014 Maxime Ripard
0019  * Maxime Ripard <maxime.ripard@free-electrons.com>
0020  *
0021  * This file is licensed under the terms of the GNU General Public
0022  * License version 2.  This program is licensed "as is" without any
0023  * warranty of any kind, whether express or implied.
0024  */
0025 
0026 #include <linux/of.h>
0027 #include <linux/of_device.h>
0028 #include <linux/pinctrl/pinctrl.h>
0029 #include <linux/platform_device.h>
0030 
0031 #include "pinctrl-sunxi.h"
0032 
0033 static const struct sunxi_desc_pin sun8i_a83t_r_pins[] = {
0034     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
0035           SUNXI_FUNCTION(0x0, "gpio_in"),
0036           SUNXI_FUNCTION(0x1, "gpio_out"),
0037           SUNXI_FUNCTION(0x2, "s_rsb"),     /* SCK */
0038           SUNXI_FUNCTION(0x3, "s_i2c"),     /* SCK */
0039           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),  /* PL_EINT0 */
0040     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
0041           SUNXI_FUNCTION(0x0, "gpio_in"),
0042           SUNXI_FUNCTION(0x1, "gpio_out"),
0043           SUNXI_FUNCTION(0x2, "s_rsb"),     /* SDA */
0044           SUNXI_FUNCTION(0x3, "s_i2c"),     /* SDA */
0045           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),  /* PL_EINT1 */
0046     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
0047           SUNXI_FUNCTION(0x0, "gpio_in"),
0048           SUNXI_FUNCTION(0x1, "gpio_out"),
0049           SUNXI_FUNCTION(0x2, "s_uart"),    /* TX */
0050           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),  /* PL_EINT2 */
0051     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
0052           SUNXI_FUNCTION(0x0, "gpio_in"),
0053           SUNXI_FUNCTION(0x1, "gpio_out"),
0054           SUNXI_FUNCTION(0x2, "s_uart"),    /* RX */
0055           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),  /* PL_EINT3 */
0056     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
0057           SUNXI_FUNCTION(0x0, "gpio_in"),
0058           SUNXI_FUNCTION(0x1, "gpio_out"),
0059           SUNXI_FUNCTION(0x2, "s_jtag"),    /* MS */
0060           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),  /* PL_EINT4 */
0061     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
0062           SUNXI_FUNCTION(0x0, "gpio_in"),
0063           SUNXI_FUNCTION(0x1, "gpio_out"),
0064           SUNXI_FUNCTION(0x2, "s_jtag"),    /* CK */
0065           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),  /* PL_EINT5 */
0066     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
0067           SUNXI_FUNCTION(0x0, "gpio_in"),
0068           SUNXI_FUNCTION(0x1, "gpio_out"),
0069           SUNXI_FUNCTION(0x2, "s_jtag"),    /* DO */
0070           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),  /* PL_EINT6 */
0071     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
0072           SUNXI_FUNCTION(0x0, "gpio_in"),
0073           SUNXI_FUNCTION(0x1, "gpio_out"),
0074           SUNXI_FUNCTION(0x2, "s_jtag"),    /* DI */
0075           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),  /* PL_EINT7 */
0076     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
0077           SUNXI_FUNCTION(0x0, "gpio_in"),
0078           SUNXI_FUNCTION(0x1, "gpio_out"),
0079           SUNXI_FUNCTION(0x2, "s_i2c"),     /* SCK */
0080           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),  /* PL_EINT8 */
0081     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9),
0082           SUNXI_FUNCTION(0x0, "gpio_in"),
0083           SUNXI_FUNCTION(0x1, "gpio_out"),
0084           SUNXI_FUNCTION(0x2, "s_i2c"),     /* SDA */
0085           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),  /* PL_EINT9 */
0086     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10),
0087           SUNXI_FUNCTION(0x0, "gpio_in"),
0088           SUNXI_FUNCTION(0x1, "gpio_out"),
0089           SUNXI_FUNCTION(0x2, "s_pwm"),
0090           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), /* PL_EINT10 */
0091     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 11),
0092           SUNXI_FUNCTION(0x0, "gpio_in"),
0093           SUNXI_FUNCTION(0x1, "gpio_out"),
0094           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)), /* PL_EINT11 */
0095     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 12),
0096           SUNXI_FUNCTION(0x0, "gpio_in"),
0097           SUNXI_FUNCTION(0x1, "gpio_out"),
0098           SUNXI_FUNCTION(0x2, "s_cir_rx"),
0099           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 12)), /* PL_EINT12 */
0100 };
0101 
0102 static const struct sunxi_pinctrl_desc sun8i_a83t_r_pinctrl_data = {
0103     .pins = sun8i_a83t_r_pins,
0104     .npins = ARRAY_SIZE(sun8i_a83t_r_pins),
0105     .pin_base = PL_BASE,
0106     .irq_banks = 1,
0107 };
0108 
0109 static int sun8i_a83t_r_pinctrl_probe(struct platform_device *pdev)
0110 {
0111     return sunxi_pinctrl_init(pdev,
0112                   &sun8i_a83t_r_pinctrl_data);
0113 }
0114 
0115 static const struct of_device_id sun8i_a83t_r_pinctrl_match[] = {
0116     { .compatible = "allwinner,sun8i-a83t-r-pinctrl", },
0117     {}
0118 };
0119 
0120 static struct platform_driver sun8i_a83t_r_pinctrl_driver = {
0121     .probe  = sun8i_a83t_r_pinctrl_probe,
0122     .driver = {
0123         .name       = "sun8i-a83t-r-pinctrl",
0124         .of_match_table = sun8i_a83t_r_pinctrl_match,
0125     },
0126 };
0127 builtin_platform_driver(sun8i_a83t_r_pinctrl_driver);