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0026 #include <linux/of.h>
0027 #include <linux/of_device.h>
0028 #include <linux/pinctrl/pinctrl.h>
0029 #include <linux/platform_device.h>
0030
0031 #include "pinctrl-sunxi.h"
0032
0033 static const struct sunxi_desc_pin sun8i_a83t_r_pins[] = {
0034 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
0035 SUNXI_FUNCTION(0x0, "gpio_in"),
0036 SUNXI_FUNCTION(0x1, "gpio_out"),
0037 SUNXI_FUNCTION(0x2, "s_rsb"),
0038 SUNXI_FUNCTION(0x3, "s_i2c"),
0039 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),
0040 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
0041 SUNXI_FUNCTION(0x0, "gpio_in"),
0042 SUNXI_FUNCTION(0x1, "gpio_out"),
0043 SUNXI_FUNCTION(0x2, "s_rsb"),
0044 SUNXI_FUNCTION(0x3, "s_i2c"),
0045 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),
0046 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
0047 SUNXI_FUNCTION(0x0, "gpio_in"),
0048 SUNXI_FUNCTION(0x1, "gpio_out"),
0049 SUNXI_FUNCTION(0x2, "s_uart"),
0050 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),
0051 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
0052 SUNXI_FUNCTION(0x0, "gpio_in"),
0053 SUNXI_FUNCTION(0x1, "gpio_out"),
0054 SUNXI_FUNCTION(0x2, "s_uart"),
0055 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),
0056 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
0057 SUNXI_FUNCTION(0x0, "gpio_in"),
0058 SUNXI_FUNCTION(0x1, "gpio_out"),
0059 SUNXI_FUNCTION(0x2, "s_jtag"),
0060 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),
0061 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
0062 SUNXI_FUNCTION(0x0, "gpio_in"),
0063 SUNXI_FUNCTION(0x1, "gpio_out"),
0064 SUNXI_FUNCTION(0x2, "s_jtag"),
0065 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),
0066 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
0067 SUNXI_FUNCTION(0x0, "gpio_in"),
0068 SUNXI_FUNCTION(0x1, "gpio_out"),
0069 SUNXI_FUNCTION(0x2, "s_jtag"),
0070 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),
0071 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
0072 SUNXI_FUNCTION(0x0, "gpio_in"),
0073 SUNXI_FUNCTION(0x1, "gpio_out"),
0074 SUNXI_FUNCTION(0x2, "s_jtag"),
0075 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),
0076 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
0077 SUNXI_FUNCTION(0x0, "gpio_in"),
0078 SUNXI_FUNCTION(0x1, "gpio_out"),
0079 SUNXI_FUNCTION(0x2, "s_i2c"),
0080 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),
0081 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9),
0082 SUNXI_FUNCTION(0x0, "gpio_in"),
0083 SUNXI_FUNCTION(0x1, "gpio_out"),
0084 SUNXI_FUNCTION(0x2, "s_i2c"),
0085 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),
0086 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10),
0087 SUNXI_FUNCTION(0x0, "gpio_in"),
0088 SUNXI_FUNCTION(0x1, "gpio_out"),
0089 SUNXI_FUNCTION(0x2, "s_pwm"),
0090 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)),
0091 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 11),
0092 SUNXI_FUNCTION(0x0, "gpio_in"),
0093 SUNXI_FUNCTION(0x1, "gpio_out"),
0094 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)),
0095 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 12),
0096 SUNXI_FUNCTION(0x0, "gpio_in"),
0097 SUNXI_FUNCTION(0x1, "gpio_out"),
0098 SUNXI_FUNCTION(0x2, "s_cir_rx"),
0099 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 12)),
0100 };
0101
0102 static const struct sunxi_pinctrl_desc sun8i_a83t_r_pinctrl_data = {
0103 .pins = sun8i_a83t_r_pins,
0104 .npins = ARRAY_SIZE(sun8i_a83t_r_pins),
0105 .pin_base = PL_BASE,
0106 .irq_banks = 1,
0107 };
0108
0109 static int sun8i_a83t_r_pinctrl_probe(struct platform_device *pdev)
0110 {
0111 return sunxi_pinctrl_init(pdev,
0112 &sun8i_a83t_r_pinctrl_data);
0113 }
0114
0115 static const struct of_device_id sun8i_a83t_r_pinctrl_match[] = {
0116 { .compatible = "allwinner,sun8i-a83t-r-pinctrl", },
0117 {}
0118 };
0119
0120 static struct platform_driver sun8i_a83t_r_pinctrl_driver = {
0121 .probe = sun8i_a83t_r_pinctrl_probe,
0122 .driver = {
0123 .name = "sun8i-a83t-r-pinctrl",
0124 .of_match_table = sun8i_a83t_r_pinctrl_match,
0125 },
0126 };
0127 builtin_platform_driver(sun8i_a83t_r_pinctrl_driver);