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OSCL-LXR
 
 

     

0001 /*
0002  * Allwinner a33 SoCs pinctrl driver.
0003  *
0004  * Copyright (C) 2015 Vishnu Patekar <vishnupatekar0510@gmail.com>
0005  *
0006  * Based on pinctrl-sun8i-a23.c, which is:
0007  * Copyright (C) 2014 Chen-Yu Tsai <wens@csie.org>
0008  * Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com>
0009  *
0010  * This file is licensed under the terms of the GNU General Public
0011  * License version 2.  This program is licensed "as is" without any
0012  * warranty of any kind, whether express or implied.
0013  */
0014 
0015 #include <linux/init.h>
0016 #include <linux/platform_device.h>
0017 #include <linux/of.h>
0018 #include <linux/of_device.h>
0019 #include <linux/pinctrl/pinctrl.h>
0020 
0021 #include "pinctrl-sunxi.h"
0022 
0023 static const struct sunxi_desc_pin sun8i_a33_pins[] = {
0024     /* Hole */
0025     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
0026           SUNXI_FUNCTION(0x0, "gpio_in"),
0027           SUNXI_FUNCTION(0x1, "gpio_out"),
0028           SUNXI_FUNCTION(0x2, "uart2"),     /* TX */
0029           SUNXI_FUNCTION(0x3, "uart0"),     /* TX */
0030           SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 0)),  /* PB_EINT0 */
0031     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
0032           SUNXI_FUNCTION(0x0, "gpio_in"),
0033           SUNXI_FUNCTION(0x1, "gpio_out"),
0034           SUNXI_FUNCTION(0x2, "uart2"),     /* RX */
0035           SUNXI_FUNCTION(0x3, "uart0"),     /* RX */
0036           SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 1)),  /* PB_EINT1 */
0037     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
0038           SUNXI_FUNCTION(0x0, "gpio_in"),
0039           SUNXI_FUNCTION(0x1, "gpio_out"),
0040           SUNXI_FUNCTION(0x2, "uart2"),     /* RTS */
0041           SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 2)),  /* PB_EINT2 */
0042     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
0043           SUNXI_FUNCTION(0x0, "gpio_in"),
0044           SUNXI_FUNCTION(0x1, "gpio_out"),
0045           SUNXI_FUNCTION(0x2, "uart2"),     /* CTS */
0046           SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 3)),  /* PB_EINT3 */
0047     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
0048           SUNXI_FUNCTION(0x0, "gpio_in"),
0049           SUNXI_FUNCTION(0x1, "gpio_out"),
0050           SUNXI_FUNCTION(0x2, "i2s0"),      /* SYNC */
0051           SUNXI_FUNCTION(0x3, "aif2"),      /* SYNC */
0052           SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 4)),  /* PB_EINT4 */
0053     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
0054           SUNXI_FUNCTION(0x0, "gpio_in"),
0055           SUNXI_FUNCTION(0x1, "gpio_out"),
0056           SUNXI_FUNCTION(0x2, "i2s0"),      /* BCLK */
0057           SUNXI_FUNCTION(0x3, "aif2"),      /* BCLK */
0058           SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 5)),  /* PB_EINT5 */
0059     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
0060           SUNXI_FUNCTION(0x0, "gpio_in"),
0061           SUNXI_FUNCTION(0x1, "gpio_out"),
0062           SUNXI_FUNCTION(0x2, "i2s0"),      /* DOUT */
0063           SUNXI_FUNCTION(0x3, "aif2"),      /* DOUT */
0064           SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 6)),  /* PB_EINT6 */
0065     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
0066           SUNXI_FUNCTION(0x0, "gpio_in"),
0067           SUNXI_FUNCTION(0x1, "gpio_out"),
0068           SUNXI_FUNCTION(0x2, "i2s0"),      /* DIN */
0069           SUNXI_FUNCTION(0x3, "aif2"),      /* DIN */
0070           SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 7)),  /* PB_EINT7 */
0071     /* Hole */
0072     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
0073           SUNXI_FUNCTION(0x0, "gpio_in"),
0074           SUNXI_FUNCTION(0x1, "gpio_out"),
0075           SUNXI_FUNCTION(0x2, "nand0"),     /* WE */
0076           SUNXI_FUNCTION(0x3, "spi0")),     /* MOSI */
0077     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
0078           SUNXI_FUNCTION(0x0, "gpio_in"),
0079           SUNXI_FUNCTION(0x1, "gpio_out"),
0080           SUNXI_FUNCTION(0x2, "nand0"),     /* ALE */
0081           SUNXI_FUNCTION(0x3, "spi0")),     /* MISO */
0082     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
0083           SUNXI_FUNCTION(0x0, "gpio_in"),
0084           SUNXI_FUNCTION(0x1, "gpio_out"),
0085           SUNXI_FUNCTION(0x2, "nand0"),     /* CLE */
0086           SUNXI_FUNCTION(0x3, "spi0")),     /* CLK */
0087     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
0088           SUNXI_FUNCTION(0x0, "gpio_in"),
0089           SUNXI_FUNCTION(0x1, "gpio_out"),
0090           SUNXI_FUNCTION(0x2, "nand0"),     /* CE1 */
0091           SUNXI_FUNCTION(0x3, "spi0")),     /* CS */
0092     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
0093           SUNXI_FUNCTION(0x0, "gpio_in"),
0094           SUNXI_FUNCTION(0x1, "gpio_out"),
0095           SUNXI_FUNCTION(0x2, "nand0")),    /* CE0 */
0096     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
0097           SUNXI_FUNCTION(0x0, "gpio_in"),
0098           SUNXI_FUNCTION(0x1, "gpio_out"),
0099           SUNXI_FUNCTION(0x2, "nand0"),     /* RE */
0100           SUNXI_FUNCTION(0x3, "mmc2")),     /* CLK */
0101     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
0102           SUNXI_FUNCTION(0x0, "gpio_in"),
0103           SUNXI_FUNCTION(0x1, "gpio_out"),
0104           SUNXI_FUNCTION(0x2, "nand0"),     /* RB0 */
0105           SUNXI_FUNCTION(0x3, "mmc2")),     /* CMD */
0106     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
0107           SUNXI_FUNCTION(0x0, "gpio_in"),
0108           SUNXI_FUNCTION(0x1, "gpio_out"),
0109           SUNXI_FUNCTION(0x2, "nand0")),    /* RB1 */
0110     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
0111           SUNXI_FUNCTION(0x0, "gpio_in"),
0112           SUNXI_FUNCTION(0x1, "gpio_out"),
0113           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ0 */
0114           SUNXI_FUNCTION(0x3, "mmc2")),     /* D0 */
0115     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
0116           SUNXI_FUNCTION(0x0, "gpio_in"),
0117           SUNXI_FUNCTION(0x1, "gpio_out"),
0118           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ1 */
0119           SUNXI_FUNCTION(0x3, "mmc2")),     /* D1 */
0120     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
0121           SUNXI_FUNCTION(0x0, "gpio_in"),
0122           SUNXI_FUNCTION(0x1, "gpio_out"),
0123           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ2 */
0124           SUNXI_FUNCTION(0x3, "mmc2")),     /* D2 */
0125     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
0126           SUNXI_FUNCTION(0x0, "gpio_in"),
0127           SUNXI_FUNCTION(0x1, "gpio_out"),
0128           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ3 */
0129           SUNXI_FUNCTION(0x3, "mmc2")),     /* D3 */
0130     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
0131           SUNXI_FUNCTION(0x0, "gpio_in"),
0132           SUNXI_FUNCTION(0x1, "gpio_out"),
0133           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ4 */
0134           SUNXI_FUNCTION(0x3, "mmc2")),     /* D4 */
0135     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
0136           SUNXI_FUNCTION(0x0, "gpio_in"),
0137           SUNXI_FUNCTION(0x1, "gpio_out"),
0138           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ5 */
0139           SUNXI_FUNCTION(0x3, "mmc2")),     /* D5 */
0140     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
0141           SUNXI_FUNCTION(0x0, "gpio_in"),
0142           SUNXI_FUNCTION(0x1, "gpio_out"),
0143           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ6 */
0144           SUNXI_FUNCTION(0x3, "mmc2")),     /* D6 */
0145     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
0146           SUNXI_FUNCTION(0x0, "gpio_in"),
0147           SUNXI_FUNCTION(0x1, "gpio_out"),
0148           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ7 */
0149           SUNXI_FUNCTION(0x3, "mmc2")),     /* D7 */
0150     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
0151           SUNXI_FUNCTION(0x0, "gpio_in"),
0152           SUNXI_FUNCTION(0x1, "gpio_out"),
0153           SUNXI_FUNCTION(0x2, "nand0"),     /* DQS */
0154           SUNXI_FUNCTION(0x3, "mmc2")),     /* RST */
0155     /* Hole */
0156     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
0157           SUNXI_FUNCTION(0x0, "gpio_in"),
0158           SUNXI_FUNCTION(0x1, "gpio_out"),
0159           SUNXI_FUNCTION(0x2, "lcd0"),      /* D2 */
0160           SUNXI_FUNCTION(0x3, "mmc1")),     /* CLK */
0161     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
0162           SUNXI_FUNCTION(0x0, "gpio_in"),
0163           SUNXI_FUNCTION(0x1, "gpio_out"),
0164           SUNXI_FUNCTION(0x2, "lcd0"),      /* D3 */
0165           SUNXI_FUNCTION(0x3, "mmc1")),     /* CMD */
0166     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
0167           SUNXI_FUNCTION(0x0, "gpio_in"),
0168           SUNXI_FUNCTION(0x1, "gpio_out"),
0169           SUNXI_FUNCTION(0x2, "lcd0"),      /* D4 */
0170           SUNXI_FUNCTION(0x3, "mmc1")),     /* D0 */
0171     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
0172           SUNXI_FUNCTION(0x0, "gpio_in"),
0173           SUNXI_FUNCTION(0x1, "gpio_out"),
0174           SUNXI_FUNCTION(0x2, "lcd0"),      /* D5 */
0175           SUNXI_FUNCTION(0x3, "mmc1")),     /* D1 */
0176     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
0177           SUNXI_FUNCTION(0x0, "gpio_in"),
0178           SUNXI_FUNCTION(0x1, "gpio_out"),
0179           SUNXI_FUNCTION(0x2, "lcd0"),      /* D6 */
0180           SUNXI_FUNCTION(0x3, "mmc1")),     /* D2 */
0181     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
0182           SUNXI_FUNCTION(0x0, "gpio_in"),
0183           SUNXI_FUNCTION(0x1, "gpio_out"),
0184           SUNXI_FUNCTION(0x2, "lcd0"),      /* D7 */
0185           SUNXI_FUNCTION(0x3, "mmc1")),     /* D3 */
0186     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
0187           SUNXI_FUNCTION(0x0, "gpio_in"),
0188           SUNXI_FUNCTION(0x1, "gpio_out"),
0189           SUNXI_FUNCTION(0x2, "lcd0"),      /* D10 */
0190           SUNXI_FUNCTION(0x3, "uart1")),    /* TX */
0191     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
0192           SUNXI_FUNCTION(0x0, "gpio_in"),
0193           SUNXI_FUNCTION(0x1, "gpio_out"),
0194           SUNXI_FUNCTION(0x2, "lcd0"),      /* D11 */
0195           SUNXI_FUNCTION(0x3, "uart1")),    /* RX */
0196     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
0197           SUNXI_FUNCTION(0x0, "gpio_in"),
0198           SUNXI_FUNCTION(0x1, "gpio_out"),
0199           SUNXI_FUNCTION(0x2, "lcd0"),      /* D12 */
0200           SUNXI_FUNCTION(0x3, "uart1")),    /* RTS */
0201     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
0202           SUNXI_FUNCTION(0x0, "gpio_in"),
0203           SUNXI_FUNCTION(0x1, "gpio_out"),
0204           SUNXI_FUNCTION(0x2, "lcd0"),      /* D13 */
0205           SUNXI_FUNCTION(0x3, "uart1")),    /* CTS */
0206     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
0207           SUNXI_FUNCTION(0x0, "gpio_in"),
0208           SUNXI_FUNCTION(0x1, "gpio_out"),
0209           SUNXI_FUNCTION(0x2, "lcd0")),     /* D14 */
0210     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
0211           SUNXI_FUNCTION(0x0, "gpio_in"),
0212           SUNXI_FUNCTION(0x1, "gpio_out"),
0213           SUNXI_FUNCTION(0x2, "lcd0")),     /* D15 */
0214     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
0215           SUNXI_FUNCTION(0x0, "gpio_in"),
0216           SUNXI_FUNCTION(0x1, "gpio_out"),
0217           SUNXI_FUNCTION(0x2, "lcd0"),      /* D18 */
0218           SUNXI_FUNCTION(0x3, "lvds0")),    /* VP0 */
0219     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
0220           SUNXI_FUNCTION(0x0, "gpio_in"),
0221           SUNXI_FUNCTION(0x1, "gpio_out"),
0222           SUNXI_FUNCTION(0x2, "lcd0"),      /* D19 */
0223           SUNXI_FUNCTION(0x3, "lvds0")),    /* VN0 */
0224     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
0225           SUNXI_FUNCTION(0x0, "gpio_in"),
0226           SUNXI_FUNCTION(0x1, "gpio_out"),
0227           SUNXI_FUNCTION(0x2, "lcd0"),      /* D20 */
0228           SUNXI_FUNCTION(0x3, "lvds0")),    /* VP1 */
0229     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
0230           SUNXI_FUNCTION(0x0, "gpio_in"),
0231           SUNXI_FUNCTION(0x1, "gpio_out"),
0232           SUNXI_FUNCTION(0x2, "lcd0"),      /* D21 */
0233           SUNXI_FUNCTION(0x3, "lvds0")),    /* VN1 */
0234     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
0235           SUNXI_FUNCTION(0x0, "gpio_in"),
0236           SUNXI_FUNCTION(0x1, "gpio_out"),
0237           SUNXI_FUNCTION(0x2, "lcd0"),      /* D22 */
0238           SUNXI_FUNCTION(0x3, "lvds0")),    /* VP2 */
0239     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
0240           SUNXI_FUNCTION(0x0, "gpio_in"),
0241           SUNXI_FUNCTION(0x1, "gpio_out"),
0242           SUNXI_FUNCTION(0x2, "lcd0"),      /* D23 */
0243           SUNXI_FUNCTION(0x3, "lvds0")),    /* VN2 */
0244     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
0245           SUNXI_FUNCTION(0x0, "gpio_in"),
0246           SUNXI_FUNCTION(0x1, "gpio_out"),
0247           SUNXI_FUNCTION(0x2, "lcd0"),      /* CLK */
0248           SUNXI_FUNCTION(0x3, "lvds0")),    /* VPC */
0249     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
0250           SUNXI_FUNCTION(0x0, "gpio_in"),
0251           SUNXI_FUNCTION(0x1, "gpio_out"),
0252           SUNXI_FUNCTION(0x2, "lcd0"),      /* DE */
0253           SUNXI_FUNCTION(0x3, "lvds0")),    /* VNC */
0254     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
0255           SUNXI_FUNCTION(0x0, "gpio_in"),
0256           SUNXI_FUNCTION(0x1, "gpio_out"),
0257           SUNXI_FUNCTION(0x2, "lcd0"),      /* HSYNC */
0258           SUNXI_FUNCTION(0x3, "lvds0")),    /* VP3 */
0259     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
0260           SUNXI_FUNCTION(0x0, "gpio_in"),
0261           SUNXI_FUNCTION(0x1, "gpio_out"),
0262           SUNXI_FUNCTION(0x2, "lcd0"),      /* VSYNC */
0263           SUNXI_FUNCTION(0x3, "lvds0")),    /* VN3 */
0264     /* Hole */
0265     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
0266           SUNXI_FUNCTION(0x0, "gpio_in"),
0267           SUNXI_FUNCTION(0x1, "gpio_out"),
0268           SUNXI_FUNCTION(0x2, "csi")),      /* PCLK */
0269     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
0270           SUNXI_FUNCTION(0x0, "gpio_in"),
0271           SUNXI_FUNCTION(0x1, "gpio_out"),
0272           SUNXI_FUNCTION(0x2, "csi")),      /* MCLK */
0273     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
0274           SUNXI_FUNCTION(0x0, "gpio_in"),
0275           SUNXI_FUNCTION(0x1, "gpio_out"),
0276           SUNXI_FUNCTION(0x2, "csi")),      /* HSYNC */
0277     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
0278           SUNXI_FUNCTION(0x0, "gpio_in"),
0279           SUNXI_FUNCTION(0x1, "gpio_out"),
0280           SUNXI_FUNCTION(0x2, "csi")),      /* VSYNC */
0281     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
0282           SUNXI_FUNCTION(0x0, "gpio_in"),
0283           SUNXI_FUNCTION(0x1, "gpio_out"),
0284           SUNXI_FUNCTION(0x2, "csi")),      /* D0 */
0285     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
0286           SUNXI_FUNCTION(0x0, "gpio_in"),
0287           SUNXI_FUNCTION(0x1, "gpio_out"),
0288           SUNXI_FUNCTION(0x2, "csi")),      /* D1 */
0289     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
0290           SUNXI_FUNCTION(0x0, "gpio_in"),
0291           SUNXI_FUNCTION(0x1, "gpio_out"),
0292           SUNXI_FUNCTION(0x2, "csi")),      /* D2 */
0293     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
0294           SUNXI_FUNCTION(0x0, "gpio_in"),
0295           SUNXI_FUNCTION(0x1, "gpio_out"),
0296           SUNXI_FUNCTION(0x2, "csi")),      /* D3 */
0297     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
0298           SUNXI_FUNCTION(0x0, "gpio_in"),
0299           SUNXI_FUNCTION(0x1, "gpio_out"),
0300           SUNXI_FUNCTION(0x2, "csi")),      /* D4 */
0301     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
0302           SUNXI_FUNCTION(0x0, "gpio_in"),
0303           SUNXI_FUNCTION(0x1, "gpio_out"),
0304           SUNXI_FUNCTION(0x2, "csi")),      /* D5 */
0305     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
0306           SUNXI_FUNCTION(0x0, "gpio_in"),
0307           SUNXI_FUNCTION(0x1, "gpio_out"),
0308           SUNXI_FUNCTION(0x2, "csi")),      /* D6 */
0309     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
0310           SUNXI_FUNCTION(0x0, "gpio_in"),
0311           SUNXI_FUNCTION(0x1, "gpio_out"),
0312           SUNXI_FUNCTION(0x2, "csi")),      /* D7 */
0313     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
0314           SUNXI_FUNCTION(0x0, "gpio_in"),
0315           SUNXI_FUNCTION(0x1, "gpio_out"),
0316           SUNXI_FUNCTION(0x2, "csi"),       /* SCK */
0317           SUNXI_FUNCTION(0x3, "i2c2")),     /* SCK */
0318     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13),
0319           SUNXI_FUNCTION(0x0, "gpio_in"),
0320           SUNXI_FUNCTION(0x1, "gpio_out"),
0321           SUNXI_FUNCTION(0x2, "csi"),       /* SDA */
0322           SUNXI_FUNCTION(0x3, "i2c2")),     /* SDA */
0323     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14),
0324           SUNXI_FUNCTION(0x0, "gpio_in"),
0325           SUNXI_FUNCTION(0x1, "gpio_out")),
0326     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15),
0327           SUNXI_FUNCTION(0x0, "gpio_in"),
0328           SUNXI_FUNCTION(0x1, "gpio_out")),
0329     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16),
0330           SUNXI_FUNCTION(0x0, "gpio_in"),
0331           SUNXI_FUNCTION(0x1, "gpio_out")),
0332     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 17),
0333           SUNXI_FUNCTION(0x0, "gpio_in"),
0334           SUNXI_FUNCTION(0x1, "gpio_out")),
0335     /* Hole */
0336     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
0337           SUNXI_FUNCTION(0x0, "gpio_in"),
0338           SUNXI_FUNCTION(0x1, "gpio_out"),
0339           SUNXI_FUNCTION(0x2, "mmc0"),      /* D1 */
0340           SUNXI_FUNCTION(0x3, "jtag")),     /* MS1 */
0341     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
0342           SUNXI_FUNCTION(0x0, "gpio_in"),
0343           SUNXI_FUNCTION(0x1, "gpio_out"),
0344           SUNXI_FUNCTION(0x2, "mmc0"),      /* D0 */
0345           SUNXI_FUNCTION(0x3, "jtag")),     /* DI1 */
0346     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
0347           SUNXI_FUNCTION(0x0, "gpio_in"),
0348           SUNXI_FUNCTION(0x1, "gpio_out"),
0349           SUNXI_FUNCTION(0x2, "mmc0"),      /* CLK */
0350           SUNXI_FUNCTION(0x3, "uart0")),    /* TX */
0351     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
0352           SUNXI_FUNCTION(0x0, "gpio_in"),
0353           SUNXI_FUNCTION(0x1, "gpio_out"),
0354           SUNXI_FUNCTION(0x2, "mmc0"),      /* CMD */
0355           SUNXI_FUNCTION(0x3, "jtag")),     /* DO1 */
0356     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
0357           SUNXI_FUNCTION(0x0, "gpio_in"),
0358           SUNXI_FUNCTION(0x1, "gpio_out"),
0359           SUNXI_FUNCTION(0x2, "mmc0"),      /* D3 */
0360           SUNXI_FUNCTION(0x3, "uart0")),    /* RX */
0361     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
0362           SUNXI_FUNCTION(0x0, "gpio_in"),
0363           SUNXI_FUNCTION(0x1, "gpio_out"),
0364           SUNXI_FUNCTION(0x2, "mmc0"),      /* D2 */
0365           SUNXI_FUNCTION(0x3, "jtag")),     /* CK1 */
0366     /* Hole */
0367     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
0368           SUNXI_FUNCTION(0x0, "gpio_in"),
0369           SUNXI_FUNCTION(0x1, "gpio_out"),
0370           SUNXI_FUNCTION(0x2, "mmc1"),      /* CLK */
0371           SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 0)),  /* PG_EINT0 */
0372     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
0373           SUNXI_FUNCTION(0x0, "gpio_in"),
0374           SUNXI_FUNCTION(0x1, "gpio_out"),
0375           SUNXI_FUNCTION(0x2, "mmc1"),      /* CMD */
0376           SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 1)),  /* PG_EINT1 */
0377     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
0378           SUNXI_FUNCTION(0x0, "gpio_in"),
0379           SUNXI_FUNCTION(0x1, "gpio_out"),
0380           SUNXI_FUNCTION(0x2, "mmc1"),      /* D0 */
0381           SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 2)),  /* PG_EINT2 */
0382     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
0383           SUNXI_FUNCTION(0x0, "gpio_in"),
0384           SUNXI_FUNCTION(0x1, "gpio_out"),
0385           SUNXI_FUNCTION(0x2, "mmc1"),      /* D1 */
0386           SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 3)),  /* PG_EINT3 */
0387     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
0388           SUNXI_FUNCTION(0x0, "gpio_in"),
0389           SUNXI_FUNCTION(0x1, "gpio_out"),
0390           SUNXI_FUNCTION(0x2, "mmc1"),      /* D2 */
0391           SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 4)),  /* PG_EINT4 */
0392     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
0393           SUNXI_FUNCTION(0x0, "gpio_in"),
0394           SUNXI_FUNCTION(0x1, "gpio_out"),
0395           SUNXI_FUNCTION(0x2, "mmc1"),      /* D3 */
0396           SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 5)),  /* PG_EINT5 */
0397     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
0398           SUNXI_FUNCTION(0x0, "gpio_in"),
0399           SUNXI_FUNCTION(0x1, "gpio_out"),
0400           SUNXI_FUNCTION(0x2, "uart1"),     /* TX */
0401           SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 6)),  /* PG_EINT6 */
0402     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
0403           SUNXI_FUNCTION(0x0, "gpio_in"),
0404           SUNXI_FUNCTION(0x1, "gpio_out"),
0405           SUNXI_FUNCTION(0x2, "uart1"),     /* RX */
0406           SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 7)),  /* PG_EINT7 */
0407     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
0408           SUNXI_FUNCTION(0x0, "gpio_in"),
0409           SUNXI_FUNCTION(0x1, "gpio_out"),
0410           SUNXI_FUNCTION(0x2, "uart1"),     /* RTS */
0411           SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 8)),  /* PG_EINT8 */
0412     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
0413           SUNXI_FUNCTION(0x0, "gpio_in"),
0414           SUNXI_FUNCTION(0x1, "gpio_out"),
0415           SUNXI_FUNCTION(0x2, "uart1"),     /* CTS */
0416           SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 9)),  /* PG_EINT9 */
0417     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
0418           SUNXI_FUNCTION(0x0, "gpio_in"),
0419           SUNXI_FUNCTION(0x1, "gpio_out"),
0420           SUNXI_FUNCTION(0x2, "i2s1"),      /* SYNC */
0421           SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 10)), /* PG_EINT10 */
0422     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
0423           SUNXI_FUNCTION(0x0, "gpio_in"),
0424           SUNXI_FUNCTION(0x1, "gpio_out"),
0425           SUNXI_FUNCTION(0x2, "i2s1"),      /* CLK */
0426           SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 11)), /* PG_EINT11 */
0427     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12),
0428           SUNXI_FUNCTION(0x0, "gpio_in"),
0429           SUNXI_FUNCTION(0x1, "gpio_out"),
0430           SUNXI_FUNCTION(0x2, "i2s1"),      /* DOUT */
0431           SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 12)), /* PG_EINT12 */
0432     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13),
0433           SUNXI_FUNCTION(0x0, "gpio_in"),
0434           SUNXI_FUNCTION(0x1, "gpio_out"),
0435           SUNXI_FUNCTION(0x2, "i2s1"),      /* DIN */
0436           SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 13)), /* PG_EINT13 */
0437     /* Hole */
0438     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
0439           SUNXI_FUNCTION(0x0, "gpio_in"),
0440           SUNXI_FUNCTION(0x1, "gpio_out"),
0441           SUNXI_FUNCTION(0x2, "pwm0")),
0442     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
0443           SUNXI_FUNCTION(0x0, "gpio_in"),
0444           SUNXI_FUNCTION(0x1, "gpio_out"),
0445           SUNXI_FUNCTION(0x2, "pwm1")),
0446     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
0447           SUNXI_FUNCTION(0x0, "gpio_in"),
0448           SUNXI_FUNCTION(0x1, "gpio_out"),
0449           SUNXI_FUNCTION(0x2, "i2c0")),     /* SCK */
0450     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
0451           SUNXI_FUNCTION(0x0, "gpio_in"),
0452           SUNXI_FUNCTION(0x1, "gpio_out"),
0453           SUNXI_FUNCTION(0x2, "i2c0")),     /* SDA */
0454     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
0455           SUNXI_FUNCTION(0x0, "gpio_in"),
0456           SUNXI_FUNCTION(0x1, "gpio_out"),
0457           SUNXI_FUNCTION(0x2, "i2c1")),     /* SCK */
0458     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
0459           SUNXI_FUNCTION(0x0, "gpio_in"),
0460           SUNXI_FUNCTION(0x1, "gpio_out"),
0461           SUNXI_FUNCTION(0x2, "i2c1")),     /* SDA */
0462     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
0463           SUNXI_FUNCTION(0x0, "gpio_in"),
0464           SUNXI_FUNCTION(0x1, "gpio_out"),
0465           SUNXI_FUNCTION(0x2, "spi0"),      /* CS */
0466           SUNXI_FUNCTION(0x3, "uart3")),    /* TX */
0467     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
0468           SUNXI_FUNCTION(0x0, "gpio_in"),
0469           SUNXI_FUNCTION(0x1, "gpio_out"),
0470           SUNXI_FUNCTION(0x2, "spi0"),      /* CLK */
0471           SUNXI_FUNCTION(0x3, "uart3")),    /* RX */
0472     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
0473           SUNXI_FUNCTION(0x0, "gpio_in"),
0474           SUNXI_FUNCTION(0x1, "gpio_out"),
0475           SUNXI_FUNCTION(0x2, "spi0"),      /* DOUT */
0476           SUNXI_FUNCTION(0x3, "uart3")),    /* RTS */
0477     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
0478           SUNXI_FUNCTION(0x0, "gpio_in"),
0479           SUNXI_FUNCTION(0x1, "gpio_out"),
0480           SUNXI_FUNCTION(0x2, "spi0"),      /* DIN */
0481           SUNXI_FUNCTION(0x3, "uart3")),    /* CTS */
0482 };
0483 
0484 static const unsigned int sun8i_a33_pinctrl_irq_bank_map[] = { 1, 2 };
0485 
0486 static const struct sunxi_pinctrl_desc sun8i_a33_pinctrl_data = {
0487     .pins = sun8i_a33_pins,
0488     .npins = ARRAY_SIZE(sun8i_a33_pins),
0489     .irq_banks = 2,
0490     .irq_bank_map = sun8i_a33_pinctrl_irq_bank_map,
0491     .disable_strict_mode = true,
0492 };
0493 
0494 static int sun8i_a33_pinctrl_probe(struct platform_device *pdev)
0495 {
0496     return sunxi_pinctrl_init(pdev,
0497                   &sun8i_a33_pinctrl_data);
0498 }
0499 
0500 static const struct of_device_id sun8i_a33_pinctrl_match[] = {
0501     { .compatible = "allwinner,sun8i-a33-pinctrl", },
0502     {}
0503 };
0504 
0505 static struct platform_driver sun8i_a33_pinctrl_driver = {
0506     .probe  = sun8i_a33_pinctrl_probe,
0507     .driver = {
0508         .name       = "sun8i-a33-pinctrl",
0509         .of_match_table = sun8i_a33_pinctrl_match,
0510     },
0511 };
0512 builtin_platform_driver(sun8i_a33_pinctrl_driver);
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