Back to home page

OSCL-LXR
 
 

     

0001 /*
0002  * Allwinner A23 SoCs pinctrl driver.
0003  *
0004  * Copyright (C) 2014 Chen-Yu Tsai
0005  *
0006  * Chen-Yu Tsai <wens@csie.org>
0007  *
0008  * Copyright (C) 2014 Maxime Ripard
0009  *
0010  * Maxime Ripard <maxime.ripard@free-electrons.com>
0011  *
0012  * This file is licensed under the terms of the GNU General Public
0013  * License version 2.  This program is licensed "as is" without any
0014  * warranty of any kind, whether express or implied.
0015  */
0016 
0017 #include <linux/init.h>
0018 #include <linux/platform_device.h>
0019 #include <linux/of.h>
0020 #include <linux/of_device.h>
0021 #include <linux/pinctrl/pinctrl.h>
0022 
0023 #include "pinctrl-sunxi.h"
0024 
0025 static const struct sunxi_desc_pin sun8i_a23_pins[] = {
0026     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
0027           SUNXI_FUNCTION(0x0, "gpio_in"),
0028           SUNXI_FUNCTION(0x1, "gpio_out"),
0029           SUNXI_FUNCTION(0x2, "spi1"),      /* CS */
0030           SUNXI_FUNCTION(0x3, "jtag"),      /* MS0 */
0031           SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 0)),  /* PA_EINT0 */
0032     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
0033           SUNXI_FUNCTION(0x0, "gpio_in"),
0034           SUNXI_FUNCTION(0x1, "gpio_out"),
0035           SUNXI_FUNCTION(0x2, "spi1"),      /* CLK */
0036           SUNXI_FUNCTION(0x3, "jtag"),      /* CKO */
0037           SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 1)),  /* PA_EINT1 */
0038     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
0039           SUNXI_FUNCTION(0x0, "gpio_in"),
0040           SUNXI_FUNCTION(0x1, "gpio_out"),
0041           SUNXI_FUNCTION(0x2, "spi1"),      /* MOSI */
0042           SUNXI_FUNCTION(0x3, "jtag"),      /* DOO */
0043           SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 2)),  /* PA_EINT2 */
0044     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
0045           SUNXI_FUNCTION(0x0, "gpio_in"),
0046           SUNXI_FUNCTION(0x1, "gpio_out"),
0047           SUNXI_FUNCTION(0x2, "spi1"),      /* MISO */
0048           SUNXI_FUNCTION(0x3, "jtag"),      /* DIO */
0049           SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 3)),  /* PA_EINT3 */
0050     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
0051           SUNXI_FUNCTION(0x0, "gpio_in"),
0052           SUNXI_FUNCTION(0x1, "gpio_out"),
0053           SUNXI_FUNCTION(0x2, "uart4"),     /* TX */
0054           SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 4)),  /* PA_EINT4 */
0055     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
0056           SUNXI_FUNCTION(0x0, "gpio_in"),
0057           SUNXI_FUNCTION(0x1, "gpio_out"),
0058           SUNXI_FUNCTION(0x2, "uart4"),     /* RX */
0059           SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 5)),  /* PA_EINT5 */
0060     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
0061           SUNXI_FUNCTION(0x0, "gpio_in"),
0062           SUNXI_FUNCTION(0x1, "gpio_out"),
0063           SUNXI_FUNCTION(0x2, "uart4"),     /* RTS */
0064           SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 6)),  /* PA_EINT6 */
0065     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
0066           SUNXI_FUNCTION(0x0, "gpio_in"),
0067           SUNXI_FUNCTION(0x1, "gpio_out"),
0068           SUNXI_FUNCTION(0x2, "uart4"),     /* CTS */
0069           SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 7)),  /* PA_EINT7 */
0070     /* Hole */
0071     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
0072           SUNXI_FUNCTION(0x0, "gpio_in"),
0073           SUNXI_FUNCTION(0x1, "gpio_out"),
0074           SUNXI_FUNCTION(0x2, "uart2"),     /* TX */
0075           SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 0)),  /* PB_EINT0 */
0076     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
0077           SUNXI_FUNCTION(0x0, "gpio_in"),
0078           SUNXI_FUNCTION(0x1, "gpio_out"),
0079           SUNXI_FUNCTION(0x2, "uart2"),     /* RX */
0080           SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 1)),  /* PB_EINT1 */
0081     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
0082           SUNXI_FUNCTION(0x0, "gpio_in"),
0083           SUNXI_FUNCTION(0x1, "gpio_out"),
0084           SUNXI_FUNCTION(0x2, "uart2"),     /* RTS */
0085           SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 2)),  /* PB_EINT2 */
0086     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
0087           SUNXI_FUNCTION(0x0, "gpio_in"),
0088           SUNXI_FUNCTION(0x1, "gpio_out"),
0089           SUNXI_FUNCTION(0x2, "uart2"),     /* CTS */
0090           SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 3)),  /* PB_EINT3 */
0091     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
0092           SUNXI_FUNCTION(0x0, "gpio_in"),
0093           SUNXI_FUNCTION(0x1, "gpio_out"),
0094           SUNXI_FUNCTION(0x2, "i2s0"),      /* SYNC */
0095           SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 4)),  /* PB_EINT4 */
0096     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
0097           SUNXI_FUNCTION(0x0, "gpio_in"),
0098           SUNXI_FUNCTION(0x1, "gpio_out"),
0099           SUNXI_FUNCTION(0x2, "i2s0"),      /* DOUT */
0100           SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 5)),  /* PB_EINT5 */
0101     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
0102           SUNXI_FUNCTION(0x0, "gpio_in"),
0103           SUNXI_FUNCTION(0x1, "gpio_out"),
0104           SUNXI_FUNCTION(0x2, "i2s0"),      /* DIN */
0105           SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 6)),  /* PB_EINT6 */
0106     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
0107           SUNXI_FUNCTION(0x0, "gpio_in"),
0108           SUNXI_FUNCTION(0x1, "gpio_out"),
0109           SUNXI_FUNCTION(0x3, "i2s0"),      /* DI */
0110           SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 7)),  /* PB_EINT7 */
0111     /* Hole */
0112     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
0113           SUNXI_FUNCTION(0x0, "gpio_in"),
0114           SUNXI_FUNCTION(0x1, "gpio_out"),
0115           SUNXI_FUNCTION(0x2, "nand0"),     /* WE */
0116           SUNXI_FUNCTION(0x3, "spi0")),     /* MOSI */
0117     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
0118           SUNXI_FUNCTION(0x0, "gpio_in"),
0119           SUNXI_FUNCTION(0x1, "gpio_out"),
0120           SUNXI_FUNCTION(0x2, "nand0"),     /* ALE */
0121           SUNXI_FUNCTION(0x3, "spi0")),     /* MISO */
0122     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
0123           SUNXI_FUNCTION(0x0, "gpio_in"),
0124           SUNXI_FUNCTION(0x1, "gpio_out"),
0125           SUNXI_FUNCTION(0x2, "nand0"),     /* CLE */
0126           SUNXI_FUNCTION(0x3, "spi0")),     /* CLK */
0127     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
0128           SUNXI_FUNCTION(0x0, "gpio_in"),
0129           SUNXI_FUNCTION(0x1, "gpio_out"),
0130           SUNXI_FUNCTION(0x2, "nand0"),     /* CE1 */
0131           SUNXI_FUNCTION(0x3, "spi0")),     /* CS */
0132     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
0133           SUNXI_FUNCTION(0x0, "gpio_in"),
0134           SUNXI_FUNCTION(0x1, "gpio_out"),
0135           SUNXI_FUNCTION(0x2, "nand0")),    /* CE0 */
0136     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
0137           SUNXI_FUNCTION(0x0, "gpio_in"),
0138           SUNXI_FUNCTION(0x1, "gpio_out"),
0139           SUNXI_FUNCTION(0x2, "nand0"),     /* RE */
0140           SUNXI_FUNCTION(0x3, "mmc2")),     /* CLK */
0141     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
0142           SUNXI_FUNCTION(0x0, "gpio_in"),
0143           SUNXI_FUNCTION(0x1, "gpio_out"),
0144           SUNXI_FUNCTION(0x2, "nand0"),     /* RB0 */
0145           SUNXI_FUNCTION(0x3, "mmc2")),     /* CMD */
0146     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
0147           SUNXI_FUNCTION(0x0, "gpio_in"),
0148           SUNXI_FUNCTION(0x1, "gpio_out"),
0149           SUNXI_FUNCTION(0x2, "nand0")),    /* RB1 */
0150     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
0151           SUNXI_FUNCTION(0x0, "gpio_in"),
0152           SUNXI_FUNCTION(0x1, "gpio_out"),
0153           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ0 */
0154           SUNXI_FUNCTION(0x3, "mmc2")),     /* D0 */
0155     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
0156           SUNXI_FUNCTION(0x0, "gpio_in"),
0157           SUNXI_FUNCTION(0x1, "gpio_out"),
0158           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ1 */
0159           SUNXI_FUNCTION(0x3, "mmc2")),     /* D1 */
0160     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
0161           SUNXI_FUNCTION(0x0, "gpio_in"),
0162           SUNXI_FUNCTION(0x1, "gpio_out"),
0163           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ2 */
0164           SUNXI_FUNCTION(0x3, "mmc2")),     /* D2 */
0165     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
0166           SUNXI_FUNCTION(0x0, "gpio_in"),
0167           SUNXI_FUNCTION(0x1, "gpio_out"),
0168           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ3 */
0169           SUNXI_FUNCTION(0x3, "mmc2")),     /* D3 */
0170     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
0171           SUNXI_FUNCTION(0x0, "gpio_in"),
0172           SUNXI_FUNCTION(0x1, "gpio_out"),
0173           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ4 */
0174           SUNXI_FUNCTION(0x3, "mmc2")),     /* D4 */
0175     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
0176           SUNXI_FUNCTION(0x0, "gpio_in"),
0177           SUNXI_FUNCTION(0x1, "gpio_out"),
0178           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ5 */
0179           SUNXI_FUNCTION(0x3, "mmc2")),     /* D5 */
0180     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
0181           SUNXI_FUNCTION(0x0, "gpio_in"),
0182           SUNXI_FUNCTION(0x1, "gpio_out"),
0183           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ6 */
0184           SUNXI_FUNCTION(0x3, "mmc2")),     /* D6 */
0185     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
0186           SUNXI_FUNCTION(0x0, "gpio_in"),
0187           SUNXI_FUNCTION(0x1, "gpio_out"),
0188           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ7 */
0189           SUNXI_FUNCTION(0x3, "mmc2")),     /* D7 */
0190     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
0191           SUNXI_FUNCTION(0x0, "gpio_in"),
0192           SUNXI_FUNCTION(0x1, "gpio_out"),
0193           SUNXI_FUNCTION(0x2, "nand0"),     /* DQS */
0194           SUNXI_FUNCTION(0x3, "mmc2")),     /* RST */
0195     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17),
0196           SUNXI_FUNCTION(0x0, "gpio_in"),
0197           SUNXI_FUNCTION(0x1, "gpio_out"),
0198           SUNXI_FUNCTION(0x2, "nand0")),    /* CE2 */
0199     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18),
0200           SUNXI_FUNCTION(0x0, "gpio_in"),
0201           SUNXI_FUNCTION(0x1, "gpio_out"),
0202           SUNXI_FUNCTION(0x2, "nand0")),    /* CE3 */
0203     /* Hole */
0204     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
0205           SUNXI_FUNCTION(0x0, "gpio_in"),
0206           SUNXI_FUNCTION(0x1, "gpio_out"),
0207           SUNXI_FUNCTION(0x2, "lcd0")),     /* D0 */
0208     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
0209           SUNXI_FUNCTION(0x0, "gpio_in"),
0210           SUNXI_FUNCTION(0x1, "gpio_out"),
0211           SUNXI_FUNCTION(0x2, "lcd0")),     /* D1 */
0212     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
0213           SUNXI_FUNCTION(0x0, "gpio_in"),
0214           SUNXI_FUNCTION(0x1, "gpio_out"),
0215           SUNXI_FUNCTION(0x2, "lcd0"),      /* D2 */
0216           SUNXI_FUNCTION(0x3, "mmc1")),     /* CLK */
0217     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
0218           SUNXI_FUNCTION(0x0, "gpio_in"),
0219           SUNXI_FUNCTION(0x1, "gpio_out"),
0220           SUNXI_FUNCTION(0x2, "lcd0"),      /* D3 */
0221           SUNXI_FUNCTION(0x3, "mmc1")),     /* CMD */
0222     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
0223           SUNXI_FUNCTION(0x0, "gpio_in"),
0224           SUNXI_FUNCTION(0x1, "gpio_out"),
0225           SUNXI_FUNCTION(0x2, "lcd0"),      /* D4 */
0226           SUNXI_FUNCTION(0x3, "mmc1")),     /* D0 */
0227     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
0228           SUNXI_FUNCTION(0x0, "gpio_in"),
0229           SUNXI_FUNCTION(0x1, "gpio_out"),
0230           SUNXI_FUNCTION(0x2, "lcd0"),      /* D5 */
0231           SUNXI_FUNCTION(0x3, "mmc1")),     /* D1 */
0232     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
0233           SUNXI_FUNCTION(0x0, "gpio_in"),
0234           SUNXI_FUNCTION(0x1, "gpio_out"),
0235           SUNXI_FUNCTION(0x2, "lcd0"),      /* D6 */
0236           SUNXI_FUNCTION(0x3, "mmc1")),     /* D2 */
0237     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
0238           SUNXI_FUNCTION(0x0, "gpio_in"),
0239           SUNXI_FUNCTION(0x1, "gpio_out"),
0240           SUNXI_FUNCTION(0x2, "lcd0"),      /* D7 */
0241           SUNXI_FUNCTION(0x3, "mmc1")),     /* D3 */
0242     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
0243           SUNXI_FUNCTION(0x0, "gpio_in"),
0244           SUNXI_FUNCTION(0x1, "gpio_out"),
0245           SUNXI_FUNCTION(0x2, "lcd0"),      /* D8 */
0246           SUNXI_FUNCTION(0x3, "uart3")),    /* TX */
0247     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
0248           SUNXI_FUNCTION(0x0, "gpio_in"),
0249           SUNXI_FUNCTION(0x1, "gpio_out"),
0250           SUNXI_FUNCTION(0x2, "lcd0"),      /* D9 */
0251           SUNXI_FUNCTION(0x3, "uart3")),    /* RX */
0252     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
0253           SUNXI_FUNCTION(0x0, "gpio_in"),
0254           SUNXI_FUNCTION(0x1, "gpio_out"),
0255           SUNXI_FUNCTION(0x2, "lcd0"),      /* D10 */
0256           SUNXI_FUNCTION(0x3, "uart1")),    /* TX */
0257     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
0258           SUNXI_FUNCTION(0x0, "gpio_in"),
0259           SUNXI_FUNCTION(0x1, "gpio_out"),
0260           SUNXI_FUNCTION(0x2, "lcd0"),      /* D11 */
0261           SUNXI_FUNCTION(0x3, "uart1")),    /* RX */
0262     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
0263           SUNXI_FUNCTION(0x0, "gpio_in"),
0264           SUNXI_FUNCTION(0x1, "gpio_out"),
0265           SUNXI_FUNCTION(0x2, "lcd0"),      /* D12 */
0266           SUNXI_FUNCTION(0x3, "uart1")),    /* RTS */
0267     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
0268           SUNXI_FUNCTION(0x0, "gpio_in"),
0269           SUNXI_FUNCTION(0x1, "gpio_out"),
0270           SUNXI_FUNCTION(0x2, "lcd0"),      /* D13 */
0271           SUNXI_FUNCTION(0x3, "uart1")),    /* CTS */
0272     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
0273           SUNXI_FUNCTION(0x0, "gpio_in"),
0274           SUNXI_FUNCTION(0x1, "gpio_out"),
0275           SUNXI_FUNCTION(0x2, "lcd0"),      /* D14 */
0276           SUNXI_FUNCTION(0x3, "i2s1")),     /* SYNC */
0277     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
0278           SUNXI_FUNCTION(0x0, "gpio_in"),
0279           SUNXI_FUNCTION(0x1, "gpio_out"),
0280           SUNXI_FUNCTION(0x2, "lcd0"),      /* D15 */
0281           SUNXI_FUNCTION(0x3, "i2s1")),     /* CLK */
0282     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
0283           SUNXI_FUNCTION(0x0, "gpio_in"),
0284           SUNXI_FUNCTION(0x1, "gpio_out"),
0285           SUNXI_FUNCTION(0x2, "lcd0"),      /* D16 */
0286           SUNXI_FUNCTION(0x3, "i2s1")),     /* DOUT */
0287     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
0288           SUNXI_FUNCTION(0x0, "gpio_in"),
0289           SUNXI_FUNCTION(0x1, "gpio_out"),
0290           SUNXI_FUNCTION(0x2, "lcd0"),      /* D17 */
0291           SUNXI_FUNCTION(0x3, "i2s1")),     /* DIN */
0292     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
0293           SUNXI_FUNCTION(0x0, "gpio_in"),
0294           SUNXI_FUNCTION(0x1, "gpio_out"),
0295           SUNXI_FUNCTION(0x2, "lcd0"),      /* D18 */
0296           SUNXI_FUNCTION(0x3, "lvds0")),    /* VN0 */
0297     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
0298           SUNXI_FUNCTION(0x0, "gpio_in"),
0299           SUNXI_FUNCTION(0x1, "gpio_out"),
0300           SUNXI_FUNCTION(0x2, "lcd0"),      /* D19 */
0301           SUNXI_FUNCTION(0x3, "lvds0")),    /* VP0 */
0302     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
0303           SUNXI_FUNCTION(0x0, "gpio_in"),
0304           SUNXI_FUNCTION(0x1, "gpio_out"),
0305           SUNXI_FUNCTION(0x2, "lcd0"),      /* D20 */
0306           SUNXI_FUNCTION(0x3, "lvds0")),    /* VP1 */
0307     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
0308           SUNXI_FUNCTION(0x0, "gpio_in"),
0309           SUNXI_FUNCTION(0x1, "gpio_out"),
0310           SUNXI_FUNCTION(0x2, "lcd0"),      /* D21 */
0311           SUNXI_FUNCTION(0x3, "lvds0")),    /* VN1 */
0312     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
0313           SUNXI_FUNCTION(0x0, "gpio_in"),
0314           SUNXI_FUNCTION(0x1, "gpio_out"),
0315           SUNXI_FUNCTION(0x2, "lcd0"),      /* D22 */
0316           SUNXI_FUNCTION(0x3, "lvds0")),    /* VP2 */
0317     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
0318           SUNXI_FUNCTION(0x0, "gpio_in"),
0319           SUNXI_FUNCTION(0x1, "gpio_out"),
0320           SUNXI_FUNCTION(0x2, "lcd0"),      /* D23 */
0321           SUNXI_FUNCTION(0x3, "lvds0")),    /* VN2 */
0322     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
0323           SUNXI_FUNCTION(0x0, "gpio_in"),
0324           SUNXI_FUNCTION(0x1, "gpio_out"),
0325           SUNXI_FUNCTION(0x2, "lcd0"),      /* CLK */
0326           SUNXI_FUNCTION(0x3, "lvds0")),    /* VPC */
0327     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
0328           SUNXI_FUNCTION(0x0, "gpio_in"),
0329           SUNXI_FUNCTION(0x1, "gpio_out"),
0330           SUNXI_FUNCTION(0x2, "lcd0"),      /* DE */
0331           SUNXI_FUNCTION(0x3, "lvds0")),    /* VNC */
0332     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
0333           SUNXI_FUNCTION(0x0, "gpio_in"),
0334           SUNXI_FUNCTION(0x1, "gpio_out"),
0335           SUNXI_FUNCTION(0x2, "lcd0"),      /* HSYNC */
0336           SUNXI_FUNCTION(0x3, "lvds0")),    /* VP3 */
0337     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
0338           SUNXI_FUNCTION(0x0, "gpio_in"),
0339           SUNXI_FUNCTION(0x1, "gpio_out"),
0340           SUNXI_FUNCTION(0x2, "lcd0"),      /* VSYNC */
0341           SUNXI_FUNCTION(0x3, "lvds0")),    /* VN3 */
0342     /* Hole */
0343     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
0344           SUNXI_FUNCTION(0x0, "gpio_in"),
0345           SUNXI_FUNCTION(0x1, "gpio_out"),
0346           SUNXI_FUNCTION(0x2, "csi")),      /* PCLK */
0347     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
0348           SUNXI_FUNCTION(0x0, "gpio_in"),
0349           SUNXI_FUNCTION(0x1, "gpio_out"),
0350           SUNXI_FUNCTION(0x2, "csi")),      /* MCLK */
0351     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
0352           SUNXI_FUNCTION(0x0, "gpio_in"),
0353           SUNXI_FUNCTION(0x1, "gpio_out"),
0354           SUNXI_FUNCTION(0x2, "csi")),      /* HSYNC */
0355     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
0356           SUNXI_FUNCTION(0x0, "gpio_in"),
0357           SUNXI_FUNCTION(0x1, "gpio_out"),
0358           SUNXI_FUNCTION(0x2, "csi")),      /* VSYNC */
0359     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
0360           SUNXI_FUNCTION(0x0, "gpio_in"),
0361           SUNXI_FUNCTION(0x1, "gpio_out"),
0362           SUNXI_FUNCTION(0x2, "csi")),      /* D0 */
0363     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
0364           SUNXI_FUNCTION(0x0, "gpio_in"),
0365           SUNXI_FUNCTION(0x1, "gpio_out"),
0366           SUNXI_FUNCTION(0x2, "csi")),      /* D1 */
0367     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
0368           SUNXI_FUNCTION(0x0, "gpio_in"),
0369           SUNXI_FUNCTION(0x1, "gpio_out"),
0370           SUNXI_FUNCTION(0x2, "csi")),      /* D2 */
0371     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
0372           SUNXI_FUNCTION(0x0, "gpio_in"),
0373           SUNXI_FUNCTION(0x1, "gpio_out"),
0374           SUNXI_FUNCTION(0x2, "csi")),      /* D3 */
0375     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
0376           SUNXI_FUNCTION(0x0, "gpio_in"),
0377           SUNXI_FUNCTION(0x1, "gpio_out"),
0378           SUNXI_FUNCTION(0x2, "csi")),      /* D4 */
0379     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
0380           SUNXI_FUNCTION(0x0, "gpio_in"),
0381           SUNXI_FUNCTION(0x1, "gpio_out"),
0382           SUNXI_FUNCTION(0x2, "csi")),      /* D5 */
0383     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
0384           SUNXI_FUNCTION(0x0, "gpio_in"),
0385           SUNXI_FUNCTION(0x1, "gpio_out"),
0386           SUNXI_FUNCTION(0x2, "csi")),      /* D6 */
0387     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
0388           SUNXI_FUNCTION(0x0, "gpio_in"),
0389           SUNXI_FUNCTION(0x1, "gpio_out"),
0390           SUNXI_FUNCTION(0x2, "csi")),      /* D7 */
0391     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
0392           SUNXI_FUNCTION(0x0, "gpio_in"),
0393           SUNXI_FUNCTION(0x1, "gpio_out"),
0394           SUNXI_FUNCTION(0x2, "csi"),       /* SCK */
0395           SUNXI_FUNCTION(0x3, "i2c2")),     /* SCK */
0396     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13),
0397           SUNXI_FUNCTION(0x0, "gpio_in"),
0398           SUNXI_FUNCTION(0x1, "gpio_out"),
0399           SUNXI_FUNCTION(0x2, "csi"),       /* SDA */
0400           SUNXI_FUNCTION(0x3, "i2c2")),     /* SDA */
0401     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14),
0402           SUNXI_FUNCTION(0x0, "gpio_in"),
0403           SUNXI_FUNCTION(0x1, "gpio_out")),
0404     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15),
0405           SUNXI_FUNCTION(0x0, "gpio_in"),
0406           SUNXI_FUNCTION(0x1, "gpio_out")),
0407     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16),
0408           SUNXI_FUNCTION(0x0, "gpio_in"),
0409           SUNXI_FUNCTION(0x1, "gpio_out")),
0410     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 17),
0411           SUNXI_FUNCTION(0x0, "gpio_in"),
0412           SUNXI_FUNCTION(0x1, "gpio_out")),
0413     /* Hole */
0414     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
0415           SUNXI_FUNCTION(0x0, "gpio_in"),
0416           SUNXI_FUNCTION(0x1, "gpio_out"),
0417           SUNXI_FUNCTION(0x2, "mmc0"),      /* D1 */
0418           SUNXI_FUNCTION(0x3, "jtag")),     /* MS1 */
0419     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
0420           SUNXI_FUNCTION(0x0, "gpio_in"),
0421           SUNXI_FUNCTION(0x1, "gpio_out"),
0422           SUNXI_FUNCTION(0x2, "mmc0"),      /* D0 */
0423           SUNXI_FUNCTION(0x3, "jtag")),     /* DI1 */
0424     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
0425           SUNXI_FUNCTION(0x0, "gpio_in"),
0426           SUNXI_FUNCTION(0x1, "gpio_out"),
0427           SUNXI_FUNCTION(0x2, "mmc0"),      /* CLK */
0428           SUNXI_FUNCTION(0x3, "uart0")),    /* TX */
0429     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
0430           SUNXI_FUNCTION(0x0, "gpio_in"),
0431           SUNXI_FUNCTION(0x1, "gpio_out"),
0432           SUNXI_FUNCTION(0x2, "mmc0"),      /* CMD */
0433           SUNXI_FUNCTION(0x3, "jtag")),     /* DO1 */
0434     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
0435           SUNXI_FUNCTION(0x0, "gpio_in"),
0436           SUNXI_FUNCTION(0x1, "gpio_out"),
0437           SUNXI_FUNCTION(0x2, "mmc0"),      /* D3 */
0438           SUNXI_FUNCTION(0x3, "uart0")),    /* RX */
0439     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
0440           SUNXI_FUNCTION(0x0, "gpio_in"),
0441           SUNXI_FUNCTION(0x1, "gpio_out"),
0442           SUNXI_FUNCTION(0x2, "mmc0"),      /* D2 */
0443           SUNXI_FUNCTION(0x3, "jtag")),     /* CK1 */
0444     /* Hole */
0445     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
0446           SUNXI_FUNCTION(0x0, "gpio_in"),
0447           SUNXI_FUNCTION(0x1, "gpio_out"),
0448           SUNXI_FUNCTION(0x2, "mmc1"),      /* CLK */
0449           SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 0)),  /* PG_EINT0 */
0450     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
0451           SUNXI_FUNCTION(0x0, "gpio_in"),
0452           SUNXI_FUNCTION(0x1, "gpio_out"),
0453           SUNXI_FUNCTION(0x2, "mmc1"),      /* CMD */
0454           SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 1)),  /* PG_EINT1 */
0455     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
0456           SUNXI_FUNCTION(0x0, "gpio_in"),
0457           SUNXI_FUNCTION(0x1, "gpio_out"),
0458           SUNXI_FUNCTION(0x2, "mmc1"),      /* D0 */
0459           SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 2)),  /* PG_EINT2 */
0460     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
0461           SUNXI_FUNCTION(0x0, "gpio_in"),
0462           SUNXI_FUNCTION(0x1, "gpio_out"),
0463           SUNXI_FUNCTION(0x2, "mmc1"),      /* D1 */
0464           SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 3)),  /* PG_EINT3 */
0465     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
0466           SUNXI_FUNCTION(0x0, "gpio_in"),
0467           SUNXI_FUNCTION(0x1, "gpio_out"),
0468           SUNXI_FUNCTION(0x2, "mmc1"),      /* D2 */
0469           SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 4)),  /* PG_EINT4 */
0470     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
0471           SUNXI_FUNCTION(0x0, "gpio_in"),
0472           SUNXI_FUNCTION(0x1, "gpio_out"),
0473           SUNXI_FUNCTION(0x2, "mmc1"),      /* D3 */
0474           SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 5)),  /* PG_EINT5 */
0475     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
0476           SUNXI_FUNCTION(0x0, "gpio_in"),
0477           SUNXI_FUNCTION(0x1, "gpio_out"),
0478           SUNXI_FUNCTION(0x2, "uart1"),     /* TX */
0479           SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 6)),  /* PG_EINT6 */
0480     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
0481           SUNXI_FUNCTION(0x0, "gpio_in"),
0482           SUNXI_FUNCTION(0x1, "gpio_out"),
0483           SUNXI_FUNCTION(0x2, "uart1"),     /* RX */
0484           SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 7)),  /* PG_EINT7 */
0485     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
0486           SUNXI_FUNCTION(0x0, "gpio_in"),
0487           SUNXI_FUNCTION(0x1, "gpio_out"),
0488           SUNXI_FUNCTION(0x2, "uart1"),     /* RTS */
0489           SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 8)),  /* PG_EINT8 */
0490     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
0491           SUNXI_FUNCTION(0x0, "gpio_in"),
0492           SUNXI_FUNCTION(0x1, "gpio_out"),
0493           SUNXI_FUNCTION(0x2, "uart1"),     /* CTS */
0494           SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 9)),  /* PG_EINT9 */
0495     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
0496           SUNXI_FUNCTION(0x0, "gpio_in"),
0497           SUNXI_FUNCTION(0x1, "gpio_out"),
0498           SUNXI_FUNCTION(0x2, "i2s1"),      /* SYNC */
0499           SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 10)), /* PG_EINT10 */
0500     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
0501           SUNXI_FUNCTION(0x0, "gpio_in"),
0502           SUNXI_FUNCTION(0x1, "gpio_out"),
0503           SUNXI_FUNCTION(0x2, "i2s1"),      /* CLK */
0504           SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 11)), /* PG_EINT11 */
0505     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12),
0506           SUNXI_FUNCTION(0x0, "gpio_in"),
0507           SUNXI_FUNCTION(0x1, "gpio_out"),
0508           SUNXI_FUNCTION(0x2, "i2s1"),      /* DOUT */
0509           SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 12)), /* PG_EINT12 */
0510     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13),
0511           SUNXI_FUNCTION(0x0, "gpio_in"),
0512           SUNXI_FUNCTION(0x1, "gpio_out"),
0513           SUNXI_FUNCTION(0x2, "i2s1"),      /* DIN */
0514           SUNXI_FUNCTION_IRQ_BANK(0x4, 2, 13)), /* PG_EINT13 */
0515     /* Hole */
0516     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
0517           SUNXI_FUNCTION(0x0, "gpio_in"),
0518           SUNXI_FUNCTION(0x1, "gpio_out"),
0519           SUNXI_FUNCTION(0x2, "pwm0")),
0520     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
0521           SUNXI_FUNCTION(0x0, "gpio_in"),
0522           SUNXI_FUNCTION(0x1, "gpio_out"),
0523           SUNXI_FUNCTION(0x2, "pwm1")),
0524     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
0525           SUNXI_FUNCTION(0x0, "gpio_in"),
0526           SUNXI_FUNCTION(0x1, "gpio_out"),
0527           SUNXI_FUNCTION(0x2, "i2c0")),     /* SCK */
0528     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
0529           SUNXI_FUNCTION(0x0, "gpio_in"),
0530           SUNXI_FUNCTION(0x1, "gpio_out"),
0531           SUNXI_FUNCTION(0x2, "i2c0")),     /* SDA */
0532     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
0533           SUNXI_FUNCTION(0x0, "gpio_in"),
0534           SUNXI_FUNCTION(0x1, "gpio_out"),
0535           SUNXI_FUNCTION(0x2, "i2c1")),     /* SCK */
0536     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
0537           SUNXI_FUNCTION(0x0, "gpio_in"),
0538           SUNXI_FUNCTION(0x1, "gpio_out"),
0539           SUNXI_FUNCTION(0x2, "i2c1")),     /* SDA */
0540     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
0541           SUNXI_FUNCTION(0x0, "gpio_in"),
0542           SUNXI_FUNCTION(0x1, "gpio_out"),
0543           SUNXI_FUNCTION(0x2, "spi0"),      /* CS */
0544           SUNXI_FUNCTION(0x3, "uart3")),    /* TX */
0545     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
0546           SUNXI_FUNCTION(0x0, "gpio_in"),
0547           SUNXI_FUNCTION(0x1, "gpio_out"),
0548           SUNXI_FUNCTION(0x2, "spi0"),      /* CLK */
0549           SUNXI_FUNCTION(0x3, "uart3")),    /* RX */
0550     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
0551           SUNXI_FUNCTION(0x0, "gpio_in"),
0552           SUNXI_FUNCTION(0x1, "gpio_out"),
0553           SUNXI_FUNCTION(0x2, "spi0"),      /* DOUT */
0554           SUNXI_FUNCTION(0x3, "uart3")),    /* RTS */
0555     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
0556           SUNXI_FUNCTION(0x0, "gpio_in"),
0557           SUNXI_FUNCTION(0x1, "gpio_out"),
0558           SUNXI_FUNCTION(0x2, "spi0"),      /* DIN */
0559           SUNXI_FUNCTION(0x3, "uart3")),    /* CTS */
0560 };
0561 
0562 static const struct sunxi_pinctrl_desc sun8i_a23_pinctrl_data = {
0563     .pins = sun8i_a23_pins,
0564     .npins = ARRAY_SIZE(sun8i_a23_pins),
0565     .irq_banks = 3,
0566     .disable_strict_mode = true,
0567 };
0568 
0569 static int sun8i_a23_pinctrl_probe(struct platform_device *pdev)
0570 {
0571     return sunxi_pinctrl_init(pdev,
0572                   &sun8i_a23_pinctrl_data);
0573 }
0574 
0575 static const struct of_device_id sun8i_a23_pinctrl_match[] = {
0576     { .compatible = "allwinner,sun8i-a23-pinctrl", },
0577     {}
0578 };
0579 
0580 static struct platform_driver sun8i_a23_pinctrl_driver = {
0581     .probe  = sun8i_a23_pinctrl_probe,
0582     .driver = {
0583         .name       = "sun8i-a23-pinctrl",
0584         .of_match_table = sun8i_a23_pinctrl_match,
0585     },
0586 };
0587 builtin_platform_driver(sun8i_a23_pinctrl_driver);
[ Source navigation ] [ Diff markup ] [ Identifier search ] [ general search ]

This page was automatically generated by the 2.1.0 LXR engine.

The LXR team
Valid CSS 2.1! Valid HTML 4.01!