pinctrl/sunxi/pinctrl-sun8i-a23-r.c

0001 /*
0002  * Allwinner A23 SoCs special pins pinctrl driver.
0003  *
0004  * Copyright (C) 2014 Chen-Yu Tsai
0005  * Chen-Yu Tsai <wens@csie.org>
0006  *
0007  * Copyright (C) 2014 Boris Brezillon
0008  * Boris Brezillon <boris.brezillon@free-electrons.com>
0009  *
0010  * Copyright (C) 2014 Maxime Ripard
0011  * Maxime Ripard <maxime.ripard@free-electrons.com>
0012  *
0013  * This file is licensed under the terms of the GNU General Public
0014  * License version 2.  This program is licensed "as is" without any
0015  * warranty of any kind, whether express or implied.
0016  */
0017
0018 #include <linux/init.h>
0019 #include <linux/platform_device.h>
0020 #include <linux/of.h>
0021 #include <linux/of_device.h>
0022 #include <linux/pinctrl/pinctrl.h>
0023
0024 #include "pinctrl-sunxi.h"
0025
0026 static const struct sunxi_desc_pin sun8i_a23_r_pins[] = {
0027     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
0028           SUNXI_FUNCTION(0x0, "gpio_in"),
0029           SUNXI_FUNCTION(0x1, "gpio_out"),
0030           SUNXI_FUNCTION(0x2, "s_rsb"),     /* SCK */
0031           SUNXI_FUNCTION(0x3, "s_i2c"),     /* SCK */
0032           SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 0)),  /* PL_EINT0 */
0033     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
0034           SUNXI_FUNCTION(0x0, "gpio_in"),
0035           SUNXI_FUNCTION(0x1, "gpio_out"),
0036           SUNXI_FUNCTION(0x2, "s_rsb"),     /* SDA */
0037           SUNXI_FUNCTION(0x3, "s_i2c"),     /* SDA */
0038           SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 1)),  /* PL_EINT1 */
0039     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
0040           SUNXI_FUNCTION(0x0, "gpio_in"),
0041           SUNXI_FUNCTION(0x1, "gpio_out"),
0042           SUNXI_FUNCTION(0x2, "s_uart"),    /* TX */
0043           SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 2)),  /* PL_EINT2 */
0044     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
0045           SUNXI_FUNCTION(0x0, "gpio_in"),
0046           SUNXI_FUNCTION(0x1, "gpio_out"),
0047           SUNXI_FUNCTION(0x2, "s_uart"),    /* RX */
0048           SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 3)),  /* PL_EINT3 */
0049     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
0050           SUNXI_FUNCTION(0x0, "gpio_in"),
0051           SUNXI_FUNCTION(0x1, "gpio_out"),
0052           SUNXI_FUNCTION(0x3, "s_jtag"),    /* MS */
0053           SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 4)),  /* PL_EINT4 */
0054     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
0055           SUNXI_FUNCTION(0x0, "gpio_in"),
0056           SUNXI_FUNCTION(0x1, "gpio_out"),
0057           SUNXI_FUNCTION(0x3, "s_jtag"),    /* CK */
0058           SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 5)),  /* PL_EINT5 */
0059     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
0060           SUNXI_FUNCTION(0x0, "gpio_in"),
0061           SUNXI_FUNCTION(0x1, "gpio_out"),
0062           SUNXI_FUNCTION(0x3, "s_jtag"),    /* DO */
0063           SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 6)),  /* PL_EINT6 */
0064     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
0065           SUNXI_FUNCTION(0x0, "gpio_in"),
0066           SUNXI_FUNCTION(0x1, "gpio_out"),
0067           SUNXI_FUNCTION(0x3, "s_jtag"),    /* DI */
0068           SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 7)),  /* PL_EINT7 */
0069     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
0070           SUNXI_FUNCTION(0x0, "gpio_in"),
0071           SUNXI_FUNCTION(0x1, "gpio_out"),
0072           SUNXI_FUNCTION(0x2, "s_twi"),     /* SCK */
0073           SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 8)),  /* PL_EINT8 */
0074     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9),
0075           SUNXI_FUNCTION(0x0, "gpio_in"),
0076           SUNXI_FUNCTION(0x1, "gpio_out"),
0077           SUNXI_FUNCTION(0x2, "s_twi"),     /* SDA */
0078           SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 9)),  /* PL_EINT9 */
0079     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10),
0080           SUNXI_FUNCTION(0x0, "gpio_in"),
0081           SUNXI_FUNCTION(0x1, "gpio_out"),
0082           SUNXI_FUNCTION(0x2, "s_pwm"),
0083           SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 10)), /* PL_EINT10 */
0084     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 11),
0085           SUNXI_FUNCTION(0x0, "gpio_in"),
0086           SUNXI_FUNCTION(0x1, "gpio_out"),
0087           SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 11)), /* PL_EINT11 */
0088 };
0089
0090 static const struct sunxi_pinctrl_desc sun8i_a23_r_pinctrl_data = {
0091     .pins = sun8i_a23_r_pins,
0092     .npins = ARRAY_SIZE(sun8i_a23_r_pins),
0093     .pin_base = PL_BASE,
0094     .irq_banks = 1,
0095     .disable_strict_mode = true,
0096 };
0097
0098 static int sun8i_a23_r_pinctrl_probe(struct platform_device *pdev)
0099 {
0100     return sunxi_pinctrl_init(pdev, &sun8i_a23_r_pinctrl_data);
0101 }
0102
0103 static const struct of_device_id sun8i_a23_r_pinctrl_match[] = {
0104     { .compatible = "allwinner,sun8i-a23-r-pinctrl", },
0105     {}
0106 };
0107
0108 static struct platform_driver sun8i_a23_r_pinctrl_driver = {
0109     .probe  = sun8i_a23_r_pinctrl_probe,
0110     .driver = {
0111         .name       = "sun8i-a23-r-pinctrl",
0112         .of_match_table = sun8i_a23_r_pinctrl_match,
0113     },
0114 };
0115 builtin_platform_driver(sun8i_a23_r_pinctrl_driver);