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OSCL-LXR
 
 

     

0001 /*
0002  * Allwinner A31 SoCs pinctrl driver.
0003  *
0004  * Copyright (C) 2014 Maxime Ripard
0005  *
0006  * Maxime Ripard <maxime.ripard@free-electrons.com>
0007  *
0008  * This file is licensed under the terms of the GNU General Public
0009  * License version 2.  This program is licensed "as is" without any
0010  * warranty of any kind, whether express or implied.
0011  */
0012 
0013 #include <linux/init.h>
0014 #include <linux/platform_device.h>
0015 #include <linux/of.h>
0016 #include <linux/of_device.h>
0017 #include <linux/pinctrl/pinctrl.h>
0018 
0019 #include "pinctrl-sunxi.h"
0020 
0021 static const struct sunxi_desc_pin sun6i_a31_pins[] = {
0022     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
0023           SUNXI_FUNCTION(0x0, "gpio_in"),
0024           SUNXI_FUNCTION(0x1, "gpio_out"),
0025           SUNXI_FUNCTION(0x2, "gmac"),      /* TXD0 */
0026           SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
0027                      PINCTRL_SUN6I_A31),    /* D0 */
0028           SUNXI_FUNCTION(0x4, "uart1"),     /* DTR */
0029           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),  /* PA_EINT0 */
0030     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
0031           SUNXI_FUNCTION(0x0, "gpio_in"),
0032           SUNXI_FUNCTION(0x1, "gpio_out"),
0033           SUNXI_FUNCTION(0x2, "gmac"),      /* TXD1 */
0034           SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
0035                      PINCTRL_SUN6I_A31),    /* D1 */
0036           SUNXI_FUNCTION(0x4, "uart1"),     /* DSR */
0037           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),  /* PA_EINT1 */
0038     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
0039           SUNXI_FUNCTION(0x0, "gpio_in"),
0040           SUNXI_FUNCTION(0x1, "gpio_out"),
0041           SUNXI_FUNCTION(0x2, "gmac"),      /* TXD2 */
0042           SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
0043                      PINCTRL_SUN6I_A31),    /* D2 */
0044           SUNXI_FUNCTION(0x4, "uart1"),     /* DCD */
0045           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),  /* PA_EINT2 */
0046     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
0047           SUNXI_FUNCTION(0x0, "gpio_in"),
0048           SUNXI_FUNCTION(0x1, "gpio_out"),
0049           SUNXI_FUNCTION(0x2, "gmac"),      /* TXD3 */
0050           SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
0051                      PINCTRL_SUN6I_A31),    /* D3 */
0052           SUNXI_FUNCTION(0x4, "uart1"),     /* RING */
0053           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),  /* PA_EINT3 */
0054     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
0055           SUNXI_FUNCTION(0x0, "gpio_in"),
0056           SUNXI_FUNCTION(0x1, "gpio_out"),
0057           SUNXI_FUNCTION(0x2, "gmac"),      /* TXD4 */
0058           SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
0059                      PINCTRL_SUN6I_A31),    /* D4 */
0060           SUNXI_FUNCTION(0x4, "uart1"),     /* TX */
0061           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),  /* PA_EINT4 */
0062     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
0063           SUNXI_FUNCTION(0x0, "gpio_in"),
0064           SUNXI_FUNCTION(0x1, "gpio_out"),
0065           SUNXI_FUNCTION(0x2, "gmac"),      /* TXD5 */
0066           SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
0067                      PINCTRL_SUN6I_A31),    /* D5 */
0068           SUNXI_FUNCTION(0x4, "uart1"),     /* RX */
0069           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),  /* PA_EINT5 */
0070     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
0071           SUNXI_FUNCTION(0x0, "gpio_in"),
0072           SUNXI_FUNCTION(0x1, "gpio_out"),
0073           SUNXI_FUNCTION(0x2, "gmac"),      /* TXD6 */
0074           SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
0075                      PINCTRL_SUN6I_A31),    /* D6 */
0076           SUNXI_FUNCTION(0x4, "uart1"),     /* RTS */
0077           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),  /* PA_EINT6 */
0078     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
0079           SUNXI_FUNCTION(0x0, "gpio_in"),
0080           SUNXI_FUNCTION(0x1, "gpio_out"),
0081           SUNXI_FUNCTION(0x2, "gmac"),      /* TXD7 */
0082           SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
0083                      PINCTRL_SUN6I_A31),    /* D7 */
0084           SUNXI_FUNCTION(0x4, "uart1"),     /* CTS */
0085           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),  /* PA_EINT7 */
0086     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
0087           SUNXI_FUNCTION(0x0, "gpio_in"),
0088           SUNXI_FUNCTION(0x1, "gpio_out"),
0089           SUNXI_FUNCTION(0x2, "gmac"),      /* TXCLK */
0090           SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
0091                      PINCTRL_SUN6I_A31),    /* D8 */
0092           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),  /* PA_EINT8 */
0093     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
0094           SUNXI_FUNCTION(0x0, "gpio_in"),
0095           SUNXI_FUNCTION(0x1, "gpio_out"),
0096           SUNXI_FUNCTION(0x2, "gmac"),      /* TXEN */
0097           SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
0098                      PINCTRL_SUN6I_A31),    /* D9 */
0099           SUNXI_FUNCTION(0x4, "mmc3"),      /* CMD */
0100           SUNXI_FUNCTION(0x5, "mmc2"),      /* CMD */
0101           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),  /* PA_EINT9 */
0102     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10),
0103           SUNXI_FUNCTION(0x0, "gpio_in"),
0104           SUNXI_FUNCTION(0x1, "gpio_out"),
0105           SUNXI_FUNCTION(0x2, "gmac"),      /* GTXCLK */
0106           SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
0107                      PINCTRL_SUN6I_A31),    /* D10 */
0108           SUNXI_FUNCTION(0x4, "mmc3"),      /* CLK */
0109           SUNXI_FUNCTION(0x5, "mmc2"),      /* CLK */
0110           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), /* PA_EINT10 */
0111     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11),
0112           SUNXI_FUNCTION(0x0, "gpio_in"),
0113           SUNXI_FUNCTION(0x1, "gpio_out"),
0114           SUNXI_FUNCTION(0x2, "gmac"),      /* RXD0 */
0115           SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
0116                      PINCTRL_SUN6I_A31),    /* D11 */
0117           SUNXI_FUNCTION(0x4, "mmc3"),      /* D0 */
0118           SUNXI_FUNCTION(0x5, "mmc2"),      /* D0 */
0119           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)), /* PA_EINT11 */
0120     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12),
0121           SUNXI_FUNCTION(0x0, "gpio_in"),
0122           SUNXI_FUNCTION(0x1, "gpio_out"),
0123           SUNXI_FUNCTION(0x2, "gmac"),      /* RXD1 */
0124           SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
0125                      PINCTRL_SUN6I_A31),    /* D12 */
0126           SUNXI_FUNCTION(0x4, "mmc3"),      /* D1 */
0127           SUNXI_FUNCTION(0x5, "mmc2"),      /* D1 */
0128           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 12)), /* PA_EINT12 */
0129     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 13),
0130           SUNXI_FUNCTION(0x0, "gpio_in"),
0131           SUNXI_FUNCTION(0x1, "gpio_out"),
0132           SUNXI_FUNCTION(0x2, "gmac"),      /* RXD2 */
0133           SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
0134                      PINCTRL_SUN6I_A31),    /* D13 */
0135           SUNXI_FUNCTION(0x4, "mmc3"),      /* D2 */
0136           SUNXI_FUNCTION(0x5, "mmc2"),      /* D2 */
0137           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 13)), /* PA_EINT13 */
0138     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 14),
0139           SUNXI_FUNCTION(0x0, "gpio_in"),
0140           SUNXI_FUNCTION(0x1, "gpio_out"),
0141           SUNXI_FUNCTION(0x2, "gmac"),      /* RXD3 */
0142           SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
0143                      PINCTRL_SUN6I_A31),    /* D14 */
0144           SUNXI_FUNCTION(0x4, "mmc3"),      /* D3 */
0145           SUNXI_FUNCTION(0x5, "mmc2"),      /* D3 */
0146           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 14)), /* PA_EINT14 */
0147     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 15),
0148           SUNXI_FUNCTION(0x0, "gpio_in"),
0149           SUNXI_FUNCTION(0x1, "gpio_out"),
0150           SUNXI_FUNCTION(0x2, "gmac"),      /* RXD4 */
0151           SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
0152                      PINCTRL_SUN6I_A31),    /* D15 */
0153           SUNXI_FUNCTION(0x4, "clk_out_a"),
0154           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 15)), /* PA_EINT15 */
0155     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 16),
0156           SUNXI_FUNCTION(0x0, "gpio_in"),
0157           SUNXI_FUNCTION(0x1, "gpio_out"),
0158           SUNXI_FUNCTION(0x2, "gmac"),      /* RXD5 */
0159           SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
0160                      PINCTRL_SUN6I_A31),    /* D16 */
0161           SUNXI_FUNCTION(0x4, "dmic"),      /* CLK */
0162           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 16)), /* PA_EINT16 */
0163     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 17),
0164           SUNXI_FUNCTION(0x0, "gpio_in"),
0165           SUNXI_FUNCTION(0x1, "gpio_out"),
0166           SUNXI_FUNCTION(0x2, "gmac"),      /* RXD6 */
0167           SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
0168                      PINCTRL_SUN6I_A31),    /* D17 */
0169           SUNXI_FUNCTION(0x4, "dmic"),      /* DIN */
0170           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 17)), /* PA_EINT17 */
0171     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 18),
0172           SUNXI_FUNCTION(0x0, "gpio_in"),
0173           SUNXI_FUNCTION(0x1, "gpio_out"),
0174           SUNXI_FUNCTION(0x2, "gmac"),      /* RXD7 */
0175           SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
0176                      PINCTRL_SUN6I_A31),    /* D18 */
0177           SUNXI_FUNCTION(0x4, "clk_out_b"),
0178           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 18)), /* PA_EINT18 */
0179     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 19),
0180           SUNXI_FUNCTION(0x0, "gpio_in"),
0181           SUNXI_FUNCTION(0x1, "gpio_out"),
0182           SUNXI_FUNCTION(0x2, "gmac"),      /* RXDV */
0183           SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
0184                      PINCTRL_SUN6I_A31),    /* D19 */
0185           SUNXI_FUNCTION(0x4, "pwm3"),      /* Positive */
0186           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 19)), /* PA_EINT19 */
0187     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 20),
0188           SUNXI_FUNCTION(0x0, "gpio_in"),
0189           SUNXI_FUNCTION(0x1, "gpio_out"),
0190           SUNXI_FUNCTION(0x2, "gmac"),      /* RXCLK */
0191           SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
0192                      PINCTRL_SUN6I_A31),    /* D20 */
0193           SUNXI_FUNCTION(0x4, "pwm3"),      /* Negative */
0194           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 20)), /* PA_EINT20 */
0195     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 21),
0196           SUNXI_FUNCTION(0x0, "gpio_in"),
0197           SUNXI_FUNCTION(0x1, "gpio_out"),
0198           SUNXI_FUNCTION(0x2, "gmac"),      /* TXERR */
0199           SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
0200                      PINCTRL_SUN6I_A31),    /* D21 */
0201           SUNXI_FUNCTION(0x4, "spi3"),      /* CS0 */
0202           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 21)), /* PA_EINT21 */
0203     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 22),
0204           SUNXI_FUNCTION(0x0, "gpio_in"),
0205           SUNXI_FUNCTION(0x1, "gpio_out"),
0206           SUNXI_FUNCTION(0x2, "gmac"),      /* RXERR */
0207           SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
0208                      PINCTRL_SUN6I_A31),    /* D22 */
0209           SUNXI_FUNCTION(0x4, "spi3"),      /* CLK */
0210           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 22)), /* PA_EINT22 */
0211     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 23),
0212           SUNXI_FUNCTION(0x0, "gpio_in"),
0213           SUNXI_FUNCTION(0x1, "gpio_out"),
0214           SUNXI_FUNCTION(0x2, "gmac"),      /* COL */
0215           SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
0216                      PINCTRL_SUN6I_A31),    /* D23 */
0217           SUNXI_FUNCTION(0x4, "spi3"),      /* MOSI */
0218           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 23)), /* PA_EINT23 */
0219     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 24),
0220           SUNXI_FUNCTION(0x0, "gpio_in"),
0221           SUNXI_FUNCTION(0x1, "gpio_out"),
0222           SUNXI_FUNCTION(0x2, "gmac"),      /* CRS */
0223           SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
0224                      PINCTRL_SUN6I_A31),    /* CLK */
0225           SUNXI_FUNCTION(0x4, "spi3"),      /* MISO */
0226           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 24)), /* PA_EINT24 */
0227     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 25),
0228           SUNXI_FUNCTION(0x0, "gpio_in"),
0229           SUNXI_FUNCTION(0x1, "gpio_out"),
0230           SUNXI_FUNCTION(0x2, "gmac"),      /* CLKIN */
0231           SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
0232                      PINCTRL_SUN6I_A31),    /* DE */
0233           SUNXI_FUNCTION(0x4, "spi3"),      /* CS1 */
0234           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 25)), /* PA_EINT25 */
0235     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 26),
0236           SUNXI_FUNCTION(0x0, "gpio_in"),
0237           SUNXI_FUNCTION(0x1, "gpio_out"),
0238           SUNXI_FUNCTION(0x2, "gmac"),      /* MDC */
0239           SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
0240                      PINCTRL_SUN6I_A31),    /* HSYNC */
0241           SUNXI_FUNCTION(0x4, "clk_out_c"),
0242           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 26)), /* PA_EINT26 */
0243     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 27),
0244           SUNXI_FUNCTION(0x0, "gpio_in"),
0245           SUNXI_FUNCTION(0x1, "gpio_out"),
0246           SUNXI_FUNCTION(0x2, "gmac"),      /* MDIO */
0247           SUNXI_FUNCTION_VARIANT(0x3, "lcd1",
0248                      PINCTRL_SUN6I_A31),    /* VSYNC */
0249           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 27)), /* PA_EINT27 */
0250     /* Hole */
0251     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
0252           SUNXI_FUNCTION(0x0, "gpio_in"),
0253           SUNXI_FUNCTION(0x1, "gpio_out"),
0254           SUNXI_FUNCTION(0x2, "i2s0"),      /* MCLK */
0255           SUNXI_FUNCTION(0x3, "uart3"),     /* CTS */
0256           SUNXI_FUNCTION_VARIANT(0x4, "csi",
0257                      PINCTRL_SUN6I_A31),    /* MCLK1 */
0258           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)),  /* PB_EINT0 */
0259     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
0260           SUNXI_FUNCTION(0x0, "gpio_in"),
0261           SUNXI_FUNCTION(0x1, "gpio_out"),
0262           SUNXI_FUNCTION(0x2, "i2s0"),      /* BCLK */
0263           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)),  /* PB_EINT1 */
0264     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
0265           SUNXI_FUNCTION(0x0, "gpio_in"),
0266           SUNXI_FUNCTION(0x1, "gpio_out"),
0267           SUNXI_FUNCTION(0x2, "i2s0"),      /* LRCK */
0268           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2)),  /* PB_EINT2 */
0269     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
0270           SUNXI_FUNCTION(0x0, "gpio_in"),
0271           SUNXI_FUNCTION(0x1, "gpio_out"),
0272           SUNXI_FUNCTION(0x2, "i2s0"),      /* DO0 */
0273           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)),  /* PB_EINT3 */
0274     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
0275           SUNXI_FUNCTION(0x0, "gpio_in"),
0276           SUNXI_FUNCTION(0x1, "gpio_out"),
0277           SUNXI_FUNCTION(0x2, "i2s0"),      /* DO1 */
0278           SUNXI_FUNCTION(0x3, "uart3"),     /* RTS */
0279           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)),  /* PB_EINT4 */
0280     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
0281           SUNXI_FUNCTION(0x0, "gpio_in"),
0282           SUNXI_FUNCTION(0x1, "gpio_out"),
0283           SUNXI_FUNCTION(0x2, "i2s0"),      /* DO2 */
0284           SUNXI_FUNCTION(0x3, "uart3"),     /* TX */
0285           SUNXI_FUNCTION(0x4, "i2c3"),      /* SCK */
0286           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 5)),  /* PB_EINT5 */
0287     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
0288           SUNXI_FUNCTION(0x0, "gpio_in"),
0289           SUNXI_FUNCTION(0x1, "gpio_out"),
0290           SUNXI_FUNCTION(0x2, "i2s0"),      /* DO3 */
0291           SUNXI_FUNCTION(0x3, "uart3"),     /* RX */
0292           SUNXI_FUNCTION(0x4, "i2c3"),      /* SDA */
0293           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 6)),  /* PB_EINT6 */
0294     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
0295           SUNXI_FUNCTION(0x0, "gpio_in"),
0296           SUNXI_FUNCTION(0x1, "gpio_out"),
0297           SUNXI_FUNCTION(0x3, "i2s0"),      /* DI */
0298           SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 7)),  /* PB_EINT7 */
0299     /* Hole */
0300     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
0301           SUNXI_FUNCTION(0x0, "gpio_in"),
0302           SUNXI_FUNCTION(0x1, "gpio_out"),
0303           SUNXI_FUNCTION(0x2, "nand0"),     /* WE */
0304           SUNXI_FUNCTION(0x3, "spi0")),     /* MOSI */
0305     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
0306           SUNXI_FUNCTION(0x0, "gpio_in"),
0307           SUNXI_FUNCTION(0x1, "gpio_out"),
0308           SUNXI_FUNCTION(0x2, "nand0"),     /* ALE */
0309           SUNXI_FUNCTION(0x3, "spi0")),     /* MISO */
0310     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
0311           SUNXI_FUNCTION(0x0, "gpio_in"),
0312           SUNXI_FUNCTION(0x1, "gpio_out"),
0313           SUNXI_FUNCTION(0x2, "nand0"),     /* CLE */
0314           SUNXI_FUNCTION(0x3, "spi0")),     /* CLK */
0315     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
0316           SUNXI_FUNCTION(0x0, "gpio_in"),
0317           SUNXI_FUNCTION(0x1, "gpio_out"),
0318           SUNXI_FUNCTION(0x2, "nand0")),    /* CE1 */
0319     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
0320           SUNXI_FUNCTION(0x0, "gpio_in"),
0321           SUNXI_FUNCTION(0x1, "gpio_out"),
0322           SUNXI_FUNCTION(0x2, "nand0")),    /* CE0 */
0323     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
0324           SUNXI_FUNCTION(0x0, "gpio_in"),
0325           SUNXI_FUNCTION(0x1, "gpio_out"),
0326           SUNXI_FUNCTION(0x2, "nand0")),    /* RE */
0327     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
0328           SUNXI_FUNCTION(0x0, "gpio_in"),
0329           SUNXI_FUNCTION(0x1, "gpio_out"),
0330           SUNXI_FUNCTION(0x2, "nand0"),     /* RB0 */
0331           SUNXI_FUNCTION(0x3, "mmc2"),      /* CMD */
0332           SUNXI_FUNCTION(0x4, "mmc3")),     /* CMD */
0333     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
0334           SUNXI_FUNCTION(0x0, "gpio_in"),
0335           SUNXI_FUNCTION(0x1, "gpio_out"),
0336           SUNXI_FUNCTION(0x2, "nand0"),     /* RB1 */
0337           SUNXI_FUNCTION(0x3, "mmc2"),      /* CLK */
0338           SUNXI_FUNCTION(0x4, "mmc3")),     /* CLK */
0339     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
0340           SUNXI_FUNCTION(0x0, "gpio_in"),
0341           SUNXI_FUNCTION(0x1, "gpio_out"),
0342           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ0 */
0343           SUNXI_FUNCTION(0x3, "mmc2"),      /* D0 */
0344           SUNXI_FUNCTION(0x4, "mmc3")),     /* D0 */
0345     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
0346           SUNXI_FUNCTION(0x0, "gpio_in"),
0347           SUNXI_FUNCTION(0x1, "gpio_out"),
0348           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ1 */
0349           SUNXI_FUNCTION(0x3, "mmc2"),      /* D1 */
0350           SUNXI_FUNCTION(0x4, "mmc3")),     /* D1 */
0351     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
0352           SUNXI_FUNCTION(0x0, "gpio_in"),
0353           SUNXI_FUNCTION(0x1, "gpio_out"),
0354           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ2 */
0355           SUNXI_FUNCTION(0x3, "mmc2"),      /* D2 */
0356           SUNXI_FUNCTION(0x4, "mmc3")),     /* D2 */
0357     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
0358           SUNXI_FUNCTION(0x0, "gpio_in"),
0359           SUNXI_FUNCTION(0x1, "gpio_out"),
0360           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ3 */
0361           SUNXI_FUNCTION(0x3, "mmc2"),      /* D3 */
0362           SUNXI_FUNCTION(0x4, "mmc3")),     /* D3 */
0363     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
0364           SUNXI_FUNCTION(0x0, "gpio_in"),
0365           SUNXI_FUNCTION(0x1, "gpio_out"),
0366           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ4 */
0367           SUNXI_FUNCTION(0x3, "mmc2"),      /* D4 */
0368           SUNXI_FUNCTION(0x4, "mmc3")),     /* D4 */
0369     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
0370           SUNXI_FUNCTION(0x0, "gpio_in"),
0371           SUNXI_FUNCTION(0x1, "gpio_out"),
0372           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ5 */
0373           SUNXI_FUNCTION(0x3, "mmc2"),      /* D5 */
0374           SUNXI_FUNCTION(0x4, "mmc3")),     /* D5 */
0375     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
0376           SUNXI_FUNCTION(0x0, "gpio_in"),
0377           SUNXI_FUNCTION(0x1, "gpio_out"),
0378           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ6 */
0379           SUNXI_FUNCTION(0x3, "mmc2"),      /* D6 */
0380           SUNXI_FUNCTION(0x4, "mmc3")),     /* D6 */
0381     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
0382           SUNXI_FUNCTION(0x0, "gpio_in"),
0383           SUNXI_FUNCTION(0x1, "gpio_out"),
0384           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ7 */
0385           SUNXI_FUNCTION(0x3, "mmc2"),      /* D7 */
0386           SUNXI_FUNCTION(0x4, "mmc3")),     /* D7 */
0387     /* Hole in pin numbering for A31s */
0388     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 16), PINCTRL_SUN6I_A31,
0389           SUNXI_FUNCTION(0x0, "gpio_in"),
0390           SUNXI_FUNCTION(0x1, "gpio_out"),
0391           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ8 */
0392           SUNXI_FUNCTION(0x3, "nand1")),    /* DQ0 */
0393     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 17), PINCTRL_SUN6I_A31,
0394           SUNXI_FUNCTION(0x0, "gpio_in"),
0395           SUNXI_FUNCTION(0x1, "gpio_out"),
0396           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ9 */
0397           SUNXI_FUNCTION(0x3, "nand1")),    /* DQ1 */
0398     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 18), PINCTRL_SUN6I_A31,
0399           SUNXI_FUNCTION(0x0, "gpio_in"),
0400           SUNXI_FUNCTION(0x1, "gpio_out"),
0401           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ10 */
0402           SUNXI_FUNCTION(0x3, "nand1")),    /* DQ2 */
0403     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 19), PINCTRL_SUN6I_A31,
0404           SUNXI_FUNCTION(0x0, "gpio_in"),
0405           SUNXI_FUNCTION(0x1, "gpio_out"),
0406           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ11 */
0407           SUNXI_FUNCTION(0x3, "nand1")),    /* DQ3 */
0408     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 20), PINCTRL_SUN6I_A31,
0409           SUNXI_FUNCTION(0x0, "gpio_in"),
0410           SUNXI_FUNCTION(0x1, "gpio_out"),
0411           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ12 */
0412           SUNXI_FUNCTION(0x3, "nand1")),    /* DQ4 */
0413     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 21), PINCTRL_SUN6I_A31,
0414           SUNXI_FUNCTION(0x0, "gpio_in"),
0415           SUNXI_FUNCTION(0x1, "gpio_out"),
0416           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ13 */
0417           SUNXI_FUNCTION(0x3, "nand1")),    /* DQ5 */
0418     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 22), PINCTRL_SUN6I_A31,
0419           SUNXI_FUNCTION(0x0, "gpio_in"),
0420           SUNXI_FUNCTION(0x1, "gpio_out"),
0421           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ14 */
0422           SUNXI_FUNCTION(0x3, "nand1")),    /* DQ6 */
0423     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 23), PINCTRL_SUN6I_A31,
0424           SUNXI_FUNCTION(0x0, "gpio_in"),
0425           SUNXI_FUNCTION(0x1, "gpio_out"),
0426           SUNXI_FUNCTION(0x2, "nand0"),     /* DQ15 */
0427           SUNXI_FUNCTION(0x3, "nand1")),    /* DQ7 */
0428     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 24),
0429           SUNXI_FUNCTION(0x0, "gpio_in"),
0430           SUNXI_FUNCTION(0x1, "gpio_out"),
0431           SUNXI_FUNCTION(0x2, "nand0"),     /* DQS */
0432           SUNXI_FUNCTION(0x3, "mmc2"),      /* RST */
0433           SUNXI_FUNCTION(0x4, "mmc3")),     /* RST */
0434     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 25),
0435           SUNXI_FUNCTION(0x0, "gpio_in"),
0436           SUNXI_FUNCTION(0x1, "gpio_out"),
0437           SUNXI_FUNCTION(0x2, "nand0")),    /* CE2 */
0438     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 26),
0439           SUNXI_FUNCTION(0x0, "gpio_in"),
0440           SUNXI_FUNCTION(0x1, "gpio_out"),
0441           SUNXI_FUNCTION(0x2, "nand0")),    /* CE3 */
0442     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 27),
0443           SUNXI_FUNCTION(0x0, "gpio_in"),
0444           SUNXI_FUNCTION(0x1, "gpio_out"),
0445           SUNXI_FUNCTION(0x3, "spi0")),     /* CS0 */
0446     /* Hole */
0447     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
0448           SUNXI_FUNCTION(0x0, "gpio_in"),
0449           SUNXI_FUNCTION(0x1, "gpio_out"),
0450           SUNXI_FUNCTION(0x2, "lcd0"),      /* D0 */
0451           SUNXI_FUNCTION(0x3, "lvds0")),    /* VP0 */
0452     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
0453           SUNXI_FUNCTION(0x0, "gpio_in"),
0454           SUNXI_FUNCTION(0x1, "gpio_out"),
0455           SUNXI_FUNCTION(0x2, "lcd0"),      /* D1 */
0456           SUNXI_FUNCTION(0x3, "lvds0")),    /* VN0 */
0457     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
0458           SUNXI_FUNCTION(0x0, "gpio_in"),
0459           SUNXI_FUNCTION(0x1, "gpio_out"),
0460           SUNXI_FUNCTION(0x2, "lcd0"),      /* D2 */
0461           SUNXI_FUNCTION(0x3, "lvds0")),    /* VP1 */
0462     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
0463           SUNXI_FUNCTION(0x0, "gpio_in"),
0464           SUNXI_FUNCTION(0x1, "gpio_out"),
0465           SUNXI_FUNCTION(0x2, "lcd0"),      /* D3 */
0466           SUNXI_FUNCTION(0x3, "lvds0")),    /* VN1 */
0467     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
0468           SUNXI_FUNCTION(0x0, "gpio_in"),
0469           SUNXI_FUNCTION(0x1, "gpio_out"),
0470           SUNXI_FUNCTION(0x2, "lcd0"),      /* D4 */
0471           SUNXI_FUNCTION(0x3, "lvds0")),    /* VP2 */
0472     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
0473           SUNXI_FUNCTION(0x0, "gpio_in"),
0474           SUNXI_FUNCTION(0x1, "gpio_out"),
0475           SUNXI_FUNCTION(0x2, "lcd0"),      /* D5 */
0476           SUNXI_FUNCTION(0x3, "lvds0")),    /* VN2 */
0477     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
0478           SUNXI_FUNCTION(0x0, "gpio_in"),
0479           SUNXI_FUNCTION(0x1, "gpio_out"),
0480           SUNXI_FUNCTION(0x2, "lcd0"),      /* D6 */
0481           SUNXI_FUNCTION(0x3, "lvds0")),    /* VPC */
0482     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
0483           SUNXI_FUNCTION(0x0, "gpio_in"),
0484           SUNXI_FUNCTION(0x1, "gpio_out"),
0485           SUNXI_FUNCTION(0x2, "lcd0"),      /* D7 */
0486           SUNXI_FUNCTION(0x3, "lvds0")),    /* VNC */
0487     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
0488           SUNXI_FUNCTION(0x0, "gpio_in"),
0489           SUNXI_FUNCTION(0x1, "gpio_out"),
0490           SUNXI_FUNCTION(0x2, "lcd0"),      /* D8 */
0491           SUNXI_FUNCTION(0x3, "lvds0")),    /* VP3 */
0492     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
0493           SUNXI_FUNCTION(0x0, "gpio_in"),
0494           SUNXI_FUNCTION(0x1, "gpio_out"),
0495           SUNXI_FUNCTION(0x2, "lcd0"),      /* D9 */
0496           SUNXI_FUNCTION(0x3, "lvds0")),    /* VN3 */
0497     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
0498           SUNXI_FUNCTION(0x0, "gpio_in"),
0499           SUNXI_FUNCTION(0x1, "gpio_out"),
0500           SUNXI_FUNCTION(0x2, "lcd0"),      /* D10 */
0501           SUNXI_FUNCTION_VARIANT(0x3, "lvds1",
0502                      PINCTRL_SUN6I_A31)),   /* VP0 */
0503     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
0504           SUNXI_FUNCTION(0x0, "gpio_in"),
0505           SUNXI_FUNCTION(0x1, "gpio_out"),
0506           SUNXI_FUNCTION(0x2, "lcd0"),      /* D11 */
0507           SUNXI_FUNCTION_VARIANT(0x3, "lvds1",
0508                      PINCTRL_SUN6I_A31)),   /* VN0 */
0509     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
0510           SUNXI_FUNCTION(0x0, "gpio_in"),
0511           SUNXI_FUNCTION(0x1, "gpio_out"),
0512           SUNXI_FUNCTION(0x2, "lcd0"),      /* D12 */
0513           SUNXI_FUNCTION_VARIANT(0x3, "lvds1",
0514                      PINCTRL_SUN6I_A31)),   /* VP1 */
0515     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
0516           SUNXI_FUNCTION(0x0, "gpio_in"),
0517           SUNXI_FUNCTION(0x1, "gpio_out"),
0518           SUNXI_FUNCTION(0x2, "lcd0"),      /* D13 */
0519           SUNXI_FUNCTION_VARIANT(0x3, "lvds1",
0520                      PINCTRL_SUN6I_A31)),   /* VN1 */
0521     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
0522           SUNXI_FUNCTION(0x0, "gpio_in"),
0523           SUNXI_FUNCTION(0x1, "gpio_out"),
0524           SUNXI_FUNCTION(0x2, "lcd0"),      /* D14 */
0525           SUNXI_FUNCTION_VARIANT(0x3, "lvds1",
0526                      PINCTRL_SUN6I_A31)),   /* VP2 */
0527     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
0528           SUNXI_FUNCTION(0x0, "gpio_in"),
0529           SUNXI_FUNCTION(0x1, "gpio_out"),
0530           SUNXI_FUNCTION(0x2, "lcd0"),      /* D15 */
0531           SUNXI_FUNCTION_VARIANT(0x3, "lvds1",
0532                      PINCTRL_SUN6I_A31)),   /* VN2 */
0533     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
0534           SUNXI_FUNCTION(0x0, "gpio_in"),
0535           SUNXI_FUNCTION(0x1, "gpio_out"),
0536           SUNXI_FUNCTION(0x2, "lcd0"),      /* D16 */
0537           SUNXI_FUNCTION_VARIANT(0x3, "lvds1",
0538                      PINCTRL_SUN6I_A31)),   /* VPC */
0539     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
0540           SUNXI_FUNCTION(0x0, "gpio_in"),
0541           SUNXI_FUNCTION(0x1, "gpio_out"),
0542           SUNXI_FUNCTION(0x2, "lcd0"),      /* D17 */
0543           SUNXI_FUNCTION_VARIANT(0x3, "lvds1",
0544                      PINCTRL_SUN6I_A31)),   /* VNC */
0545     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
0546           SUNXI_FUNCTION(0x0, "gpio_in"),
0547           SUNXI_FUNCTION(0x1, "gpio_out"),
0548           SUNXI_FUNCTION(0x2, "lcd0"),      /* D18 */
0549           SUNXI_FUNCTION_VARIANT(0x3, "lvds1",
0550                      PINCTRL_SUN6I_A31)),   /* VP3 */
0551     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
0552           SUNXI_FUNCTION(0x0, "gpio_in"),
0553           SUNXI_FUNCTION(0x1, "gpio_out"),
0554           SUNXI_FUNCTION(0x2, "lcd0"),      /* D19 */
0555           SUNXI_FUNCTION_VARIANT(0x3, "lvds1",
0556                      PINCTRL_SUN6I_A31)),   /* VN3 */
0557     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
0558           SUNXI_FUNCTION(0x0, "gpio_in"),
0559           SUNXI_FUNCTION(0x1, "gpio_out"),
0560           SUNXI_FUNCTION(0x2, "lcd0")),     /* D20 */
0561     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
0562           SUNXI_FUNCTION(0x0, "gpio_in"),
0563           SUNXI_FUNCTION(0x1, "gpio_out"),
0564           SUNXI_FUNCTION(0x2, "lcd0")),     /* D21 */
0565     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
0566           SUNXI_FUNCTION(0x0, "gpio_in"),
0567           SUNXI_FUNCTION(0x1, "gpio_out"),
0568           SUNXI_FUNCTION(0x2, "lcd0")),     /* D22 */
0569     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
0570           SUNXI_FUNCTION(0x0, "gpio_in"),
0571           SUNXI_FUNCTION(0x1, "gpio_out"),
0572           SUNXI_FUNCTION(0x2, "lcd0")),     /* D23 */
0573     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
0574           SUNXI_FUNCTION(0x0, "gpio_in"),
0575           SUNXI_FUNCTION(0x1, "gpio_out"),
0576           SUNXI_FUNCTION(0x2, "lcd0")),     /* CLK */
0577     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
0578           SUNXI_FUNCTION(0x0, "gpio_in"),
0579           SUNXI_FUNCTION(0x1, "gpio_out"),
0580           SUNXI_FUNCTION(0x2, "lcd0")),     /* DE */
0581     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
0582           SUNXI_FUNCTION(0x0, "gpio_in"),
0583           SUNXI_FUNCTION(0x1, "gpio_out"),
0584           SUNXI_FUNCTION(0x2, "lcd0")),     /* HSYNC */
0585     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
0586           SUNXI_FUNCTION(0x0, "gpio_in"),
0587           SUNXI_FUNCTION(0x1, "gpio_out"),
0588           SUNXI_FUNCTION(0x2, "lcd0")),     /* VSYNC */
0589     /* Hole */
0590     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
0591           SUNXI_FUNCTION(0x0, "gpio_in"),
0592           SUNXI_FUNCTION(0x1, "gpio_out"),
0593           SUNXI_FUNCTION(0x2, "csi"),       /* PCLK */
0594           SUNXI_FUNCTION(0x3, "ts"),        /* CLK */
0595           SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 0)),  /* PE_EINT0 */
0596     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
0597           SUNXI_FUNCTION(0x0, "gpio_in"),
0598           SUNXI_FUNCTION(0x1, "gpio_out"),
0599           SUNXI_FUNCTION(0x2, "csi"),       /* MCLK */
0600           SUNXI_FUNCTION(0x3, "ts"),        /* ERR */
0601           SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 1)),  /* PE_EINT1 */
0602     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
0603           SUNXI_FUNCTION(0x0, "gpio_in"),
0604           SUNXI_FUNCTION(0x1, "gpio_out"),
0605           SUNXI_FUNCTION(0x2, "csi"),       /* HSYNC */
0606           SUNXI_FUNCTION(0x3, "ts"),        /* SYNC */
0607           SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 2)),  /* PE_EINT2 */
0608     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
0609           SUNXI_FUNCTION(0x0, "gpio_in"),
0610           SUNXI_FUNCTION(0x1, "gpio_out"),
0611           SUNXI_FUNCTION(0x2, "csi"),       /* VSYNC */
0612           SUNXI_FUNCTION(0x3, "ts"),        /* DVLD */
0613           SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 3)),  /* PE_EINT3 */
0614     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
0615           SUNXI_FUNCTION(0x0, "gpio_in"),
0616           SUNXI_FUNCTION(0x1, "gpio_out"),
0617           SUNXI_FUNCTION(0x2, "csi"),       /* D0 */
0618           SUNXI_FUNCTION(0x3, "uart5"),     /* TX */
0619           SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 4)),  /* PE_EINT4 */
0620     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
0621           SUNXI_FUNCTION(0x0, "gpio_in"),
0622           SUNXI_FUNCTION(0x1, "gpio_out"),
0623           SUNXI_FUNCTION(0x2, "csi"),       /* D1 */
0624           SUNXI_FUNCTION(0x3, "uart5"),     /* RX */
0625           SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 5)),  /* PE_EINT5 */
0626     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
0627           SUNXI_FUNCTION(0x0, "gpio_in"),
0628           SUNXI_FUNCTION(0x1, "gpio_out"),
0629           SUNXI_FUNCTION(0x2, "csi"),       /* D2 */
0630           SUNXI_FUNCTION(0x3, "uart5"),     /* RTS */
0631           SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 6)),  /* PE_EINT6 */
0632     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
0633           SUNXI_FUNCTION(0x0, "gpio_in"),
0634           SUNXI_FUNCTION(0x1, "gpio_out"),
0635           SUNXI_FUNCTION(0x2, "csi"),       /* D3 */
0636           SUNXI_FUNCTION(0x3, "uart5"),     /* CTS */
0637           SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 7)),  /* PE_EINT7 */
0638     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
0639           SUNXI_FUNCTION(0x0, "gpio_in"),
0640           SUNXI_FUNCTION(0x1, "gpio_out"),
0641           SUNXI_FUNCTION(0x2, "csi"),       /* D4 */
0642           SUNXI_FUNCTION(0x3, "ts"),        /* D0 */
0643           SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 8)),  /* PE_EINT8 */
0644     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
0645           SUNXI_FUNCTION(0x0, "gpio_in"),
0646           SUNXI_FUNCTION(0x1, "gpio_out"),
0647           SUNXI_FUNCTION(0x2, "csi"),       /* D5 */
0648           SUNXI_FUNCTION(0x3, "ts"),        /* D1 */
0649           SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 9)),  /* PE_EINT9 */
0650     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
0651           SUNXI_FUNCTION(0x0, "gpio_in"),
0652           SUNXI_FUNCTION(0x1, "gpio_out"),
0653           SUNXI_FUNCTION(0x2, "csi"),       /* D6 */
0654           SUNXI_FUNCTION(0x3, "ts"),        /* D2 */
0655           SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 10)), /* PE_EINT10 */
0656     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
0657           SUNXI_FUNCTION(0x0, "gpio_in"),
0658           SUNXI_FUNCTION(0x1, "gpio_out"),
0659           SUNXI_FUNCTION(0x2, "csi"),       /* D7 */
0660           SUNXI_FUNCTION(0x3, "ts"),        /* D3 */
0661           SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 11)), /* PE_EINT11 */
0662     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
0663           SUNXI_FUNCTION(0x0, "gpio_in"),
0664           SUNXI_FUNCTION(0x1, "gpio_out"),
0665           SUNXI_FUNCTION(0x2, "csi"),       /* D8 */
0666           SUNXI_FUNCTION(0x3, "ts"),        /* D4 */
0667           SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 12)), /* PE_EINT12 */
0668     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13),
0669           SUNXI_FUNCTION(0x0, "gpio_in"),
0670           SUNXI_FUNCTION(0x1, "gpio_out"),
0671           SUNXI_FUNCTION(0x2, "csi"),       /* D9 */
0672           SUNXI_FUNCTION(0x3, "ts"),        /* D5 */
0673           SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 13)), /* PE_EINT13 */
0674     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14),
0675           SUNXI_FUNCTION(0x0, "gpio_in"),
0676           SUNXI_FUNCTION(0x1, "gpio_out"),
0677           SUNXI_FUNCTION(0x2, "csi"),       /* D10 */
0678           SUNXI_FUNCTION(0x3, "ts"),        /* D6 */
0679           SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 14)), /* PE_EINT14 */
0680     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15),
0681           SUNXI_FUNCTION(0x0, "gpio_in"),
0682           SUNXI_FUNCTION(0x1, "gpio_out"),
0683           SUNXI_FUNCTION(0x2, "csi"),       /* D11 */
0684           SUNXI_FUNCTION(0x3, "ts"),        /* D7 */
0685           SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 15)), /* PE_EINT15 */
0686     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(E, 16), PINCTRL_SUN6I_A31,
0687           SUNXI_FUNCTION(0x0, "gpio_in"),
0688           SUNXI_FUNCTION(0x1, "gpio_out"),
0689           SUNXI_FUNCTION(0x2, "csi"),       /* MIPI CSI MCLK */
0690           SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 16)), /* PE_EINT16 */
0691     /* Hole */
0692     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
0693           SUNXI_FUNCTION(0x0, "gpio_in"),
0694           SUNXI_FUNCTION(0x1, "gpio_out"),
0695           SUNXI_FUNCTION(0x2, "mmc0"),      /* D1 */
0696           SUNXI_FUNCTION(0x4, "jtag")),     /* MS1 */
0697     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
0698           SUNXI_FUNCTION(0x0, "gpio_in"),
0699           SUNXI_FUNCTION(0x1, "gpio_out"),
0700           SUNXI_FUNCTION(0x2, "mmc0"),      /* D0 */
0701           SUNXI_FUNCTION(0x4, "jtag")),     /* DI1 */
0702     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
0703           SUNXI_FUNCTION(0x0, "gpio_in"),
0704           SUNXI_FUNCTION(0x1, "gpio_out"),
0705           SUNXI_FUNCTION(0x2, "mmc0"),      /* CLK */
0706           SUNXI_FUNCTION(0x4, "uart0")),    /* TX */
0707     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
0708           SUNXI_FUNCTION(0x0, "gpio_in"),
0709           SUNXI_FUNCTION(0x1, "gpio_out"),
0710           SUNXI_FUNCTION(0x2, "mmc0"),      /* CMD */
0711           SUNXI_FUNCTION(0x4, "jtag")),     /* DO1 */
0712     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
0713           SUNXI_FUNCTION(0x0, "gpio_in"),
0714           SUNXI_FUNCTION(0x1, "gpio_out"),
0715           SUNXI_FUNCTION(0x2, "mmc0"),      /* D3 */
0716           SUNXI_FUNCTION(0x4, "uart0")),    /* RX */
0717     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
0718           SUNXI_FUNCTION(0x0, "gpio_in"),
0719           SUNXI_FUNCTION(0x1, "gpio_out"),
0720           SUNXI_FUNCTION(0x2, "mmc0"),      /* D2 */
0721           SUNXI_FUNCTION(0x4, "jtag")),     /* CK1 */
0722     /* Hole */
0723     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
0724           SUNXI_FUNCTION(0x0, "gpio_in"),
0725           SUNXI_FUNCTION(0x1, "gpio_out"),
0726           SUNXI_FUNCTION(0x2, "mmc1"),      /* CLK */
0727           SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 0)),  /* PG_EINT0 */
0728     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
0729           SUNXI_FUNCTION(0x0, "gpio_in"),
0730           SUNXI_FUNCTION(0x1, "gpio_out"),
0731           SUNXI_FUNCTION(0x2, "mmc1"),      /* CMD */
0732           SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 1)),  /* PG_EINT1 */
0733     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
0734           SUNXI_FUNCTION(0x0, "gpio_in"),
0735           SUNXI_FUNCTION(0x1, "gpio_out"),
0736           SUNXI_FUNCTION(0x2, "mmc1"),      /* D0 */
0737           SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 2)),  /* PG_EINT2 */
0738     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
0739           SUNXI_FUNCTION(0x0, "gpio_in"),
0740           SUNXI_FUNCTION(0x1, "gpio_out"),
0741           SUNXI_FUNCTION(0x2, "mmc1"),      /* D1 */
0742           SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 3)),  /* PG_EINT3 */
0743     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
0744           SUNXI_FUNCTION(0x0, "gpio_in"),
0745           SUNXI_FUNCTION(0x1, "gpio_out"),
0746           SUNXI_FUNCTION(0x2, "mmc1"),      /* D2 */
0747           SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 4)),  /* PG_EINT4 */
0748     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
0749           SUNXI_FUNCTION(0x0, "gpio_in"),
0750           SUNXI_FUNCTION(0x1, "gpio_out"),
0751           SUNXI_FUNCTION(0x2, "mmc1"),      /* D3 */
0752           SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 5)),  /* PG_EINT5 */
0753     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
0754           SUNXI_FUNCTION(0x0, "gpio_in"),
0755           SUNXI_FUNCTION(0x1, "gpio_out"),
0756           SUNXI_FUNCTION(0x2, "uart2"),     /* TX */
0757           SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 6)),  /* PG_EINT6 */
0758     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
0759           SUNXI_FUNCTION(0x0, "gpio_in"),
0760           SUNXI_FUNCTION(0x1, "gpio_out"),
0761           SUNXI_FUNCTION(0x2, "uart2"),     /* RX */
0762           SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 7)),  /* PG_EINT7 */
0763     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
0764           SUNXI_FUNCTION(0x0, "gpio_in"),
0765           SUNXI_FUNCTION(0x1, "gpio_out"),
0766           SUNXI_FUNCTION(0x2, "uart2"),     /* RTS */
0767           SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 8)),  /* PG_EINT8 */
0768     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
0769           SUNXI_FUNCTION(0x0, "gpio_in"),
0770           SUNXI_FUNCTION(0x1, "gpio_out"),
0771           SUNXI_FUNCTION(0x2, "uart2"),     /* CTS */
0772           SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 9)),  /* PG_EINT9 */
0773     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
0774           SUNXI_FUNCTION(0x0, "gpio_in"),
0775           SUNXI_FUNCTION(0x1, "gpio_out"),
0776           SUNXI_FUNCTION(0x2, "i2c3"),      /* SCK */
0777           SUNXI_FUNCTION_VARIANT(0x3, "usb",
0778                      PINCTRL_SUN6I_A31),    /* DP3 */
0779           SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 10)), /* PG_EINT10 */
0780     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
0781           SUNXI_FUNCTION(0x0, "gpio_in"),
0782           SUNXI_FUNCTION(0x1, "gpio_out"),
0783           SUNXI_FUNCTION(0x2, "i2c3"),      /* SDA */
0784           SUNXI_FUNCTION_VARIANT(0x3, "usb",
0785                      PINCTRL_SUN6I_A31),    /* DM3 */
0786           SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 11)), /* PG_EINT11 */
0787     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12),
0788           SUNXI_FUNCTION(0x0, "gpio_in"),
0789           SUNXI_FUNCTION(0x1, "gpio_out"),
0790           SUNXI_FUNCTION(0x2, "spi1"),      /* CS1 */
0791           SUNXI_FUNCTION(0x3, "i2s1"),      /* MCLK */
0792           SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 12)), /* PG_EINT12 */
0793     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13),
0794           SUNXI_FUNCTION(0x0, "gpio_in"),
0795           SUNXI_FUNCTION(0x1, "gpio_out"),
0796           SUNXI_FUNCTION(0x2, "spi1"),      /* CS0 */
0797           SUNXI_FUNCTION(0x3, "i2s1"),      /* BCLK */
0798           SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 13)), /* PG_EINT13 */
0799     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 14),
0800           SUNXI_FUNCTION(0x0, "gpio_in"),
0801           SUNXI_FUNCTION(0x1, "gpio_out"),
0802           SUNXI_FUNCTION(0x2, "spi1"),      /* CLK */
0803           SUNXI_FUNCTION(0x3, "i2s1"),      /* LRCK */
0804           SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 14)), /* PG_EINT14 */
0805     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 15),
0806           SUNXI_FUNCTION(0x0, "gpio_in"),
0807           SUNXI_FUNCTION(0x1, "gpio_out"),
0808           SUNXI_FUNCTION(0x2, "spi1"),      /* MOSI */
0809           SUNXI_FUNCTION(0x3, "i2s1"),      /* DIN */
0810           SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 15)), /* PG_EINT15 */
0811     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 16),
0812           SUNXI_FUNCTION(0x0, "gpio_in"),
0813           SUNXI_FUNCTION(0x1, "gpio_out"),
0814           SUNXI_FUNCTION(0x2, "spi1"),      /* MISO */
0815           SUNXI_FUNCTION(0x3, "i2s1"),      /* DOUT */
0816           SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 16)), /* PG_EINT16 */
0817     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 17),
0818           SUNXI_FUNCTION(0x0, "gpio_in"),
0819           SUNXI_FUNCTION(0x1, "gpio_out"),
0820           SUNXI_FUNCTION(0x2, "uart4"),     /* TX */
0821           SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 17)), /* PG_EINT17 */
0822     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 18),
0823           SUNXI_FUNCTION(0x0, "gpio_in"),
0824           SUNXI_FUNCTION(0x1, "gpio_out"),
0825           SUNXI_FUNCTION(0x2, "uart4"),     /* RX */
0826           SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 18)), /* PG_EINT18 */
0827     /* Hole; H starts at pin 9 for A31s */
0828     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(H, 0), PINCTRL_SUN6I_A31,
0829           SUNXI_FUNCTION(0x0, "gpio_in"),
0830           SUNXI_FUNCTION(0x1, "gpio_out"),
0831           SUNXI_FUNCTION(0x2, "nand1")),    /* WE */
0832     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(H, 1), PINCTRL_SUN6I_A31,
0833           SUNXI_FUNCTION(0x0, "gpio_in"),
0834           SUNXI_FUNCTION(0x1, "gpio_out"),
0835           SUNXI_FUNCTION(0x2, "nand1")),    /* ALE */
0836     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(H, 2), PINCTRL_SUN6I_A31,
0837           SUNXI_FUNCTION(0x0, "gpio_in"),
0838           SUNXI_FUNCTION(0x1, "gpio_out"),
0839           SUNXI_FUNCTION(0x2, "nand1")),    /* CLE */
0840     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(H, 3), PINCTRL_SUN6I_A31,
0841           SUNXI_FUNCTION(0x0, "gpio_in"),
0842           SUNXI_FUNCTION(0x1, "gpio_out"),
0843           SUNXI_FUNCTION(0x2, "nand1")),    /* CE1 */
0844     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(H, 4), PINCTRL_SUN6I_A31,
0845           SUNXI_FUNCTION(0x0, "gpio_in"),
0846           SUNXI_FUNCTION(0x1, "gpio_out"),
0847           SUNXI_FUNCTION(0x2, "nand1")),    /* CE0 */
0848     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(H, 5), PINCTRL_SUN6I_A31,
0849           SUNXI_FUNCTION(0x0, "gpio_in"),
0850           SUNXI_FUNCTION(0x1, "gpio_out"),
0851           SUNXI_FUNCTION(0x2, "nand1")),    /* RE */
0852     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(H, 6), PINCTRL_SUN6I_A31,
0853           SUNXI_FUNCTION(0x0, "gpio_in"),
0854           SUNXI_FUNCTION(0x1, "gpio_out"),
0855           SUNXI_FUNCTION(0x2, "nand1")),    /* RB0 */
0856     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(H, 7), PINCTRL_SUN6I_A31,
0857           SUNXI_FUNCTION(0x0, "gpio_in"),
0858           SUNXI_FUNCTION(0x1, "gpio_out"),
0859           SUNXI_FUNCTION(0x2, "nand1")),    /* RB1 */
0860     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(H, 8), PINCTRL_SUN6I_A31,
0861           SUNXI_FUNCTION(0x0, "gpio_in"),
0862           SUNXI_FUNCTION(0x1, "gpio_out"),
0863           SUNXI_FUNCTION(0x2, "nand1")),    /* DQS */
0864     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
0865           SUNXI_FUNCTION(0x0, "gpio_in"),
0866           SUNXI_FUNCTION(0x1, "gpio_out"),
0867           SUNXI_FUNCTION(0x2, "spi2"),      /* CS0 */
0868           SUNXI_FUNCTION(0x3, "jtag"),      /* MS0 */
0869           SUNXI_FUNCTION(0x4, "pwm1")),     /* Positive */
0870     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10),
0871           SUNXI_FUNCTION(0x0, "gpio_in"),
0872           SUNXI_FUNCTION(0x1, "gpio_out"),
0873           SUNXI_FUNCTION(0x2, "spi2"),      /* CLK */
0874           SUNXI_FUNCTION(0x3, "jtag"),      /* CK0 */
0875           SUNXI_FUNCTION(0x4, "pwm1")),     /* Negative */
0876     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11),
0877           SUNXI_FUNCTION(0x0, "gpio_in"),
0878           SUNXI_FUNCTION(0x1, "gpio_out"),
0879           SUNXI_FUNCTION(0x2, "spi2"),      /* MOSI */
0880           SUNXI_FUNCTION(0x3, "jtag"),      /* DO0 */
0881           SUNXI_FUNCTION(0x4, "pwm2")),     /* Positive */
0882     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 12),
0883           SUNXI_FUNCTION(0x0, "gpio_in"),
0884           SUNXI_FUNCTION(0x1, "gpio_out"),
0885           SUNXI_FUNCTION(0x2, "spi2"),      /* MISO */
0886           SUNXI_FUNCTION(0x3, "jtag"),      /* DI0 */
0887           SUNXI_FUNCTION(0x4, "pwm2")),     /* Negative */
0888     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 13),
0889           SUNXI_FUNCTION(0x0, "gpio_in"),
0890           SUNXI_FUNCTION(0x1, "gpio_out"),
0891           SUNXI_FUNCTION(0x2, "pwm0")),
0892     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 14),
0893           SUNXI_FUNCTION(0x0, "gpio_in"),
0894           SUNXI_FUNCTION(0x1, "gpio_out"),
0895           SUNXI_FUNCTION(0x2, "i2c0")),     /* SCK */
0896     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 15),
0897           SUNXI_FUNCTION(0x0, "gpio_in"),
0898           SUNXI_FUNCTION(0x1, "gpio_out"),
0899           SUNXI_FUNCTION(0x2, "i2c0")),     /* SDA */
0900     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 16),
0901           SUNXI_FUNCTION(0x0, "gpio_in"),
0902           SUNXI_FUNCTION(0x1, "gpio_out"),
0903           SUNXI_FUNCTION(0x2, "i2c1")),     /* SCK */
0904     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 17),
0905           SUNXI_FUNCTION(0x0, "gpio_in"),
0906           SUNXI_FUNCTION(0x1, "gpio_out"),
0907           SUNXI_FUNCTION(0x2, "i2c1")),     /* SDA */
0908     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 18),
0909           SUNXI_FUNCTION(0x0, "gpio_in"),
0910           SUNXI_FUNCTION(0x1, "gpio_out"),
0911           SUNXI_FUNCTION(0x2, "i2c2")),     /* SCK */
0912     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 19),
0913           SUNXI_FUNCTION(0x0, "gpio_in"),
0914           SUNXI_FUNCTION(0x1, "gpio_out"),
0915           SUNXI_FUNCTION(0x2, "i2c2")),     /* SDA */
0916     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 20),
0917           SUNXI_FUNCTION(0x0, "gpio_in"),
0918           SUNXI_FUNCTION(0x1, "gpio_out"),
0919           SUNXI_FUNCTION(0x2, "uart0")),    /* TX */
0920     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 21),
0921           SUNXI_FUNCTION(0x0, "gpio_in"),
0922           SUNXI_FUNCTION(0x1, "gpio_out"),
0923           SUNXI_FUNCTION(0x2, "uart0")),    /* RX */
0924     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 22),
0925           SUNXI_FUNCTION(0x0, "gpio_in"),
0926           SUNXI_FUNCTION(0x1, "gpio_out")),
0927     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 23),
0928           SUNXI_FUNCTION(0x0, "gpio_in"),
0929           SUNXI_FUNCTION(0x1, "gpio_out")),
0930     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 24),
0931           SUNXI_FUNCTION(0x0, "gpio_in"),
0932           SUNXI_FUNCTION(0x1, "gpio_out")),
0933     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 25),
0934           SUNXI_FUNCTION(0x0, "gpio_in"),
0935           SUNXI_FUNCTION(0x1, "gpio_out")),
0936     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 26),
0937           SUNXI_FUNCTION(0x0, "gpio_in"),
0938           SUNXI_FUNCTION(0x1, "gpio_out")),
0939     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 27),
0940           SUNXI_FUNCTION(0x0, "gpio_in"),
0941           SUNXI_FUNCTION(0x1, "gpio_out"),
0942         /*
0943          * The SPDIF block is not referenced at all in the A31 user
0944          * manual. However it is described in the code leaked and the
0945          * configuration files supplied by vendors.
0946          */
0947           SUNXI_FUNCTION(0x3, "spdif")),        /* SPDIF IN */
0948     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 28),
0949           SUNXI_FUNCTION(0x0, "gpio_in"),
0950           SUNXI_FUNCTION(0x1, "gpio_out"),
0951         /* Undocumented mux function - see above */
0952           SUNXI_FUNCTION(0x3, "spdif")),        /* SPDIF OUT */
0953     /* 2 extra pins for A31 */
0954     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(H, 29), PINCTRL_SUN6I_A31,
0955           SUNXI_FUNCTION(0x0, "gpio_in"),
0956           SUNXI_FUNCTION(0x1, "gpio_out"),
0957           SUNXI_FUNCTION(0x2, "nand1")),    /* CE2 */
0958     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(H, 30), PINCTRL_SUN6I_A31,
0959           SUNXI_FUNCTION(0x0, "gpio_in"),
0960           SUNXI_FUNCTION(0x1, "gpio_out"),
0961           SUNXI_FUNCTION(0x2, "nand1")),    /* CE3 */
0962 };
0963 
0964 static const struct sunxi_pinctrl_desc sun6i_a31_pinctrl_data = {
0965     .pins = sun6i_a31_pins,
0966     .npins = ARRAY_SIZE(sun6i_a31_pins),
0967     .irq_banks = 4,
0968     .disable_strict_mode = true,
0969 };
0970 
0971 static int sun6i_a31_pinctrl_probe(struct platform_device *pdev)
0972 {
0973     unsigned long variant =
0974         (unsigned long)of_device_get_match_data(&pdev->dev);
0975 
0976     return sunxi_pinctrl_init_with_variant(pdev,
0977                            &sun6i_a31_pinctrl_data,
0978                            variant);
0979 }
0980 
0981 static const struct of_device_id sun6i_a31_pinctrl_match[] = {
0982     {
0983         .compatible = "allwinner,sun6i-a31-pinctrl",
0984         .data = (void *)PINCTRL_SUN6I_A31
0985     },
0986     {
0987         .compatible = "allwinner,sun6i-a31s-pinctrl",
0988         .data = (void *)PINCTRL_SUN6I_A31S
0989     },
0990     {}
0991 };
0992 
0993 static struct platform_driver sun6i_a31_pinctrl_driver = {
0994     .probe  = sun6i_a31_pinctrl_probe,
0995     .driver = {
0996         .name       = "sun6i-a31-pinctrl",
0997         .of_match_table = sun6i_a31_pinctrl_match,
0998     },
0999 };
1000 builtin_platform_driver(sun6i_a31_pinctrl_driver);
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