pinctrl/sunxi/pinctrl-sun6i-a31-r.c

0001 /*
0002  * Allwinner A31 SoCs special pins pinctrl driver.
0003  *
0004  * Copyright (C) 2014 Boris Brezillon
0005  * Boris Brezillon <boris.brezillon@free-electrons.com>
0006  *
0007  * Copyright (C) 2014 Maxime Ripard
0008  * Maxime Ripard <maxime.ripard@free-electrons.com>
0009  *
0010  * This file is licensed under the terms of the GNU General Public
0011  * License version 2.  This program is licensed "as is" without any
0012  * warranty of any kind, whether express or implied.
0013  */
0014
0015 #include <linux/init.h>
0016 #include <linux/platform_device.h>
0017 #include <linux/of.h>
0018 #include <linux/of_device.h>
0019 #include <linux/pinctrl/pinctrl.h>
0020
0021 #include "pinctrl-sunxi.h"
0022
0023 static const struct sunxi_desc_pin sun6i_a31_r_pins[] = {
0024     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
0025           SUNXI_FUNCTION(0x0, "gpio_in"),
0026           SUNXI_FUNCTION(0x1, "gpio_out"),
0027           SUNXI_FUNCTION(0x2, "s_i2c"),     /* SCK */
0028           SUNXI_FUNCTION(0x3, "s_p2wi")),   /* SCK */
0029     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
0030           SUNXI_FUNCTION(0x0, "gpio_in"),
0031           SUNXI_FUNCTION(0x1, "gpio_out"),
0032           SUNXI_FUNCTION(0x2, "s_i2c"),     /* SDA */
0033           SUNXI_FUNCTION(0x3, "s_p2wi")),   /* SDA */
0034     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
0035           SUNXI_FUNCTION(0x0, "gpio_in"),
0036           SUNXI_FUNCTION(0x1, "gpio_out"),
0037           SUNXI_FUNCTION(0x2, "s_uart")),   /* TX */
0038     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
0039           SUNXI_FUNCTION(0x0, "gpio_in"),
0040           SUNXI_FUNCTION(0x1, "gpio_out"),
0041           SUNXI_FUNCTION(0x2, "s_uart")),   /* RX */
0042     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
0043           SUNXI_FUNCTION(0x0, "gpio_in"),
0044           SUNXI_FUNCTION(0x1, "gpio_out"),
0045           SUNXI_FUNCTION(0x2, "s_ir")),     /* RX */
0046     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
0047           SUNXI_FUNCTION(0x0, "gpio_in"),
0048           SUNXI_FUNCTION(0x1, "gpio_out"),
0049           SUNXI_FUNCTION_IRQ_BANK(0x2, 0, 0),   /* PL_EINT0 */
0050           SUNXI_FUNCTION(0x3, "s_jtag")),   /* MS */
0051     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
0052           SUNXI_FUNCTION(0x0, "gpio_in"),
0053           SUNXI_FUNCTION(0x1, "gpio_out"),
0054           SUNXI_FUNCTION_IRQ_BANK(0x2, 0, 1),   /* PL_EINT1 */
0055           SUNXI_FUNCTION(0x3, "s_jtag")),   /* CK */
0056     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
0057           SUNXI_FUNCTION(0x0, "gpio_in"),
0058           SUNXI_FUNCTION(0x1, "gpio_out"),
0059           SUNXI_FUNCTION_IRQ_BANK(0x2, 0, 2),   /* PL_EINT2 */
0060           SUNXI_FUNCTION(0x3, "s_jtag")),   /* DO */
0061     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
0062           SUNXI_FUNCTION(0x0, "gpio_in"),
0063           SUNXI_FUNCTION(0x1, "gpio_out"),
0064           SUNXI_FUNCTION_IRQ_BANK(0x2, 0, 3),   /* PL_EINT3 */
0065           SUNXI_FUNCTION(0x3, "s_jtag")),   /* DI */
0066     /* Hole */
0067     SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 0),
0068           SUNXI_FUNCTION(0x0, "gpio_in"),
0069           SUNXI_FUNCTION(0x1, "gpio_out"),
0070           SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 0)),  /* PM_EINT0 */
0071     SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 1),
0072           SUNXI_FUNCTION(0x0, "gpio_in"),
0073           SUNXI_FUNCTION(0x1, "gpio_out"),
0074           SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 1)),  /* PM_EINT1 */
0075     SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 2),
0076           SUNXI_FUNCTION(0x0, "gpio_in"),
0077           SUNXI_FUNCTION(0x1, "gpio_out"),
0078           SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 2),   /* PM_EINT2 */
0079           SUNXI_FUNCTION(0x3, "1wire")),
0080     SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 3),
0081           SUNXI_FUNCTION(0x0, "gpio_in"),
0082           SUNXI_FUNCTION(0x1, "gpio_out"),
0083           SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 3)),  /* PM_EINT3 */
0084     SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 4),
0085           SUNXI_FUNCTION(0x0, "gpio_in"),
0086           SUNXI_FUNCTION(0x1, "gpio_out"),
0087           SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 4)),  /* PM_EINT4 */
0088     SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 5),
0089           SUNXI_FUNCTION(0x0, "gpio_in"),
0090           SUNXI_FUNCTION(0x1, "gpio_out"),
0091           SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 5)),  /* PM_EINT5 */
0092     SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 6),
0093           SUNXI_FUNCTION(0x0, "gpio_in"),
0094           SUNXI_FUNCTION(0x1, "gpio_out"),
0095           SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 6)),  /* PM_EINT6 */
0096     SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 7),
0097           SUNXI_FUNCTION(0x0, "gpio_in"),
0098           SUNXI_FUNCTION(0x1, "gpio_out"),
0099           SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 7),   /* PM_EINT7 */
0100           SUNXI_FUNCTION(0x3, "rtc")),      /* CLKO */
0101 };
0102
0103 static const struct sunxi_pinctrl_desc sun6i_a31_r_pinctrl_data = {
0104     .pins = sun6i_a31_r_pins,
0105     .npins = ARRAY_SIZE(sun6i_a31_r_pins),
0106     .pin_base = PL_BASE,
0107     .irq_banks = 2,
0108     .disable_strict_mode = true,
0109 };
0110
0111 static int sun6i_a31_r_pinctrl_probe(struct platform_device *pdev)
0112 {
0113     return sunxi_pinctrl_init(pdev, &sun6i_a31_r_pinctrl_data);
0114 }
0115
0116 static const struct of_device_id sun6i_a31_r_pinctrl_match[] = {
0117     { .compatible = "allwinner,sun6i-a31-r-pinctrl", },
0118     {}
0119 };
0120
0121 static struct platform_driver sun6i_a31_r_pinctrl_driver = {
0122     .probe  = sun6i_a31_r_pinctrl_probe,
0123     .driver = {
0124         .name       = "sun6i-a31-r-pinctrl",
0125         .of_match_table = sun6i_a31_r_pinctrl_match,
0126     },
0127 };
0128 builtin_platform_driver(sun6i_a31_r_pinctrl_driver);