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OSCL-LXR
 
 

     

0001 /*
0002  * Allwinner sun5i SoCs pinctrl driver.
0003  *
0004  * Copyright (C) 2014-2016 Maxime Ripard <maxime.ripard@free-electrons.com>
0005  * Copyright (C) 2016 Mylene Josserand <mylene.josserand@free-electrons.com>
0006  *
0007  * This file is licensed under the terms of the GNU General Public
0008  * License version 2.  This program is licensed "as is" without any
0009  * warranty of any kind, whether express or implied.
0010  */
0011 
0012 #include <linux/init.h>
0013 #include <linux/platform_device.h>
0014 #include <linux/of.h>
0015 #include <linux/of_device.h>
0016 #include <linux/pinctrl/pinctrl.h>
0017 
0018 #include "pinctrl-sunxi.h"
0019 
0020 static const struct sunxi_desc_pin sun5i_pins[] = {
0021     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 0),
0022           PINCTRL_SUN5I_A10S,
0023           SUNXI_FUNCTION(0x0, "gpio_in"),
0024           SUNXI_FUNCTION(0x1, "gpio_out"),
0025           SUNXI_FUNCTION(0x2, "emac"),      /* ERXD3 */
0026           SUNXI_FUNCTION(0x3, "ts0"),       /* CLK */
0027           SUNXI_FUNCTION(0x5, "keypad")),   /* IN0 */
0028     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 1),
0029           PINCTRL_SUN5I_A10S,
0030           SUNXI_FUNCTION(0x0, "gpio_in"),
0031           SUNXI_FUNCTION(0x1, "gpio_out"),
0032           SUNXI_FUNCTION(0x2, "emac"),      /* ERXD2 */
0033           SUNXI_FUNCTION(0x3, "ts0"),       /* ERR */
0034           SUNXI_FUNCTION(0x5, "keypad")),   /* IN1 */
0035     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 2),
0036           PINCTRL_SUN5I_A10S,
0037           SUNXI_FUNCTION(0x0, "gpio_in"),
0038           SUNXI_FUNCTION(0x1, "gpio_out"),
0039           SUNXI_FUNCTION(0x2, "emac"),      /* ERXD1 */
0040           SUNXI_FUNCTION(0x3, "ts0"),       /* SYNC */
0041           SUNXI_FUNCTION(0x5, "keypad")),   /* IN2 */
0042     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 3),
0043           PINCTRL_SUN5I_A10S,
0044           SUNXI_FUNCTION(0x0, "gpio_in"),
0045           SUNXI_FUNCTION(0x1, "gpio_out"),
0046           SUNXI_FUNCTION(0x2, "emac"),      /* ERXD0 */
0047           SUNXI_FUNCTION(0x3, "ts0"),       /* DLVD */
0048           SUNXI_FUNCTION(0x5, "keypad")),   /* IN3 */
0049     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 4),
0050           PINCTRL_SUN5I_A10S,
0051           SUNXI_FUNCTION(0x0, "gpio_in"),
0052           SUNXI_FUNCTION(0x1, "gpio_out"),
0053           SUNXI_FUNCTION(0x2, "emac"),      /* ETXD3 */
0054           SUNXI_FUNCTION(0x3, "ts0"),       /* D0 */
0055           SUNXI_FUNCTION(0x5, "keypad")),   /* IN4 */
0056     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 5),
0057           PINCTRL_SUN5I_A10S,
0058           SUNXI_FUNCTION(0x0, "gpio_in"),
0059           SUNXI_FUNCTION(0x1, "gpio_out"),
0060           SUNXI_FUNCTION(0x2, "emac"),      /* ETXD2 */
0061           SUNXI_FUNCTION(0x3, "ts0"),       /* D1 */
0062           SUNXI_FUNCTION(0x5, "keypad")),   /* IN5 */
0063     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 6),
0064           PINCTRL_SUN5I_A10S,
0065           SUNXI_FUNCTION(0x0, "gpio_in"),
0066           SUNXI_FUNCTION(0x1, "gpio_out"),
0067           SUNXI_FUNCTION(0x2, "emac"),      /* ETXD1 */
0068           SUNXI_FUNCTION(0x3, "ts0"),       /* D2 */
0069           SUNXI_FUNCTION(0x5, "keypad")),   /* IN6 */
0070     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 7),
0071           PINCTRL_SUN5I_A10S,
0072           SUNXI_FUNCTION(0x0, "gpio_in"),
0073           SUNXI_FUNCTION(0x1, "gpio_out"),
0074           SUNXI_FUNCTION(0x2, "emac"),      /* ETXD0 */
0075           SUNXI_FUNCTION(0x3, "ts0"),       /* D3 */
0076           SUNXI_FUNCTION(0x5, "keypad")),   /* IN7 */
0077     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 8),
0078           PINCTRL_SUN5I_A10S,
0079           SUNXI_FUNCTION(0x0, "gpio_in"),
0080           SUNXI_FUNCTION(0x1, "gpio_out"),
0081           SUNXI_FUNCTION(0x2, "emac"),      /* ERXCK */
0082           SUNXI_FUNCTION(0x3, "ts0"),       /* D4 */
0083           SUNXI_FUNCTION(0x4, "uart1"),     /* DTR */
0084           SUNXI_FUNCTION(0x5, "keypad")),   /* OUT0 */
0085     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 9),
0086           PINCTRL_SUN5I_A10S,
0087           SUNXI_FUNCTION(0x0, "gpio_in"),
0088           SUNXI_FUNCTION(0x1, "gpio_out"),
0089           SUNXI_FUNCTION(0x2, "emac"),      /* ERXERR */
0090           SUNXI_FUNCTION(0x3, "ts0"),       /* D5 */
0091           SUNXI_FUNCTION(0x4, "uart1"),     /* DSR */
0092           SUNXI_FUNCTION(0x5, "keypad")),   /* OUT1 */
0093     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 10),
0094           PINCTRL_SUN5I_A10S,
0095           SUNXI_FUNCTION(0x0, "gpio_in"),
0096           SUNXI_FUNCTION(0x1, "gpio_out"),
0097           SUNXI_FUNCTION(0x2, "emac"),      /* ERXDV */
0098           SUNXI_FUNCTION(0x3, "ts0"),       /* D6 */
0099           SUNXI_FUNCTION(0x4, "uart1"),     /* DCD */
0100           SUNXI_FUNCTION(0x5, "keypad")),   /* OUT2 */
0101     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 11),
0102           PINCTRL_SUN5I_A10S,
0103           SUNXI_FUNCTION(0x0, "gpio_in"),
0104           SUNXI_FUNCTION(0x1, "gpio_out"),
0105           SUNXI_FUNCTION(0x2, "emac"),      /* EMDC */
0106           SUNXI_FUNCTION(0x3, "ts0"),       /* D7 */
0107           SUNXI_FUNCTION(0x4, "uart1"),     /* RING */
0108           SUNXI_FUNCTION(0x5, "keypad")),   /* OUT3 */
0109     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 12),
0110           PINCTRL_SUN5I_A10S,
0111           SUNXI_FUNCTION(0x0, "gpio_in"),
0112           SUNXI_FUNCTION(0x1, "gpio_out"),
0113           SUNXI_FUNCTION(0x2, "emac"),      /* EMDIO */
0114           SUNXI_FUNCTION(0x3, "uart1"),     /* TX */
0115           SUNXI_FUNCTION(0x5, "keypad")),   /* OUT4 */
0116     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 13),
0117           PINCTRL_SUN5I_A10S,
0118           SUNXI_FUNCTION(0x0, "gpio_in"),
0119           SUNXI_FUNCTION(0x1, "gpio_out"),
0120           SUNXI_FUNCTION(0x2, "emac"),      /* ETXEN */
0121           SUNXI_FUNCTION(0x3, "uart1"),     /* RX */
0122           SUNXI_FUNCTION(0x5, "keypad")),   /* OUT5 */
0123     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 14),
0124           PINCTRL_SUN5I_A10S,
0125           SUNXI_FUNCTION(0x0, "gpio_in"),
0126           SUNXI_FUNCTION(0x1, "gpio_out"),
0127           SUNXI_FUNCTION(0x2, "emac"),      /* ETXCK */
0128           SUNXI_FUNCTION(0x3, "uart1"),     /* CTS */
0129           SUNXI_FUNCTION(0x4, "uart3"),     /* TX */
0130           SUNXI_FUNCTION(0x5, "keypad")),   /* OUT6 */
0131     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 15),
0132           PINCTRL_SUN5I_A10S,
0133           SUNXI_FUNCTION(0x0, "gpio_in"),
0134           SUNXI_FUNCTION(0x1, "gpio_out"),
0135           SUNXI_FUNCTION(0x2, "emac"),      /* ECRS */
0136           SUNXI_FUNCTION(0x3, "uart1"),     /* RTS */
0137           SUNXI_FUNCTION(0x4, "uart3"),     /* RX */
0138           SUNXI_FUNCTION(0x5, "keypad")),   /* OUT7 */
0139     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 16),
0140           PINCTRL_SUN5I_A10S,
0141           SUNXI_FUNCTION(0x0, "gpio_in"),
0142           SUNXI_FUNCTION(0x1, "gpio_out"),
0143           SUNXI_FUNCTION(0x2, "emac"),      /* ECOL */
0144           SUNXI_FUNCTION(0x3, "uart2")),    /* TX */
0145     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 17),
0146           PINCTRL_SUN5I_A10S,
0147           SUNXI_FUNCTION(0x0, "gpio_in"),
0148           SUNXI_FUNCTION(0x1, "gpio_out"),
0149           SUNXI_FUNCTION(0x2, "emac"),      /* ETXERR */
0150           SUNXI_FUNCTION(0x3, "uart2"),     /* RX */
0151           SUNXI_FUNCTION_IRQ(0x6, 31)),     /* EINT31 */
0152     /* Hole */
0153     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
0154           SUNXI_FUNCTION(0x0, "gpio_in"),
0155           SUNXI_FUNCTION(0x1, "gpio_out"),
0156           SUNXI_FUNCTION(0x2, "i2c0")),     /* SCK */
0157     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
0158           SUNXI_FUNCTION(0x0, "gpio_in"),
0159           SUNXI_FUNCTION(0x1, "gpio_out"),
0160           SUNXI_FUNCTION(0x2, "i2c0")),     /* SDA */
0161     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
0162           SUNXI_FUNCTION(0x0, "gpio_in"),
0163           SUNXI_FUNCTION(0x1, "gpio_out"),
0164           SUNXI_FUNCTION(0x2, "pwm"),       /* PWM0 */
0165           SUNXI_FUNCTION_VARIANT(0x3,
0166                      "spdif",   /* DO */
0167                      PINCTRL_SUN5I_GR8),
0168           SUNXI_FUNCTION_IRQ(0x6, 16)),     /* EINT16 */
0169     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
0170           SUNXI_FUNCTION(0x0, "gpio_in"),
0171           SUNXI_FUNCTION(0x1, "gpio_out"),
0172           SUNXI_FUNCTION(0x2, "ir0"),       /* TX */
0173           SUNXI_FUNCTION_IRQ(0x6, 17)),     /* EINT17 */
0174     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
0175           SUNXI_FUNCTION(0x0, "gpio_in"),
0176           SUNXI_FUNCTION(0x1, "gpio_out"),
0177           SUNXI_FUNCTION(0x2, "ir0"),       /* RX */
0178           SUNXI_FUNCTION_IRQ(0x6, 18)),     /* EINT18 */
0179     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 5),
0180           PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
0181           SUNXI_FUNCTION(0x0, "gpio_in"),
0182           SUNXI_FUNCTION(0x1, "gpio_out"),
0183           SUNXI_FUNCTION(0x2, "i2s"),       /* MCLK */
0184           SUNXI_FUNCTION_IRQ(0x6, 19)),     /* EINT19 */
0185     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 6),
0186           PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
0187           SUNXI_FUNCTION(0x0, "gpio_in"),
0188           SUNXI_FUNCTION(0x1, "gpio_out"),
0189           SUNXI_FUNCTION(0x2, "i2s"),       /* BCLK */
0190           SUNXI_FUNCTION_IRQ(0x6, 20)),     /* EINT20 */
0191     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 7),
0192           PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
0193           SUNXI_FUNCTION(0x0, "gpio_in"),
0194           SUNXI_FUNCTION(0x1, "gpio_out"),
0195           SUNXI_FUNCTION(0x2, "i2s"),       /* LRCK */
0196           SUNXI_FUNCTION_IRQ(0x6, 21)),     /* EINT21 */
0197     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 8),
0198           PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
0199           SUNXI_FUNCTION(0x0, "gpio_in"),
0200           SUNXI_FUNCTION(0x1, "gpio_out"),
0201           SUNXI_FUNCTION(0x2, "i2s"),       /* DO */
0202           SUNXI_FUNCTION_IRQ(0x6, 22)),     /* EINT22 */
0203     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 9),
0204           PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
0205           SUNXI_FUNCTION(0x0, "gpio_in"),
0206           SUNXI_FUNCTION(0x1, "gpio_out"),
0207           SUNXI_FUNCTION(0x2, "i2s"),       /* DI */
0208           SUNXI_FUNCTION_VARIANT(0x3,
0209                      "spdif",   /* DI */
0210                      PINCTRL_SUN5I_GR8),
0211           SUNXI_FUNCTION_IRQ(0x6, 23)),     /* EINT23 */
0212     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 10),
0213           SUNXI_FUNCTION(0x0, "gpio_in"),
0214           SUNXI_FUNCTION(0x1, "gpio_out"),
0215           SUNXI_FUNCTION(0x2, "spi2"),      /* CS1 */
0216           SUNXI_FUNCTION_VARIANT(0x3,
0217                      "spdif",   /* DO */
0218                      PINCTRL_SUN5I_GR8),
0219           SUNXI_FUNCTION_IRQ(0x6, 24)),     /* EINT24 */
0220     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 11),
0221           PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
0222           SUNXI_FUNCTION(0x0, "gpio_in"),
0223           SUNXI_FUNCTION(0x1, "gpio_out"),
0224           SUNXI_FUNCTION(0x2, "spi2"),      /* CS0 */
0225           SUNXI_FUNCTION(0x3, "jtag"),      /* MS0 */
0226           SUNXI_FUNCTION_IRQ(0x6, 25)),     /* EINT25 */
0227     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 12),
0228           PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
0229           SUNXI_FUNCTION(0x0, "gpio_in"),
0230           SUNXI_FUNCTION(0x1, "gpio_out"),
0231           SUNXI_FUNCTION(0x2, "spi2"),      /* CLK */
0232           SUNXI_FUNCTION(0x3, "jtag"),      /* CK0 */
0233           SUNXI_FUNCTION_IRQ(0x6, 26)),     /* EINT26 */
0234     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 13),
0235           PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
0236           SUNXI_FUNCTION(0x0, "gpio_in"),
0237           SUNXI_FUNCTION(0x1, "gpio_out"),
0238           SUNXI_FUNCTION(0x2, "spi2"),      /* MOSI */
0239           SUNXI_FUNCTION(0x3, "jtag"),      /* DO0 */
0240           SUNXI_FUNCTION_IRQ(0x6, 27)),     /* EINT27 */
0241     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 14),
0242           PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
0243           SUNXI_FUNCTION(0x0, "gpio_in"),
0244           SUNXI_FUNCTION(0x1, "gpio_out"),
0245           SUNXI_FUNCTION(0x2, "spi2"),      /* MISO */
0246           SUNXI_FUNCTION(0x3, "jtag"),      /* DI0 */
0247           SUNXI_FUNCTION_IRQ(0x6, 28)),     /* EINT28 */
0248     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 15),
0249           SUNXI_FUNCTION(0x0, "gpio_in"),
0250           SUNXI_FUNCTION(0x1, "gpio_out"),
0251           SUNXI_FUNCTION(0x2, "i2c1")),     /* SCK */
0252     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 16),
0253           SUNXI_FUNCTION(0x0, "gpio_in"),
0254           SUNXI_FUNCTION(0x1, "gpio_out"),
0255           SUNXI_FUNCTION(0x2, "i2c1")),     /* SDA */
0256     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 17),
0257           SUNXI_FUNCTION(0x0, "gpio_in"),
0258           SUNXI_FUNCTION(0x1, "gpio_out"),
0259           SUNXI_FUNCTION(0x2, "i2c2")),     /* SCK */
0260     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 18),
0261           SUNXI_FUNCTION(0x0, "gpio_in"),
0262           SUNXI_FUNCTION(0x1, "gpio_out"),
0263           SUNXI_FUNCTION(0x2, "i2c2")),     /* SDA */
0264     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 19),
0265           PINCTRL_SUN5I_A10S,
0266           SUNXI_FUNCTION(0x0, "gpio_in"),
0267           SUNXI_FUNCTION(0x1, "gpio_out"),
0268           SUNXI_FUNCTION(0x2, "uart0"),     /* TX */
0269           SUNXI_FUNCTION_IRQ(0x6, 29)),     /* EINT29 */
0270     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 20),
0271           PINCTRL_SUN5I_A10S,
0272           SUNXI_FUNCTION(0x0, "gpio_in"),
0273           SUNXI_FUNCTION(0x1, "gpio_out"),
0274           SUNXI_FUNCTION(0x2, "uart0"),     /* RX */
0275           SUNXI_FUNCTION_IRQ(0x6, 30)),     /* EINT30 */
0276     /* Hole */
0277     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
0278           SUNXI_FUNCTION(0x0, "gpio_in"),
0279           SUNXI_FUNCTION(0x1, "gpio_out"),
0280           SUNXI_FUNCTION(0x2, "nand0"),     /* NWE */
0281           SUNXI_FUNCTION(0x3, "spi0")),     /* MOSI */
0282     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
0283           SUNXI_FUNCTION(0x0, "gpio_in"),
0284           SUNXI_FUNCTION(0x1, "gpio_out"),
0285           SUNXI_FUNCTION(0x2, "nand0"),     /* NALE */
0286           SUNXI_FUNCTION(0x3, "spi0")),     /* MISO */
0287     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
0288           SUNXI_FUNCTION(0x0, "gpio_in"),
0289           SUNXI_FUNCTION(0x1, "gpio_out"),
0290           SUNXI_FUNCTION(0x2, "nand0"),     /* NCLE */
0291           SUNXI_FUNCTION(0x3, "spi0")),     /* CLK */
0292     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
0293           SUNXI_FUNCTION(0x0, "gpio_in"),
0294           SUNXI_FUNCTION(0x1, "gpio_out"),
0295           SUNXI_FUNCTION(0x2, "nand0"),     /* NCE1 */
0296           SUNXI_FUNCTION(0x3, "spi0")),     /* CS0 */
0297     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
0298           SUNXI_FUNCTION(0x0, "gpio_in"),
0299           SUNXI_FUNCTION(0x1, "gpio_out"),
0300           SUNXI_FUNCTION(0x2, "nand0")),    /* NCE0 */
0301     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
0302           SUNXI_FUNCTION(0x0, "gpio_in"),
0303           SUNXI_FUNCTION(0x1, "gpio_out"),
0304           SUNXI_FUNCTION(0x2, "nand0")),    /* NRE */
0305     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
0306           SUNXI_FUNCTION(0x0, "gpio_in"),
0307           SUNXI_FUNCTION(0x1, "gpio_out"),
0308           SUNXI_FUNCTION(0x2, "nand0"),     /* NRB0 */
0309           SUNXI_FUNCTION(0x3, "mmc2")),     /* CMD */
0310     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
0311           SUNXI_FUNCTION(0x0, "gpio_in"),
0312           SUNXI_FUNCTION(0x1, "gpio_out"),
0313           SUNXI_FUNCTION(0x2, "nand0"),     /* NRB1 */
0314           SUNXI_FUNCTION(0x3, "mmc2")),     /* CLK */
0315     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
0316           SUNXI_FUNCTION(0x0, "gpio_in"),
0317           SUNXI_FUNCTION(0x1, "gpio_out"),
0318           SUNXI_FUNCTION(0x2, "nand0"),     /* NDQ0 */
0319           SUNXI_FUNCTION(0x3, "mmc2")),     /* D0 */
0320     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
0321           SUNXI_FUNCTION(0x0, "gpio_in"),
0322           SUNXI_FUNCTION(0x1, "gpio_out"),
0323           SUNXI_FUNCTION(0x2, "nand0"),     /* NDQ1 */
0324           SUNXI_FUNCTION(0x3, "mmc2")),     /* D1 */
0325     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
0326           SUNXI_FUNCTION(0x0, "gpio_in"),
0327           SUNXI_FUNCTION(0x1, "gpio_out"),
0328           SUNXI_FUNCTION(0x2, "nand0"),     /* NDQ2 */
0329           SUNXI_FUNCTION(0x3, "mmc2")),     /* D2 */
0330     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
0331           SUNXI_FUNCTION(0x0, "gpio_in"),
0332           SUNXI_FUNCTION(0x1, "gpio_out"),
0333           SUNXI_FUNCTION(0x2, "nand0"),     /* NDQ3 */
0334           SUNXI_FUNCTION(0x3, "mmc2")),     /* D3 */
0335     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
0336           SUNXI_FUNCTION(0x0, "gpio_in"),
0337           SUNXI_FUNCTION(0x1, "gpio_out"),
0338           SUNXI_FUNCTION(0x2, "nand0"),     /* NDQ4 */
0339           SUNXI_FUNCTION(0x3, "mmc2")),     /* D4 */
0340     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
0341           SUNXI_FUNCTION(0x0, "gpio_in"),
0342           SUNXI_FUNCTION(0x1, "gpio_out"),
0343           SUNXI_FUNCTION(0x2, "nand0"),     /* NDQ5 */
0344           SUNXI_FUNCTION(0x3, "mmc2")),     /* D5 */
0345     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
0346           SUNXI_FUNCTION(0x0, "gpio_in"),
0347           SUNXI_FUNCTION(0x1, "gpio_out"),
0348           SUNXI_FUNCTION(0x2, "nand0"),     /* NDQ6 */
0349           SUNXI_FUNCTION(0x3, "mmc2")),     /* D6 */
0350     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
0351           SUNXI_FUNCTION(0x0, "gpio_in"),
0352           SUNXI_FUNCTION(0x1, "gpio_out"),
0353           SUNXI_FUNCTION(0x2, "nand0"),     /* NDQ7 */
0354           SUNXI_FUNCTION(0x3, "mmc2")),     /* D7 */
0355     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 16),
0356           PINCTRL_SUN5I_A10S,
0357           SUNXI_FUNCTION(0x0, "gpio_in"),
0358           SUNXI_FUNCTION(0x1, "gpio_out"),
0359           SUNXI_FUNCTION(0x2, "nand0"),     /* NWP */
0360           SUNXI_FUNCTION(0x4, "uart3")),    /* TX */
0361     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 17),
0362           PINCTRL_SUN5I_A10S,
0363           SUNXI_FUNCTION(0x0, "gpio_in"),
0364           SUNXI_FUNCTION(0x1, "gpio_out"),
0365           SUNXI_FUNCTION(0x2, "nand0"),     /* NCE2 */
0366           SUNXI_FUNCTION(0x4, "uart3")),    /* RX */
0367     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 18),
0368           PINCTRL_SUN5I_A10S,
0369           SUNXI_FUNCTION(0x0, "gpio_in"),
0370           SUNXI_FUNCTION(0x1, "gpio_out"),
0371           SUNXI_FUNCTION(0x2, "nand0"),     /* NCE3 */
0372           SUNXI_FUNCTION(0x3, "uart2"),     /* TX */
0373           SUNXI_FUNCTION(0x4, "uart3")),    /* CTS */
0374     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 19),
0375           SUNXI_FUNCTION(0x0, "gpio_in"),
0376           SUNXI_FUNCTION(0x1, "gpio_out"),
0377           SUNXI_FUNCTION(0x2, "nand0"),     /* NCE4 */
0378           SUNXI_FUNCTION(0x3, "uart2"),     /* RX */
0379           SUNXI_FUNCTION(0x4, "uart3")),    /* RTS */
0380     /* Hole */
0381     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 0),
0382           PINCTRL_SUN5I_A10S,
0383           SUNXI_FUNCTION(0x0, "gpio_in"),
0384           SUNXI_FUNCTION(0x1, "gpio_out"),
0385           SUNXI_FUNCTION(0x2, "lcd0")),     /* D0 */
0386     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 1),
0387           PINCTRL_SUN5I_A10S,
0388           SUNXI_FUNCTION(0x0, "gpio_in"),
0389           SUNXI_FUNCTION(0x1, "gpio_out"),
0390           SUNXI_FUNCTION(0x2, "lcd0")),     /* D1 */
0391     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
0392           SUNXI_FUNCTION(0x0, "gpio_in"),
0393           SUNXI_FUNCTION(0x1, "gpio_out"),
0394           SUNXI_FUNCTION(0x2, "lcd0"),      /* D2 */
0395           SUNXI_FUNCTION(0x3, "uart2")),    /* TX */
0396     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
0397           SUNXI_FUNCTION(0x0, "gpio_in"),
0398           SUNXI_FUNCTION(0x1, "gpio_out"),
0399           SUNXI_FUNCTION(0x2, "lcd0"),      /* D3 */
0400           SUNXI_FUNCTION(0x3, "uart2")),    /* RX */
0401     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
0402           SUNXI_FUNCTION(0x0, "gpio_in"),
0403           SUNXI_FUNCTION(0x1, "gpio_out"),
0404           SUNXI_FUNCTION(0x2, "lcd0"),      /* D4 */
0405           SUNXI_FUNCTION(0x3, "uart2")),    /* CTS */
0406     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
0407           SUNXI_FUNCTION(0x0, "gpio_in"),
0408           SUNXI_FUNCTION(0x1, "gpio_out"),
0409           SUNXI_FUNCTION(0x2, "lcd0"),      /* D5 */
0410           SUNXI_FUNCTION(0x3, "uart2")),    /* RTS */
0411     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
0412           SUNXI_FUNCTION(0x0, "gpio_in"),
0413           SUNXI_FUNCTION(0x1, "gpio_out"),
0414           SUNXI_FUNCTION(0x2, "lcd0"),      /* D6 */
0415           SUNXI_FUNCTION(0x3, "emac")),     /* ECRS */
0416     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
0417           SUNXI_FUNCTION(0x0, "gpio_in"),
0418           SUNXI_FUNCTION(0x1, "gpio_out"),
0419           SUNXI_FUNCTION(0x2, "lcd0"),      /* D7 */
0420           SUNXI_FUNCTION(0x3, "emac")),     /* ECOL */
0421     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 8),
0422           PINCTRL_SUN5I_A10S,
0423           SUNXI_FUNCTION(0x0, "gpio_in"),
0424           SUNXI_FUNCTION(0x1, "gpio_out"),
0425           SUNXI_FUNCTION(0x2, "lcd0")),     /* D8 */
0426     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 9),
0427           PINCTRL_SUN5I_A10S,
0428           SUNXI_FUNCTION(0x0, "gpio_in"),
0429           SUNXI_FUNCTION(0x1, "gpio_out"),
0430           SUNXI_FUNCTION(0x2, "lcd0")),     /* D9 */
0431     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
0432           SUNXI_FUNCTION(0x0, "gpio_in"),
0433           SUNXI_FUNCTION(0x1, "gpio_out"),
0434           SUNXI_FUNCTION(0x2, "lcd0"),      /* D10 */
0435           SUNXI_FUNCTION(0x3, "emac")),     /* ERXD0 */
0436     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
0437           SUNXI_FUNCTION(0x0, "gpio_in"),
0438           SUNXI_FUNCTION(0x1, "gpio_out"),
0439           SUNXI_FUNCTION(0x2, "lcd0"),      /* D11 */
0440           SUNXI_FUNCTION(0x3, "emac")),     /* ERXD1 */
0441     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
0442           SUNXI_FUNCTION(0x0, "gpio_in"),
0443           SUNXI_FUNCTION(0x1, "gpio_out"),
0444           SUNXI_FUNCTION(0x2, "lcd0"),      /* D12 */
0445           SUNXI_FUNCTION(0x3, "emac")),     /* ERXD2 */
0446     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
0447           SUNXI_FUNCTION(0x0, "gpio_in"),
0448           SUNXI_FUNCTION(0x1, "gpio_out"),
0449           SUNXI_FUNCTION(0x2, "lcd0"),      /* D13 */
0450           SUNXI_FUNCTION(0x3, "emac")),     /* ERXD3 */
0451     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
0452           SUNXI_FUNCTION(0x0, "gpio_in"),
0453           SUNXI_FUNCTION(0x1, "gpio_out"),
0454           SUNXI_FUNCTION(0x2, "lcd0"),      /* D14 */
0455           SUNXI_FUNCTION(0x3, "emac")),     /* ERXCK */
0456     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
0457           SUNXI_FUNCTION(0x0, "gpio_in"),
0458           SUNXI_FUNCTION(0x1, "gpio_out"),
0459           SUNXI_FUNCTION(0x2, "lcd0"),      /* D15 */
0460           SUNXI_FUNCTION(0x3, "emac")),     /* ERXERR */
0461     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 16),
0462           PINCTRL_SUN5I_A10S,
0463           SUNXI_FUNCTION(0x0, "gpio_in"),
0464           SUNXI_FUNCTION(0x1, "gpio_out"),
0465           SUNXI_FUNCTION(0x2, "lcd0")),     /* D16 */
0466     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 17),
0467           PINCTRL_SUN5I_A10S,
0468           SUNXI_FUNCTION(0x0, "gpio_in"),
0469           SUNXI_FUNCTION(0x1, "gpio_out"),
0470           SUNXI_FUNCTION(0x2, "lcd0")),     /* D17 */
0471     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
0472           SUNXI_FUNCTION(0x0, "gpio_in"),
0473           SUNXI_FUNCTION(0x1, "gpio_out"),
0474           SUNXI_FUNCTION(0x2, "lcd0"),      /* D18 */
0475           SUNXI_FUNCTION(0x3, "emac")),     /* ERXDV */
0476     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
0477           SUNXI_FUNCTION(0x0, "gpio_in"),
0478           SUNXI_FUNCTION(0x1, "gpio_out"),
0479           SUNXI_FUNCTION(0x2, "lcd0"),      /* D19 */
0480           SUNXI_FUNCTION(0x3, "emac")),     /* ETXD0 */
0481     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
0482           SUNXI_FUNCTION(0x0, "gpio_in"),
0483           SUNXI_FUNCTION(0x1, "gpio_out"),
0484           SUNXI_FUNCTION(0x2, "lcd0"),      /* D20 */
0485           SUNXI_FUNCTION(0x3, "emac")),     /* ETXD1 */
0486     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
0487           SUNXI_FUNCTION(0x0, "gpio_in"),
0488           SUNXI_FUNCTION(0x1, "gpio_out"),
0489           SUNXI_FUNCTION(0x2, "lcd0"),      /* D21 */
0490           SUNXI_FUNCTION(0x3, "emac")),     /* ETXD2 */
0491     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
0492           SUNXI_FUNCTION(0x0, "gpio_in"),
0493           SUNXI_FUNCTION(0x1, "gpio_out"),
0494           SUNXI_FUNCTION(0x2, "lcd0"),      /* D22 */
0495           SUNXI_FUNCTION(0x3, "emac")),     /* ETXD3 */
0496     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
0497           SUNXI_FUNCTION(0x0, "gpio_in"),
0498           SUNXI_FUNCTION(0x1, "gpio_out"),
0499           SUNXI_FUNCTION(0x2, "lcd0"),      /* D23 */
0500           SUNXI_FUNCTION(0x3, "emac")),     /* ETXEN */
0501     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
0502           SUNXI_FUNCTION(0x0, "gpio_in"),
0503           SUNXI_FUNCTION(0x1, "gpio_out"),
0504           SUNXI_FUNCTION(0x2, "lcd0"),      /* CLK */
0505           SUNXI_FUNCTION(0x3, "emac")),     /* ETXCK */
0506     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
0507           SUNXI_FUNCTION(0x0, "gpio_in"),
0508           SUNXI_FUNCTION(0x1, "gpio_out"),
0509           SUNXI_FUNCTION(0x2, "lcd0"),      /* DE */
0510           SUNXI_FUNCTION(0x3, "emac")),     /* ETXERR */
0511     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
0512           SUNXI_FUNCTION(0x0, "gpio_in"),
0513           SUNXI_FUNCTION(0x1, "gpio_out"),
0514           SUNXI_FUNCTION(0x2, "lcd0"),      /* HSYNC */
0515           SUNXI_FUNCTION(0x3, "emac")),     /* EMDC */
0516     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
0517           SUNXI_FUNCTION(0x0, "gpio_in"),
0518           SUNXI_FUNCTION(0x1, "gpio_out"),
0519           SUNXI_FUNCTION(0x2, "lcd0"),      /* VSYNC */
0520           SUNXI_FUNCTION(0x3, "emac")),     /* EMDIO */
0521     /* Hole */
0522     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
0523           SUNXI_FUNCTION(0x0, "gpio_in"),
0524           SUNXI_FUNCTION(0x2, "ts0"),       /* CLK */
0525           SUNXI_FUNCTION(0x3, "csi0"),      /* PCK */
0526           SUNXI_FUNCTION(0x4, "spi2"),      /* CS0 */
0527           SUNXI_FUNCTION_IRQ(0x6, 14)),     /* EINT14 */
0528     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
0529           SUNXI_FUNCTION(0x0, "gpio_in"),
0530           SUNXI_FUNCTION(0x2, "ts0"),       /* ERR */
0531           SUNXI_FUNCTION(0x3, "csi0"),      /* CK */
0532           SUNXI_FUNCTION(0x4, "spi2"),      /* CLK */
0533           SUNXI_FUNCTION_IRQ(0x6, 15)),     /* EINT15 */
0534     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
0535           SUNXI_FUNCTION(0x0, "gpio_in"),
0536           SUNXI_FUNCTION(0x2, "ts0"),       /* SYNC */
0537           SUNXI_FUNCTION(0x3, "csi0"),      /* HSYNC */
0538           SUNXI_FUNCTION(0x4, "spi2")),     /* MOSI */
0539     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
0540           SUNXI_FUNCTION(0x0, "gpio_in"),
0541           SUNXI_FUNCTION(0x1, "gpio_out"),
0542           SUNXI_FUNCTION(0x2, "ts0"),       /* DVLD */
0543           SUNXI_FUNCTION(0x3, "csi0"),      /* VSYNC */
0544           SUNXI_FUNCTION(0x4, "spi2")),     /* MISO */
0545     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
0546           SUNXI_FUNCTION(0x0, "gpio_in"),
0547           SUNXI_FUNCTION(0x1, "gpio_out"),
0548           SUNXI_FUNCTION(0x2, "ts0"),       /* D0 */
0549           SUNXI_FUNCTION(0x3, "csi0"),      /* D0 */
0550           SUNXI_FUNCTION(0x4, "mmc2")),     /* D0 */
0551     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
0552           SUNXI_FUNCTION(0x0, "gpio_in"),
0553           SUNXI_FUNCTION(0x1, "gpio_out"),
0554           SUNXI_FUNCTION(0x2, "ts0"),       /* D1 */
0555           SUNXI_FUNCTION(0x3, "csi0"),      /* D1 */
0556           SUNXI_FUNCTION(0x4, "mmc2")),     /* D1 */
0557     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
0558           SUNXI_FUNCTION(0x0, "gpio_in"),
0559           SUNXI_FUNCTION(0x1, "gpio_out"),
0560           SUNXI_FUNCTION(0x2, "ts0"),       /* D2 */
0561           SUNXI_FUNCTION(0x3, "csi0"),      /* D2 */
0562           SUNXI_FUNCTION(0x4, "mmc2")),     /* D2 */
0563     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
0564           SUNXI_FUNCTION(0x0, "gpio_in"),
0565           SUNXI_FUNCTION(0x1, "gpio_out"),
0566           SUNXI_FUNCTION(0x2, "ts0"),       /* D3 */
0567           SUNXI_FUNCTION(0x3, "csi0"),      /* D3 */
0568           SUNXI_FUNCTION(0x4, "mmc2")),     /* D3 */
0569     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
0570           SUNXI_FUNCTION(0x0, "gpio_in"),
0571           SUNXI_FUNCTION(0x1, "gpio_out"),
0572           SUNXI_FUNCTION(0x2, "ts0"),       /* D4 */
0573           SUNXI_FUNCTION(0x3, "csi0"),      /* D4 */
0574           SUNXI_FUNCTION(0x4, "mmc2")),     /* CMD */
0575     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
0576           SUNXI_FUNCTION(0x0, "gpio_in"),
0577           SUNXI_FUNCTION(0x1, "gpio_out"),
0578           SUNXI_FUNCTION(0x2, "ts0"),       /* D5 */
0579           SUNXI_FUNCTION(0x3, "csi0"),      /* D5 */
0580           SUNXI_FUNCTION(0x4, "mmc2")),     /* CLK */
0581     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
0582           SUNXI_FUNCTION(0x0, "gpio_in"),
0583           SUNXI_FUNCTION(0x1, "gpio_out"),
0584           SUNXI_FUNCTION(0x2, "ts0"),       /* D6 */
0585           SUNXI_FUNCTION(0x3, "csi0"),      /* D6 */
0586           SUNXI_FUNCTION(0x4, "uart1")),    /* TX */
0587     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
0588           SUNXI_FUNCTION(0x0, "gpio_in"),
0589           SUNXI_FUNCTION(0x1, "gpio_out"),
0590           SUNXI_FUNCTION(0x2, "ts0"),       /* D7 */
0591           SUNXI_FUNCTION(0x3, "csi0"),      /* D7 */
0592           SUNXI_FUNCTION(0x4, "uart1")),    /* RX */
0593     /* Hole */
0594     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
0595           SUNXI_FUNCTION(0x0, "gpio_in"),
0596           SUNXI_FUNCTION(0x1, "gpio_out"),
0597           SUNXI_FUNCTION(0x2, "mmc0"),      /* D1 */
0598           SUNXI_FUNCTION(0x4, "jtag")),     /* MS1 */
0599     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
0600           SUNXI_FUNCTION(0x0, "gpio_in"),
0601           SUNXI_FUNCTION(0x1, "gpio_out"),
0602           SUNXI_FUNCTION(0x2, "mmc0"),      /* D0 */
0603           SUNXI_FUNCTION(0x4, "jtag")),     /* DI1 */
0604     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
0605           SUNXI_FUNCTION(0x0, "gpio_in"),
0606           SUNXI_FUNCTION(0x1, "gpio_out"),
0607           SUNXI_FUNCTION(0x2, "mmc0"),      /* CLK */
0608           SUNXI_FUNCTION(0x4, "uart0")),    /* TX */
0609     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
0610           SUNXI_FUNCTION(0x0, "gpio_in"),
0611           SUNXI_FUNCTION(0x1, "gpio_out"),
0612           SUNXI_FUNCTION(0x2, "mmc0"),      /* CMD */
0613           SUNXI_FUNCTION(0x4, "jtag")),     /* DO1 */
0614     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
0615           SUNXI_FUNCTION(0x0, "gpio_in"),
0616           SUNXI_FUNCTION(0x1, "gpio_out"),
0617           SUNXI_FUNCTION(0x2, "mmc0"),      /* D3 */
0618           SUNXI_FUNCTION(0x4, "uart0")),    /* RX */
0619     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
0620           SUNXI_FUNCTION(0x0, "gpio_in"),
0621           SUNXI_FUNCTION(0x1, "gpio_out"),
0622           SUNXI_FUNCTION(0x2, "mmc0"),      /* D2 */
0623           SUNXI_FUNCTION(0x4, "jtag")),     /* CK1 */
0624     /* Hole */
0625     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
0626           SUNXI_FUNCTION(0x0, "gpio_in"),
0627           SUNXI_FUNCTION(0x2, "gps"),       /* CLK */
0628           SUNXI_FUNCTION_IRQ(0x6, 0)),      /* EINT0 */
0629     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
0630           SUNXI_FUNCTION(0x0, "gpio_in"),
0631           SUNXI_FUNCTION(0x2, "gps"),       /* SIGN */
0632           SUNXI_FUNCTION_IRQ(0x6, 1)),      /* EINT1 */
0633     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
0634           SUNXI_FUNCTION(0x0, "gpio_in"),
0635           SUNXI_FUNCTION(0x2, "gps"),       /* MAG */
0636           SUNXI_FUNCTION_IRQ(0x6, 2)),      /* EINT2 */
0637     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
0638           SUNXI_FUNCTION(0x0, "gpio_in"),
0639           SUNXI_FUNCTION(0x1, "gpio_out"),
0640           SUNXI_FUNCTION(0x2, "mmc1"),      /* CMD */
0641           SUNXI_FUNCTION(0x4, "uart1"),     /* TX */
0642           SUNXI_FUNCTION_IRQ(0x6, 3)),      /* EINT3 */
0643     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
0644           SUNXI_FUNCTION(0x0, "gpio_in"),
0645           SUNXI_FUNCTION(0x1, "gpio_out"),
0646           SUNXI_FUNCTION(0x2, "mmc1"),      /* CLK */
0647           SUNXI_FUNCTION(0x4, "uart1"),     /* RX */
0648           SUNXI_FUNCTION_IRQ(0x6, 4)),      /* EINT4 */
0649     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 5),
0650           PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
0651           SUNXI_FUNCTION(0x0, "gpio_in"),
0652           SUNXI_FUNCTION(0x1, "gpio_out"),
0653           SUNXI_FUNCTION(0x2, "mmc1"),      /* DO */
0654           SUNXI_FUNCTION(0x4, "uart1"),     /* CTS */
0655           SUNXI_FUNCTION_IRQ(0x6, 5)),      /* EINT5 */
0656     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 6),
0657           PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
0658           SUNXI_FUNCTION(0x0, "gpio_in"),
0659           SUNXI_FUNCTION(0x1, "gpio_out"),
0660           SUNXI_FUNCTION(0x2, "mmc1"),      /* D1 */
0661           SUNXI_FUNCTION(0x4, "uart1"),     /* RTS */
0662           SUNXI_FUNCTION(0x5, "uart2"),     /* RTS */
0663           SUNXI_FUNCTION_IRQ(0x6, 6)),      /* EINT6 */
0664     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 7),
0665           PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
0666           SUNXI_FUNCTION(0x0, "gpio_in"),
0667           SUNXI_FUNCTION(0x1, "gpio_out"),
0668           SUNXI_FUNCTION(0x2, "mmc1"),      /* D2 */
0669           SUNXI_FUNCTION(0x5, "uart2"),     /* TX */
0670           SUNXI_FUNCTION_IRQ(0x6, 7)),      /* EINT7 */
0671     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 8),
0672           PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
0673           SUNXI_FUNCTION(0x0, "gpio_in"),
0674           SUNXI_FUNCTION(0x1, "gpio_out"),
0675           SUNXI_FUNCTION(0x2, "mmc1"),      /* D3 */
0676           SUNXI_FUNCTION(0x5, "uart2"),     /* RX */
0677           SUNXI_FUNCTION_IRQ(0x6, 8)),      /* EINT8 */
0678     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
0679           SUNXI_FUNCTION(0x0, "gpio_in"),
0680           SUNXI_FUNCTION(0x1, "gpio_out"),
0681           SUNXI_FUNCTION(0x2, "spi1"),      /* CS0 */
0682           SUNXI_FUNCTION(0x3, "uart3"),     /* TX */
0683           SUNXI_FUNCTION_IRQ(0x6, 9)),      /* EINT9 */
0684     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
0685           SUNXI_FUNCTION(0x0, "gpio_in"),
0686           SUNXI_FUNCTION(0x1, "gpio_out"),
0687           SUNXI_FUNCTION(0x2, "spi1"),      /* CLK */
0688           SUNXI_FUNCTION(0x3, "uart3"),     /* RX */
0689           SUNXI_FUNCTION_IRQ(0x6, 10)),     /* EINT10 */
0690     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
0691           SUNXI_FUNCTION(0x0, "gpio_in"),
0692           SUNXI_FUNCTION(0x1, "gpio_out"),
0693           SUNXI_FUNCTION(0x2, "spi1"),      /* MOSI */
0694           SUNXI_FUNCTION(0x3, "uart3"),     /* CTS */
0695           SUNXI_FUNCTION_IRQ(0x6, 11)),     /* EINT11 */
0696     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12),
0697           SUNXI_FUNCTION(0x0, "gpio_in"),
0698           SUNXI_FUNCTION(0x1, "gpio_out"),
0699           SUNXI_FUNCTION(0x2, "spi1"),      /* MISO */
0700           SUNXI_FUNCTION(0x3, "uart3"),     /* RTS */
0701           SUNXI_FUNCTION_IRQ(0x6, 12)),     /* EINT12 */
0702     SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 13),
0703           PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
0704           SUNXI_FUNCTION(0x0, "gpio_in"),
0705           SUNXI_FUNCTION(0x1, "gpio_out"),
0706           SUNXI_FUNCTION(0x2, "spi1"),      /* CS1 */
0707           SUNXI_FUNCTION(0x3, "pwm"),       /* PWM1 */
0708           SUNXI_FUNCTION(0x5, "uart2"),     /* CTS */
0709           SUNXI_FUNCTION_IRQ(0x6, 13)),     /* EINT13 */
0710 };
0711 
0712 static const struct sunxi_pinctrl_desc sun5i_pinctrl_data = {
0713     .pins = sun5i_pins,
0714     .npins = ARRAY_SIZE(sun5i_pins),
0715     .irq_banks = 1,
0716     .disable_strict_mode = true,
0717 };
0718 
0719 static int sun5i_pinctrl_probe(struct platform_device *pdev)
0720 {
0721     unsigned long variant = (unsigned long)of_device_get_match_data(&pdev->dev);
0722 
0723     return sunxi_pinctrl_init_with_variant(pdev, &sun5i_pinctrl_data,
0724                            variant);
0725 }
0726 
0727 static const struct of_device_id sun5i_pinctrl_match[] = {
0728     {
0729         .compatible = "allwinner,sun5i-a10s-pinctrl",
0730         .data = (void *)PINCTRL_SUN5I_A10S
0731     },
0732     {
0733         .compatible = "allwinner,sun5i-a13-pinctrl",
0734         .data = (void *)PINCTRL_SUN5I_A13
0735     },
0736     {
0737         .compatible = "nextthing,gr8-pinctrl",
0738         .data = (void *)PINCTRL_SUN5I_GR8
0739     },
0740     { },
0741 };
0742 
0743 static struct platform_driver sun5i_pinctrl_driver = {
0744     .probe  = sun5i_pinctrl_probe,
0745     .driver = {
0746         .name       = "sun5i-pinctrl",
0747         .of_match_table = sun5i_pinctrl_match,
0748     },
0749 };
0750 builtin_platform_driver(sun5i_pinctrl_driver);
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