pinctrl/sunxi/pinctrl-sun50i-a64-r.c

0001 /*
0002  * Allwinner A64 SoCs special pins pinctrl driver.
0003  *
0004  * Based on pinctrl-sun8i-a23-r.c
0005  *
0006  * Copyright (C) 2016 Icenowy Zheng
0007  * Icenowy Zheng <icenowy@aosc.xyz>
0008  *
0009  * Copyright (C) 2014 Chen-Yu Tsai
0010  * Chen-Yu Tsai <wens@csie.org>
0011  *
0012  * Copyright (C) 2014 Boris Brezillon
0013  * Boris Brezillon <boris.brezillon@free-electrons.com>
0014  *
0015  * Copyright (C) 2014 Maxime Ripard
0016  * Maxime Ripard <maxime.ripard@free-electrons.com>
0017  *
0018  * This file is licensed under the terms of the GNU General Public
0019  * License version 2.  This program is licensed "as is" without any
0020  * warranty of any kind, whether express or implied.
0021  */
0022
0023 #include <linux/of.h>
0024 #include <linux/of_device.h>
0025 #include <linux/pinctrl/pinctrl.h>
0026 #include <linux/platform_device.h>
0027
0028 #include "pinctrl-sunxi.h"
0029
0030 static const struct sunxi_desc_pin sun50i_a64_r_pins[] = {
0031     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
0032           SUNXI_FUNCTION(0x0, "gpio_in"),
0033           SUNXI_FUNCTION(0x1, "gpio_out"),
0034           SUNXI_FUNCTION(0x2, "s_rsb"),     /* SCK */
0035           SUNXI_FUNCTION(0x3, "s_i2c"),     /* SCK */
0036           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),  /* PL_EINT0 */
0037     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
0038           SUNXI_FUNCTION(0x0, "gpio_in"),
0039           SUNXI_FUNCTION(0x1, "gpio_out"),
0040           SUNXI_FUNCTION(0x2, "s_rsb"),     /* SDA */
0041           SUNXI_FUNCTION(0x3, "s_i2c"),     /* SDA */
0042           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),  /* PL_EINT1 */
0043     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
0044           SUNXI_FUNCTION(0x0, "gpio_in"),
0045           SUNXI_FUNCTION(0x1, "gpio_out"),
0046           SUNXI_FUNCTION(0x2, "s_uart"),    /* TX */
0047           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),  /* PL_EINT2 */
0048     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
0049           SUNXI_FUNCTION(0x0, "gpio_in"),
0050           SUNXI_FUNCTION(0x1, "gpio_out"),
0051           SUNXI_FUNCTION(0x2, "s_uart"),    /* RX */
0052           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),  /* PL_EINT3 */
0053     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
0054           SUNXI_FUNCTION(0x0, "gpio_in"),
0055           SUNXI_FUNCTION(0x1, "gpio_out"),
0056           SUNXI_FUNCTION(0x2, "s_jtag"),    /* MS */
0057           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),  /* PL_EINT4 */
0058     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
0059           SUNXI_FUNCTION(0x0, "gpio_in"),
0060           SUNXI_FUNCTION(0x1, "gpio_out"),
0061           SUNXI_FUNCTION(0x2, "s_jtag"),    /* CK */
0062           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),  /* PL_EINT5 */
0063     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
0064           SUNXI_FUNCTION(0x0, "gpio_in"),
0065           SUNXI_FUNCTION(0x1, "gpio_out"),
0066           SUNXI_FUNCTION(0x2, "s_jtag"),    /* DO */
0067           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),  /* PL_EINT6 */
0068     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
0069           SUNXI_FUNCTION(0x0, "gpio_in"),
0070           SUNXI_FUNCTION(0x1, "gpio_out"),
0071           SUNXI_FUNCTION(0x2, "s_jtag"),    /* DI */
0072           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),  /* PL_EINT7 */
0073     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
0074           SUNXI_FUNCTION(0x0, "gpio_in"),
0075           SUNXI_FUNCTION(0x1, "gpio_out"),
0076           SUNXI_FUNCTION(0x2, "s_i2c"),     /* SCK */
0077           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),  /* PL_EINT8 */
0078     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9),
0079           SUNXI_FUNCTION(0x0, "gpio_in"),
0080           SUNXI_FUNCTION(0x1, "gpio_out"),
0081           SUNXI_FUNCTION(0x2, "s_i2c"),     /* SDA */
0082           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),  /* PL_EINT9 */
0083     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10),
0084           SUNXI_FUNCTION(0x0, "gpio_in"),
0085           SUNXI_FUNCTION(0x1, "gpio_out"),
0086           SUNXI_FUNCTION(0x2, "s_pwm"),
0087           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), /* PL_EINT10 */
0088     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 11),
0089           SUNXI_FUNCTION(0x0, "gpio_in"),
0090           SUNXI_FUNCTION(0x1, "gpio_out"),
0091           SUNXI_FUNCTION(0x2, "s_cir_rx"),
0092           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)), /* PL_EINT11 */
0093     SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 12),
0094           SUNXI_FUNCTION(0x0, "gpio_in"),
0095           SUNXI_FUNCTION(0x1, "gpio_out"),
0096           SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 12)), /* PL_EINT12 */
0097 };
0098
0099 static const struct sunxi_pinctrl_desc sun50i_a64_r_pinctrl_data = {
0100     .pins = sun50i_a64_r_pins,
0101     .npins = ARRAY_SIZE(sun50i_a64_r_pins),
0102     .pin_base = PL_BASE,
0103     .irq_banks = 1,
0104 };
0105
0106 static int sun50i_a64_r_pinctrl_probe(struct platform_device *pdev)
0107 {
0108     return sunxi_pinctrl_init(pdev,
0109                   &sun50i_a64_r_pinctrl_data);
0110 }
0111
0112 static const struct of_device_id sun50i_a64_r_pinctrl_match[] = {
0113     { .compatible = "allwinner,sun50i-a64-r-pinctrl", },
0114     {}
0115 };
0116
0117 static struct platform_driver sun50i_a64_r_pinctrl_driver = {
0118     .probe  = sun50i_a64_r_pinctrl_probe,
0119     .driver = {
0120         .name       = "sun50i-a64-r-pinctrl",
0121         .of_match_table = sun50i_a64_r_pinctrl_match,
0122     },
0123 };
0124 builtin_platform_driver(sun50i_a64_r_pinctrl_driver);