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OSCL-LXR
 
 

     

0001 /*
0002  * Allwinner A10 SoCs pinctrl driver.
0003  *
0004  * Copyright (C) 2014 Maxime Ripard
0005  *
0006  * Maxime Ripard <maxime.ripard@free-electrons.com>
0007  *
0008  * This file is licensed under the terms of the GNU General Public
0009  * License version 2.  This program is licensed "as is" without any
0010  * warranty of any kind, whether express or implied.
0011  */
0012 
0013 #include <linux/init.h>
0014 #include <linux/platform_device.h>
0015 #include <linux/of.h>
0016 #include <linux/of_device.h>
0017 #include <linux/pinctrl/pinctrl.h>
0018 
0019 #include "pinctrl-sunxi.h"
0020 
0021 static const struct sunxi_desc_pin sun4i_a10_pins[] = {
0022     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
0023           SUNXI_FUNCTION(0x0, "gpio_in"),
0024           SUNXI_FUNCTION(0x1, "gpio_out"),
0025           SUNXI_FUNCTION(0x2, "emac"),      /* ERXD3 */
0026           SUNXI_FUNCTION(0x3, "spi1"),      /* CS0 */
0027           SUNXI_FUNCTION(0x4, "uart2"),     /* RTS */
0028           SUNXI_FUNCTION_VARIANT(0x5, "gmac",   /* GRXD3 */
0029                      PINCTRL_SUN7I_A20 |
0030                      PINCTRL_SUN8I_R40)),
0031     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
0032           SUNXI_FUNCTION(0x0, "gpio_in"),
0033           SUNXI_FUNCTION(0x1, "gpio_out"),
0034           SUNXI_FUNCTION(0x2, "emac"),      /* ERXD2 */
0035           SUNXI_FUNCTION(0x3, "spi1"),      /* CLK */
0036           SUNXI_FUNCTION(0x4, "uart2"),     /* CTS */
0037           SUNXI_FUNCTION_VARIANT(0x5, "gmac",   /* GRXD2 */
0038                      PINCTRL_SUN7I_A20 |
0039                      PINCTRL_SUN8I_R40)),
0040     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
0041           SUNXI_FUNCTION(0x0, "gpio_in"),
0042           SUNXI_FUNCTION(0x1, "gpio_out"),
0043           SUNXI_FUNCTION(0x2, "emac"),      /* ERXD1 */
0044           SUNXI_FUNCTION(0x3, "spi1"),      /* MOSI */
0045           SUNXI_FUNCTION(0x4, "uart2"),     /* TX */
0046           SUNXI_FUNCTION_VARIANT(0x5, "gmac",   /* GRXD1 */
0047                      PINCTRL_SUN7I_A20 |
0048                      PINCTRL_SUN8I_R40)),
0049     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
0050           SUNXI_FUNCTION(0x0, "gpio_in"),
0051           SUNXI_FUNCTION(0x1, "gpio_out"),
0052           SUNXI_FUNCTION(0x2, "emac"),      /* ERXD0 */
0053           SUNXI_FUNCTION(0x3, "spi1"),      /* MISO */
0054           SUNXI_FUNCTION(0x4, "uart2"),     /* RX */
0055           SUNXI_FUNCTION_VARIANT(0x5, "gmac",   /* GRXD0 */
0056                      PINCTRL_SUN7I_A20 |
0057                      PINCTRL_SUN8I_R40)),
0058     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
0059           SUNXI_FUNCTION(0x0, "gpio_in"),
0060           SUNXI_FUNCTION(0x1, "gpio_out"),
0061           SUNXI_FUNCTION(0x2, "emac"),      /* ETXD3 */
0062           SUNXI_FUNCTION(0x3, "spi1"),      /* CS1 */
0063           SUNXI_FUNCTION_VARIANT(0x5, "gmac",   /* GTXD3 */
0064                      PINCTRL_SUN7I_A20 |
0065                      PINCTRL_SUN8I_R40)),
0066     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
0067           SUNXI_FUNCTION(0x0, "gpio_in"),
0068           SUNXI_FUNCTION(0x1, "gpio_out"),
0069           SUNXI_FUNCTION(0x2, "emac"),      /* ETXD2 */
0070           SUNXI_FUNCTION(0x3, "spi3"),      /* CS0 */
0071           SUNXI_FUNCTION_VARIANT(0x5, "gmac",   /* GTXD2 */
0072                      PINCTRL_SUN7I_A20 |
0073                      PINCTRL_SUN8I_R40)),
0074     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
0075           SUNXI_FUNCTION(0x0, "gpio_in"),
0076           SUNXI_FUNCTION(0x1, "gpio_out"),
0077           SUNXI_FUNCTION(0x2, "emac"),      /* ETXD1 */
0078           SUNXI_FUNCTION(0x3, "spi3"),      /* CLK */
0079           SUNXI_FUNCTION_VARIANT(0x5, "gmac",   /* GTXD1 */
0080                      PINCTRL_SUN7I_A20 |
0081                      PINCTRL_SUN8I_R40)),
0082     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
0083           SUNXI_FUNCTION(0x0, "gpio_in"),
0084           SUNXI_FUNCTION(0x1, "gpio_out"),
0085           SUNXI_FUNCTION(0x2, "emac"),      /* ETXD0 */
0086           SUNXI_FUNCTION(0x3, "spi3"),      /* MOSI */
0087           SUNXI_FUNCTION_VARIANT(0x5, "gmac",   /* GTXD0 */
0088                      PINCTRL_SUN7I_A20 |
0089                      PINCTRL_SUN8I_R40)),
0090     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
0091           SUNXI_FUNCTION(0x0, "gpio_in"),
0092           SUNXI_FUNCTION(0x1, "gpio_out"),
0093           SUNXI_FUNCTION(0x2, "emac"),      /* ERXCK */
0094           SUNXI_FUNCTION(0x3, "spi3"),      /* MISO */
0095           SUNXI_FUNCTION_VARIANT(0x5, "gmac",   /* GRXCK */
0096                      PINCTRL_SUN7I_A20 |
0097                      PINCTRL_SUN8I_R40)),
0098     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
0099           SUNXI_FUNCTION(0x0, "gpio_in"),
0100           SUNXI_FUNCTION(0x1, "gpio_out"),
0101           SUNXI_FUNCTION(0x2, "emac"),      /* ERXERR */
0102           SUNXI_FUNCTION(0x3, "spi3"),      /* CS1 */
0103           SUNXI_FUNCTION_VARIANT(0x5, "gmac",   /* GNULL / ERXERR */
0104                      PINCTRL_SUN7I_A20 |
0105                      PINCTRL_SUN8I_R40),
0106           SUNXI_FUNCTION_VARIANT(0x6, "i2s1",   /* MCLK */
0107                      PINCTRL_SUN7I_A20 |
0108                      PINCTRL_SUN8I_R40)),
0109     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10),
0110           SUNXI_FUNCTION(0x0, "gpio_in"),
0111           SUNXI_FUNCTION(0x1, "gpio_out"),
0112           SUNXI_FUNCTION(0x2, "emac"),      /* ERXDV */
0113           SUNXI_FUNCTION(0x4, "uart1"),     /* TX */
0114           SUNXI_FUNCTION_VARIANT(0x5, "gmac",   /* GRXDV */
0115                      PINCTRL_SUN7I_A20 |
0116                      PINCTRL_SUN8I_R40)),
0117     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11),
0118           SUNXI_FUNCTION(0x0, "gpio_in"),
0119           SUNXI_FUNCTION(0x1, "gpio_out"),
0120           SUNXI_FUNCTION(0x2, "emac"),      /* EMDC */
0121           SUNXI_FUNCTION(0x4, "uart1"),     /* RX */
0122           SUNXI_FUNCTION_VARIANT(0x5, "gmac",   /* EMDC */
0123                      PINCTRL_SUN7I_A20 |
0124                      PINCTRL_SUN8I_R40)),
0125     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12),
0126           SUNXI_FUNCTION(0x0, "gpio_in"),
0127           SUNXI_FUNCTION(0x1, "gpio_out"),
0128           SUNXI_FUNCTION(0x2, "emac"),      /* EMDIO */
0129           SUNXI_FUNCTION(0x3, "uart6"),     /* TX */
0130           SUNXI_FUNCTION(0x4, "uart1"),     /* RTS */
0131           SUNXI_FUNCTION_VARIANT(0x5, "gmac",   /* EMDIO */
0132                      PINCTRL_SUN7I_A20 |
0133                      PINCTRL_SUN8I_R40)),
0134     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 13),
0135           SUNXI_FUNCTION(0x0, "gpio_in"),
0136           SUNXI_FUNCTION(0x1, "gpio_out"),
0137           SUNXI_FUNCTION(0x2, "emac"),      /* ETXEN */
0138           SUNXI_FUNCTION(0x3, "uart6"),     /* RX */
0139           SUNXI_FUNCTION(0x4, "uart1"),     /* CTS */
0140           SUNXI_FUNCTION_VARIANT(0x5, "gmac",   /* GTXCTL / ETXEN */
0141                      PINCTRL_SUN7I_A20 |
0142                      PINCTRL_SUN8I_R40)),
0143     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 14),
0144           SUNXI_FUNCTION(0x0, "gpio_in"),
0145           SUNXI_FUNCTION(0x1, "gpio_out"),
0146           SUNXI_FUNCTION(0x2, "emac"),      /* ETXCK */
0147           SUNXI_FUNCTION(0x3, "uart7"),     /* TX */
0148           SUNXI_FUNCTION(0x4, "uart1"),     /* DTR */
0149           SUNXI_FUNCTION_VARIANT(0x5, "gmac",   /* GNULL / ETXCK */
0150                      PINCTRL_SUN7I_A20 |
0151                      PINCTRL_SUN8I_R40),
0152           SUNXI_FUNCTION_VARIANT(0x6, "i2s1",   /* BCLK */
0153                      PINCTRL_SUN7I_A20 |
0154                      PINCTRL_SUN8I_R40)),
0155     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 15),
0156           SUNXI_FUNCTION(0x0, "gpio_in"),
0157           SUNXI_FUNCTION(0x1, "gpio_out"),
0158           SUNXI_FUNCTION(0x2, "emac"),      /* ECRS */
0159           SUNXI_FUNCTION(0x3, "uart7"),     /* RX */
0160           SUNXI_FUNCTION(0x4, "uart1"),     /* DSR */
0161           SUNXI_FUNCTION_VARIANT(0x5, "gmac",   /* GTXCK / ECRS */
0162                      PINCTRL_SUN7I_A20 |
0163                      PINCTRL_SUN8I_R40),
0164           SUNXI_FUNCTION_VARIANT(0x6, "i2s1",   /* LRCK */
0165                      PINCTRL_SUN7I_A20 |
0166                      PINCTRL_SUN8I_R40)),
0167     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 16),
0168           SUNXI_FUNCTION(0x0, "gpio_in"),
0169           SUNXI_FUNCTION(0x1, "gpio_out"),
0170           SUNXI_FUNCTION(0x2, "emac"),      /* ECOL */
0171           SUNXI_FUNCTION(0x3, "can"),       /* TX */
0172           SUNXI_FUNCTION(0x4, "uart1"),     /* DCD */
0173           SUNXI_FUNCTION_VARIANT(0x5, "gmac",   /* GCLKIN / ECOL */
0174                      PINCTRL_SUN7I_A20 |
0175                      PINCTRL_SUN8I_R40),
0176           SUNXI_FUNCTION_VARIANT(0x6, "i2s1",   /* DO */
0177                      PINCTRL_SUN7I_A20 |
0178                      PINCTRL_SUN8I_R40)),
0179     SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 17),
0180           SUNXI_FUNCTION(0x0, "gpio_in"),
0181           SUNXI_FUNCTION(0x1, "gpio_out"),
0182           SUNXI_FUNCTION(0x2, "emac"),      /* ETXERR */
0183           SUNXI_FUNCTION(0x3, "can"),       /* RX */
0184           SUNXI_FUNCTION(0x4, "uart1"),     /* RING */
0185           SUNXI_FUNCTION_VARIANT(0x5, "gmac",   /* GNULL / ETXERR */
0186                      PINCTRL_SUN7I_A20 |
0187                      PINCTRL_SUN8I_R40),
0188           SUNXI_FUNCTION_VARIANT(0x6, "i2s1",   /* DI */
0189                      PINCTRL_SUN7I_A20 |
0190                      PINCTRL_SUN8I_R40)),
0191     /* Hole */
0192     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
0193           SUNXI_FUNCTION(0x0, "gpio_in"),
0194           SUNXI_FUNCTION(0x1, "gpio_out"),
0195           SUNXI_FUNCTION(0x2, "i2c0"),      /* SCK */
0196           SUNXI_FUNCTION_VARIANT(0x3, "pll_lock_dbg",
0197                      PINCTRL_SUN8I_R40)),
0198     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
0199           SUNXI_FUNCTION(0x0, "gpio_in"),
0200           SUNXI_FUNCTION(0x1, "gpio_out"),
0201           SUNXI_FUNCTION(0x2, "i2c0")),     /* SDA */
0202     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
0203           SUNXI_FUNCTION(0x0, "gpio_in"),
0204           SUNXI_FUNCTION(0x1, "gpio_out"),
0205           SUNXI_FUNCTION_VARIANT(0x2, "pwm",    /* PWM0 */
0206                      PINCTRL_SUN4I_A10 |
0207                      PINCTRL_SUN7I_A20),
0208           SUNXI_FUNCTION_VARIANT(0x3, "pwm",    /* PWM0 */
0209                      PINCTRL_SUN8I_R40)),
0210     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
0211           SUNXI_FUNCTION(0x0, "gpio_in"),
0212           SUNXI_FUNCTION(0x1, "gpio_out"),
0213           SUNXI_FUNCTION_VARIANT(0x2, "ir0",    /* TX */
0214                      PINCTRL_SUN4I_A10 |
0215                      PINCTRL_SUN7I_A20),
0216           SUNXI_FUNCTION_VARIANT(0x3, "pwm",    /* PWM1 */
0217                      PINCTRL_SUN8I_R40),
0218         /*
0219          * The SPDIF block is not referenced at all in the A10 user
0220          * manual. However it is described in the code leaked and the
0221          * pin descriptions are declared in the A20 user manual which
0222          * is pin compatible with this device.
0223          */
0224           SUNXI_FUNCTION(0x4, "spdif")),        /* SPDIF MCLK */
0225     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
0226           SUNXI_FUNCTION(0x0, "gpio_in"),
0227           SUNXI_FUNCTION(0x1, "gpio_out"),
0228           SUNXI_FUNCTION(0x2, "ir0")),      /* RX */
0229     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
0230           SUNXI_FUNCTION(0x0, "gpio_in"),
0231           SUNXI_FUNCTION(0x1, "gpio_out"),
0232           /*
0233            * On A10 there's only one I2S controller and the pin group
0234            * is simply named "i2s". On A20 there's two and thus it's
0235            * renamed to "i2s0". Deal with these name here, in order
0236            * to satisfy existing device trees.
0237            */
0238           SUNXI_FUNCTION_VARIANT(0x2, "i2s",    /* MCLK */
0239                      PINCTRL_SUN4I_A10),
0240           SUNXI_FUNCTION_VARIANT(0x2, "i2s0",   /* MCLK */
0241                      PINCTRL_SUN7I_A20 |
0242                      PINCTRL_SUN8I_R40),
0243           SUNXI_FUNCTION(0x3, "ac97")),     /* MCLK */
0244     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
0245           SUNXI_FUNCTION(0x0, "gpio_in"),
0246           SUNXI_FUNCTION(0x1, "gpio_out"),
0247           SUNXI_FUNCTION_VARIANT(0x2, "i2s",    /* BCLK */
0248                      PINCTRL_SUN4I_A10),
0249           SUNXI_FUNCTION_VARIANT(0x2, "i2s0",   /* BCLK */
0250                      PINCTRL_SUN7I_A20 |
0251                      PINCTRL_SUN8I_R40),
0252           SUNXI_FUNCTION(0x3, "ac97")),     /* BCLK */
0253     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
0254           SUNXI_FUNCTION(0x0, "gpio_in"),
0255           SUNXI_FUNCTION(0x1, "gpio_out"),
0256           SUNXI_FUNCTION_VARIANT(0x2, "i2s",    /* LRCK */
0257                      PINCTRL_SUN4I_A10),
0258           SUNXI_FUNCTION_VARIANT(0x2, "i2s0",   /* LRCK */
0259                      PINCTRL_SUN7I_A20 |
0260                      PINCTRL_SUN8I_R40),
0261           SUNXI_FUNCTION(0x3, "ac97")),     /* SYNC */
0262     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8),
0263           SUNXI_FUNCTION(0x0, "gpio_in"),
0264           SUNXI_FUNCTION(0x1, "gpio_out"),
0265           SUNXI_FUNCTION_VARIANT(0x2, "i2s",    /* DO0 */
0266                      PINCTRL_SUN4I_A10),
0267           SUNXI_FUNCTION_VARIANT(0x2, "i2s0",   /* DO0 */
0268                      PINCTRL_SUN7I_A20 |
0269                      PINCTRL_SUN8I_R40),
0270           SUNXI_FUNCTION(0x3, "ac97")),     /* DO */
0271     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9),
0272           SUNXI_FUNCTION(0x0, "gpio_in"),
0273           SUNXI_FUNCTION(0x1, "gpio_out"),
0274           SUNXI_FUNCTION_VARIANT(0x2, "i2s",    /* DO1 */
0275                      PINCTRL_SUN4I_A10),
0276           SUNXI_FUNCTION_VARIANT(0x2, "i2s0",   /* DO1 */
0277                      PINCTRL_SUN7I_A20 |
0278                      PINCTRL_SUN8I_R40),
0279           SUNXI_FUNCTION_VARIANT(0x4, "pwm",    /* PWM6 */
0280                      PINCTRL_SUN8I_R40)),
0281     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 10),
0282           SUNXI_FUNCTION(0x0, "gpio_in"),
0283           SUNXI_FUNCTION(0x1, "gpio_out"),
0284           SUNXI_FUNCTION_VARIANT(0x2, "i2s",    /* DO2 */
0285                      PINCTRL_SUN4I_A10),
0286           SUNXI_FUNCTION_VARIANT(0x2, "i2s0",   /* DO2 */
0287                      PINCTRL_SUN7I_A20 |
0288                      PINCTRL_SUN8I_R40),
0289           SUNXI_FUNCTION_VARIANT(0x4, "pwm",    /* PWM7 */
0290                      PINCTRL_SUN8I_R40)),
0291     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 11),
0292           SUNXI_FUNCTION(0x0, "gpio_in"),
0293           SUNXI_FUNCTION(0x1, "gpio_out"),
0294           SUNXI_FUNCTION_VARIANT(0x2, "i2s",    /* DO3 */
0295                      PINCTRL_SUN4I_A10),
0296           SUNXI_FUNCTION_VARIANT(0x2, "i2s0",   /* DO3 */
0297                      PINCTRL_SUN7I_A20 |
0298                      PINCTRL_SUN8I_R40)),
0299     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 12),
0300           SUNXI_FUNCTION(0x0, "gpio_in"),
0301           SUNXI_FUNCTION(0x1, "gpio_out"),
0302           SUNXI_FUNCTION_VARIANT(0x2, "i2s",    /* DI */
0303                      PINCTRL_SUN4I_A10),
0304           SUNXI_FUNCTION_VARIANT(0x2, "i2s0",   /* DI */
0305                      PINCTRL_SUN7I_A20 |
0306                      PINCTRL_SUN8I_R40),
0307           SUNXI_FUNCTION(0x3, "ac97"),      /* DI */
0308         /* Undocumented mux function on A10 - See SPDIF MCLK above */
0309           SUNXI_FUNCTION_VARIANT(0x4, "spdif",  /* SPDIF IN */
0310                      PINCTRL_SUN4I_A10 |
0311                      PINCTRL_SUN7I_A20)),
0312     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 13),
0313           SUNXI_FUNCTION(0x0, "gpio_in"),
0314           SUNXI_FUNCTION(0x1, "gpio_out"),
0315           SUNXI_FUNCTION(0x2, "spi2"),      /* CS1 */
0316         /* Undocumented mux function on A10 - See SPDIF MCLK above */
0317           SUNXI_FUNCTION(0x4, "spdif")),        /* SPDIF OUT */
0318     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 14),
0319           SUNXI_FUNCTION(0x0, "gpio_in"),
0320           SUNXI_FUNCTION(0x1, "gpio_out"),
0321           SUNXI_FUNCTION(0x2, "spi2"),      /* CS0 */
0322           SUNXI_FUNCTION(0x3, "jtag")),     /* MS0 */
0323     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 15),
0324           SUNXI_FUNCTION(0x0, "gpio_in"),
0325           SUNXI_FUNCTION(0x1, "gpio_out"),
0326           SUNXI_FUNCTION(0x2, "spi2"),      /* CLK */
0327           SUNXI_FUNCTION(0x3, "jtag")),     /* CK0 */
0328     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 16),
0329           SUNXI_FUNCTION(0x0, "gpio_in"),
0330           SUNXI_FUNCTION(0x1, "gpio_out"),
0331           SUNXI_FUNCTION(0x2, "spi2"),      /* MOSI */
0332           SUNXI_FUNCTION(0x3, "jtag")),     /* DO0 */
0333     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 17),
0334           SUNXI_FUNCTION(0x0, "gpio_in"),
0335           SUNXI_FUNCTION(0x1, "gpio_out"),
0336           SUNXI_FUNCTION(0x2, "spi2"),      /* MISO */
0337           SUNXI_FUNCTION(0x3, "jtag")),     /* DI0 */
0338     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 18),
0339           SUNXI_FUNCTION(0x0, "gpio_in"),
0340           SUNXI_FUNCTION(0x1, "gpio_out"),
0341           SUNXI_FUNCTION(0x2, "i2c1")),     /* SCK */
0342     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 19),
0343           SUNXI_FUNCTION(0x0, "gpio_in"),
0344           SUNXI_FUNCTION(0x1, "gpio_out"),
0345           SUNXI_FUNCTION(0x2, "i2c1")),     /* SDA */
0346     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 20),
0347           SUNXI_FUNCTION(0x0, "gpio_in"),
0348           SUNXI_FUNCTION(0x1, "gpio_out"),
0349           SUNXI_FUNCTION(0x2, "i2c2"),      /* SCK */
0350           SUNXI_FUNCTION_VARIANT(0x4, "pwm",    /* PWM4 */
0351                      PINCTRL_SUN8I_R40)),
0352     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 21),
0353           SUNXI_FUNCTION(0x0, "gpio_in"),
0354           SUNXI_FUNCTION(0x1, "gpio_out"),
0355           SUNXI_FUNCTION(0x2, "i2c2"),      /* SDA */
0356           SUNXI_FUNCTION_VARIANT(0x4, "pwm",    /* PWM5 */
0357                      PINCTRL_SUN8I_R40)),
0358     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 22),
0359           SUNXI_FUNCTION(0x0, "gpio_in"),
0360           SUNXI_FUNCTION(0x1, "gpio_out"),
0361           SUNXI_FUNCTION(0x2, "uart0"),     /* TX */
0362           SUNXI_FUNCTION_VARIANT(0x3, "ir1",    /* TX */
0363                      PINCTRL_SUN4I_A10 |
0364                      PINCTRL_SUN7I_A20)),
0365     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 23),
0366           SUNXI_FUNCTION(0x0, "gpio_in"),
0367           SUNXI_FUNCTION(0x1, "gpio_out"),
0368           SUNXI_FUNCTION(0x2, "uart0"),     /* RX */
0369           SUNXI_FUNCTION(0x3, "ir1")),      /* RX */
0370     /* Hole */
0371     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
0372           SUNXI_FUNCTION(0x0, "gpio_in"),
0373           SUNXI_FUNCTION(0x1, "gpio_out"),
0374           SUNXI_FUNCTION(0x2, "nand0"),     /* NWE */
0375           SUNXI_FUNCTION(0x3, "spi0")),     /* MOSI */
0376     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
0377           SUNXI_FUNCTION(0x0, "gpio_in"),
0378           SUNXI_FUNCTION(0x1, "gpio_out"),
0379           SUNXI_FUNCTION(0x2, "nand0"),     /* NALE */
0380           SUNXI_FUNCTION(0x3, "spi0")),     /* MISO */
0381     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
0382           SUNXI_FUNCTION(0x0, "gpio_in"),
0383           SUNXI_FUNCTION(0x1, "gpio_out"),
0384           SUNXI_FUNCTION(0x2, "nand0"),     /* NCLE */
0385           SUNXI_FUNCTION(0x3, "spi0")),     /* SCK */
0386     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
0387           SUNXI_FUNCTION(0x0, "gpio_in"),
0388           SUNXI_FUNCTION(0x1, "gpio_out"),
0389           SUNXI_FUNCTION(0x2, "nand0")),    /* NCE1 */
0390     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
0391           SUNXI_FUNCTION(0x0, "gpio_in"),
0392           SUNXI_FUNCTION(0x1, "gpio_out"),
0393           SUNXI_FUNCTION(0x2, "nand0")),    /* NCE0 */
0394     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
0395           SUNXI_FUNCTION(0x0, "gpio_in"),
0396           SUNXI_FUNCTION(0x1, "gpio_out"),
0397           SUNXI_FUNCTION(0x2, "nand0"),     /* NRE# */
0398           SUNXI_FUNCTION_VARIANT(0x3, "mmc2",   /* DS */
0399                      PINCTRL_SUN8I_R40)),
0400     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
0401           SUNXI_FUNCTION(0x0, "gpio_in"),
0402           SUNXI_FUNCTION(0x1, "gpio_out"),
0403           SUNXI_FUNCTION(0x2, "nand0"),     /* NRB0 */
0404           SUNXI_FUNCTION(0x3, "mmc2")),     /* CMD */
0405     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
0406           SUNXI_FUNCTION(0x0, "gpio_in"),
0407           SUNXI_FUNCTION(0x1, "gpio_out"),
0408           SUNXI_FUNCTION(0x2, "nand0"),     /* NRB1 */
0409           SUNXI_FUNCTION(0x3, "mmc2")),     /* CLK */
0410     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
0411           SUNXI_FUNCTION(0x0, "gpio_in"),
0412           SUNXI_FUNCTION(0x1, "gpio_out"),
0413           SUNXI_FUNCTION(0x2, "nand0"),     /* NDQ0 */
0414           SUNXI_FUNCTION(0x3, "mmc2")),     /* D0 */
0415     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
0416           SUNXI_FUNCTION(0x0, "gpio_in"),
0417           SUNXI_FUNCTION(0x1, "gpio_out"),
0418           SUNXI_FUNCTION(0x2, "nand0"),     /* NDQ1 */
0419           SUNXI_FUNCTION(0x3, "mmc2")),     /* D1 */
0420     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
0421           SUNXI_FUNCTION(0x0, "gpio_in"),
0422           SUNXI_FUNCTION(0x1, "gpio_out"),
0423           SUNXI_FUNCTION(0x2, "nand0"),     /* NDQ2 */
0424           SUNXI_FUNCTION(0x3, "mmc2")),     /* D2 */
0425     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
0426           SUNXI_FUNCTION(0x0, "gpio_in"),
0427           SUNXI_FUNCTION(0x1, "gpio_out"),
0428           SUNXI_FUNCTION(0x2, "nand0"),     /* NDQ3 */
0429           SUNXI_FUNCTION(0x3, "mmc2")),     /* D3 */
0430     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
0431           SUNXI_FUNCTION(0x0, "gpio_in"),
0432           SUNXI_FUNCTION(0x1, "gpio_out"),
0433           SUNXI_FUNCTION(0x2, "nand0"),     /* NDQ4 */
0434           SUNXI_FUNCTION_VARIANT(0x3, "mmc2",   /* D4 */
0435                      PINCTRL_SUN8I_R40)),
0436     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
0437           SUNXI_FUNCTION(0x0, "gpio_in"),
0438           SUNXI_FUNCTION(0x1, "gpio_out"),
0439           SUNXI_FUNCTION(0x2, "nand0"),     /* NDQ5 */
0440           SUNXI_FUNCTION_VARIANT(0x3, "mmc2",   /* D5 */
0441                      PINCTRL_SUN8I_R40)),
0442     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
0443           SUNXI_FUNCTION(0x0, "gpio_in"),
0444           SUNXI_FUNCTION(0x1, "gpio_out"),
0445           SUNXI_FUNCTION(0x2, "nand0"),     /* NDQ6 */
0446           SUNXI_FUNCTION_VARIANT(0x3, "mmc2",   /* D6 */
0447                      PINCTRL_SUN8I_R40)),
0448     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
0449           SUNXI_FUNCTION(0x0, "gpio_in"),
0450           SUNXI_FUNCTION(0x1, "gpio_out"),
0451           SUNXI_FUNCTION(0x2, "nand0"),     /* NDQ7 */
0452           SUNXI_FUNCTION_VARIANT(0x3, "mmc2",   /* D7 */
0453                      PINCTRL_SUN8I_R40)),
0454     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
0455           SUNXI_FUNCTION(0x0, "gpio_in"),
0456           SUNXI_FUNCTION(0x1, "gpio_out"),
0457           SUNXI_FUNCTION(0x2, "nand0")),    /* NWP */
0458     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17),
0459           SUNXI_FUNCTION(0x0, "gpio_in"),
0460           SUNXI_FUNCTION(0x1, "gpio_out"),
0461           SUNXI_FUNCTION(0x2, "nand0")),    /* NCE2 */
0462     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18),
0463           SUNXI_FUNCTION(0x0, "gpio_in"),
0464           SUNXI_FUNCTION(0x1, "gpio_out"),
0465           SUNXI_FUNCTION(0x2, "nand0")),    /* NCE3 */
0466     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 19),
0467           SUNXI_FUNCTION(0x0, "gpio_in"),
0468           SUNXI_FUNCTION(0x1, "gpio_out"),
0469           SUNXI_FUNCTION(0x2, "nand0"),     /* NCE4 */
0470           SUNXI_FUNCTION(0x3, "spi2")),     /* CS0 */
0471     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 20),
0472           SUNXI_FUNCTION(0x0, "gpio_in"),
0473           SUNXI_FUNCTION(0x1, "gpio_out"),
0474           SUNXI_FUNCTION(0x2, "nand0"),     /* NCE5 */
0475           SUNXI_FUNCTION(0x3, "spi2")),     /* CLK */
0476     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 21),
0477           SUNXI_FUNCTION(0x0, "gpio_in"),
0478           SUNXI_FUNCTION(0x1, "gpio_out"),
0479           SUNXI_FUNCTION(0x2, "nand0"),     /* NCE6 */
0480           SUNXI_FUNCTION(0x3, "spi2")),     /* MOSI */
0481     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 22),
0482           SUNXI_FUNCTION(0x0, "gpio_in"),
0483           SUNXI_FUNCTION(0x1, "gpio_out"),
0484           SUNXI_FUNCTION(0x2, "nand0"),     /* NCE7 */
0485           SUNXI_FUNCTION(0x3, "spi2")),     /* MISO */
0486     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 23),
0487           SUNXI_FUNCTION(0x0, "gpio_in"),
0488           SUNXI_FUNCTION(0x1, "gpio_out"),
0489           SUNXI_FUNCTION(0x3, "spi0")),     /* CS0 */
0490     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 24),
0491           SUNXI_FUNCTION(0x0, "gpio_in"),
0492           SUNXI_FUNCTION(0x1, "gpio_out"),
0493           SUNXI_FUNCTION(0x2, "nand0"),     /* NDQS */
0494           SUNXI_FUNCTION_VARIANT(0x3, "mmc2",   /* RST */
0495                      PINCTRL_SUN8I_R40)),
0496     /* Hole */
0497     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
0498           SUNXI_FUNCTION(0x0, "gpio_in"),
0499           SUNXI_FUNCTION(0x1, "gpio_out"),
0500           SUNXI_FUNCTION(0x2, "lcd0"),      /* D0 */
0501           SUNXI_FUNCTION(0x3, "lvds0")),    /* VP0 */
0502     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
0503           SUNXI_FUNCTION(0x0, "gpio_in"),
0504           SUNXI_FUNCTION(0x1, "gpio_out"),
0505           SUNXI_FUNCTION(0x2, "lcd0"),      /* D1 */
0506           SUNXI_FUNCTION(0x3, "lvds0")),    /* VN0 */
0507     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
0508           SUNXI_FUNCTION(0x0, "gpio_in"),
0509           SUNXI_FUNCTION(0x1, "gpio_out"),
0510           SUNXI_FUNCTION(0x2, "lcd0"),      /* D2 */
0511           SUNXI_FUNCTION(0x3, "lvds0")),    /* VP1 */
0512     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
0513           SUNXI_FUNCTION(0x0, "gpio_in"),
0514           SUNXI_FUNCTION(0x1, "gpio_out"),
0515           SUNXI_FUNCTION(0x2, "lcd0"),      /* D3 */
0516           SUNXI_FUNCTION(0x3, "lvds0")),    /* VN1 */
0517     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
0518           SUNXI_FUNCTION(0x0, "gpio_in"),
0519           SUNXI_FUNCTION(0x1, "gpio_out"),
0520           SUNXI_FUNCTION(0x2, "lcd0"),      /* D4 */
0521           SUNXI_FUNCTION(0x3, "lvds0")),    /* VP2 */
0522     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
0523           SUNXI_FUNCTION(0x0, "gpio_in"),
0524           SUNXI_FUNCTION(0x1, "gpio_out"),
0525           SUNXI_FUNCTION(0x2, "lcd0"),      /* D5 */
0526           SUNXI_FUNCTION(0x3, "lvds0")),    /* VN2 */
0527     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
0528           SUNXI_FUNCTION(0x0, "gpio_in"),
0529           SUNXI_FUNCTION(0x1, "gpio_out"),
0530           SUNXI_FUNCTION(0x2, "lcd0"),      /* D6 */
0531           SUNXI_FUNCTION(0x3, "lvds0")),    /* VPC */
0532     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
0533           SUNXI_FUNCTION(0x0, "gpio_in"),
0534           SUNXI_FUNCTION(0x1, "gpio_out"),
0535           SUNXI_FUNCTION(0x2, "lcd0"),      /* D7 */
0536           SUNXI_FUNCTION(0x3, "lvds0")),    /* VNC */
0537     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
0538           SUNXI_FUNCTION(0x0, "gpio_in"),
0539           SUNXI_FUNCTION(0x1, "gpio_out"),
0540           SUNXI_FUNCTION(0x2, "lcd0"),      /* D8 */
0541           SUNXI_FUNCTION(0x3, "lvds0")),    /* VP3 */
0542     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
0543           SUNXI_FUNCTION(0x0, "gpio_in"),
0544           SUNXI_FUNCTION(0x1, "gpio_out"),
0545           SUNXI_FUNCTION(0x2, "lcd0"),      /* D9 */
0546           SUNXI_FUNCTION(0x3, "lvds0")),    /* VM3 */
0547     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
0548           SUNXI_FUNCTION(0x0, "gpio_in"),
0549           SUNXI_FUNCTION(0x1, "gpio_out"),
0550           SUNXI_FUNCTION(0x2, "lcd0"),      /* D10 */
0551           SUNXI_FUNCTION(0x3, "lvds1")),    /* VP0 */
0552     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
0553           SUNXI_FUNCTION(0x0, "gpio_in"),
0554           SUNXI_FUNCTION(0x1, "gpio_out"),
0555           SUNXI_FUNCTION(0x2, "lcd0"),      /* D11 */
0556           SUNXI_FUNCTION(0x3, "lvds1")),    /* VN0 */
0557     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
0558           SUNXI_FUNCTION(0x0, "gpio_in"),
0559           SUNXI_FUNCTION(0x1, "gpio_out"),
0560           SUNXI_FUNCTION(0x2, "lcd0"),      /* D12 */
0561           SUNXI_FUNCTION(0x3, "lvds1")),    /* VP1 */
0562     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
0563           SUNXI_FUNCTION(0x0, "gpio_in"),
0564           SUNXI_FUNCTION(0x1, "gpio_out"),
0565           SUNXI_FUNCTION(0x2, "lcd0"),      /* D13 */
0566           SUNXI_FUNCTION(0x3, "lvds1")),    /* VN1 */
0567     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
0568           SUNXI_FUNCTION(0x0, "gpio_in"),
0569           SUNXI_FUNCTION(0x1, "gpio_out"),
0570           SUNXI_FUNCTION(0x2, "lcd0"),      /* D14 */
0571           SUNXI_FUNCTION(0x3, "lvds1")),    /* VP2 */
0572     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
0573           SUNXI_FUNCTION(0x0, "gpio_in"),
0574           SUNXI_FUNCTION(0x1, "gpio_out"),
0575           SUNXI_FUNCTION(0x2, "lcd0"),      /* D15 */
0576           SUNXI_FUNCTION(0x3, "lvds1")),    /* VN2 */
0577     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
0578           SUNXI_FUNCTION(0x0, "gpio_in"),
0579           SUNXI_FUNCTION(0x1, "gpio_out"),
0580           SUNXI_FUNCTION(0x2, "lcd0"),      /* D16 */
0581           SUNXI_FUNCTION(0x3, "lvds1")),    /* VPC */
0582     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
0583           SUNXI_FUNCTION(0x0, "gpio_in"),
0584           SUNXI_FUNCTION(0x1, "gpio_out"),
0585           SUNXI_FUNCTION(0x2, "lcd0"),      /* D17 */
0586           SUNXI_FUNCTION(0x3, "lvds1")),    /* VNC */
0587     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
0588           SUNXI_FUNCTION(0x0, "gpio_in"),
0589           SUNXI_FUNCTION(0x1, "gpio_out"),
0590           SUNXI_FUNCTION(0x2, "lcd0"),      /* D18 */
0591           SUNXI_FUNCTION(0x3, "lvds1")),    /* VP3 */
0592     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
0593           SUNXI_FUNCTION(0x0, "gpio_in"),
0594           SUNXI_FUNCTION(0x1, "gpio_out"),
0595           SUNXI_FUNCTION(0x2, "lcd0"),      /* D19 */
0596           SUNXI_FUNCTION(0x3, "lvds1")),    /* VN3 */
0597     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
0598           SUNXI_FUNCTION(0x0, "gpio_in"),
0599           SUNXI_FUNCTION(0x1, "gpio_out"),
0600           SUNXI_FUNCTION(0x2, "lcd0"),      /* D20 */
0601           SUNXI_FUNCTION(0x3, "csi1")),     /* MCLK */
0602     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
0603           SUNXI_FUNCTION(0x0, "gpio_in"),
0604           SUNXI_FUNCTION(0x1, "gpio_out"),
0605           SUNXI_FUNCTION(0x2, "lcd0"),      /* D21 */
0606           SUNXI_FUNCTION(0x3, "sim")),      /* VPPEN */
0607     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
0608           SUNXI_FUNCTION(0x0, "gpio_in"),
0609           SUNXI_FUNCTION(0x1, "gpio_out"),
0610           SUNXI_FUNCTION(0x2, "lcd0"),      /* D22 */
0611           SUNXI_FUNCTION(0x3, "sim")),      /* VPPPP */
0612     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
0613           SUNXI_FUNCTION(0x0, "gpio_in"),
0614           SUNXI_FUNCTION(0x1, "gpio_out"),
0615           SUNXI_FUNCTION(0x2, "lcd0"),      /* D23 */
0616           SUNXI_FUNCTION(0x3, "sim")),      /* DET */
0617     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
0618           SUNXI_FUNCTION(0x0, "gpio_in"),
0619           SUNXI_FUNCTION(0x1, "gpio_out"),
0620           SUNXI_FUNCTION(0x2, "lcd0"),      /* CLK */
0621           SUNXI_FUNCTION(0x3, "sim")),      /* VCCEN */
0622     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
0623           SUNXI_FUNCTION(0x0, "gpio_in"),
0624           SUNXI_FUNCTION(0x1, "gpio_out"),
0625           SUNXI_FUNCTION(0x2, "lcd0"),      /* DE */
0626           SUNXI_FUNCTION(0x3, "sim")),      /* RST */
0627     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
0628           SUNXI_FUNCTION(0x0, "gpio_in"),
0629           SUNXI_FUNCTION(0x1, "gpio_out"),
0630           SUNXI_FUNCTION(0x2, "lcd0"),      /* HSYNC */
0631           SUNXI_FUNCTION(0x3, "sim")),      /* SCK */
0632     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
0633           SUNXI_FUNCTION(0x0, "gpio_in"),
0634           SUNXI_FUNCTION(0x1, "gpio_out"),
0635           SUNXI_FUNCTION(0x2, "lcd0"),      /* VSYNC */
0636           SUNXI_FUNCTION(0x3, "sim")),      /* SDA */
0637     /* Hole */
0638     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
0639           SUNXI_FUNCTION(0x0, "gpio_in"),
0640           SUNXI_FUNCTION(0x1, "gpio_out"),
0641           SUNXI_FUNCTION(0x2, "ts0"),       /* CLK */
0642           SUNXI_FUNCTION(0x3, "csi0")),     /* PCK */
0643     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
0644           SUNXI_FUNCTION(0x0, "gpio_in"),
0645           SUNXI_FUNCTION(0x1, "gpio_out"),
0646           SUNXI_FUNCTION(0x2, "ts0"),       /* ERR */
0647           SUNXI_FUNCTION(0x3, "csi0")),     /* CK */
0648     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
0649           SUNXI_FUNCTION(0x0, "gpio_in"),
0650           SUNXI_FUNCTION(0x1, "gpio_out"),
0651           SUNXI_FUNCTION(0x2, "ts0"),       /* SYNC */
0652           SUNXI_FUNCTION(0x3, "csi0")),     /* HSYNC */
0653     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
0654           SUNXI_FUNCTION(0x0, "gpio_in"),
0655           SUNXI_FUNCTION(0x1, "gpio_out"),
0656           SUNXI_FUNCTION(0x2, "ts0"),       /* DVLD */
0657           SUNXI_FUNCTION(0x3, "csi0")),     /* VSYNC */
0658     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
0659           SUNXI_FUNCTION(0x0, "gpio_in"),
0660           SUNXI_FUNCTION(0x1, "gpio_out"),
0661           SUNXI_FUNCTION(0x2, "ts0"),       /* D0 */
0662           SUNXI_FUNCTION(0x3, "csi0")),     /* D0 */
0663     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
0664           SUNXI_FUNCTION(0x0, "gpio_in"),
0665           SUNXI_FUNCTION(0x1, "gpio_out"),
0666           SUNXI_FUNCTION(0x2, "ts0"),       /* D1 */
0667           SUNXI_FUNCTION(0x3, "csi0"),      /* D1 */
0668           SUNXI_FUNCTION(0x4, "sim")),      /* VPPEN */
0669     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
0670           SUNXI_FUNCTION(0x0, "gpio_in"),
0671           SUNXI_FUNCTION(0x1, "gpio_out"),
0672           SUNXI_FUNCTION(0x2, "ts0"),       /* D2 */
0673           SUNXI_FUNCTION(0x3, "csi0")),     /* D2 */
0674     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
0675           SUNXI_FUNCTION(0x0, "gpio_in"),
0676           SUNXI_FUNCTION(0x1, "gpio_out"),
0677           SUNXI_FUNCTION(0x2, "ts0"),       /* D3 */
0678           SUNXI_FUNCTION(0x3, "csi0")),     /* D3 */
0679     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
0680           SUNXI_FUNCTION(0x0, "gpio_in"),
0681           SUNXI_FUNCTION(0x1, "gpio_out"),
0682           SUNXI_FUNCTION(0x2, "ts0"),       /* D4 */
0683           SUNXI_FUNCTION(0x3, "csi0")),     /* D4 */
0684     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
0685           SUNXI_FUNCTION(0x0, "gpio_in"),
0686           SUNXI_FUNCTION(0x1, "gpio_out"),
0687           SUNXI_FUNCTION(0x2, "ts0"),       /* D5 */
0688           SUNXI_FUNCTION(0x3, "csi0")),     /* D5 */
0689     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
0690           SUNXI_FUNCTION(0x0, "gpio_in"),
0691           SUNXI_FUNCTION(0x1, "gpio_out"),
0692           SUNXI_FUNCTION(0x2, "ts0"),       /* D6 */
0693           SUNXI_FUNCTION(0x3, "csi0")),     /* D6 */
0694     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
0695           SUNXI_FUNCTION(0x0, "gpio_in"),
0696           SUNXI_FUNCTION(0x1, "gpio_out"),
0697           SUNXI_FUNCTION(0x2, "ts0"),       /* D7 */
0698           SUNXI_FUNCTION(0x3, "csi0")),     /* D7 */
0699     /* Hole */
0700     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
0701           SUNXI_FUNCTION(0x0, "gpio_in"),
0702           SUNXI_FUNCTION(0x1, "gpio_out"),
0703           SUNXI_FUNCTION(0x2, "mmc0"),      /* D1 */
0704           SUNXI_FUNCTION(0x4, "jtag")),     /* MSI */
0705     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
0706           SUNXI_FUNCTION(0x0, "gpio_in"),
0707           SUNXI_FUNCTION(0x1, "gpio_out"),
0708           SUNXI_FUNCTION(0x2, "mmc0"),      /* D0 */
0709           SUNXI_FUNCTION(0x4, "jtag")),     /* DI1 */
0710     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
0711           SUNXI_FUNCTION(0x0, "gpio_in"),
0712           SUNXI_FUNCTION(0x1, "gpio_out"),
0713           SUNXI_FUNCTION(0x2, "mmc0"),      /* CLK */
0714           SUNXI_FUNCTION(0x4, "uart0")),    /* TX */
0715     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
0716           SUNXI_FUNCTION(0x0, "gpio_in"),
0717           SUNXI_FUNCTION(0x1, "gpio_out"),
0718           SUNXI_FUNCTION(0x2, "mmc0"),      /* CMD */
0719           SUNXI_FUNCTION(0x4, "jtag")),     /* DO1 */
0720     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
0721           SUNXI_FUNCTION(0x0, "gpio_in"),
0722           SUNXI_FUNCTION(0x1, "gpio_out"),
0723           SUNXI_FUNCTION(0x2, "mmc0"),      /* D3 */
0724           SUNXI_FUNCTION(0x4, "uart0")),    /* RX */
0725     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
0726           SUNXI_FUNCTION(0x0, "gpio_in"),
0727           SUNXI_FUNCTION(0x1, "gpio_out"),
0728           SUNXI_FUNCTION(0x2, "mmc0"),      /* D2 */
0729           SUNXI_FUNCTION(0x4, "jtag")),     /* CK1 */
0730     /* Hole */
0731     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
0732           SUNXI_FUNCTION(0x0, "gpio_in"),
0733           SUNXI_FUNCTION(0x1, "gpio_out"),
0734           SUNXI_FUNCTION(0x2, "ts1"),       /* CLK */
0735           SUNXI_FUNCTION(0x3, "csi1"),      /* PCK */
0736           SUNXI_FUNCTION(0x4, "mmc1")),     /* CMD */
0737     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
0738           SUNXI_FUNCTION(0x0, "gpio_in"),
0739           SUNXI_FUNCTION(0x1, "gpio_out"),
0740           SUNXI_FUNCTION(0x2, "ts1"),       /* ERR */
0741           SUNXI_FUNCTION(0x3, "csi1"),      /* CK */
0742           SUNXI_FUNCTION(0x4, "mmc1")),     /* CLK */
0743     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
0744           SUNXI_FUNCTION(0x0, "gpio_in"),
0745           SUNXI_FUNCTION(0x1, "gpio_out"),
0746           SUNXI_FUNCTION(0x2, "ts1"),       /* SYNC */
0747           SUNXI_FUNCTION(0x3, "csi1"),      /* HSYNC */
0748           SUNXI_FUNCTION(0x4, "mmc1")),     /* D0 */
0749     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
0750           SUNXI_FUNCTION(0x0, "gpio_in"),
0751           SUNXI_FUNCTION(0x1, "gpio_out"),
0752           SUNXI_FUNCTION(0x2, "ts1"),       /* DVLD */
0753           SUNXI_FUNCTION(0x3, "csi1"),      /* VSYNC */
0754           SUNXI_FUNCTION(0x4, "mmc1")),     /* D1 */
0755     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
0756           SUNXI_FUNCTION(0x0, "gpio_in"),
0757           SUNXI_FUNCTION(0x1, "gpio_out"),
0758           SUNXI_FUNCTION(0x2, "ts1"),       /* D0 */
0759           SUNXI_FUNCTION(0x3, "csi1"),      /* D0 */
0760           SUNXI_FUNCTION(0x4, "mmc1"),      /* D2 */
0761           SUNXI_FUNCTION(0x5, "csi0")),     /* D8 */
0762     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
0763           SUNXI_FUNCTION(0x0, "gpio_in"),
0764           SUNXI_FUNCTION(0x1, "gpio_out"),
0765           SUNXI_FUNCTION(0x2, "ts1"),       /* D1 */
0766           SUNXI_FUNCTION(0x3, "csi1"),      /* D1 */
0767           SUNXI_FUNCTION(0x4, "mmc1"),      /* D3 */
0768           SUNXI_FUNCTION(0x5, "csi0")),     /* D9 */
0769     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
0770           SUNXI_FUNCTION(0x0, "gpio_in"),
0771           SUNXI_FUNCTION(0x1, "gpio_out"),
0772           SUNXI_FUNCTION(0x2, "ts1"),       /* D2 */
0773           SUNXI_FUNCTION(0x3, "csi1"),      /* D2 */
0774           SUNXI_FUNCTION(0x4, "uart3"),     /* TX */
0775           SUNXI_FUNCTION(0x5, "csi0")),     /* D10 */
0776     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
0777           SUNXI_FUNCTION(0x0, "gpio_in"),
0778           SUNXI_FUNCTION(0x1, "gpio_out"),
0779           SUNXI_FUNCTION(0x2, "ts1"),       /* D3 */
0780           SUNXI_FUNCTION(0x3, "csi1"),      /* D3 */
0781           SUNXI_FUNCTION(0x4, "uart3"),     /* RX */
0782           SUNXI_FUNCTION(0x5, "csi0")),     /* D11 */
0783     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
0784           SUNXI_FUNCTION(0x0, "gpio_in"),
0785           SUNXI_FUNCTION(0x1, "gpio_out"),
0786           SUNXI_FUNCTION(0x2, "ts1"),       /* D4 */
0787           SUNXI_FUNCTION(0x3, "csi1"),      /* D4 */
0788           SUNXI_FUNCTION(0x4, "uart3"),     /* RTS */
0789           SUNXI_FUNCTION(0x5, "csi0")),     /* D12 */
0790     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
0791           SUNXI_FUNCTION(0x0, "gpio_in"),
0792           SUNXI_FUNCTION(0x1, "gpio_out"),
0793           SUNXI_FUNCTION(0x2, "ts1"),       /* D5 */
0794           SUNXI_FUNCTION(0x3, "csi1"),      /* D5 */
0795           SUNXI_FUNCTION(0x4, "uart3"),     /* CTS */
0796           SUNXI_FUNCTION(0x5, "csi0"),      /* D13 */
0797           SUNXI_FUNCTION_VARIANT(0x6, "bist",   /* RESULT0 */
0798                      PINCTRL_SUN8I_R40)),
0799     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
0800           SUNXI_FUNCTION(0x0, "gpio_in"),
0801           SUNXI_FUNCTION(0x1, "gpio_out"),
0802           SUNXI_FUNCTION(0x2, "ts1"),       /* D6 */
0803           SUNXI_FUNCTION(0x3, "csi1"),      /* D6 */
0804           SUNXI_FUNCTION(0x4, "uart4"),     /* TX */
0805           SUNXI_FUNCTION(0x5, "csi0"),      /* D14 */
0806           SUNXI_FUNCTION_VARIANT(0x6, "bist",   /* RESULT1 */
0807                      PINCTRL_SUN8I_R40)),
0808     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
0809           SUNXI_FUNCTION(0x0, "gpio_in"),
0810           SUNXI_FUNCTION(0x1, "gpio_out"),
0811           SUNXI_FUNCTION(0x2, "ts1"),       /* D7 */
0812           SUNXI_FUNCTION(0x3, "csi1"),      /* D7 */
0813           SUNXI_FUNCTION(0x4, "uart4"),     /* RX */
0814           SUNXI_FUNCTION(0x5, "csi0")),     /* D15 */
0815     /* Hole */
0816     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
0817           SUNXI_FUNCTION(0x0, "gpio_in"),
0818           SUNXI_FUNCTION(0x1, "gpio_out"),
0819           SUNXI_FUNCTION(0x2, "lcd1"),      /* D0 */
0820           SUNXI_FUNCTION_VARIANT(0x3, "pata",   /* ATAA0 */
0821                      PINCTRL_SUN4I_A10),
0822           SUNXI_FUNCTION(0x4, "uart3"),     /* TX */
0823           SUNXI_FUNCTION_IRQ(0x6, 0),       /* EINT0 */
0824           SUNXI_FUNCTION(0x7, "csi1")),     /* D0 */
0825     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
0826           SUNXI_FUNCTION(0x0, "gpio_in"),
0827           SUNXI_FUNCTION(0x1, "gpio_out"),
0828           SUNXI_FUNCTION(0x2, "lcd1"),      /* D1 */
0829           SUNXI_FUNCTION_VARIANT(0x3, "pata",   /* ATAA1 */
0830                      PINCTRL_SUN4I_A10),
0831           SUNXI_FUNCTION(0x4, "uart3"),     /* RX */
0832           SUNXI_FUNCTION_IRQ(0x6, 1),       /* EINT1 */
0833           SUNXI_FUNCTION(0x7, "csi1")),     /* D1 */
0834     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
0835           SUNXI_FUNCTION(0x0, "gpio_in"),
0836           SUNXI_FUNCTION(0x1, "gpio_out"),
0837           SUNXI_FUNCTION(0x2, "lcd1"),      /* D2 */
0838           SUNXI_FUNCTION_VARIANT(0x3, "pata",   /* ATAA2 */
0839                      PINCTRL_SUN4I_A10),
0840           SUNXI_FUNCTION(0x4, "uart3"),     /* RTS */
0841           SUNXI_FUNCTION_IRQ(0x6, 2),       /* EINT2 */
0842           SUNXI_FUNCTION(0x7, "csi1")),     /* D2 */
0843     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
0844           SUNXI_FUNCTION(0x0, "gpio_in"),
0845           SUNXI_FUNCTION(0x1, "gpio_out"),
0846           SUNXI_FUNCTION(0x2, "lcd1"),      /* D3 */
0847           SUNXI_FUNCTION_VARIANT(0x3, "pata",   /* ATAIRQ */
0848                      PINCTRL_SUN4I_A10),
0849           SUNXI_FUNCTION(0x4, "uart3"),     /* CTS */
0850           SUNXI_FUNCTION_IRQ(0x6, 3),       /* EINT3 */
0851           SUNXI_FUNCTION(0x7, "csi1")),     /* D3 */
0852     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
0853           SUNXI_FUNCTION(0x0, "gpio_in"),
0854           SUNXI_FUNCTION(0x1, "gpio_out"),
0855           SUNXI_FUNCTION(0x2, "lcd1"),      /* D4 */
0856           SUNXI_FUNCTION_VARIANT(0x3, "pata",   /* ATAD0 */
0857                      PINCTRL_SUN4I_A10),
0858           SUNXI_FUNCTION(0x4, "uart4"),     /* TX */
0859           SUNXI_FUNCTION_IRQ(0x6, 4),       /* EINT4 */
0860           SUNXI_FUNCTION(0x7, "csi1")),     /* D4 */
0861     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
0862           SUNXI_FUNCTION(0x0, "gpio_in"),
0863           SUNXI_FUNCTION(0x1, "gpio_out"),
0864           SUNXI_FUNCTION(0x2, "lcd1"),      /* D5 */
0865           SUNXI_FUNCTION_VARIANT(0x3, "pata",   /* ATAD1 */
0866                      PINCTRL_SUN4I_A10),
0867           SUNXI_FUNCTION(0x4, "uart4"),     /* RX */
0868           SUNXI_FUNCTION_IRQ(0x6, 5),       /* EINT5 */
0869           SUNXI_FUNCTION(0x7, "csi1")),     /* D5 */
0870     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
0871           SUNXI_FUNCTION(0x0, "gpio_in"),
0872           SUNXI_FUNCTION(0x1, "gpio_out"),
0873           SUNXI_FUNCTION(0x2, "lcd1"),      /* D6 */
0874           SUNXI_FUNCTION_VARIANT(0x3, "pata",   /* ATAD2 */
0875                      PINCTRL_SUN4I_A10),
0876           SUNXI_FUNCTION(0x4, "uart5"),     /* TX */
0877           SUNXI_FUNCTION_VARIANT(0x5, "ms", /* BS */
0878                      PINCTRL_SUN4I_A10 |
0879                      PINCTRL_SUN7I_A20),
0880           SUNXI_FUNCTION_IRQ(0x6, 6),       /* EINT6 */
0881           SUNXI_FUNCTION(0x7, "csi1")),     /* D6 */
0882     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
0883           SUNXI_FUNCTION(0x0, "gpio_in"),
0884           SUNXI_FUNCTION(0x1, "gpio_out"),
0885           SUNXI_FUNCTION(0x2, "lcd1"),      /* D7 */
0886           SUNXI_FUNCTION_VARIANT(0x3, "pata",   /* ATAD3 */
0887                      PINCTRL_SUN4I_A10),
0888           SUNXI_FUNCTION(0x4, "uart5"),     /* RX */
0889           SUNXI_FUNCTION_VARIANT(0x5, "ms", /* CLK */
0890                      PINCTRL_SUN4I_A10 |
0891                      PINCTRL_SUN7I_A20),
0892           SUNXI_FUNCTION_IRQ(0x6, 7),       /* EINT7 */
0893           SUNXI_FUNCTION(0x7, "csi1")),     /* D7 */
0894     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
0895           SUNXI_FUNCTION(0x0, "gpio_in"),
0896           SUNXI_FUNCTION(0x1, "gpio_out"),
0897           SUNXI_FUNCTION(0x2, "lcd1"),      /* D8 */
0898           SUNXI_FUNCTION_VARIANT(0x3, "pata",   /* ATAD4 */
0899                      PINCTRL_SUN4I_A10),
0900           SUNXI_FUNCTION_VARIANT(0x3, "emac",   /* ERXD3 */
0901                      PINCTRL_SUN7I_A20 |
0902                      PINCTRL_SUN8I_R40),
0903           SUNXI_FUNCTION(0x4, "keypad"),    /* IN0 */
0904           SUNXI_FUNCTION_VARIANT(0x5, "ms", /* D0 */
0905                      PINCTRL_SUN4I_A10 |
0906                      PINCTRL_SUN7I_A20),
0907           SUNXI_FUNCTION_IRQ(0x6, 8),       /* EINT8 */
0908           SUNXI_FUNCTION(0x7, "csi1")),     /* D8 */
0909     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
0910           SUNXI_FUNCTION(0x0, "gpio_in"),
0911           SUNXI_FUNCTION(0x1, "gpio_out"),
0912           SUNXI_FUNCTION(0x2, "lcd1"),      /* D9 */
0913           SUNXI_FUNCTION_VARIANT(0x3, "pata",   /* ATAD5 */
0914                      PINCTRL_SUN4I_A10),
0915           SUNXI_FUNCTION_VARIANT(0x3, "emac",   /* ERXD2 */
0916                      PINCTRL_SUN7I_A20 |
0917                      PINCTRL_SUN8I_R40),
0918           SUNXI_FUNCTION(0x4, "keypad"),    /* IN1 */
0919           SUNXI_FUNCTION_VARIANT(0x5, "ms", /* D1 */
0920                      PINCTRL_SUN4I_A10 |
0921                      PINCTRL_SUN7I_A20),
0922           SUNXI_FUNCTION_IRQ(0x6, 9),       /* EINT9 */
0923           SUNXI_FUNCTION(0x7, "csi1")),     /* D9 */
0924     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10),
0925           SUNXI_FUNCTION(0x0, "gpio_in"),
0926           SUNXI_FUNCTION(0x1, "gpio_out"),
0927           SUNXI_FUNCTION(0x2, "lcd1"),      /* D10 */
0928           SUNXI_FUNCTION_VARIANT(0x3, "pata",   /* ATAD6 */
0929                      PINCTRL_SUN4I_A10),
0930           SUNXI_FUNCTION_VARIANT(0x3, "emac",   /* ERXD1 */
0931                      PINCTRL_SUN7I_A20 |
0932                      PINCTRL_SUN8I_R40),
0933           SUNXI_FUNCTION(0x4, "keypad"),    /* IN2 */
0934           SUNXI_FUNCTION_VARIANT(0x5, "ms", /* D2 */
0935                      PINCTRL_SUN4I_A10 |
0936                      PINCTRL_SUN7I_A20),
0937           SUNXI_FUNCTION_IRQ(0x6, 10),      /* EINT10 */
0938           SUNXI_FUNCTION(0x7, "csi1")),     /* D10 */
0939     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11),
0940           SUNXI_FUNCTION(0x0, "gpio_in"),
0941           SUNXI_FUNCTION(0x1, "gpio_out"),
0942           SUNXI_FUNCTION(0x2, "lcd1"),      /* D11 */
0943           SUNXI_FUNCTION_VARIANT(0x3, "pata",   /* ATAD7 */
0944                      PINCTRL_SUN4I_A10),
0945           SUNXI_FUNCTION_VARIANT(0x3, "emac",   /* ERXD0 */
0946                      PINCTRL_SUN7I_A20 |
0947                      PINCTRL_SUN8I_R40),
0948           SUNXI_FUNCTION(0x4, "keypad"),    /* IN3 */
0949           SUNXI_FUNCTION_VARIANT(0x5, "ms", /* D3 */
0950                      PINCTRL_SUN4I_A10 |
0951                      PINCTRL_SUN7I_A20),
0952           SUNXI_FUNCTION_IRQ(0x6, 11),      /* EINT11 */
0953           SUNXI_FUNCTION(0x7, "csi1")),     /* D11 */
0954     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 12),
0955           SUNXI_FUNCTION(0x0, "gpio_in"),
0956           SUNXI_FUNCTION(0x1, "gpio_out"),
0957           SUNXI_FUNCTION(0x2, "lcd1"),      /* D12 */
0958           SUNXI_FUNCTION_VARIANT(0x3, "pata",   /* ATAD8 */
0959                      PINCTRL_SUN4I_A10),
0960           SUNXI_FUNCTION(0x4, "ps2"),       /* SCK1 */
0961           SUNXI_FUNCTION_IRQ(0x6, 12),      /* EINT12 */
0962           SUNXI_FUNCTION(0x7, "csi1")),     /* D12 */
0963     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 13),
0964           SUNXI_FUNCTION(0x0, "gpio_in"),
0965           SUNXI_FUNCTION(0x1, "gpio_out"),
0966           SUNXI_FUNCTION(0x2, "lcd1"),      /* D13 */
0967           SUNXI_FUNCTION_VARIANT(0x3, "pata",   /* ATAD9 */
0968                      PINCTRL_SUN4I_A10),
0969           SUNXI_FUNCTION(0x4, "ps2"),       /* SDA1 */
0970           SUNXI_FUNCTION(0x5, "sim"),       /* RST */
0971           SUNXI_FUNCTION_IRQ(0x6, 13),      /* EINT13 */
0972           SUNXI_FUNCTION(0x7, "csi1")),     /* D13 */
0973     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 14),
0974           SUNXI_FUNCTION(0x0, "gpio_in"),
0975           SUNXI_FUNCTION(0x1, "gpio_out"),
0976           SUNXI_FUNCTION(0x2, "lcd1"),      /* D14 */
0977           SUNXI_FUNCTION_VARIANT(0x3, "pata",   /* ATAD10 */
0978                      PINCTRL_SUN4I_A10),
0979           SUNXI_FUNCTION_VARIANT(0x3, "emac",   /* ETXD3 */
0980                      PINCTRL_SUN7I_A20 |
0981                      PINCTRL_SUN8I_R40),
0982           SUNXI_FUNCTION(0x4, "keypad"),    /* IN4 */
0983           SUNXI_FUNCTION(0x5, "sim"),       /* VPPEN */
0984           SUNXI_FUNCTION_IRQ(0x6, 14),      /* EINT14 */
0985           SUNXI_FUNCTION(0x7, "csi1")),     /* D14 */
0986     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 15),
0987           SUNXI_FUNCTION(0x0, "gpio_in"),
0988           SUNXI_FUNCTION(0x1, "gpio_out"),
0989           SUNXI_FUNCTION(0x2, "lcd1"),      /* D15 */
0990           SUNXI_FUNCTION_VARIANT(0x3, "pata",   /* ATAD11 */
0991                      PINCTRL_SUN4I_A10),
0992           SUNXI_FUNCTION_VARIANT(0x3, "emac",   /* ETXD2 */
0993                      PINCTRL_SUN7I_A20 |
0994                      PINCTRL_SUN8I_R40),
0995           SUNXI_FUNCTION(0x4, "keypad"),    /* IN5 */
0996           SUNXI_FUNCTION(0x5, "sim"),       /* VPPPP */
0997           SUNXI_FUNCTION_IRQ(0x6, 15),      /* EINT15 */
0998           SUNXI_FUNCTION(0x7, "csi1")),     /* D15 */
0999     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 16),
1000           SUNXI_FUNCTION(0x0, "gpio_in"),
1001           SUNXI_FUNCTION(0x1, "gpio_out"),
1002           SUNXI_FUNCTION(0x2, "lcd1"),      /* D16 */
1003           SUNXI_FUNCTION_VARIANT(0x3, "pata",   /* ATAD12 */
1004                      PINCTRL_SUN4I_A10),
1005           SUNXI_FUNCTION_VARIANT(0x3, "emac",   /* ETXD1 */
1006                      PINCTRL_SUN7I_A20 |
1007                      PINCTRL_SUN8I_R40),
1008           SUNXI_FUNCTION(0x4, "keypad"),    /* IN6 */
1009           SUNXI_FUNCTION(0x5, "sim"),       /* DET */
1010           SUNXI_FUNCTION_IRQ(0x6, 16),      /* EINT16 */
1011           SUNXI_FUNCTION(0x7, "csi1")),     /* D16 */
1012     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 17),
1013           SUNXI_FUNCTION(0x0, "gpio_in"),
1014           SUNXI_FUNCTION(0x1, "gpio_out"),
1015           SUNXI_FUNCTION(0x2, "lcd1"),      /* D17 */
1016           SUNXI_FUNCTION_VARIANT(0x3, "pata",   /* ATAD13 */
1017                      PINCTRL_SUN4I_A10),
1018           SUNXI_FUNCTION_VARIANT(0x3, "emac",   /* ETXD0 */
1019                      PINCTRL_SUN7I_A20 |
1020                      PINCTRL_SUN8I_R40),
1021           SUNXI_FUNCTION(0x4, "keypad"),    /* IN7 */
1022           SUNXI_FUNCTION(0x5, "sim"),       /* VCCEN */
1023           SUNXI_FUNCTION_IRQ(0x6, 17),      /* EINT17 */
1024           SUNXI_FUNCTION(0x7, "csi1")),     /* D17 */
1025     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 18),
1026           SUNXI_FUNCTION(0x0, "gpio_in"),
1027           SUNXI_FUNCTION(0x1, "gpio_out"),
1028           SUNXI_FUNCTION(0x2, "lcd1"),      /* D18 */
1029           SUNXI_FUNCTION_VARIANT(0x3, "pata",   /* ATAD14 */
1030                      PINCTRL_SUN4I_A10),
1031           SUNXI_FUNCTION_VARIANT(0x3, "emac",   /* ERXCK */
1032                      PINCTRL_SUN7I_A20 |
1033                      PINCTRL_SUN8I_R40),
1034           SUNXI_FUNCTION(0x4, "keypad"),    /* OUT0 */
1035           SUNXI_FUNCTION(0x5, "sim"),       /* SCK */
1036           SUNXI_FUNCTION_IRQ(0x6, 18),      /* EINT18 */
1037           SUNXI_FUNCTION(0x7, "csi1")),     /* D18 */
1038     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 19),
1039           SUNXI_FUNCTION(0x0, "gpio_in"),
1040           SUNXI_FUNCTION(0x1, "gpio_out"),
1041           SUNXI_FUNCTION(0x2, "lcd1"),      /* D19 */
1042           SUNXI_FUNCTION_VARIANT(0x3, "pata",   /* ATAD15 */
1043                      PINCTRL_SUN4I_A10),
1044           SUNXI_FUNCTION_VARIANT(0x3, "emac",   /* ERXERR */
1045                      PINCTRL_SUN7I_A20 |
1046                      PINCTRL_SUN8I_R40),
1047           SUNXI_FUNCTION(0x4, "keypad"),    /* OUT1 */
1048           SUNXI_FUNCTION(0x5, "sim"),       /* SDA */
1049           SUNXI_FUNCTION_IRQ(0x6, 19),      /* EINT19 */
1050           SUNXI_FUNCTION(0x7, "csi1")),     /* D19 */
1051     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 20),
1052           SUNXI_FUNCTION(0x0, "gpio_in"),
1053           SUNXI_FUNCTION(0x1, "gpio_out"),
1054           SUNXI_FUNCTION(0x2, "lcd1"),      /* D20 */
1055           SUNXI_FUNCTION_VARIANT(0x3, "pata",   /* ATAOE */
1056                      PINCTRL_SUN4I_A10),
1057           SUNXI_FUNCTION_VARIANT(0x3, "emac",   /* ERXDV */
1058                      PINCTRL_SUN7I_A20 |
1059                      PINCTRL_SUN8I_R40),
1060           SUNXI_FUNCTION(0x4, "can"),       /* TX */
1061           SUNXI_FUNCTION_IRQ(0x6, 20),      /* EINT20 */
1062           SUNXI_FUNCTION(0x7, "csi1")),     /* D20 */
1063     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 21),
1064           SUNXI_FUNCTION(0x0, "gpio_in"),
1065           SUNXI_FUNCTION(0x1, "gpio_out"),
1066           SUNXI_FUNCTION(0x2, "lcd1"),      /* D21 */
1067           SUNXI_FUNCTION_VARIANT(0x3, "pata",   /* ATADREQ */
1068                      PINCTRL_SUN4I_A10),
1069           SUNXI_FUNCTION_VARIANT(0x3, "emac",   /* EMDC */
1070                      PINCTRL_SUN7I_A20 |
1071                      PINCTRL_SUN8I_R40),
1072           SUNXI_FUNCTION(0x4, "can"),       /* RX */
1073           SUNXI_FUNCTION_IRQ(0x6, 21),      /* EINT21 */
1074           SUNXI_FUNCTION(0x7, "csi1")),     /* D21 */
1075     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 22),
1076           SUNXI_FUNCTION(0x0, "gpio_in"),
1077           SUNXI_FUNCTION(0x1, "gpio_out"),
1078           SUNXI_FUNCTION(0x2, "lcd1"),      /* D22 */
1079           SUNXI_FUNCTION_VARIANT(0x3, "pata",   /* ATADACK */
1080                      PINCTRL_SUN4I_A10),
1081           SUNXI_FUNCTION_VARIANT(0x3, "emac",   /* EMDIO */
1082                      PINCTRL_SUN7I_A20 |
1083                      PINCTRL_SUN8I_R40),
1084           SUNXI_FUNCTION(0x4, "keypad"),    /* OUT2 */
1085           SUNXI_FUNCTION(0x5, "mmc1"),      /* CMD */
1086           SUNXI_FUNCTION(0x7, "csi1")),     /* D22 */
1087     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 23),
1088           SUNXI_FUNCTION(0x0, "gpio_in"),
1089           SUNXI_FUNCTION(0x1, "gpio_out"),
1090           SUNXI_FUNCTION(0x2, "lcd1"),      /* D23 */
1091           SUNXI_FUNCTION_VARIANT(0x3, "pata",   /* ATACS0 */
1092                      PINCTRL_SUN4I_A10),
1093           SUNXI_FUNCTION_VARIANT(0x3, "emac",   /* ETXEN */
1094                      PINCTRL_SUN7I_A20 |
1095                      PINCTRL_SUN8I_R40),
1096           SUNXI_FUNCTION(0x4, "keypad"),    /* OUT3 */
1097           SUNXI_FUNCTION(0x5, "mmc1"),      /* CLK */
1098           SUNXI_FUNCTION(0x7, "csi1")),     /* D23 */
1099     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 24),
1100           SUNXI_FUNCTION(0x0, "gpio_in"),
1101           SUNXI_FUNCTION(0x1, "gpio_out"),
1102           SUNXI_FUNCTION(0x2, "lcd1"),      /* CLK */
1103           SUNXI_FUNCTION_VARIANT(0x3, "pata",   /* ATACS1 */
1104                      PINCTRL_SUN4I_A10),
1105           SUNXI_FUNCTION_VARIANT(0x3, "emac",   /* ETXCK */
1106                      PINCTRL_SUN7I_A20 |
1107                      PINCTRL_SUN8I_R40),
1108           SUNXI_FUNCTION(0x4, "keypad"),    /* OUT4 */
1109           SUNXI_FUNCTION(0x5, "mmc1"),      /* D0 */
1110           SUNXI_FUNCTION(0x7, "csi1")),     /* PCLK */
1111     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 25),
1112           SUNXI_FUNCTION(0x0, "gpio_in"),
1113           SUNXI_FUNCTION(0x1, "gpio_out"),
1114           SUNXI_FUNCTION(0x2, "lcd1"),      /* DE */
1115           SUNXI_FUNCTION_VARIANT(0x3, "pata",   /* ATAIORDY */
1116                      PINCTRL_SUN4I_A10),
1117           SUNXI_FUNCTION_VARIANT(0x3, "emac",   /* ECRS */
1118                      PINCTRL_SUN7I_A20 |
1119                      PINCTRL_SUN8I_R40),
1120           SUNXI_FUNCTION(0x4, "keypad"),    /* OUT5 */
1121           SUNXI_FUNCTION(0x5, "mmc1"),      /* D1 */
1122           SUNXI_FUNCTION(0x7, "csi1")),     /* FIELD */
1123     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 26),
1124           SUNXI_FUNCTION(0x0, "gpio_in"),
1125           SUNXI_FUNCTION(0x1, "gpio_out"),
1126           SUNXI_FUNCTION(0x2, "lcd1"),      /* HSYNC */
1127           SUNXI_FUNCTION_VARIANT(0x3, "pata",   /* ATAIOR */
1128                      PINCTRL_SUN4I_A10),
1129           SUNXI_FUNCTION_VARIANT(0x3, "emac",   /* ECOL */
1130                      PINCTRL_SUN7I_A20 |
1131                      PINCTRL_SUN8I_R40),
1132           SUNXI_FUNCTION(0x4, "keypad"),    /* OUT6 */
1133           SUNXI_FUNCTION(0x5, "mmc1"),      /* D2 */
1134           SUNXI_FUNCTION(0x7, "csi1")),     /* HSYNC */
1135     SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 27),
1136           SUNXI_FUNCTION(0x0, "gpio_in"),
1137           SUNXI_FUNCTION(0x1, "gpio_out"),
1138           SUNXI_FUNCTION(0x2, "lcd1"),      /* VSYNC */
1139           SUNXI_FUNCTION_VARIANT(0x3, "pata",   /* ATAIOW */
1140                      PINCTRL_SUN4I_A10),
1141           SUNXI_FUNCTION_VARIANT(0x3, "emac",   /* ETXERR */
1142                      PINCTRL_SUN7I_A20 |
1143                      PINCTRL_SUN8I_R40),
1144           SUNXI_FUNCTION(0x4, "keypad"),    /* OUT7 */
1145           SUNXI_FUNCTION(0x5, "mmc1"),      /* D3 */
1146           SUNXI_FUNCTION(0x7, "csi1")),     /* VSYNC */
1147     /* Hole */
1148     SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 0),
1149           SUNXI_FUNCTION(0x0, "gpio_in"),
1150           SUNXI_FUNCTION(0x1, "gpio_out"),
1151           SUNXI_FUNCTION_VARIANT(0x3, "i2c3",   /* SCK */
1152                      PINCTRL_SUN7I_A20 |
1153                      PINCTRL_SUN8I_R40)),
1154     SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 1),
1155           SUNXI_FUNCTION(0x0, "gpio_in"),
1156           SUNXI_FUNCTION(0x1, "gpio_out"),
1157           SUNXI_FUNCTION_VARIANT(0x3, "i2c3",   /* SDA */
1158                      PINCTRL_SUN7I_A20 |
1159                      PINCTRL_SUN8I_R40)),
1160     SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 2),
1161           SUNXI_FUNCTION(0x0, "gpio_in"),
1162           SUNXI_FUNCTION(0x1, "gpio_out"),
1163           SUNXI_FUNCTION_VARIANT(0x3, "i2c4",   /* SCK */
1164                      PINCTRL_SUN7I_A20 |
1165                      PINCTRL_SUN8I_R40)),
1166     SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 3),
1167           SUNXI_FUNCTION(0x0, "gpio_in"),
1168           SUNXI_FUNCTION(0x1, "gpio_out"),
1169           SUNXI_FUNCTION(0x2, "pwm"),       /* PWM1 */
1170           SUNXI_FUNCTION_VARIANT(0x3, "i2c4",   /* SDA */
1171                      PINCTRL_SUN7I_A20 |
1172                      PINCTRL_SUN8I_R40)),
1173     SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 4),
1174           SUNXI_FUNCTION(0x0, "gpio_in"),
1175           SUNXI_FUNCTION(0x1, "gpio_out"),
1176           SUNXI_FUNCTION(0x2, "mmc3")),     /* CMD */
1177     SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 5),
1178           SUNXI_FUNCTION(0x0, "gpio_in"),
1179           SUNXI_FUNCTION(0x1, "gpio_out"),
1180           SUNXI_FUNCTION(0x2, "mmc3")),     /* CLK */
1181     SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 6),
1182           SUNXI_FUNCTION(0x0, "gpio_in"),
1183           SUNXI_FUNCTION(0x1, "gpio_out"),
1184           SUNXI_FUNCTION(0x2, "mmc3")),     /* D0 */
1185     SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 7),
1186           SUNXI_FUNCTION(0x0, "gpio_in"),
1187           SUNXI_FUNCTION(0x1, "gpio_out"),
1188           SUNXI_FUNCTION(0x2, "mmc3")),     /* D1 */
1189     SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 8),
1190           SUNXI_FUNCTION(0x0, "gpio_in"),
1191           SUNXI_FUNCTION(0x1, "gpio_out"),
1192           SUNXI_FUNCTION(0x2, "mmc3")),     /* D2 */
1193     SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 9),
1194           SUNXI_FUNCTION(0x0, "gpio_in"),
1195           SUNXI_FUNCTION(0x1, "gpio_out"),
1196           SUNXI_FUNCTION(0x2, "mmc3")),     /* D3 */
1197     SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 10),
1198           SUNXI_FUNCTION(0x0, "gpio_in"),
1199           SUNXI_FUNCTION(0x1, "gpio_out"),
1200           SUNXI_FUNCTION(0x2, "spi0"),      /* CS0 */
1201           SUNXI_FUNCTION(0x3, "uart5"),     /* TX */
1202           SUNXI_FUNCTION_IRQ(0x6, 22)),     /* EINT22 */
1203     SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 11),
1204           SUNXI_FUNCTION(0x0, "gpio_in"),
1205           SUNXI_FUNCTION(0x1, "gpio_out"),
1206           SUNXI_FUNCTION(0x2, "spi0"),      /* CLK */
1207           SUNXI_FUNCTION(0x3, "uart5"),     /* RX */
1208           SUNXI_FUNCTION_IRQ(0x6, 23)),     /* EINT23 */
1209     SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 12),
1210           SUNXI_FUNCTION(0x0, "gpio_in"),
1211           SUNXI_FUNCTION(0x1, "gpio_out"),
1212           SUNXI_FUNCTION(0x2, "spi0"),      /* MOSI */
1213           SUNXI_FUNCTION(0x3, "uart6"),     /* TX */
1214           SUNXI_FUNCTION_VARIANT(0x4, "clk_out_a",
1215                      PINCTRL_SUN7I_A20 |
1216                      PINCTRL_SUN8I_R40),
1217           SUNXI_FUNCTION_IRQ(0x6, 24)),     /* EINT24 */
1218     SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 13),
1219           SUNXI_FUNCTION(0x0, "gpio_in"),
1220           SUNXI_FUNCTION(0x1, "gpio_out"),
1221           SUNXI_FUNCTION(0x2, "spi0"),      /* MISO */
1222           SUNXI_FUNCTION(0x3, "uart6"),     /* RX */
1223           SUNXI_FUNCTION_VARIANT(0x4, "clk_out_b",
1224                      PINCTRL_SUN7I_A20 |
1225                      PINCTRL_SUN8I_R40),
1226           SUNXI_FUNCTION_IRQ(0x6, 25)),     /* EINT25 */
1227     SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 14),
1228           SUNXI_FUNCTION(0x0, "gpio_in"),
1229           SUNXI_FUNCTION(0x1, "gpio_out"),
1230           SUNXI_FUNCTION(0x2, "spi0"),      /* CS1 */
1231           SUNXI_FUNCTION(0x3, "ps2"),       /* SCK1 */
1232           SUNXI_FUNCTION(0x4, "timer4"),    /* TCLKIN0 */
1233           SUNXI_FUNCTION_IRQ(0x6, 26)),     /* EINT26 */
1234     SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 15),
1235           SUNXI_FUNCTION(0x0, "gpio_in"),
1236           SUNXI_FUNCTION(0x1, "gpio_out"),
1237           SUNXI_FUNCTION(0x2, "spi1"),      /* CS1 */
1238           SUNXI_FUNCTION(0x3, "ps2"),       /* SDA1 */
1239           SUNXI_FUNCTION(0x4, "timer5"),    /* TCLKIN1 */
1240           SUNXI_FUNCTION_IRQ(0x6, 27)),     /* EINT27 */
1241     SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 16),
1242           SUNXI_FUNCTION(0x0, "gpio_in"),
1243           SUNXI_FUNCTION(0x1, "gpio_out"),
1244           SUNXI_FUNCTION(0x2, "spi1"),      /* CS0 */
1245           SUNXI_FUNCTION(0x3, "uart2"),     /* RTS */
1246           SUNXI_FUNCTION_IRQ(0x6, 28)),     /* EINT28 */
1247     SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 17),
1248           SUNXI_FUNCTION(0x0, "gpio_in"),
1249           SUNXI_FUNCTION(0x1, "gpio_out"),
1250           SUNXI_FUNCTION(0x2, "spi1"),      /* CLK */
1251           SUNXI_FUNCTION(0x3, "uart2"),     /* CTS */
1252           SUNXI_FUNCTION_IRQ(0x6, 29)),     /* EINT29 */
1253     SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 18),
1254           SUNXI_FUNCTION(0x0, "gpio_in"),
1255           SUNXI_FUNCTION(0x1, "gpio_out"),
1256           SUNXI_FUNCTION(0x2, "spi1"),      /* MOSI */
1257           SUNXI_FUNCTION(0x3, "uart2"),     /* TX */
1258           SUNXI_FUNCTION_IRQ(0x6, 30)),     /* EINT30 */
1259     SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 19),
1260           SUNXI_FUNCTION(0x0, "gpio_in"),
1261           SUNXI_FUNCTION(0x1, "gpio_out"),
1262           SUNXI_FUNCTION(0x2, "spi1"),      /* MISO */
1263           SUNXI_FUNCTION(0x3, "uart2"),     /* RX */
1264           SUNXI_FUNCTION_IRQ(0x6, 31)),     /* EINT31 */
1265     SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 20),
1266           SUNXI_FUNCTION(0x0, "gpio_in"),
1267           SUNXI_FUNCTION(0x1, "gpio_out"),
1268           SUNXI_FUNCTION(0x2, "ps2"),       /* SCK0 */
1269           SUNXI_FUNCTION(0x3, "uart7"),     /* TX */
1270           SUNXI_FUNCTION_VARIANT(0x4, "hdmi",   /* HSCL */
1271                      PINCTRL_SUN4I_A10 |
1272                      PINCTRL_SUN7I_A20),
1273           SUNXI_FUNCTION_VARIANT(0x6, "pwm",    /* PWM2 */
1274                      PINCTRL_SUN8I_R40)),
1275     SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 21),
1276           SUNXI_FUNCTION(0x0, "gpio_in"),
1277           SUNXI_FUNCTION(0x1, "gpio_out"),
1278           SUNXI_FUNCTION(0x2, "ps2"),       /* SDA0 */
1279           SUNXI_FUNCTION(0x3, "uart7"),     /* RX */
1280           SUNXI_FUNCTION_VARIANT(0x4, "hdmi",   /* HSDA */
1281                      PINCTRL_SUN4I_A10 |
1282                      PINCTRL_SUN7I_A20),
1283           SUNXI_FUNCTION_VARIANT(0x6, "pwm",    /* PWM3 */
1284                      PINCTRL_SUN8I_R40)),
1285 };
1286 
1287 static const struct sunxi_pinctrl_desc sun4i_a10_pinctrl_data = {
1288     .pins = sun4i_a10_pins,
1289     .npins = ARRAY_SIZE(sun4i_a10_pins),
1290     .irq_banks = 1,
1291     .irq_read_needs_mux = true,
1292     .disable_strict_mode = true,
1293 };
1294 
1295 static int sun4i_a10_pinctrl_probe(struct platform_device *pdev)
1296 {
1297     unsigned long variant = (unsigned long)of_device_get_match_data(&pdev->dev);
1298 
1299     return sunxi_pinctrl_init_with_variant(pdev, &sun4i_a10_pinctrl_data,
1300                            variant);
1301 }
1302 
1303 static const struct of_device_id sun4i_a10_pinctrl_match[] = {
1304     {
1305         .compatible = "allwinner,sun4i-a10-pinctrl",
1306         .data = (void *)PINCTRL_SUN4I_A10
1307     },
1308     {
1309         .compatible = "allwinner,sun7i-a20-pinctrl",
1310         .data = (void *)PINCTRL_SUN7I_A20
1311     },
1312     {
1313         .compatible = "allwinner,sun8i-r40-pinctrl",
1314         .data = (void *)PINCTRL_SUN8I_R40
1315     },
1316     {}
1317 };
1318 
1319 static struct platform_driver sun4i_a10_pinctrl_driver = {
1320     .probe  = sun4i_a10_pinctrl_probe,
1321     .driver = {
1322         .name       = "sun4i-pinctrl",
1323         .of_match_table = sun4i_a10_pinctrl_match,
1324     },
1325 };
1326 builtin_platform_driver(sun4i_a10_pinctrl_driver);
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