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OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Allwinner D1 SoC pinctrl driver.
0004  *
0005  * Copyright (c) 2020 wuyan@allwinnertech.com
0006  * Copyright (c) 2021-2022 Samuel Holland <samuel@sholland.org>
0007  */
0008 
0009 #include <linux/module.h>
0010 #include <linux/platform_device.h>
0011 #include <linux/of.h>
0012 #include <linux/of_device.h>
0013 #include <linux/pinctrl/pinctrl.h>
0014 
0015 #include "pinctrl-sunxi.h"
0016 
0017 static const struct sunxi_desc_pin d1_pins[] = {
0018     /* PB */
0019     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
0020         SUNXI_FUNCTION(0x0, "gpio_in"),
0021         SUNXI_FUNCTION(0x1, "gpio_out"),
0022         SUNXI_FUNCTION(0x2, "pwm3"),
0023         SUNXI_FUNCTION(0x3, "ir"),      /* TX */
0024         SUNXI_FUNCTION(0x4, "i2c2"),        /* SCK */
0025         SUNXI_FUNCTION(0x5, "spi1"),        /* WP */
0026         SUNXI_FUNCTION(0x6, "uart0"),       /* TX */
0027         SUNXI_FUNCTION(0x7, "uart2"),       /* TX */
0028         SUNXI_FUNCTION(0x8, "spdif"),       /* OUT */
0029         SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 0)),
0030     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
0031         SUNXI_FUNCTION(0x0, "gpio_in"),
0032         SUNXI_FUNCTION(0x1, "gpio_out"),
0033         SUNXI_FUNCTION(0x2, "pwm4"),
0034         SUNXI_FUNCTION(0x3, "i2s2_dout"),   /* DOUT3 */
0035         SUNXI_FUNCTION(0x4, "i2c2"),        /* SDA */
0036         SUNXI_FUNCTION(0x5, "i2s2_din"),    /* DIN3 */
0037         SUNXI_FUNCTION(0x6, "uart0"),       /* RX */
0038         SUNXI_FUNCTION(0x7, "uart2"),       /* RX */
0039         SUNXI_FUNCTION(0x8, "ir"),      /* RX */
0040         SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 1)),
0041     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
0042         SUNXI_FUNCTION(0x0, "gpio_in"),
0043         SUNXI_FUNCTION(0x1, "gpio_out"),
0044         SUNXI_FUNCTION(0x2, "lcd0"),        /* D0 */
0045         SUNXI_FUNCTION(0x3, "i2s2_dout"),   /* DOUT2 */
0046         SUNXI_FUNCTION(0x4, "i2c0"),        /* SDA */
0047         SUNXI_FUNCTION(0x5, "i2s2_din"),    /* DIN2 */
0048         SUNXI_FUNCTION(0x6, "lcd0"),        /* D18 */
0049         SUNXI_FUNCTION(0x7, "uart4"),       /* TX */
0050         SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 2)),
0051     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
0052         SUNXI_FUNCTION(0x0, "gpio_in"),
0053         SUNXI_FUNCTION(0x1, "gpio_out"),
0054         SUNXI_FUNCTION(0x2, "lcd0"),        /* D1 */
0055         SUNXI_FUNCTION(0x3, "i2s2_dout"),   /* DOUT1 */
0056         SUNXI_FUNCTION(0x4, "i2c0"),        /* SCK */
0057         SUNXI_FUNCTION(0x5, "i2s2_din"),    /* DIN0 */
0058         SUNXI_FUNCTION(0x6, "lcd0"),        /* D19 */
0059         SUNXI_FUNCTION(0x7, "uart4"),       /* RX */
0060         SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 3)),
0061     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
0062         SUNXI_FUNCTION(0x0, "gpio_in"),
0063         SUNXI_FUNCTION(0x1, "gpio_out"),
0064         SUNXI_FUNCTION(0x2, "lcd0"),        /* D8 */
0065         SUNXI_FUNCTION(0x3, "i2s2_dout"),   /* DOUT0 */
0066         SUNXI_FUNCTION(0x4, "i2c1"),        /* SCK */
0067         SUNXI_FUNCTION(0x5, "i2s2_din"),    /* DIN1 */
0068         SUNXI_FUNCTION(0x6, "lcd0"),        /* D20 */
0069         SUNXI_FUNCTION(0x7, "uart5"),       /* TX */
0070         SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 4)),
0071     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
0072         SUNXI_FUNCTION(0x0, "gpio_in"),
0073         SUNXI_FUNCTION(0x1, "gpio_out"),
0074         SUNXI_FUNCTION(0x2, "lcd0"),        /* D9 */
0075         SUNXI_FUNCTION(0x3, "i2s2"),        /* BCLK */
0076         SUNXI_FUNCTION(0x4, "i2c1"),        /* SDA */
0077         SUNXI_FUNCTION(0x5, "pwm0"),
0078         SUNXI_FUNCTION(0x6, "lcd0"),        /* D21 */
0079         SUNXI_FUNCTION(0x7, "uart5"),       /* RX */
0080         SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 5)),
0081     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
0082         SUNXI_FUNCTION(0x0, "gpio_in"),
0083         SUNXI_FUNCTION(0x1, "gpio_out"),
0084         SUNXI_FUNCTION(0x2, "lcd0"),        /* D16 */
0085         SUNXI_FUNCTION(0x3, "i2s2"),        /* LRCK */
0086         SUNXI_FUNCTION(0x4, "i2c3"),        /* SCK */
0087         SUNXI_FUNCTION(0x5, "pwm1"),
0088         SUNXI_FUNCTION(0x6, "lcd0"),        /* D22 */
0089         SUNXI_FUNCTION(0x7, "uart3"),       /* TX */
0090         SUNXI_FUNCTION(0x8, "bist0"),       /* BIST_RESULT0 */
0091         SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 6)),
0092     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
0093         SUNXI_FUNCTION(0x0, "gpio_in"),
0094         SUNXI_FUNCTION(0x1, "gpio_out"),
0095         SUNXI_FUNCTION(0x2, "lcd0"),        /* D17 */
0096         SUNXI_FUNCTION(0x3, "i2s2"),        /* MCLK */
0097         SUNXI_FUNCTION(0x4, "i2c3"),        /* SDA */
0098         SUNXI_FUNCTION(0x5, "ir"),      /* RX */
0099         SUNXI_FUNCTION(0x6, "lcd0"),        /* D23 */
0100         SUNXI_FUNCTION(0x7, "uart3"),       /* RX */
0101         SUNXI_FUNCTION(0x8, "bist1"),       /* BIST_RESULT1 */
0102         SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 7)),
0103     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8),
0104         SUNXI_FUNCTION(0x0, "gpio_in"),
0105         SUNXI_FUNCTION(0x1, "gpio_out"),
0106         SUNXI_FUNCTION(0x2, "dmic"),        /* DATA3 */
0107         SUNXI_FUNCTION(0x3, "pwm5"),
0108         SUNXI_FUNCTION(0x4, "i2c2"),        /* SCK */
0109         SUNXI_FUNCTION(0x5, "spi1"),        /* HOLD */
0110         SUNXI_FUNCTION(0x6, "uart0"),       /* TX */
0111         SUNXI_FUNCTION(0x7, "uart1"),       /* TX */
0112         SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 8)),
0113     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9),
0114         SUNXI_FUNCTION(0x0, "gpio_in"),
0115         SUNXI_FUNCTION(0x1, "gpio_out"),
0116         SUNXI_FUNCTION(0x2, "dmic"),        /* DATA2 */
0117         SUNXI_FUNCTION(0x3, "pwm6"),
0118         SUNXI_FUNCTION(0x4, "i2c2"),        /* SDA */
0119         SUNXI_FUNCTION(0x5, "spi1"),        /* MISO */
0120         SUNXI_FUNCTION(0x6, "uart0"),       /* RX */
0121         SUNXI_FUNCTION(0x7, "uart1"),       /* RX */
0122         SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 9)),
0123     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 10),
0124         SUNXI_FUNCTION(0x0, "gpio_in"),
0125         SUNXI_FUNCTION(0x1, "gpio_out"),
0126         SUNXI_FUNCTION(0x2, "dmic"),        /* DATA1 */
0127         SUNXI_FUNCTION(0x3, "pwm7"),
0128         SUNXI_FUNCTION(0x4, "i2c0"),        /* SCK */
0129         SUNXI_FUNCTION(0x5, "spi1"),        /* MOSI */
0130         SUNXI_FUNCTION(0x6, "clk"),     /* FANOUT0 */
0131         SUNXI_FUNCTION(0x7, "uart1"),       /* RTS */
0132         SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 10)),
0133     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 11),
0134         SUNXI_FUNCTION(0x0, "gpio_in"),
0135         SUNXI_FUNCTION(0x1, "gpio_out"),
0136         SUNXI_FUNCTION(0x2, "dmic"),        /* DATA0 */
0137         SUNXI_FUNCTION(0x3, "pwm2"),
0138         SUNXI_FUNCTION(0x4, "i2c0"),        /* SDA */
0139         SUNXI_FUNCTION(0x5, "spi1"),        /* CLK */
0140         SUNXI_FUNCTION(0x6, "clk"),     /* FANOUT1 */
0141         SUNXI_FUNCTION(0x7, "uart1"),       /* CTS */
0142         SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 11)),
0143     SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 12),
0144         SUNXI_FUNCTION(0x0, "gpio_in"),
0145         SUNXI_FUNCTION(0x1, "gpio_out"),
0146         SUNXI_FUNCTION(0x2, "dmic"),        /* CLK */
0147         SUNXI_FUNCTION(0x3, "pwm0"),
0148         SUNXI_FUNCTION(0x4, "spdif"),       /* IN */
0149         SUNXI_FUNCTION(0x5, "spi1"),        /* CS0 */
0150         SUNXI_FUNCTION(0x6, "clk"),     /* FANOUT2 */
0151         SUNXI_FUNCTION(0x7, "ir"),      /* RX */
0152         SUNXI_FUNCTION_IRQ_BANK(0xe, 0, 12)),
0153     /* PC */
0154     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
0155         SUNXI_FUNCTION(0x0, "gpio_in"),
0156         SUNXI_FUNCTION(0x1, "gpio_out"),
0157         SUNXI_FUNCTION(0x2, "uart2"),       /* TX */
0158         SUNXI_FUNCTION(0x3, "i2c2"),        /* SCK */
0159         SUNXI_FUNCTION(0x4, "ledc"),
0160         SUNXI_FUNCTION_IRQ_BANK(0xe, 1, 0)),
0161     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
0162         SUNXI_FUNCTION(0x0, "gpio_in"),
0163         SUNXI_FUNCTION(0x1, "gpio_out"),
0164         SUNXI_FUNCTION(0x2, "uart2"),       /* RX */
0165         SUNXI_FUNCTION(0x3, "i2c2"),        /* SDA */
0166         SUNXI_FUNCTION_IRQ_BANK(0xe, 1, 1)),
0167     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
0168         SUNXI_FUNCTION(0x0, "gpio_in"),
0169         SUNXI_FUNCTION(0x1, "gpio_out"),
0170         SUNXI_FUNCTION(0x2, "spi0"),        /* CLK */
0171         SUNXI_FUNCTION(0x3, "mmc2"),        /* CLK */
0172         SUNXI_FUNCTION_IRQ_BANK(0xe, 1, 2)),
0173     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
0174         SUNXI_FUNCTION(0x0, "gpio_in"),
0175         SUNXI_FUNCTION(0x1, "gpio_out"),
0176         SUNXI_FUNCTION(0x2, "spi0"),        /* CS0 */
0177         SUNXI_FUNCTION(0x3, "mmc2"),        /* CMD */
0178         SUNXI_FUNCTION_IRQ_BANK(0xe, 1, 3)),
0179     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
0180         SUNXI_FUNCTION(0x0, "gpio_in"),
0181         SUNXI_FUNCTION(0x1, "gpio_out"),
0182         SUNXI_FUNCTION(0x2, "spi0"),        /* MOSI */
0183         SUNXI_FUNCTION(0x3, "mmc2"),        /* D2 */
0184         SUNXI_FUNCTION(0x4, "boot"),        /* SEL0 */
0185         SUNXI_FUNCTION_IRQ_BANK(0xe, 1, 4)),
0186     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
0187         SUNXI_FUNCTION(0x0, "gpio_in"),
0188         SUNXI_FUNCTION(0x1, "gpio_out"),
0189         SUNXI_FUNCTION(0x2, "spi0"),        /* MISO */
0190         SUNXI_FUNCTION(0x3, "mmc2"),        /* D1 */
0191         SUNXI_FUNCTION(0x4, "boot"),        /* SEL1 */
0192         SUNXI_FUNCTION_IRQ_BANK(0xe, 1, 5)),
0193     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
0194         SUNXI_FUNCTION(0x0, "gpio_in"),
0195         SUNXI_FUNCTION(0x1, "gpio_out"),
0196         SUNXI_FUNCTION(0x2, "spi0"),        /* WP */
0197         SUNXI_FUNCTION(0x3, "mmc2"),        /* D0 */
0198         SUNXI_FUNCTION(0x4, "uart3"),       /* TX */
0199         SUNXI_FUNCTION(0x5, "i2c3"),        /* SCK */
0200         SUNXI_FUNCTION(0x6, "pll"),     /* DBG-CLK */
0201         SUNXI_FUNCTION_IRQ_BANK(0xe, 1, 6)),
0202     SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
0203         SUNXI_FUNCTION(0x0, "gpio_in"),
0204         SUNXI_FUNCTION(0x1, "gpio_out"),
0205         SUNXI_FUNCTION(0x2, "spi0"),        /* HOLD */
0206         SUNXI_FUNCTION(0x3, "mmc2"),        /* D3 */
0207         SUNXI_FUNCTION(0x4, "uart3"),       /* RX */
0208         SUNXI_FUNCTION(0x5, "i2c3"),        /* SDA */
0209         SUNXI_FUNCTION(0x6, "tcon"),        /* TRIG0 */
0210         SUNXI_FUNCTION_IRQ_BANK(0xe, 1, 7)),
0211     /* PD */
0212     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
0213         SUNXI_FUNCTION(0x0, "gpio_in"),
0214         SUNXI_FUNCTION(0x1, "gpio_out"),
0215         SUNXI_FUNCTION(0x2, "lcd0"),        /* D2 */
0216         SUNXI_FUNCTION(0x3, "lvds0"),       /* V0P */
0217         SUNXI_FUNCTION(0x4, "dsi"),     /* D0P */
0218         SUNXI_FUNCTION(0x5, "i2c0"),        /* SCK */
0219         SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 0)),
0220     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
0221         SUNXI_FUNCTION(0x0, "gpio_in"),
0222         SUNXI_FUNCTION(0x1, "gpio_out"),
0223         SUNXI_FUNCTION(0x2, "lcd0"),        /* D3 */
0224         SUNXI_FUNCTION(0x3, "lvds0"),       /* V0N */
0225         SUNXI_FUNCTION(0x4, "dsi"),     /* D0N */
0226         SUNXI_FUNCTION(0x5, "uart2"),       /* TX */
0227         SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 1)),
0228     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
0229         SUNXI_FUNCTION(0x0, "gpio_in"),
0230         SUNXI_FUNCTION(0x1, "gpio_out"),
0231         SUNXI_FUNCTION(0x2, "lcd0"),        /* D4 */
0232         SUNXI_FUNCTION(0x3, "lvds0"),       /* V1P */
0233         SUNXI_FUNCTION(0x4, "dsi"),     /* D1P */
0234         SUNXI_FUNCTION(0x5, "uart2"),       /* RX */
0235         SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 2)),
0236     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
0237         SUNXI_FUNCTION(0x0, "gpio_in"),
0238         SUNXI_FUNCTION(0x1, "gpio_out"),
0239         SUNXI_FUNCTION(0x2, "lcd0"),        /* D5 */
0240         SUNXI_FUNCTION(0x3, "lvds0"),       /* V1N */
0241         SUNXI_FUNCTION(0x4, "dsi"),     /* D1N */
0242         SUNXI_FUNCTION(0x5, "uart2"),       /* RTS */
0243         SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 3)),
0244     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
0245         SUNXI_FUNCTION(0x0, "gpio_in"),
0246         SUNXI_FUNCTION(0x1, "gpio_out"),
0247         SUNXI_FUNCTION(0x2, "lcd0"),        /* D6 */
0248         SUNXI_FUNCTION(0x3, "lvds0"),       /* V2P */
0249         SUNXI_FUNCTION(0x4, "dsi"),     /* CKP */
0250         SUNXI_FUNCTION(0x5, "uart2"),       /* CTS */
0251         SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 4)),
0252     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
0253         SUNXI_FUNCTION(0x0, "gpio_in"),
0254         SUNXI_FUNCTION(0x1, "gpio_out"),
0255         SUNXI_FUNCTION(0x2, "lcd0"),        /* D7 */
0256         SUNXI_FUNCTION(0x3, "lvds0"),       /* V2N */
0257         SUNXI_FUNCTION(0x4, "dsi"),     /* CKN */
0258         SUNXI_FUNCTION(0x5, "uart5"),       /* TX */
0259         SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 5)),
0260     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
0261         SUNXI_FUNCTION(0x0, "gpio_in"),
0262         SUNXI_FUNCTION(0x1, "gpio_out"),
0263         SUNXI_FUNCTION(0x2, "lcd0"),        /* D10 */
0264         SUNXI_FUNCTION(0x3, "lvds0"),       /* CKP */
0265         SUNXI_FUNCTION(0x4, "dsi"),     /* D2P */
0266         SUNXI_FUNCTION(0x5, "uart5"),       /* RX */
0267         SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 6)),
0268     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
0269         SUNXI_FUNCTION(0x0, "gpio_in"),
0270         SUNXI_FUNCTION(0x1, "gpio_out"),
0271         SUNXI_FUNCTION(0x2, "lcd0"),        /* D11 */
0272         SUNXI_FUNCTION(0x3, "lvds0"),       /* CKN */
0273         SUNXI_FUNCTION(0x4, "dsi"),     /* D2N */
0274         SUNXI_FUNCTION(0x5, "uart4"),       /* TX */
0275         SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 7)),
0276     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
0277         SUNXI_FUNCTION(0x0, "gpio_in"),
0278         SUNXI_FUNCTION(0x1, "gpio_out"),
0279         SUNXI_FUNCTION(0x2, "lcd0"),        /* D12 */
0280         SUNXI_FUNCTION(0x3, "lvds0"),       /* V3P */
0281         SUNXI_FUNCTION(0x4, "dsi"),     /* D3P */
0282         SUNXI_FUNCTION(0x5, "uart4"),       /* RX */
0283         SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 8)),
0284     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
0285         SUNXI_FUNCTION(0x0, "gpio_in"),
0286         SUNXI_FUNCTION(0x1, "gpio_out"),
0287         SUNXI_FUNCTION(0x2, "lcd0"),        /* D13 */
0288         SUNXI_FUNCTION(0x3, "lvds0"),       /* V3N */
0289         SUNXI_FUNCTION(0x4, "dsi"),     /* D3N */
0290         SUNXI_FUNCTION(0x5, "pwm6"),
0291         SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 9)),
0292     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
0293         SUNXI_FUNCTION(0x0, "gpio_in"),
0294         SUNXI_FUNCTION(0x1, "gpio_out"),
0295         SUNXI_FUNCTION(0x2, "lcd0"),        /* D14 */
0296         SUNXI_FUNCTION(0x3, "lvds1"),       /* V0P */
0297         SUNXI_FUNCTION(0x4, "spi1"),        /* CS0 */
0298         SUNXI_FUNCTION(0x5, "uart3"),       /* TX */
0299         SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 10)),
0300     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
0301         SUNXI_FUNCTION(0x0, "gpio_in"),
0302         SUNXI_FUNCTION(0x1, "gpio_out"),
0303         SUNXI_FUNCTION(0x2, "lcd0"),        /* D15 */
0304         SUNXI_FUNCTION(0x3, "lvds1"),       /* V0N */
0305         SUNXI_FUNCTION(0x4, "spi1"),        /* CLK */
0306         SUNXI_FUNCTION(0x5, "uart3"),       /* RX */
0307         SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 11)),
0308     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
0309         SUNXI_FUNCTION(0x0, "gpio_in"),
0310         SUNXI_FUNCTION(0x1, "gpio_out"),
0311         SUNXI_FUNCTION(0x2, "lcd0"),        /* D18 */
0312         SUNXI_FUNCTION(0x3, "lvds1"),       /* V1P */
0313         SUNXI_FUNCTION(0x4, "spi1"),        /* MOSI */
0314         SUNXI_FUNCTION(0x5, "i2c0"),        /* SDA */
0315         SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 12)),
0316     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
0317         SUNXI_FUNCTION(0x0, "gpio_in"),
0318         SUNXI_FUNCTION(0x1, "gpio_out"),
0319         SUNXI_FUNCTION(0x2, "lcd0"),        /* D19 */
0320         SUNXI_FUNCTION(0x3, "lvds1"),       /* V1N */
0321         SUNXI_FUNCTION(0x4, "spi1"),        /* MISO */
0322         SUNXI_FUNCTION(0x5, "uart3"),       /* RTS */
0323         SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 13)),
0324     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
0325         SUNXI_FUNCTION(0x0, "gpio_in"),
0326         SUNXI_FUNCTION(0x1, "gpio_out"),
0327         SUNXI_FUNCTION(0x2, "lcd0"),        /* D20 */
0328         SUNXI_FUNCTION(0x3, "lvds1"),       /* V2P */
0329         SUNXI_FUNCTION(0x4, "spi1"),        /* HOLD */
0330         SUNXI_FUNCTION(0x5, "uart3"),       /* CTS */
0331         SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 14)),
0332     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
0333         SUNXI_FUNCTION(0x0, "gpio_in"),
0334         SUNXI_FUNCTION(0x1, "gpio_out"),
0335         SUNXI_FUNCTION(0x2, "lcd0"),        /* D21 */
0336         SUNXI_FUNCTION(0x3, "lvds1"),       /* V2N */
0337         SUNXI_FUNCTION(0x4, "spi1"),        /* WP */
0338         SUNXI_FUNCTION(0x5, "ir"),      /* RX */
0339         SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 15)),
0340     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
0341         SUNXI_FUNCTION(0x0, "gpio_in"),
0342         SUNXI_FUNCTION(0x1, "gpio_out"),
0343         SUNXI_FUNCTION(0x2, "lcd0"),        /* D22 */
0344         SUNXI_FUNCTION(0x3, "lvds1"),       /* CKP */
0345         SUNXI_FUNCTION(0x4, "dmic"),        /* DATA3 */
0346         SUNXI_FUNCTION(0x5, "pwm0"),
0347         SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 16)),
0348     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
0349         SUNXI_FUNCTION(0x0, "gpio_in"),
0350         SUNXI_FUNCTION(0x1, "gpio_out"),
0351         SUNXI_FUNCTION(0x2, "lcd0"),        /* D23 */
0352         SUNXI_FUNCTION(0x3, "lvds1"),       /* CKN */
0353         SUNXI_FUNCTION(0x4, "dmic"),        /* DATA2 */
0354         SUNXI_FUNCTION(0x5, "pwm1"),
0355         SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 17)),
0356     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
0357         SUNXI_FUNCTION(0x0, "gpio_in"),
0358         SUNXI_FUNCTION(0x1, "gpio_out"),
0359         SUNXI_FUNCTION(0x2, "lcd0"),        /* CLK */
0360         SUNXI_FUNCTION(0x3, "lvds1"),       /* V3P */
0361         SUNXI_FUNCTION(0x4, "dmic"),        /* DATA1 */
0362         SUNXI_FUNCTION(0x5, "pwm2"),
0363         SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 18)),
0364     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
0365         SUNXI_FUNCTION(0x0, "gpio_in"),
0366         SUNXI_FUNCTION(0x1, "gpio_out"),
0367         SUNXI_FUNCTION(0x2, "lcd0"),        /* DE */
0368         SUNXI_FUNCTION(0x3, "lvds1"),       /* V3N */
0369         SUNXI_FUNCTION(0x4, "dmic"),        /* DATA0 */
0370         SUNXI_FUNCTION(0x5, "pwm3"),
0371         SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 19)),
0372     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
0373         SUNXI_FUNCTION(0x0, "gpio_in"),
0374         SUNXI_FUNCTION(0x1, "gpio_out"),
0375         SUNXI_FUNCTION(0x2, "lcd0"),        /* HSYNC */
0376         SUNXI_FUNCTION(0x3, "i2c2"),        /* SCK */
0377         SUNXI_FUNCTION(0x4, "dmic"),        /* CLK */
0378         SUNXI_FUNCTION(0x5, "pwm4"),
0379         SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 20)),
0380     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
0381         SUNXI_FUNCTION(0x0, "gpio_in"),
0382         SUNXI_FUNCTION(0x1, "gpio_out"),
0383         SUNXI_FUNCTION(0x2, "lcd0"),        /* VSYNC */
0384         SUNXI_FUNCTION(0x3, "i2c2"),        /* SDA */
0385         SUNXI_FUNCTION(0x4, "uart1"),       /* TX */
0386         SUNXI_FUNCTION(0x5, "pwm5"),
0387         SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 21)),
0388     SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
0389         SUNXI_FUNCTION(0x0, "gpio_in"),
0390         SUNXI_FUNCTION(0x1, "gpio_out"),
0391         SUNXI_FUNCTION(0x2, "spdif"),       /* OUT */
0392         SUNXI_FUNCTION(0x3, "ir"),      /* RX */
0393         SUNXI_FUNCTION(0x4, "uart1"),       /* RX */
0394         SUNXI_FUNCTION(0x5, "pwm7"),
0395         SUNXI_FUNCTION_IRQ_BANK(0xe, 2, 22)),
0396     /* PE */
0397     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
0398         SUNXI_FUNCTION(0x0, "gpio_in"),
0399         SUNXI_FUNCTION(0x1, "gpio_out"),
0400         SUNXI_FUNCTION(0x2, "ncsi0"),       /* HSYNC */
0401         SUNXI_FUNCTION(0x3, "uart2"),       /* RTS */
0402         SUNXI_FUNCTION(0x4, "i2c1"),        /* SCK */
0403         SUNXI_FUNCTION(0x5, "lcd0"),        /* HSYNC */
0404         SUNXI_FUNCTION(0x8, "emac"),        /* RXCTL/CRS_DV */
0405         SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 0)),
0406     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
0407         SUNXI_FUNCTION(0x0, "gpio_in"),
0408         SUNXI_FUNCTION(0x1, "gpio_out"),
0409         SUNXI_FUNCTION(0x2, "ncsi0"),       /* VSYNC */
0410         SUNXI_FUNCTION(0x3, "uart2"),       /* CTS */
0411         SUNXI_FUNCTION(0x4, "i2c1"),        /* SDA */
0412         SUNXI_FUNCTION(0x5, "lcd0"),        /* VSYNC */
0413         SUNXI_FUNCTION(0x8, "emac"),        /* RXD0 */
0414         SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 1)),
0415     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
0416         SUNXI_FUNCTION(0x0, "gpio_in"),
0417         SUNXI_FUNCTION(0x1, "gpio_out"),
0418         SUNXI_FUNCTION(0x2, "ncsi0"),       /* PCLK */
0419         SUNXI_FUNCTION(0x3, "uart2"),       /* TX */
0420         SUNXI_FUNCTION(0x4, "i2c0"),        /* SCK */
0421         SUNXI_FUNCTION(0x5, "clk"),     /* FANOUT0 */
0422         SUNXI_FUNCTION(0x6, "uart0"),       /* TX */
0423         SUNXI_FUNCTION(0x8, "emac"),        /* RXD1 */
0424         SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 2)),
0425     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
0426         SUNXI_FUNCTION(0x0, "gpio_in"),
0427         SUNXI_FUNCTION(0x1, "gpio_out"),
0428         SUNXI_FUNCTION(0x2, "ncsi0"),       /* MCLK */
0429         SUNXI_FUNCTION(0x3, "uart2"),       /* RX */
0430         SUNXI_FUNCTION(0x4, "i2c0"),        /* SDA */
0431         SUNXI_FUNCTION(0x5, "clk"),     /* FANOUT1 */
0432         SUNXI_FUNCTION(0x6, "uart0"),       /* RX */
0433         SUNXI_FUNCTION(0x8, "emac"),        /* TXCK */
0434         SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 3)),
0435     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
0436         SUNXI_FUNCTION(0x0, "gpio_in"),
0437         SUNXI_FUNCTION(0x1, "gpio_out"),
0438         SUNXI_FUNCTION(0x2, "ncsi0"),       /* D0 */
0439         SUNXI_FUNCTION(0x3, "uart4"),       /* TX */
0440         SUNXI_FUNCTION(0x4, "i2c2"),        /* SCK */
0441         SUNXI_FUNCTION(0x5, "clk"),     /* FANOUT2 */
0442         SUNXI_FUNCTION(0x6, "d_jtag"),      /* MS */
0443         SUNXI_FUNCTION(0x7, "r_jtag"),      /* MS */
0444         SUNXI_FUNCTION(0x8, "emac"),        /* TXD0 */
0445         SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 4)),
0446     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
0447         SUNXI_FUNCTION(0x0, "gpio_in"),
0448         SUNXI_FUNCTION(0x1, "gpio_out"),
0449         SUNXI_FUNCTION(0x2, "ncsi0"),       /* D1 */
0450         SUNXI_FUNCTION(0x3, "uart4"),       /* RX */
0451         SUNXI_FUNCTION(0x4, "i2c2"),        /* SDA */
0452         SUNXI_FUNCTION(0x5, "ledc"),
0453         SUNXI_FUNCTION(0x6, "d_jtag"),      /* DI */
0454         SUNXI_FUNCTION(0x7, "r_jtag"),      /* DI */
0455         SUNXI_FUNCTION(0x8, "emac"),        /* TXD1 */
0456         SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 5)),
0457     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
0458         SUNXI_FUNCTION(0x0, "gpio_in"),
0459         SUNXI_FUNCTION(0x1, "gpio_out"),
0460         SUNXI_FUNCTION(0x2, "ncsi0"),       /* D2 */
0461         SUNXI_FUNCTION(0x3, "uart5"),       /* TX */
0462         SUNXI_FUNCTION(0x4, "i2c3"),        /* SCK */
0463         SUNXI_FUNCTION(0x5, "spdif"),       /* IN */
0464         SUNXI_FUNCTION(0x6, "d_jtag"),      /* DO */
0465         SUNXI_FUNCTION(0x7, "r_jtag"),      /* DO */
0466         SUNXI_FUNCTION(0x8, "emac"),        /* TXCTL/TXEN */
0467         SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 6)),
0468     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
0469         SUNXI_FUNCTION(0x0, "gpio_in"),
0470         SUNXI_FUNCTION(0x1, "gpio_out"),
0471         SUNXI_FUNCTION(0x2, "ncsi0"),       /* D3 */
0472         SUNXI_FUNCTION(0x3, "uart5"),       /* RX */
0473         SUNXI_FUNCTION(0x4, "i2c3"),        /* SDA */
0474         SUNXI_FUNCTION(0x5, "spdif"),       /* OUT */
0475         SUNXI_FUNCTION(0x6, "d_jtag"),      /* CK */
0476         SUNXI_FUNCTION(0x7, "r_jtag"),      /* CK */
0477         SUNXI_FUNCTION(0x8, "emac"),        /* CK */
0478         SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 7)),
0479     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
0480         SUNXI_FUNCTION(0x0, "gpio_in"),
0481         SUNXI_FUNCTION(0x1, "gpio_out"),
0482         SUNXI_FUNCTION(0x2, "ncsi0"),       /* D4 */
0483         SUNXI_FUNCTION(0x3, "uart1"),       /* RTS */
0484         SUNXI_FUNCTION(0x4, "pwm2"),
0485         SUNXI_FUNCTION(0x5, "uart3"),       /* TX */
0486         SUNXI_FUNCTION(0x6, "jtag"),        /* MS */
0487         SUNXI_FUNCTION(0x8, "emac"),        /* MDC */
0488         SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 8)),
0489     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
0490         SUNXI_FUNCTION(0x0, "gpio_in"),
0491         SUNXI_FUNCTION(0x1, "gpio_out"),
0492         SUNXI_FUNCTION(0x2, "ncsi0"),       /* D5 */
0493         SUNXI_FUNCTION(0x3, "uart1"),       /* CTS */
0494         SUNXI_FUNCTION(0x4, "pwm3"),
0495         SUNXI_FUNCTION(0x5, "uart3"),       /* RX */
0496         SUNXI_FUNCTION(0x6, "jtag"),        /* DI */
0497         SUNXI_FUNCTION(0x8, "emac"),        /* MDIO */
0498         SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 9)),
0499     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
0500         SUNXI_FUNCTION(0x0, "gpio_in"),
0501         SUNXI_FUNCTION(0x1, "gpio_out"),
0502         SUNXI_FUNCTION(0x2, "ncsi0"),       /* D6 */
0503         SUNXI_FUNCTION(0x3, "uart1"),       /* TX */
0504         SUNXI_FUNCTION(0x4, "pwm4"),
0505         SUNXI_FUNCTION(0x5, "ir"),      /* RX */
0506         SUNXI_FUNCTION(0x6, "jtag"),        /* DO */
0507         SUNXI_FUNCTION(0x8, "emac"),        /* EPHY-25M */
0508         SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 10)),
0509     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
0510         SUNXI_FUNCTION(0x0, "gpio_in"),
0511         SUNXI_FUNCTION(0x1, "gpio_out"),
0512         SUNXI_FUNCTION(0x2, "ncsi0"),       /* D7 */
0513         SUNXI_FUNCTION(0x3, "uart1"),       /* RX */
0514         SUNXI_FUNCTION(0x4, "i2s0_dout"),   /* DOUT3 */
0515         SUNXI_FUNCTION(0x5, "i2s0_din"),    /* DIN3 */
0516         SUNXI_FUNCTION(0x6, "jtag"),        /* CK */
0517         SUNXI_FUNCTION(0x8, "emac"),        /* TXD2 */
0518         SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 11)),
0519     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
0520         SUNXI_FUNCTION(0x0, "gpio_in"),
0521         SUNXI_FUNCTION(0x1, "gpio_out"),
0522         SUNXI_FUNCTION(0x2, "i2c2"),        /* SCK */
0523         SUNXI_FUNCTION(0x3, "ncsi0"),       /* FIELD */
0524         SUNXI_FUNCTION(0x4, "i2s0_dout"),   /* DOUT2 */
0525         SUNXI_FUNCTION(0x5, "i2s0_din"),    /* DIN2 */
0526         SUNXI_FUNCTION(0x8, "emac"),        /* TXD3 */
0527         SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 12)),
0528     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13),
0529         SUNXI_FUNCTION(0x0, "gpio_in"),
0530         SUNXI_FUNCTION(0x1, "gpio_out"),
0531         SUNXI_FUNCTION(0x2, "i2c2"),        /* SDA */
0532         SUNXI_FUNCTION(0x3, "pwm5"),
0533         SUNXI_FUNCTION(0x4, "i2s0_dout"),   /* DOUT0 */
0534         SUNXI_FUNCTION(0x5, "i2s0_din"),    /* DIN1 */
0535         SUNXI_FUNCTION(0x6, "dmic"),        /* DATA3 */
0536         SUNXI_FUNCTION(0x8, "emac"),        /* RXD2 */
0537         SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 13)),
0538     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14),
0539         SUNXI_FUNCTION(0x0, "gpio_in"),
0540         SUNXI_FUNCTION(0x1, "gpio_out"),
0541         SUNXI_FUNCTION(0x2, "i2c1"),        /* SCK */
0542         SUNXI_FUNCTION(0x3, "d_jtag"),      /* MS */
0543         SUNXI_FUNCTION(0x4, "i2s0_dout"),   /* DOUT1 */
0544         SUNXI_FUNCTION(0x5, "i2s0_din"),    /* DIN0 */
0545         SUNXI_FUNCTION(0x6, "dmic"),        /* DATA2 */
0546         SUNXI_FUNCTION(0x8, "emac"),        /* RXD3 */
0547         SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 14)),
0548     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15),
0549         SUNXI_FUNCTION(0x0, "gpio_in"),
0550         SUNXI_FUNCTION(0x1, "gpio_out"),
0551         SUNXI_FUNCTION(0x2, "i2c1"),        /* SDA */
0552         SUNXI_FUNCTION(0x3, "d_jtag"),      /* DI */
0553         SUNXI_FUNCTION(0x4, "pwm6"),
0554         SUNXI_FUNCTION(0x5, "i2s0"),        /* LRCK */
0555         SUNXI_FUNCTION(0x6, "dmic"),        /* DATA1 */
0556         SUNXI_FUNCTION(0x8, "emac"),        /* RXCK */
0557         SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 15)),
0558     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16),
0559         SUNXI_FUNCTION(0x0, "gpio_in"),
0560         SUNXI_FUNCTION(0x1, "gpio_out"),
0561         SUNXI_FUNCTION(0x2, "i2c3"),        /* SCK */
0562         SUNXI_FUNCTION(0x3, "d_jtag"),      /* DO */
0563         SUNXI_FUNCTION(0x4, "pwm7"),
0564         SUNXI_FUNCTION(0x5, "i2s0"),        /* BCLK */
0565         SUNXI_FUNCTION(0x6, "dmic"),        /* DATA0 */
0566         SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 16)),
0567     SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 17),
0568         SUNXI_FUNCTION(0x0, "gpio_in"),
0569         SUNXI_FUNCTION(0x1, "gpio_out"),
0570         SUNXI_FUNCTION(0x2, "i2c3"),        /* SDA */
0571         SUNXI_FUNCTION(0x3, "d_jtag"),      /* CK */
0572         SUNXI_FUNCTION(0x4, "ir"),      /* TX */
0573         SUNXI_FUNCTION(0x5, "i2s0"),        /* MCLK */
0574         SUNXI_FUNCTION(0x6, "dmic"),        /* CLK */
0575         SUNXI_FUNCTION_IRQ_BANK(0xe, 3, 17)),
0576     /* PF */
0577     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
0578         SUNXI_FUNCTION(0x0, "gpio_in"),
0579         SUNXI_FUNCTION(0x1, "gpio_out"),
0580         SUNXI_FUNCTION(0x2, "mmc0"),        /* D1 */
0581         SUNXI_FUNCTION(0x3, "jtag"),        /* MS */
0582         SUNXI_FUNCTION(0x4, "r_jtag"),      /* MS */
0583         SUNXI_FUNCTION(0x5, "i2s2_dout"),   /* DOUT1 */
0584         SUNXI_FUNCTION(0x6, "i2s2_din"),    /* DIN0 */
0585         SUNXI_FUNCTION_IRQ_BANK(0xe, 4, 0)),
0586     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
0587         SUNXI_FUNCTION(0x0, "gpio_in"),
0588         SUNXI_FUNCTION(0x1, "gpio_out"),
0589         SUNXI_FUNCTION(0x2, "mmc0"),        /* D0 */
0590         SUNXI_FUNCTION(0x3, "jtag"),        /* DI */
0591         SUNXI_FUNCTION(0x4, "r_jtag"),      /* DI */
0592         SUNXI_FUNCTION(0x5, "i2s2_dout"),   /* DOUT0 */
0593         SUNXI_FUNCTION(0x6, "i2s2_din"),    /* DIN1 */
0594         SUNXI_FUNCTION_IRQ_BANK(0xe, 4, 1)),
0595     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
0596         SUNXI_FUNCTION(0x0, "gpio_in"),
0597         SUNXI_FUNCTION(0x1, "gpio_out"),
0598         SUNXI_FUNCTION(0x2, "mmc0"),        /* CLK */
0599         SUNXI_FUNCTION(0x3, "uart0"),       /* TX */
0600         SUNXI_FUNCTION(0x4, "i2c0"),        /* SCK */
0601         SUNXI_FUNCTION(0x5, "ledc"),
0602         SUNXI_FUNCTION(0x6, "spdif"),       /* IN */
0603         SUNXI_FUNCTION_IRQ_BANK(0xe, 4, 2)),
0604     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
0605         SUNXI_FUNCTION(0x0, "gpio_in"),
0606         SUNXI_FUNCTION(0x1, "gpio_out"),
0607         SUNXI_FUNCTION(0x2, "mmc0"),        /* CMD */
0608         SUNXI_FUNCTION(0x3, "jtag"),        /* DO */
0609         SUNXI_FUNCTION(0x4, "r_jtag"),      /* DO */
0610         SUNXI_FUNCTION(0x5, "i2s2"),        /* BCLK */
0611         SUNXI_FUNCTION_IRQ_BANK(0xe, 4, 3)),
0612     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
0613         SUNXI_FUNCTION(0x0, "gpio_in"),
0614         SUNXI_FUNCTION(0x1, "gpio_out"),
0615         SUNXI_FUNCTION(0x2, "mmc0"),        /* D3 */
0616         SUNXI_FUNCTION(0x3, "uart0"),       /* RX */
0617         SUNXI_FUNCTION(0x4, "i2c0"),        /* SDA */
0618         SUNXI_FUNCTION(0x5, "pwm6"),
0619         SUNXI_FUNCTION(0x6, "ir"),      /* TX */
0620         SUNXI_FUNCTION_IRQ_BANK(0xe, 4, 4)),
0621     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
0622         SUNXI_FUNCTION(0x0, "gpio_in"),
0623         SUNXI_FUNCTION(0x1, "gpio_out"),
0624         SUNXI_FUNCTION(0x2, "mmc0"),        /* D2 */
0625         SUNXI_FUNCTION(0x3, "jtag"),        /* CK */
0626         SUNXI_FUNCTION(0x4, "r_jtag"),      /* CK */
0627         SUNXI_FUNCTION(0x5, "i2s2"),        /* LRCK */
0628         SUNXI_FUNCTION_IRQ_BANK(0xe, 4, 5)),
0629     SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 6),
0630         SUNXI_FUNCTION(0x0, "gpio_in"),
0631         SUNXI_FUNCTION(0x1, "gpio_out"),
0632         SUNXI_FUNCTION(0x3, "spdif"),       /* OUT */
0633         SUNXI_FUNCTION(0x4, "ir"),      /* RX */
0634         SUNXI_FUNCTION(0x5, "i2s2"),        /* MCLK */
0635         SUNXI_FUNCTION(0x6, "pwm5"),
0636         SUNXI_FUNCTION_IRQ_BANK(0xe, 4, 6)),
0637     /* PG */
0638     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
0639         SUNXI_FUNCTION(0x0, "gpio_in"),
0640         SUNXI_FUNCTION(0x1, "gpio_out"),
0641         SUNXI_FUNCTION(0x2, "mmc1"),        /* CLK */
0642         SUNXI_FUNCTION(0x3, "uart3"),       /* TX */
0643         SUNXI_FUNCTION(0x4, "emac"),        /* RXCTRL/CRS_DV */
0644         SUNXI_FUNCTION(0x5, "pwm7"),
0645         SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 0)),
0646     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
0647         SUNXI_FUNCTION(0x0, "gpio_in"),
0648         SUNXI_FUNCTION(0x1, "gpio_out"),
0649         SUNXI_FUNCTION(0x2, "mmc1"),        /* CMD */
0650         SUNXI_FUNCTION(0x3, "uart3"),       /* RX */
0651         SUNXI_FUNCTION(0x4, "emac"),        /* RXD0 */
0652         SUNXI_FUNCTION(0x5, "pwm6"),
0653         SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 1)),
0654     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
0655         SUNXI_FUNCTION(0x0, "gpio_in"),
0656         SUNXI_FUNCTION(0x1, "gpio_out"),
0657         SUNXI_FUNCTION(0x2, "mmc1"),        /* D0 */
0658         SUNXI_FUNCTION(0x3, "uart3"),       /* RTS */
0659         SUNXI_FUNCTION(0x4, "emac"),        /* RXD1 */
0660         SUNXI_FUNCTION(0x5, "uart4"),       /* TX */
0661         SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 2)),
0662     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
0663         SUNXI_FUNCTION(0x0, "gpio_in"),
0664         SUNXI_FUNCTION(0x1, "gpio_out"),
0665         SUNXI_FUNCTION(0x2, "mmc1"),        /* D1 */
0666         SUNXI_FUNCTION(0x3, "uart3"),       /* CTS */
0667         SUNXI_FUNCTION(0x4, "emac"),        /* TXCK */
0668         SUNXI_FUNCTION(0x5, "uart4"),       /* RX */
0669         SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 3)),
0670     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
0671         SUNXI_FUNCTION(0x0, "gpio_in"),
0672         SUNXI_FUNCTION(0x1, "gpio_out"),
0673         SUNXI_FUNCTION(0x2, "mmc1"),        /* D2 */
0674         SUNXI_FUNCTION(0x3, "uart5"),       /* TX */
0675         SUNXI_FUNCTION(0x4, "emac"),        /* TXD0 */
0676         SUNXI_FUNCTION(0x5, "pwm5"),
0677         SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 4)),
0678     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
0679         SUNXI_FUNCTION(0x0, "gpio_in"),
0680         SUNXI_FUNCTION(0x1, "gpio_out"),
0681         SUNXI_FUNCTION(0x2, "mmc1"),        /* D3 */
0682         SUNXI_FUNCTION(0x3, "uart5"),       /* RX */
0683         SUNXI_FUNCTION(0x4, "emac"),        /* TXD1 */
0684         SUNXI_FUNCTION(0x5, "pwm4"),
0685         SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 5)),
0686     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
0687         SUNXI_FUNCTION(0x0, "gpio_in"),
0688         SUNXI_FUNCTION(0x1, "gpio_out"),
0689         SUNXI_FUNCTION(0x2, "uart1"),       /* TX */
0690         SUNXI_FUNCTION(0x3, "i2c2"),        /* SCK */
0691         SUNXI_FUNCTION(0x4, "emac"),        /* TXD2 */
0692         SUNXI_FUNCTION(0x5, "pwm1"),
0693         SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 6)),
0694     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
0695         SUNXI_FUNCTION(0x0, "gpio_in"),
0696         SUNXI_FUNCTION(0x1, "gpio_out"),
0697         SUNXI_FUNCTION(0x2, "uart1"),       /* RX */
0698         SUNXI_FUNCTION(0x3, "i2c2"),        /* SDA */
0699         SUNXI_FUNCTION(0x4, "emac"),        /* TXD3 */
0700         SUNXI_FUNCTION(0x5, "spdif"),       /* IN */
0701         SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 7)),
0702     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
0703         SUNXI_FUNCTION(0x0, "gpio_in"),
0704         SUNXI_FUNCTION(0x1, "gpio_out"),
0705         SUNXI_FUNCTION(0x2, "uart1"),       /* RTS */
0706         SUNXI_FUNCTION(0x3, "i2c1"),        /* SCK */
0707         SUNXI_FUNCTION(0x4, "emac"),        /* RXD2 */
0708         SUNXI_FUNCTION(0x5, "uart3"),       /* TX */
0709         SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 8)),
0710     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
0711         SUNXI_FUNCTION(0x0, "gpio_in"),
0712         SUNXI_FUNCTION(0x1, "gpio_out"),
0713         SUNXI_FUNCTION(0x2, "uart1"),       /* CTS */
0714         SUNXI_FUNCTION(0x3, "i2c1"),        /* SDA */
0715         SUNXI_FUNCTION(0x4, "emac"),        /* RXD3 */
0716         SUNXI_FUNCTION(0x5, "uart3"),       /* RX */
0717         SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 9)),
0718     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
0719         SUNXI_FUNCTION(0x0, "gpio_in"),
0720         SUNXI_FUNCTION(0x1, "gpio_out"),
0721         SUNXI_FUNCTION(0x2, "pwm3"),
0722         SUNXI_FUNCTION(0x3, "i2c3"),        /* SCK */
0723         SUNXI_FUNCTION(0x4, "emac"),        /* RXCK */
0724         SUNXI_FUNCTION(0x5, "clk"),     /* FANOUT0 */
0725         SUNXI_FUNCTION(0x6, "ir"),      /* RX */
0726         SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 10)),
0727     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
0728         SUNXI_FUNCTION(0x0, "gpio_in"),
0729         SUNXI_FUNCTION(0x1, "gpio_out"),
0730         SUNXI_FUNCTION(0x2, "i2s1"),        /* MCLK */
0731         SUNXI_FUNCTION(0x3, "i2c3"),        /* SDA */
0732         SUNXI_FUNCTION(0x4, "emac"),        /* EPHY-25M */
0733         SUNXI_FUNCTION(0x5, "clk"),     /* FANOUT1 */
0734         SUNXI_FUNCTION(0x6, "tcon"),        /* TRIG0 */
0735         SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 11)),
0736     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12),
0737         SUNXI_FUNCTION(0x0, "gpio_in"),
0738         SUNXI_FUNCTION(0x1, "gpio_out"),
0739         SUNXI_FUNCTION(0x2, "i2s1"),        /* LRCK */
0740         SUNXI_FUNCTION(0x3, "i2c0"),        /* SCK */
0741         SUNXI_FUNCTION(0x4, "emac"),        /* TXCTL/TXEN */
0742         SUNXI_FUNCTION(0x5, "clk"),     /* FANOUT2 */
0743         SUNXI_FUNCTION(0x6, "pwm0"),
0744         SUNXI_FUNCTION(0x7, "uart1"),       /* TX */
0745         SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 12)),
0746     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13),
0747         SUNXI_FUNCTION(0x0, "gpio_in"),
0748         SUNXI_FUNCTION(0x1, "gpio_out"),
0749         SUNXI_FUNCTION(0x2, "i2s1"),        /* BCLK */
0750         SUNXI_FUNCTION(0x3, "i2c0"),        /* SDA */
0751         SUNXI_FUNCTION(0x4, "emac"),        /* CLKIN/RXER */
0752         SUNXI_FUNCTION(0x5, "pwm2"),
0753         SUNXI_FUNCTION(0x6, "ledc"),
0754         SUNXI_FUNCTION(0x7, "uart1"),       /* RX */
0755         SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 13)),
0756     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 14),
0757         SUNXI_FUNCTION(0x0, "gpio_in"),
0758         SUNXI_FUNCTION(0x1, "gpio_out"),
0759         SUNXI_FUNCTION(0x2, "i2s1_din"),    /* DIN0 */
0760         SUNXI_FUNCTION(0x3, "i2c2"),        /* SCK */
0761         SUNXI_FUNCTION(0x4, "emac"),        /* MDC */
0762         SUNXI_FUNCTION(0x5, "i2s1_dout"),   /* DOUT1 */
0763         SUNXI_FUNCTION(0x6, "spi0"),        /* WP */
0764         SUNXI_FUNCTION(0x7, "uart1"),       /* RTS */
0765         SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 14)),
0766     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 15),
0767         SUNXI_FUNCTION(0x0, "gpio_in"),
0768         SUNXI_FUNCTION(0x1, "gpio_out"),
0769         SUNXI_FUNCTION(0x2, "i2s1_dout"),   /* DOUT0 */
0770         SUNXI_FUNCTION(0x3, "i2c2"),        /* SDA */
0771         SUNXI_FUNCTION(0x4, "emac"),        /* MDIO */
0772         SUNXI_FUNCTION(0x5, "i2s1_din"),    /* DIN1 */
0773         SUNXI_FUNCTION(0x6, "spi0"),        /* HOLD */
0774         SUNXI_FUNCTION(0x7, "uart1"),       /* CTS */
0775         SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 15)),
0776     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 16),
0777         SUNXI_FUNCTION(0x0, "gpio_in"),
0778         SUNXI_FUNCTION(0x1, "gpio_out"),
0779         SUNXI_FUNCTION(0x2, "ir"),      /* RX */
0780         SUNXI_FUNCTION(0x3, "tcon"),        /* TRIG0 */
0781         SUNXI_FUNCTION(0x4, "pwm5"),
0782         SUNXI_FUNCTION(0x5, "clk"),     /* FANOUT2 */
0783         SUNXI_FUNCTION(0x6, "spdif"),       /* IN */
0784         SUNXI_FUNCTION(0x7, "ledc"),
0785         SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 16)),
0786     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 17),
0787         SUNXI_FUNCTION(0x0, "gpio_in"),
0788         SUNXI_FUNCTION(0x1, "gpio_out"),
0789         SUNXI_FUNCTION(0x2, "uart2"),       /* TX */
0790         SUNXI_FUNCTION(0x3, "i2c3"),        /* SCK */
0791         SUNXI_FUNCTION(0x4, "pwm7"),
0792         SUNXI_FUNCTION(0x5, "clk"),     /* FANOUT0 */
0793         SUNXI_FUNCTION(0x6, "ir"),      /* TX */
0794         SUNXI_FUNCTION(0x7, "uart0"),       /* TX */
0795         SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 17)),
0796     SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 18),
0797         SUNXI_FUNCTION(0x0, "gpio_in"),
0798         SUNXI_FUNCTION(0x1, "gpio_out"),
0799         SUNXI_FUNCTION(0x2, "uart2"),       /* RX */
0800         SUNXI_FUNCTION(0x3, "i2c3"),        /* SDA */
0801         SUNXI_FUNCTION(0x4, "pwm6"),
0802         SUNXI_FUNCTION(0x5, "clk"),     /* FANOUT1 */
0803         SUNXI_FUNCTION(0x6, "spdif"),       /* OUT */
0804         SUNXI_FUNCTION(0x7, "uart0"),       /* RX */
0805         SUNXI_FUNCTION_IRQ_BANK(0xe, 5, 18)),
0806 };
0807 
0808 static const unsigned int d1_irq_bank_map[] = { 1, 2, 3, 4, 5, 6 };
0809 
0810 static const struct sunxi_pinctrl_desc d1_pinctrl_data = {
0811     .pins           = d1_pins,
0812     .npins          = ARRAY_SIZE(d1_pins),
0813     .irq_banks      = ARRAY_SIZE(d1_irq_bank_map),
0814     .irq_bank_map       = d1_irq_bank_map,
0815     .io_bias_cfg_variant    = BIAS_VOLTAGE_PIO_POW_MODE_CTL,
0816 };
0817 
0818 static int d1_pinctrl_probe(struct platform_device *pdev)
0819 {
0820     unsigned long variant = (unsigned long)of_device_get_match_data(&pdev->dev);
0821 
0822     return sunxi_pinctrl_init_with_variant(pdev, &d1_pinctrl_data, variant);
0823 }
0824 
0825 static const struct of_device_id d1_pinctrl_match[] = {
0826     {
0827         .compatible = "allwinner,sun20i-d1-pinctrl",
0828         .data = (void *)PINCTRL_SUN20I_D1
0829     },
0830     {}
0831 };
0832 
0833 static struct platform_driver d1_pinctrl_driver = {
0834     .probe  = d1_pinctrl_probe,
0835     .driver = {
0836         .name       = "sun20i-d1-pinctrl",
0837         .of_match_table = d1_pinctrl_match,
0838     },
0839 };
0840 builtin_platform_driver(d1_pinctrl_driver);
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