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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Spreadtrum pin controller driver
0004  * Copyright (C) 2017 Spreadtrum  - http://www.spreadtrum.com
0005  */
0006 
0007 #include <linux/debugfs.h>
0008 #include <linux/err.h>
0009 #include <linux/init.h>
0010 #include <linux/io.h>
0011 #include <linux/kernel.h>
0012 #include <linux/module.h>
0013 #include <linux/of.h>
0014 #include <linux/of_device.h>
0015 #include <linux/platform_device.h>
0016 #include <linux/pinctrl/machine.h>
0017 #include <linux/pinctrl/pinconf.h>
0018 #include <linux/pinctrl/pinconf-generic.h>
0019 #include <linux/pinctrl/pinctrl.h>
0020 #include <linux/pinctrl/pinmux.h>
0021 #include <linux/slab.h>
0022 
0023 #include "../core.h"
0024 #include "../pinmux.h"
0025 #include "../pinconf.h"
0026 #include "../pinctrl-utils.h"
0027 #include "pinctrl-sprd.h"
0028 
0029 #define PINCTRL_BIT_MASK(width)     (~(~0UL << (width)))
0030 #define PINCTRL_REG_OFFSET      0x20
0031 #define PINCTRL_REG_MISC_OFFSET     0x4020
0032 #define PINCTRL_REG_LEN         0x4
0033 
0034 #define PIN_FUNC_MASK           (BIT(4) | BIT(5))
0035 #define PIN_FUNC_SEL_1          ~PIN_FUNC_MASK
0036 #define PIN_FUNC_SEL_2          BIT(4)
0037 #define PIN_FUNC_SEL_3          BIT(5)
0038 #define PIN_FUNC_SEL_4          PIN_FUNC_MASK
0039 
0040 #define AP_SLEEP_MODE           BIT(13)
0041 #define PUBCP_SLEEP_MODE        BIT(14)
0042 #define TGLDSP_SLEEP_MODE       BIT(15)
0043 #define AGDSP_SLEEP_MODE        BIT(16)
0044 #define CM4_SLEEP_MODE          BIT(17)
0045 #define SLEEP_MODE_MASK         GENMASK(5, 0)
0046 #define SLEEP_MODE_SHIFT        13
0047 
0048 #define SLEEP_INPUT         BIT(1)
0049 #define SLEEP_INPUT_MASK        0x1
0050 #define SLEEP_INPUT_SHIFT       1
0051 
0052 #define SLEEP_OUTPUT            BIT(0)
0053 #define SLEEP_OUTPUT_MASK       0x1
0054 #define SLEEP_OUTPUT_SHIFT      0
0055 
0056 #define DRIVE_STRENGTH_MASK     GENMASK(3, 0)
0057 #define DRIVE_STRENGTH_SHIFT        19
0058 
0059 #define SLEEP_PULL_DOWN         BIT(2)
0060 #define SLEEP_PULL_DOWN_MASK        0x1
0061 #define SLEEP_PULL_DOWN_SHIFT       2
0062 
0063 #define PULL_DOWN           BIT(6)
0064 #define PULL_DOWN_MASK          0x1
0065 #define PULL_DOWN_SHIFT         6
0066 
0067 #define SLEEP_PULL_UP           BIT(3)
0068 #define SLEEP_PULL_UP_MASK      0x1
0069 #define SLEEP_PULL_UP_SHIFT     3
0070 
0071 #define PULL_UP_4_7K            (BIT(12) | BIT(7))
0072 #define PULL_UP_20K         BIT(7)
0073 #define PULL_UP_MASK            0x21
0074 #define PULL_UP_SHIFT           7
0075 
0076 #define INPUT_SCHMITT           BIT(11)
0077 #define INPUT_SCHMITT_MASK      0x1
0078 #define INPUT_SCHMITT_SHIFT     11
0079 
0080 enum pin_sleep_mode {
0081     AP_SLEEP = BIT(0),
0082     PUBCP_SLEEP = BIT(1),
0083     TGLDSP_SLEEP = BIT(2),
0084     AGDSP_SLEEP = BIT(3),
0085     CM4_SLEEP = BIT(4),
0086 };
0087 
0088 enum pin_func_sel {
0089     PIN_FUNC_1,
0090     PIN_FUNC_2,
0091     PIN_FUNC_3,
0092     PIN_FUNC_4,
0093     PIN_FUNC_MAX,
0094 };
0095 
0096 /**
0097  * struct sprd_pin: represent one pin's description
0098  * @name: pin name
0099  * @number: pin number
0100  * @type: pin type, can be GLOBAL_CTRL_PIN/COMMON_PIN/MISC_PIN
0101  * @reg: pin register address
0102  * @bit_offset: bit offset in pin register
0103  * @bit_width: bit width in pin register
0104  */
0105 struct sprd_pin {
0106     const char *name;
0107     unsigned int number;
0108     enum pin_type type;
0109     unsigned long reg;
0110     unsigned long bit_offset;
0111     unsigned long bit_width;
0112 };
0113 
0114 /**
0115  * struct sprd_pin_group: represent one group's description
0116  * @name: group name
0117  * @npins: pin numbers of this group
0118  * @pins: pointer to pins array
0119  */
0120 struct sprd_pin_group {
0121     const char *name;
0122     unsigned int npins;
0123     unsigned int *pins;
0124 };
0125 
0126 /**
0127  * struct sprd_pinctrl_soc_info: represent the SoC's pins description
0128  * @groups: pointer to groups of pins
0129  * @ngroups: group numbers of the whole SoC
0130  * @pins: pointer to pins description
0131  * @npins: pin numbers of the whole SoC
0132  * @grp_names: pointer to group names array
0133  */
0134 struct sprd_pinctrl_soc_info {
0135     struct sprd_pin_group *groups;
0136     unsigned int ngroups;
0137     struct sprd_pin *pins;
0138     unsigned int npins;
0139     const char **grp_names;
0140 };
0141 
0142 /**
0143  * struct sprd_pinctrl: represent the pin controller device
0144  * @dev: pointer to the device structure
0145  * @pctl: pointer to the pinctrl handle
0146  * @base: base address of the controller
0147  * @info: pointer to SoC's pins description information
0148  */
0149 struct sprd_pinctrl {
0150     struct device *dev;
0151     struct pinctrl_dev *pctl;
0152     void __iomem *base;
0153     struct sprd_pinctrl_soc_info *info;
0154 };
0155 
0156 #define SPRD_PIN_CONFIG_CONTROL     (PIN_CONFIG_END + 1)
0157 #define SPRD_PIN_CONFIG_SLEEP_MODE  (PIN_CONFIG_END + 2)
0158 
0159 static int sprd_pinctrl_get_id_by_name(struct sprd_pinctrl *sprd_pctl,
0160                        const char *name)
0161 {
0162     struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
0163     int i;
0164 
0165     for (i = 0; i < info->npins; i++) {
0166         if (!strcmp(info->pins[i].name, name))
0167             return info->pins[i].number;
0168     }
0169 
0170     return -ENODEV;
0171 }
0172 
0173 static struct sprd_pin *
0174 sprd_pinctrl_get_pin_by_id(struct sprd_pinctrl *sprd_pctl, unsigned int id)
0175 {
0176     struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
0177     struct sprd_pin *pin = NULL;
0178     int i;
0179 
0180     for (i = 0; i < info->npins; i++) {
0181         if (info->pins[i].number == id) {
0182             pin = &info->pins[i];
0183             break;
0184         }
0185     }
0186 
0187     return pin;
0188 }
0189 
0190 static const struct sprd_pin_group *
0191 sprd_pinctrl_find_group_by_name(struct sprd_pinctrl *sprd_pctl,
0192                 const char *name)
0193 {
0194     struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
0195     const struct sprd_pin_group *grp = NULL;
0196     int i;
0197 
0198     for (i = 0; i < info->ngroups; i++) {
0199         if (!strcmp(info->groups[i].name, name)) {
0200             grp = &info->groups[i];
0201             break;
0202         }
0203     }
0204 
0205     return grp;
0206 }
0207 
0208 static int sprd_pctrl_group_count(struct pinctrl_dev *pctldev)
0209 {
0210     struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
0211     struct sprd_pinctrl_soc_info *info = pctl->info;
0212 
0213     return info->ngroups;
0214 }
0215 
0216 static const char *sprd_pctrl_group_name(struct pinctrl_dev *pctldev,
0217                      unsigned int selector)
0218 {
0219     struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
0220     struct sprd_pinctrl_soc_info *info = pctl->info;
0221 
0222     return info->groups[selector].name;
0223 }
0224 
0225 static int sprd_pctrl_group_pins(struct pinctrl_dev *pctldev,
0226                  unsigned int selector,
0227                  const unsigned int **pins,
0228                  unsigned int *npins)
0229 {
0230     struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
0231     struct sprd_pinctrl_soc_info *info = pctl->info;
0232 
0233     if (selector >= info->ngroups)
0234         return -EINVAL;
0235 
0236     *pins = info->groups[selector].pins;
0237     *npins = info->groups[selector].npins;
0238 
0239     return 0;
0240 }
0241 
0242 static int sprd_dt_node_to_map(struct pinctrl_dev *pctldev,
0243                    struct device_node *np,
0244                    struct pinctrl_map **map,
0245                    unsigned int *num_maps)
0246 {
0247     struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
0248     const struct sprd_pin_group *grp;
0249     unsigned long *configs = NULL;
0250     unsigned int num_configs = 0;
0251     unsigned int reserved_maps = 0;
0252     unsigned int reserve = 0;
0253     const char *function;
0254     enum pinctrl_map_type type;
0255     int ret;
0256 
0257     grp = sprd_pinctrl_find_group_by_name(pctl, np->name);
0258     if (!grp) {
0259         dev_err(pctl->dev, "unable to find group for node %s\n",
0260             of_node_full_name(np));
0261         return -EINVAL;
0262     }
0263 
0264     ret = of_property_count_strings(np, "pins");
0265     if (ret < 0)
0266         return ret;
0267 
0268     if (ret == 1)
0269         type = PIN_MAP_TYPE_CONFIGS_PIN;
0270     else
0271         type = PIN_MAP_TYPE_CONFIGS_GROUP;
0272 
0273     ret = of_property_read_string(np, "function", &function);
0274     if (ret < 0) {
0275         if (ret != -EINVAL)
0276             dev_err(pctl->dev,
0277                 "%s: could not parse property function\n",
0278                 of_node_full_name(np));
0279         function = NULL;
0280     }
0281 
0282     ret = pinconf_generic_parse_dt_config(np, pctldev, &configs,
0283                           &num_configs);
0284     if (ret < 0) {
0285         dev_err(pctl->dev, "%s: could not parse node property\n",
0286             of_node_full_name(np));
0287         return ret;
0288     }
0289 
0290     *map = NULL;
0291     *num_maps = 0;
0292 
0293     if (function != NULL)
0294         reserve++;
0295     if (num_configs)
0296         reserve++;
0297 
0298     ret = pinctrl_utils_reserve_map(pctldev, map, &reserved_maps,
0299                     num_maps, reserve);
0300     if (ret < 0)
0301         goto out;
0302 
0303     if (function) {
0304         ret = pinctrl_utils_add_map_mux(pctldev, map,
0305                         &reserved_maps, num_maps,
0306                         grp->name, function);
0307         if (ret < 0)
0308             goto out;
0309     }
0310 
0311     if (num_configs) {
0312         const char *group_or_pin;
0313         unsigned int pin_id;
0314 
0315         if (type == PIN_MAP_TYPE_CONFIGS_PIN) {
0316             pin_id = grp->pins[0];
0317             group_or_pin = pin_get_name(pctldev, pin_id);
0318         } else {
0319             group_or_pin = grp->name;
0320         }
0321 
0322         ret = pinctrl_utils_add_map_configs(pctldev, map,
0323                             &reserved_maps, num_maps,
0324                             group_or_pin, configs,
0325                             num_configs, type);
0326     }
0327 
0328 out:
0329     kfree(configs);
0330     return ret;
0331 }
0332 
0333 static void sprd_pctrl_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
0334                 unsigned int offset)
0335 {
0336     seq_printf(s, "%s", dev_name(pctldev->dev));
0337 }
0338 
0339 static const struct pinctrl_ops sprd_pctrl_ops = {
0340     .get_groups_count = sprd_pctrl_group_count,
0341     .get_group_name = sprd_pctrl_group_name,
0342     .get_group_pins = sprd_pctrl_group_pins,
0343     .pin_dbg_show = sprd_pctrl_dbg_show,
0344     .dt_node_to_map = sprd_dt_node_to_map,
0345     .dt_free_map = pinctrl_utils_free_map,
0346 };
0347 
0348 static int sprd_pmx_get_function_count(struct pinctrl_dev *pctldev)
0349 {
0350     return PIN_FUNC_MAX;
0351 }
0352 
0353 static const char *sprd_pmx_get_function_name(struct pinctrl_dev *pctldev,
0354                           unsigned int selector)
0355 {
0356     switch (selector) {
0357     case PIN_FUNC_1:
0358         return "func1";
0359     case PIN_FUNC_2:
0360         return "func2";
0361     case PIN_FUNC_3:
0362         return "func3";
0363     case PIN_FUNC_4:
0364         return "func4";
0365     default:
0366         return "null";
0367     }
0368 }
0369 
0370 static int sprd_pmx_get_function_groups(struct pinctrl_dev *pctldev,
0371                     unsigned int selector,
0372                     const char * const **groups,
0373                     unsigned int * const num_groups)
0374 {
0375     struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
0376     struct sprd_pinctrl_soc_info *info = pctl->info;
0377 
0378     *groups = info->grp_names;
0379     *num_groups = info->ngroups;
0380 
0381     return 0;
0382 }
0383 
0384 static int sprd_pmx_set_mux(struct pinctrl_dev *pctldev,
0385                 unsigned int func_selector,
0386                 unsigned int group_selector)
0387 {
0388     struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
0389     struct sprd_pinctrl_soc_info *info = pctl->info;
0390     struct sprd_pin_group *grp = &info->groups[group_selector];
0391     unsigned int i, grp_pins = grp->npins;
0392     unsigned long reg;
0393     unsigned int val = 0;
0394 
0395     if (group_selector >= info->ngroups)
0396         return -EINVAL;
0397 
0398     switch (func_selector) {
0399     case PIN_FUNC_1:
0400         val &= PIN_FUNC_SEL_1;
0401         break;
0402     case PIN_FUNC_2:
0403         val |= PIN_FUNC_SEL_2;
0404         break;
0405     case PIN_FUNC_3:
0406         val |= PIN_FUNC_SEL_3;
0407         break;
0408     case PIN_FUNC_4:
0409         val |= PIN_FUNC_SEL_4;
0410         break;
0411     default:
0412         break;
0413     }
0414 
0415     for (i = 0; i < grp_pins; i++) {
0416         unsigned int pin_id = grp->pins[i];
0417         struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id);
0418 
0419         if (!pin || pin->type != COMMON_PIN)
0420             continue;
0421 
0422         reg = readl((void __iomem *)pin->reg);
0423         reg &= ~PIN_FUNC_MASK;
0424         reg |= val;
0425         writel(reg, (void __iomem *)pin->reg);
0426     }
0427 
0428     return 0;
0429 }
0430 
0431 static const struct pinmux_ops sprd_pmx_ops = {
0432     .get_functions_count = sprd_pmx_get_function_count,
0433     .get_function_name = sprd_pmx_get_function_name,
0434     .get_function_groups = sprd_pmx_get_function_groups,
0435     .set_mux = sprd_pmx_set_mux,
0436 };
0437 
0438 static int sprd_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin_id,
0439                 unsigned long *config)
0440 {
0441     struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
0442     struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id);
0443     unsigned int param = pinconf_to_config_param(*config);
0444     unsigned int reg, arg;
0445 
0446     if (!pin)
0447         return -EINVAL;
0448 
0449     if (pin->type == GLOBAL_CTRL_PIN) {
0450         reg = (readl((void __iomem *)pin->reg) >>
0451                pin->bit_offset) & PINCTRL_BIT_MASK(pin->bit_width);
0452     } else {
0453         reg = readl((void __iomem *)pin->reg);
0454     }
0455 
0456     if (pin->type == GLOBAL_CTRL_PIN &&
0457         param == SPRD_PIN_CONFIG_CONTROL) {
0458         arg = reg;
0459     } else if (pin->type == COMMON_PIN || pin->type == MISC_PIN) {
0460         switch (param) {
0461         case SPRD_PIN_CONFIG_SLEEP_MODE:
0462             arg = (reg >> SLEEP_MODE_SHIFT) & SLEEP_MODE_MASK;
0463             break;
0464         case PIN_CONFIG_INPUT_ENABLE:
0465             arg = (reg >> SLEEP_INPUT_SHIFT) & SLEEP_INPUT_MASK;
0466             break;
0467         case PIN_CONFIG_OUTPUT_ENABLE:
0468             arg = reg & SLEEP_OUTPUT_MASK;
0469             break;
0470         case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
0471             if ((reg & SLEEP_OUTPUT) || (reg & SLEEP_INPUT))
0472                 return -EINVAL;
0473 
0474             arg = 1;
0475             break;
0476         case PIN_CONFIG_DRIVE_STRENGTH:
0477             arg = (reg >> DRIVE_STRENGTH_SHIFT) &
0478                 DRIVE_STRENGTH_MASK;
0479             break;
0480         case PIN_CONFIG_BIAS_PULL_DOWN:
0481             /* combine sleep pull down and pull down config */
0482             arg = ((reg >> SLEEP_PULL_DOWN_SHIFT) &
0483                    SLEEP_PULL_DOWN_MASK) << 16;
0484             arg |= (reg >> PULL_DOWN_SHIFT) & PULL_DOWN_MASK;
0485             break;
0486         case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
0487             arg = (reg >> INPUT_SCHMITT_SHIFT) & INPUT_SCHMITT_MASK;
0488             break;
0489         case PIN_CONFIG_BIAS_PULL_UP:
0490             /* combine sleep pull up and pull up config */
0491             arg = ((reg >> SLEEP_PULL_UP_SHIFT) &
0492                    SLEEP_PULL_UP_MASK) << 16;
0493             arg |= (reg >> PULL_UP_SHIFT) & PULL_UP_MASK;
0494             break;
0495         case PIN_CONFIG_BIAS_DISABLE:
0496             if ((reg & (SLEEP_PULL_DOWN | SLEEP_PULL_UP)) ||
0497                 (reg & (PULL_DOWN | PULL_UP_4_7K | PULL_UP_20K)))
0498                 return -EINVAL;
0499 
0500             arg = 1;
0501             break;
0502         case PIN_CONFIG_SLEEP_HARDWARE_STATE:
0503             arg = 0;
0504             break;
0505         default:
0506             return -ENOTSUPP;
0507         }
0508     } else {
0509         return -ENOTSUPP;
0510     }
0511 
0512     *config = pinconf_to_config_packed(param, arg);
0513     return 0;
0514 }
0515 
0516 static unsigned int sprd_pinconf_drive(unsigned int mA)
0517 {
0518     unsigned int val = 0;
0519 
0520     switch (mA) {
0521     case 2:
0522         break;
0523     case 4:
0524         val |= BIT(19);
0525         break;
0526     case 6:
0527         val |= BIT(20);
0528         break;
0529     case 8:
0530         val |= BIT(19) | BIT(20);
0531         break;
0532     case 10:
0533         val |= BIT(21);
0534         break;
0535     case 12:
0536         val |= BIT(21) | BIT(19);
0537         break;
0538     case 14:
0539         val |= BIT(21) | BIT(20);
0540         break;
0541     case 16:
0542         val |= BIT(19) | BIT(20) | BIT(21);
0543         break;
0544     case 20:
0545         val |= BIT(22);
0546         break;
0547     case 21:
0548         val |= BIT(22) | BIT(19);
0549         break;
0550     case 24:
0551         val |= BIT(22) | BIT(20);
0552         break;
0553     case 25:
0554         val |= BIT(22) | BIT(20) | BIT(19);
0555         break;
0556     case 27:
0557         val |= BIT(22) | BIT(21);
0558         break;
0559     case 29:
0560         val |= BIT(22) | BIT(21) | BIT(19);
0561         break;
0562     case 31:
0563         val |= BIT(22) | BIT(21) | BIT(20);
0564         break;
0565     case 33:
0566         val |= BIT(22) | BIT(21) | BIT(20) | BIT(19);
0567         break;
0568     default:
0569         break;
0570     }
0571 
0572     return val;
0573 }
0574 
0575 static bool sprd_pinctrl_check_sleep_config(unsigned long *configs,
0576                         unsigned int num_configs)
0577 {
0578     unsigned int param;
0579     int i;
0580 
0581     for (i = 0; i < num_configs; i++) {
0582         param = pinconf_to_config_param(configs[i]);
0583         if (param == PIN_CONFIG_SLEEP_HARDWARE_STATE)
0584             return true;
0585     }
0586 
0587     return false;
0588 }
0589 
0590 static int sprd_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin_id,
0591                 unsigned long *configs, unsigned int num_configs)
0592 {
0593     struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
0594     struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id);
0595     bool is_sleep_config;
0596     unsigned long reg;
0597     int i;
0598 
0599     if (!pin)
0600         return -EINVAL;
0601 
0602     is_sleep_config = sprd_pinctrl_check_sleep_config(configs, num_configs);
0603 
0604     for (i = 0; i < num_configs; i++) {
0605         unsigned int param, arg, shift, mask, val;
0606 
0607         param = pinconf_to_config_param(configs[i]);
0608         arg = pinconf_to_config_argument(configs[i]);
0609 
0610         val = 0;
0611         shift = 0;
0612         mask = 0;
0613         if (pin->type == GLOBAL_CTRL_PIN &&
0614             param == SPRD_PIN_CONFIG_CONTROL) {
0615             val = arg;
0616         } else if (pin->type == COMMON_PIN || pin->type == MISC_PIN) {
0617             switch (param) {
0618             case SPRD_PIN_CONFIG_SLEEP_MODE:
0619                 if (arg & AP_SLEEP)
0620                     val |= AP_SLEEP_MODE;
0621                 if (arg & PUBCP_SLEEP)
0622                     val |= PUBCP_SLEEP_MODE;
0623                 if (arg & TGLDSP_SLEEP)
0624                     val |= TGLDSP_SLEEP_MODE;
0625                 if (arg & AGDSP_SLEEP)
0626                     val |= AGDSP_SLEEP_MODE;
0627                 if (arg & CM4_SLEEP)
0628                     val |= CM4_SLEEP_MODE;
0629 
0630                 mask = SLEEP_MODE_MASK;
0631                 shift = SLEEP_MODE_SHIFT;
0632                 break;
0633             case PIN_CONFIG_INPUT_ENABLE:
0634                 if (is_sleep_config == true) {
0635                     if (arg > 0)
0636                         val |= SLEEP_INPUT;
0637                     else
0638                         val &= ~SLEEP_INPUT;
0639 
0640                     mask = SLEEP_INPUT_MASK;
0641                     shift = SLEEP_INPUT_SHIFT;
0642                 }
0643                 break;
0644             case PIN_CONFIG_OUTPUT_ENABLE:
0645                 if (is_sleep_config == true) {
0646                     if (arg > 0)
0647                         val |= SLEEP_OUTPUT;
0648                     else
0649                         val &= ~SLEEP_OUTPUT;
0650 
0651                     mask = SLEEP_OUTPUT_MASK;
0652                     shift = SLEEP_OUTPUT_SHIFT;
0653                 }
0654                 break;
0655             case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
0656                 if (is_sleep_config == true) {
0657                     val = shift = 0;
0658                     mask = SLEEP_OUTPUT | SLEEP_INPUT;
0659                 }
0660                 break;
0661             case PIN_CONFIG_DRIVE_STRENGTH:
0662                 if (arg < 2 || arg > 60)
0663                     return -EINVAL;
0664 
0665                 val = sprd_pinconf_drive(arg);
0666                 mask = DRIVE_STRENGTH_MASK;
0667                 shift = DRIVE_STRENGTH_SHIFT;
0668                 break;
0669             case PIN_CONFIG_BIAS_PULL_DOWN:
0670                 if (is_sleep_config == true) {
0671                     val |= SLEEP_PULL_DOWN;
0672                     mask = SLEEP_PULL_DOWN_MASK;
0673                     shift = SLEEP_PULL_DOWN_SHIFT;
0674                 } else {
0675                     val |= PULL_DOWN;
0676                     mask = PULL_DOWN_MASK;
0677                     shift = PULL_DOWN_SHIFT;
0678                 }
0679                 break;
0680             case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
0681                 if (arg > 0)
0682                     val |= INPUT_SCHMITT;
0683                 else
0684                     val &= ~INPUT_SCHMITT;
0685 
0686                 mask = INPUT_SCHMITT_MASK;
0687                 shift = INPUT_SCHMITT_SHIFT;
0688                 break;
0689             case PIN_CONFIG_BIAS_PULL_UP:
0690                 if (is_sleep_config) {
0691                     val |= SLEEP_PULL_UP;
0692                     mask = SLEEP_PULL_UP_MASK;
0693                     shift = SLEEP_PULL_UP_SHIFT;
0694                 } else {
0695                     if (arg == 20000)
0696                         val |= PULL_UP_20K;
0697                     else if (arg == 4700)
0698                         val |= PULL_UP_4_7K;
0699 
0700                     mask = PULL_UP_MASK;
0701                     shift = PULL_UP_SHIFT;
0702                 }
0703                 break;
0704             case PIN_CONFIG_BIAS_DISABLE:
0705                 if (is_sleep_config == true) {
0706                     val = shift = 0;
0707                     mask = SLEEP_PULL_DOWN | SLEEP_PULL_UP;
0708                 } else {
0709                     val = shift = 0;
0710                     mask = PULL_DOWN | PULL_UP_20K |
0711                         PULL_UP_4_7K;
0712                 }
0713                 break;
0714             case PIN_CONFIG_SLEEP_HARDWARE_STATE:
0715                 continue;
0716             default:
0717                 return -ENOTSUPP;
0718             }
0719         } else {
0720             return -ENOTSUPP;
0721         }
0722 
0723         if (pin->type == GLOBAL_CTRL_PIN) {
0724             reg = readl((void __iomem *)pin->reg);
0725             reg &= ~(PINCTRL_BIT_MASK(pin->bit_width)
0726                 << pin->bit_offset);
0727             reg |= (val & PINCTRL_BIT_MASK(pin->bit_width))
0728                 << pin->bit_offset;
0729             writel(reg, (void __iomem *)pin->reg);
0730         } else {
0731             reg = readl((void __iomem *)pin->reg);
0732             reg &= ~(mask << shift);
0733             reg |= val;
0734             writel(reg, (void __iomem *)pin->reg);
0735         }
0736     }
0737 
0738     return 0;
0739 }
0740 
0741 static int sprd_pinconf_group_get(struct pinctrl_dev *pctldev,
0742                   unsigned int selector, unsigned long *config)
0743 {
0744     struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
0745     struct sprd_pinctrl_soc_info *info = pctl->info;
0746     struct sprd_pin_group *grp;
0747     unsigned int pin_id;
0748 
0749     if (selector >= info->ngroups)
0750         return -EINVAL;
0751 
0752     grp = &info->groups[selector];
0753     pin_id = grp->pins[0];
0754 
0755     return sprd_pinconf_get(pctldev, pin_id, config);
0756 }
0757 
0758 static int sprd_pinconf_group_set(struct pinctrl_dev *pctldev,
0759                   unsigned int selector,
0760                   unsigned long *configs,
0761                   unsigned int num_configs)
0762 {
0763     struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
0764     struct sprd_pinctrl_soc_info *info = pctl->info;
0765     struct sprd_pin_group *grp;
0766     int ret, i;
0767 
0768     if (selector >= info->ngroups)
0769         return -EINVAL;
0770 
0771     grp = &info->groups[selector];
0772 
0773     for (i = 0; i < grp->npins; i++) {
0774         unsigned int pin_id = grp->pins[i];
0775 
0776         ret = sprd_pinconf_set(pctldev, pin_id, configs, num_configs);
0777         if (ret)
0778             return ret;
0779     }
0780 
0781     return 0;
0782 }
0783 
0784 static int sprd_pinconf_get_config(struct pinctrl_dev *pctldev,
0785                    unsigned int pin_id,
0786                    unsigned long *config)
0787 {
0788     struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
0789     struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id);
0790 
0791     if (!pin)
0792         return -EINVAL;
0793 
0794     if (pin->type == GLOBAL_CTRL_PIN) {
0795         *config = (readl((void __iomem *)pin->reg) >>
0796                pin->bit_offset) & PINCTRL_BIT_MASK(pin->bit_width);
0797     } else {
0798         *config = readl((void __iomem *)pin->reg);
0799     }
0800 
0801     return 0;
0802 }
0803 
0804 static void sprd_pinconf_dbg_show(struct pinctrl_dev *pctldev,
0805                   struct seq_file *s, unsigned int pin_id)
0806 {
0807     unsigned long config;
0808     int ret;
0809 
0810     ret = sprd_pinconf_get_config(pctldev, pin_id, &config);
0811     if (ret)
0812         return;
0813 
0814     seq_printf(s, "0x%lx", config);
0815 }
0816 
0817 static void sprd_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
0818                     struct seq_file *s,
0819                     unsigned int selector)
0820 {
0821     struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
0822     struct sprd_pinctrl_soc_info *info = pctl->info;
0823     struct sprd_pin_group *grp;
0824     unsigned long config;
0825     const char *name;
0826     int i, ret;
0827 
0828     if (selector >= info->ngroups)
0829         return;
0830 
0831     grp = &info->groups[selector];
0832 
0833     seq_putc(s, '\n');
0834     for (i = 0; i < grp->npins; i++, config++) {
0835         unsigned int pin_id = grp->pins[i];
0836 
0837         name = pin_get_name(pctldev, pin_id);
0838         ret = sprd_pinconf_get_config(pctldev, pin_id, &config);
0839         if (ret)
0840             return;
0841 
0842         seq_printf(s, "%s: 0x%lx ", name, config);
0843     }
0844 }
0845 
0846 static const struct pinconf_ops sprd_pinconf_ops = {
0847     .is_generic = true,
0848     .pin_config_get = sprd_pinconf_get,
0849     .pin_config_set = sprd_pinconf_set,
0850     .pin_config_group_get = sprd_pinconf_group_get,
0851     .pin_config_group_set = sprd_pinconf_group_set,
0852     .pin_config_dbg_show = sprd_pinconf_dbg_show,
0853     .pin_config_group_dbg_show = sprd_pinconf_group_dbg_show,
0854 };
0855 
0856 static const struct pinconf_generic_params sprd_dt_params[] = {
0857     {"sprd,control", SPRD_PIN_CONFIG_CONTROL, 0},
0858     {"sprd,sleep-mode", SPRD_PIN_CONFIG_SLEEP_MODE, 0},
0859 };
0860 
0861 #ifdef CONFIG_DEBUG_FS
0862 static const struct pin_config_item sprd_conf_items[] = {
0863     PCONFDUMP(SPRD_PIN_CONFIG_CONTROL, "global control", NULL, true),
0864     PCONFDUMP(SPRD_PIN_CONFIG_SLEEP_MODE, "sleep mode", NULL, true),
0865 };
0866 #endif
0867 
0868 static struct pinctrl_desc sprd_pinctrl_desc = {
0869     .pctlops = &sprd_pctrl_ops,
0870     .pmxops = &sprd_pmx_ops,
0871     .confops = &sprd_pinconf_ops,
0872     .num_custom_params = ARRAY_SIZE(sprd_dt_params),
0873     .custom_params = sprd_dt_params,
0874 #ifdef CONFIG_DEBUG_FS
0875     .custom_conf_items = sprd_conf_items,
0876 #endif
0877     .owner = THIS_MODULE,
0878 };
0879 
0880 static int sprd_pinctrl_parse_groups(struct device_node *np,
0881                      struct sprd_pinctrl *sprd_pctl,
0882                      struct sprd_pin_group *grp)
0883 {
0884     struct property *prop;
0885     const char *pin_name;
0886     int ret, i = 0;
0887 
0888     ret = of_property_count_strings(np, "pins");
0889     if (ret < 0)
0890         return ret;
0891 
0892     grp->name = np->name;
0893     grp->npins = ret;
0894     grp->pins = devm_kcalloc(sprd_pctl->dev,
0895                  grp->npins, sizeof(unsigned int),
0896                  GFP_KERNEL);
0897     if (!grp->pins)
0898         return -ENOMEM;
0899 
0900     of_property_for_each_string(np, "pins", prop, pin_name) {
0901         ret = sprd_pinctrl_get_id_by_name(sprd_pctl, pin_name);
0902         if (ret >= 0)
0903             grp->pins[i++] = ret;
0904     }
0905 
0906     for (i = 0; i < grp->npins; i++) {
0907         dev_dbg(sprd_pctl->dev,
0908             "Group[%s] contains [%d] pins: id = %d\n",
0909             grp->name, grp->npins, grp->pins[i]);
0910     }
0911 
0912     return 0;
0913 }
0914 
0915 static unsigned int sprd_pinctrl_get_groups(struct device_node *np)
0916 {
0917     struct device_node *child;
0918     unsigned int group_cnt, cnt;
0919 
0920     group_cnt = of_get_child_count(np);
0921 
0922     for_each_child_of_node(np, child) {
0923         cnt = of_get_child_count(child);
0924         if (cnt > 0)
0925             group_cnt += cnt;
0926     }
0927 
0928     return group_cnt;
0929 }
0930 
0931 static int sprd_pinctrl_parse_dt(struct sprd_pinctrl *sprd_pctl)
0932 {
0933     struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
0934     struct device_node *np = sprd_pctl->dev->of_node;
0935     struct device_node *child, *sub_child;
0936     struct sprd_pin_group *grp;
0937     const char **temp;
0938     int ret;
0939 
0940     if (!np)
0941         return -ENODEV;
0942 
0943     info->ngroups = sprd_pinctrl_get_groups(np);
0944     if (!info->ngroups)
0945         return 0;
0946 
0947     info->groups = devm_kcalloc(sprd_pctl->dev,
0948                     info->ngroups,
0949                     sizeof(struct sprd_pin_group),
0950                     GFP_KERNEL);
0951     if (!info->groups)
0952         return -ENOMEM;
0953 
0954     info->grp_names = devm_kcalloc(sprd_pctl->dev,
0955                        info->ngroups, sizeof(char *),
0956                        GFP_KERNEL);
0957     if (!info->grp_names)
0958         return -ENOMEM;
0959 
0960     temp = info->grp_names;
0961     grp = info->groups;
0962 
0963     for_each_child_of_node(np, child) {
0964         ret = sprd_pinctrl_parse_groups(child, sprd_pctl, grp);
0965         if (ret) {
0966             of_node_put(child);
0967             return ret;
0968         }
0969 
0970         *temp++ = grp->name;
0971         grp++;
0972 
0973         if (of_get_child_count(child) > 0) {
0974             for_each_child_of_node(child, sub_child) {
0975                 ret = sprd_pinctrl_parse_groups(sub_child,
0976                                 sprd_pctl, grp);
0977                 if (ret) {
0978                     of_node_put(sub_child);
0979                     of_node_put(child);
0980                     return ret;
0981                 }
0982 
0983                 *temp++ = grp->name;
0984                 grp++;
0985             }
0986         }
0987     }
0988 
0989     return 0;
0990 }
0991 
0992 static int sprd_pinctrl_add_pins(struct sprd_pinctrl *sprd_pctl,
0993                  struct sprd_pins_info *sprd_soc_pin_info,
0994                  int pins_cnt)
0995 {
0996     struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
0997     unsigned int ctrl_pin = 0, com_pin = 0;
0998     struct sprd_pin *pin;
0999     int i;
1000 
1001     info->npins = pins_cnt;
1002     info->pins = devm_kcalloc(sprd_pctl->dev,
1003                   info->npins, sizeof(struct sprd_pin),
1004                   GFP_KERNEL);
1005     if (!info->pins)
1006         return -ENOMEM;
1007 
1008     for (i = 0, pin = info->pins; i < info->npins; i++, pin++) {
1009         unsigned int reg;
1010 
1011         pin->name = sprd_soc_pin_info[i].name;
1012         pin->type = sprd_soc_pin_info[i].type;
1013         pin->number = sprd_soc_pin_info[i].num;
1014         reg = sprd_soc_pin_info[i].reg;
1015         if (pin->type == GLOBAL_CTRL_PIN) {
1016             pin->reg = (unsigned long)sprd_pctl->base +
1017                 PINCTRL_REG_LEN * reg;
1018             pin->bit_offset = sprd_soc_pin_info[i].bit_offset;
1019             pin->bit_width = sprd_soc_pin_info[i].bit_width;
1020             ctrl_pin++;
1021         } else if (pin->type == COMMON_PIN) {
1022             pin->reg = (unsigned long)sprd_pctl->base +
1023                 PINCTRL_REG_OFFSET + PINCTRL_REG_LEN *
1024                 (i - ctrl_pin);
1025             com_pin++;
1026         } else if (pin->type == MISC_PIN) {
1027             pin->reg = (unsigned long)sprd_pctl->base +
1028                 PINCTRL_REG_MISC_OFFSET + PINCTRL_REG_LEN *
1029                 (i - ctrl_pin - com_pin);
1030         }
1031     }
1032 
1033     for (i = 0, pin = info->pins; i < info->npins; pin++, i++) {
1034         dev_dbg(sprd_pctl->dev, "pin name[%s-%d], type = %d, "
1035             "bit offset = %ld, bit width = %ld, reg = 0x%lx\n",
1036             pin->name, pin->number, pin->type,
1037             pin->bit_offset, pin->bit_width, pin->reg);
1038     }
1039 
1040     return 0;
1041 }
1042 
1043 int sprd_pinctrl_core_probe(struct platform_device *pdev,
1044                 struct sprd_pins_info *sprd_soc_pin_info,
1045                 int pins_cnt)
1046 {
1047     struct sprd_pinctrl *sprd_pctl;
1048     struct sprd_pinctrl_soc_info *pinctrl_info;
1049     struct pinctrl_pin_desc *pin_desc;
1050     int ret, i;
1051 
1052     sprd_pctl = devm_kzalloc(&pdev->dev, sizeof(struct sprd_pinctrl),
1053                  GFP_KERNEL);
1054     if (!sprd_pctl)
1055         return -ENOMEM;
1056 
1057     sprd_pctl->base = devm_platform_ioremap_resource(pdev, 0);
1058     if (IS_ERR(sprd_pctl->base))
1059         return PTR_ERR(sprd_pctl->base);
1060 
1061     pinctrl_info = devm_kzalloc(&pdev->dev,
1062                     sizeof(struct sprd_pinctrl_soc_info),
1063                     GFP_KERNEL);
1064     if (!pinctrl_info)
1065         return -ENOMEM;
1066 
1067     sprd_pctl->info = pinctrl_info;
1068     sprd_pctl->dev = &pdev->dev;
1069     platform_set_drvdata(pdev, sprd_pctl);
1070 
1071     ret = sprd_pinctrl_add_pins(sprd_pctl, sprd_soc_pin_info, pins_cnt);
1072     if (ret) {
1073         dev_err(&pdev->dev, "fail to add pins information\n");
1074         return ret;
1075     }
1076 
1077     ret = sprd_pinctrl_parse_dt(sprd_pctl);
1078     if (ret) {
1079         dev_err(&pdev->dev, "fail to parse dt properties\n");
1080         return ret;
1081     }
1082 
1083     pin_desc = devm_kcalloc(&pdev->dev,
1084                 pinctrl_info->npins,
1085                 sizeof(struct pinctrl_pin_desc),
1086                 GFP_KERNEL);
1087     if (!pin_desc)
1088         return -ENOMEM;
1089 
1090     for (i = 0; i < pinctrl_info->npins; i++) {
1091         pin_desc[i].number = pinctrl_info->pins[i].number;
1092         pin_desc[i].name = pinctrl_info->pins[i].name;
1093         pin_desc[i].drv_data = pinctrl_info;
1094     }
1095 
1096     sprd_pinctrl_desc.pins = pin_desc;
1097     sprd_pinctrl_desc.name = dev_name(&pdev->dev);
1098     sprd_pinctrl_desc.npins = pinctrl_info->npins;
1099 
1100     sprd_pctl->pctl = pinctrl_register(&sprd_pinctrl_desc,
1101                        &pdev->dev, (void *)sprd_pctl);
1102     if (IS_ERR(sprd_pctl->pctl)) {
1103         dev_err(&pdev->dev, "could not register pinctrl driver\n");
1104         return PTR_ERR(sprd_pctl->pctl);
1105     }
1106 
1107     return 0;
1108 }
1109 EXPORT_SYMBOL_GPL(sprd_pinctrl_core_probe);
1110 
1111 int sprd_pinctrl_remove(struct platform_device *pdev)
1112 {
1113     struct sprd_pinctrl *sprd_pctl = platform_get_drvdata(pdev);
1114 
1115     pinctrl_unregister(sprd_pctl->pctl);
1116     return 0;
1117 }
1118 EXPORT_SYMBOL_GPL(sprd_pinctrl_remove);
1119 
1120 void sprd_pinctrl_shutdown(struct platform_device *pdev)
1121 {
1122     struct pinctrl *pinctl;
1123     struct pinctrl_state *state;
1124 
1125     pinctl = devm_pinctrl_get(&pdev->dev);
1126     if (IS_ERR(pinctl))
1127         return;
1128     state = pinctrl_lookup_state(pinctl, "shutdown");
1129     if (IS_ERR(state))
1130         return;
1131     pinctrl_select_state(pinctl, state);
1132 }
1133 EXPORT_SYMBOL_GPL(sprd_pinctrl_shutdown);
1134 
1135 MODULE_DESCRIPTION("SPREADTRUM Pin Controller Driver");
1136 MODULE_AUTHOR("Baolin Wang <baolin.wang@spreadtrum.com>");
1137 MODULE_LICENSE("GPL v2");
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