pinctrl/spear/pinctrl-spear310.c

0001 /*
0002  * Driver for the ST Microelectronics SPEAr310 pinmux
0003  *
0004  * Copyright (C) 2012 ST Microelectronics
0005  * Viresh Kumar <vireshk@kernel.org>
0006  *
0007  * This file is licensed under the terms of the GNU General Public
0008  * License version 2. This program is licensed "as is" without any
0009  * warranty of any kind, whether express or implied.
0010  */
0011
0012 #include <linux/err.h>
0013 #include <linux/init.h>
0014 #include <linux/of_device.h>
0015 #include <linux/platform_device.h>
0016 #include "pinctrl-spear3xx.h"
0017
0018 #define DRIVER_NAME "spear310-pinmux"
0019
0020 /* addresses */
0021 #define PMX_CONFIG_REG          0x08
0022
0023 /* emi_cs_0_to_5_pins */
0024 static const unsigned emi_cs_0_to_5_pins[] = { 45, 46, 47, 48, 49, 50 };
0025 static struct spear_muxreg emi_cs_0_to_5_muxreg[] = {
0026     {
0027         .reg = PMX_CONFIG_REG,
0028         .mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK,
0029         .val = 0,
0030     },
0031 };
0032
0033 static struct spear_modemux emi_cs_0_to_5_modemux[] = {
0034     {
0035         .muxregs = emi_cs_0_to_5_muxreg,
0036         .nmuxregs = ARRAY_SIZE(emi_cs_0_to_5_muxreg),
0037     },
0038 };
0039
0040 static struct spear_pingroup emi_cs_0_to_5_pingroup = {
0041     .name = "emi_cs_0_to_5_grp",
0042     .pins = emi_cs_0_to_5_pins,
0043     .npins = ARRAY_SIZE(emi_cs_0_to_5_pins),
0044     .modemuxs = emi_cs_0_to_5_modemux,
0045     .nmodemuxs = ARRAY_SIZE(emi_cs_0_to_5_modemux),
0046 };
0047
0048 static const char *const emi_cs_0_to_5_grps[] = { "emi_cs_0_to_5_grp" };
0049 static struct spear_function emi_cs_0_to_5_function = {
0050     .name = "emi",
0051     .groups = emi_cs_0_to_5_grps,
0052     .ngroups = ARRAY_SIZE(emi_cs_0_to_5_grps),
0053 };
0054
0055 /* uart1_pins */
0056 static const unsigned uart1_pins[] = { 0, 1 };
0057 static struct spear_muxreg uart1_muxreg[] = {
0058     {
0059         .reg = PMX_CONFIG_REG,
0060         .mask = PMX_FIRDA_MASK,
0061         .val = 0,
0062     },
0063 };
0064
0065 static struct spear_modemux uart1_modemux[] = {
0066     {
0067         .muxregs = uart1_muxreg,
0068         .nmuxregs = ARRAY_SIZE(uart1_muxreg),
0069     },
0070 };
0071
0072 static struct spear_pingroup uart1_pingroup = {
0073     .name = "uart1_grp",
0074     .pins = uart1_pins,
0075     .npins = ARRAY_SIZE(uart1_pins),
0076     .modemuxs = uart1_modemux,
0077     .nmodemuxs = ARRAY_SIZE(uart1_modemux),
0078 };
0079
0080 static const char *const uart1_grps[] = { "uart1_grp" };
0081 static struct spear_function uart1_function = {
0082     .name = "uart1",
0083     .groups = uart1_grps,
0084     .ngroups = ARRAY_SIZE(uart1_grps),
0085 };
0086
0087 /* uart2_pins */
0088 static const unsigned uart2_pins[] = { 43, 44 };
0089 static struct spear_muxreg uart2_muxreg[] = {
0090     {
0091         .reg = PMX_CONFIG_REG,
0092         .mask = PMX_TIMER_0_1_MASK,
0093         .val = 0,
0094     },
0095 };
0096
0097 static struct spear_modemux uart2_modemux[] = {
0098     {
0099         .muxregs = uart2_muxreg,
0100         .nmuxregs = ARRAY_SIZE(uart2_muxreg),
0101     },
0102 };
0103
0104 static struct spear_pingroup uart2_pingroup = {
0105     .name = "uart2_grp",
0106     .pins = uart2_pins,
0107     .npins = ARRAY_SIZE(uart2_pins),
0108     .modemuxs = uart2_modemux,
0109     .nmodemuxs = ARRAY_SIZE(uart2_modemux),
0110 };
0111
0112 static const char *const uart2_grps[] = { "uart2_grp" };
0113 static struct spear_function uart2_function = {
0114     .name = "uart2",
0115     .groups = uart2_grps,
0116     .ngroups = ARRAY_SIZE(uart2_grps),
0117 };
0118
0119 /* uart3_pins */
0120 static const unsigned uart3_pins[] = { 37, 38 };
0121 static struct spear_muxreg uart3_muxreg[] = {
0122     {
0123         .reg = PMX_CONFIG_REG,
0124         .mask = PMX_UART0_MODEM_MASK,
0125         .val = 0,
0126     },
0127 };
0128
0129 static struct spear_modemux uart3_modemux[] = {
0130     {
0131         .muxregs = uart3_muxreg,
0132         .nmuxregs = ARRAY_SIZE(uart3_muxreg),
0133     },
0134 };
0135
0136 static struct spear_pingroup uart3_pingroup = {
0137     .name = "uart3_grp",
0138     .pins = uart3_pins,
0139     .npins = ARRAY_SIZE(uart3_pins),
0140     .modemuxs = uart3_modemux,
0141     .nmodemuxs = ARRAY_SIZE(uart3_modemux),
0142 };
0143
0144 static const char *const uart3_grps[] = { "uart3_grp" };
0145 static struct spear_function uart3_function = {
0146     .name = "uart3",
0147     .groups = uart3_grps,
0148     .ngroups = ARRAY_SIZE(uart3_grps),
0149 };
0150
0151 /* uart4_pins */
0152 static const unsigned uart4_pins[] = { 39, 40 };
0153 static struct spear_muxreg uart4_muxreg[] = {
0154     {
0155         .reg = PMX_CONFIG_REG,
0156         .mask = PMX_UART0_MODEM_MASK,
0157         .val = 0,
0158     },
0159 };
0160
0161 static struct spear_modemux uart4_modemux[] = {
0162     {
0163         .muxregs = uart4_muxreg,
0164         .nmuxregs = ARRAY_SIZE(uart4_muxreg),
0165     },
0166 };
0167
0168 static struct spear_pingroup uart4_pingroup = {
0169     .name = "uart4_grp",
0170     .pins = uart4_pins,
0171     .npins = ARRAY_SIZE(uart4_pins),
0172     .modemuxs = uart4_modemux,
0173     .nmodemuxs = ARRAY_SIZE(uart4_modemux),
0174 };
0175
0176 static const char *const uart4_grps[] = { "uart4_grp" };
0177 static struct spear_function uart4_function = {
0178     .name = "uart4",
0179     .groups = uart4_grps,
0180     .ngroups = ARRAY_SIZE(uart4_grps),
0181 };
0182
0183 /* uart5_pins */
0184 static const unsigned uart5_pins[] = { 41, 42 };
0185 static struct spear_muxreg uart5_muxreg[] = {
0186     {
0187         .reg = PMX_CONFIG_REG,
0188         .mask = PMX_UART0_MODEM_MASK,
0189         .val = 0,
0190     },
0191 };
0192
0193 static struct spear_modemux uart5_modemux[] = {
0194     {
0195         .muxregs = uart5_muxreg,
0196         .nmuxregs = ARRAY_SIZE(uart5_muxreg),
0197     },
0198 };
0199
0200 static struct spear_pingroup uart5_pingroup = {
0201     .name = "uart5_grp",
0202     .pins = uart5_pins,
0203     .npins = ARRAY_SIZE(uart5_pins),
0204     .modemuxs = uart5_modemux,
0205     .nmodemuxs = ARRAY_SIZE(uart5_modemux),
0206 };
0207
0208 static const char *const uart5_grps[] = { "uart5_grp" };
0209 static struct spear_function uart5_function = {
0210     .name = "uart5",
0211     .groups = uart5_grps,
0212     .ngroups = ARRAY_SIZE(uart5_grps),
0213 };
0214
0215 /* fsmc_pins */
0216 static const unsigned fsmc_pins[] = { 34, 35, 36 };
0217 static struct spear_muxreg fsmc_muxreg[] = {
0218     {
0219         .reg = PMX_CONFIG_REG,
0220         .mask = PMX_SSP_CS_MASK,
0221         .val = 0,
0222     },
0223 };
0224
0225 static struct spear_modemux fsmc_modemux[] = {
0226     {
0227         .muxregs = fsmc_muxreg,
0228         .nmuxregs = ARRAY_SIZE(fsmc_muxreg),
0229     },
0230 };
0231
0232 static struct spear_pingroup fsmc_pingroup = {
0233     .name = "fsmc_grp",
0234     .pins = fsmc_pins,
0235     .npins = ARRAY_SIZE(fsmc_pins),
0236     .modemuxs = fsmc_modemux,
0237     .nmodemuxs = ARRAY_SIZE(fsmc_modemux),
0238 };
0239
0240 static const char *const fsmc_grps[] = { "fsmc_grp" };
0241 static struct spear_function fsmc_function = {
0242     .name = "fsmc",
0243     .groups = fsmc_grps,
0244     .ngroups = ARRAY_SIZE(fsmc_grps),
0245 };
0246
0247 /* rs485_0_pins */
0248 static const unsigned rs485_0_pins[] = { 19, 20, 21, 22, 23 };
0249 static struct spear_muxreg rs485_0_muxreg[] = {
0250     {
0251         .reg = PMX_CONFIG_REG,
0252         .mask = PMX_MII_MASK,
0253         .val = 0,
0254     },
0255 };
0256
0257 static struct spear_modemux rs485_0_modemux[] = {
0258     {
0259         .muxregs = rs485_0_muxreg,
0260         .nmuxregs = ARRAY_SIZE(rs485_0_muxreg),
0261     },
0262 };
0263
0264 static struct spear_pingroup rs485_0_pingroup = {
0265     .name = "rs485_0_grp",
0266     .pins = rs485_0_pins,
0267     .npins = ARRAY_SIZE(rs485_0_pins),
0268     .modemuxs = rs485_0_modemux,
0269     .nmodemuxs = ARRAY_SIZE(rs485_0_modemux),
0270 };
0271
0272 static const char *const rs485_0_grps[] = { "rs485_0" };
0273 static struct spear_function rs485_0_function = {
0274     .name = "rs485_0",
0275     .groups = rs485_0_grps,
0276     .ngroups = ARRAY_SIZE(rs485_0_grps),
0277 };
0278
0279 /* rs485_1_pins */
0280 static const unsigned rs485_1_pins[] = { 14, 15, 16, 17, 18 };
0281 static struct spear_muxreg rs485_1_muxreg[] = {
0282     {
0283         .reg = PMX_CONFIG_REG,
0284         .mask = PMX_MII_MASK,
0285         .val = 0,
0286     },
0287 };
0288
0289 static struct spear_modemux rs485_1_modemux[] = {
0290     {
0291         .muxregs = rs485_1_muxreg,
0292         .nmuxregs = ARRAY_SIZE(rs485_1_muxreg),
0293     },
0294 };
0295
0296 static struct spear_pingroup rs485_1_pingroup = {
0297     .name = "rs485_1_grp",
0298     .pins = rs485_1_pins,
0299     .npins = ARRAY_SIZE(rs485_1_pins),
0300     .modemuxs = rs485_1_modemux,
0301     .nmodemuxs = ARRAY_SIZE(rs485_1_modemux),
0302 };
0303
0304 static const char *const rs485_1_grps[] = { "rs485_1" };
0305 static struct spear_function rs485_1_function = {
0306     .name = "rs485_1",
0307     .groups = rs485_1_grps,
0308     .ngroups = ARRAY_SIZE(rs485_1_grps),
0309 };
0310
0311 /* tdm_pins */
0312 static const unsigned tdm_pins[] = { 10, 11, 12, 13 };
0313 static struct spear_muxreg tdm_muxreg[] = {
0314     {
0315         .reg = PMX_CONFIG_REG,
0316         .mask = PMX_MII_MASK,
0317         .val = 0,
0318     },
0319 };
0320
0321 static struct spear_modemux tdm_modemux[] = {
0322     {
0323         .muxregs = tdm_muxreg,
0324         .nmuxregs = ARRAY_SIZE(tdm_muxreg),
0325     },
0326 };
0327
0328 static struct spear_pingroup tdm_pingroup = {
0329     .name = "tdm_grp",
0330     .pins = tdm_pins,
0331     .npins = ARRAY_SIZE(tdm_pins),
0332     .modemuxs = tdm_modemux,
0333     .nmodemuxs = ARRAY_SIZE(tdm_modemux),
0334 };
0335
0336 static const char *const tdm_grps[] = { "tdm_grp" };
0337 static struct spear_function tdm_function = {
0338     .name = "tdm",
0339     .groups = tdm_grps,
0340     .ngroups = ARRAY_SIZE(tdm_grps),
0341 };
0342
0343 /* pingroups */
0344 static struct spear_pingroup *spear310_pingroups[] = {
0345     SPEAR3XX_COMMON_PINGROUPS,
0346     &emi_cs_0_to_5_pingroup,
0347     &uart1_pingroup,
0348     &uart2_pingroup,
0349     &uart3_pingroup,
0350     &uart4_pingroup,
0351     &uart5_pingroup,
0352     &fsmc_pingroup,
0353     &rs485_0_pingroup,
0354     &rs485_1_pingroup,
0355     &tdm_pingroup,
0356 };
0357
0358 /* functions */
0359 static struct spear_function *spear310_functions[] = {
0360     SPEAR3XX_COMMON_FUNCTIONS,
0361     &emi_cs_0_to_5_function,
0362     &uart1_function,
0363     &uart2_function,
0364     &uart3_function,
0365     &uart4_function,
0366     &uart5_function,
0367     &fsmc_function,
0368     &rs485_0_function,
0369     &rs485_1_function,
0370     &tdm_function,
0371 };
0372
0373 static const struct of_device_id spear310_pinctrl_of_match[] = {
0374     {
0375         .compatible = "st,spear310-pinmux",
0376     },
0377     {},
0378 };
0379
0380 static int spear310_pinctrl_probe(struct platform_device *pdev)
0381 {
0382     spear3xx_machdata.groups = spear310_pingroups;
0383     spear3xx_machdata.ngroups = ARRAY_SIZE(spear310_pingroups);
0384     spear3xx_machdata.functions = spear310_functions;
0385     spear3xx_machdata.nfunctions = ARRAY_SIZE(spear310_functions);
0386
0387     pmx_init_addr(&spear3xx_machdata, PMX_CONFIG_REG);
0388     pmx_init_gpio_pingroup_addr(spear3xx_machdata.gpio_pingroups,
0389             spear3xx_machdata.ngpio_pingroups, PMX_CONFIG_REG);
0390
0391     spear3xx_machdata.modes_supported = false;
0392
0393     return spear_pinctrl_probe(pdev, &spear3xx_machdata);
0394 }
0395
0396 static struct platform_driver spear310_pinctrl_driver = {
0397     .driver = {
0398         .name = DRIVER_NAME,
0399         .of_match_table = spear310_pinctrl_of_match,
0400     },
0401     .probe = spear310_pinctrl_probe,
0402 };
0403
0404 static int __init spear310_pinctrl_init(void)
0405 {
0406     return platform_driver_register(&spear310_pinctrl_driver);
0407 }
0408 arch_initcall(spear310_pinctrl_init);