pinctrl/spear/pinctrl-spear300.c

0001 /*
0002  * Driver for the ST Microelectronics SPEAr300 pinmux
0003  *
0004  * Copyright (C) 2012 ST Microelectronics
0005  * Viresh Kumar <vireshk@kernel.org>
0006  *
0007  * This file is licensed under the terms of the GNU General Public
0008  * License version 2. This program is licensed "as is" without any
0009  * warranty of any kind, whether express or implied.
0010  */
0011
0012 #include <linux/err.h>
0013 #include <linux/init.h>
0014 #include <linux/of_device.h>
0015 #include <linux/platform_device.h>
0016 #include "pinctrl-spear3xx.h"
0017
0018 #define DRIVER_NAME "spear300-pinmux"
0019
0020 /* addresses */
0021 #define PMX_CONFIG_REG          0x00
0022 #define MODE_CONFIG_REG         0x04
0023
0024 /* modes */
0025 #define NAND_MODE           (1 << 0)
0026 #define NOR_MODE            (1 << 1)
0027 #define PHOTO_FRAME_MODE        (1 << 2)
0028 #define LEND_IP_PHONE_MODE      (1 << 3)
0029 #define HEND_IP_PHONE_MODE      (1 << 4)
0030 #define LEND_WIFI_PHONE_MODE        (1 << 5)
0031 #define HEND_WIFI_PHONE_MODE        (1 << 6)
0032 #define ATA_PABX_WI2S_MODE      (1 << 7)
0033 #define ATA_PABX_I2S_MODE       (1 << 8)
0034 #define CAML_LCDW_MODE          (1 << 9)
0035 #define CAMU_LCD_MODE           (1 << 10)
0036 #define CAMU_WLCD_MODE          (1 << 11)
0037 #define CAML_LCD_MODE           (1 << 12)
0038
0039 static struct spear_pmx_mode pmx_mode_nand = {
0040     .name = "nand",
0041     .mode = NAND_MODE,
0042     .reg = MODE_CONFIG_REG,
0043     .mask = 0x0000000F,
0044     .val = 0x00,
0045 };
0046
0047 static struct spear_pmx_mode pmx_mode_nor = {
0048     .name = "nor",
0049     .mode = NOR_MODE,
0050     .reg = MODE_CONFIG_REG,
0051     .mask = 0x0000000F,
0052     .val = 0x01,
0053 };
0054
0055 static struct spear_pmx_mode pmx_mode_photo_frame = {
0056     .name = "photo frame mode",
0057     .mode = PHOTO_FRAME_MODE,
0058     .reg = MODE_CONFIG_REG,
0059     .mask = 0x0000000F,
0060     .val = 0x02,
0061 };
0062
0063 static struct spear_pmx_mode pmx_mode_lend_ip_phone = {
0064     .name = "lend ip phone mode",
0065     .mode = LEND_IP_PHONE_MODE,
0066     .reg = MODE_CONFIG_REG,
0067     .mask = 0x0000000F,
0068     .val = 0x03,
0069 };
0070
0071 static struct spear_pmx_mode pmx_mode_hend_ip_phone = {
0072     .name = "hend ip phone mode",
0073     .mode = HEND_IP_PHONE_MODE,
0074     .reg = MODE_CONFIG_REG,
0075     .mask = 0x0000000F,
0076     .val = 0x04,
0077 };
0078
0079 static struct spear_pmx_mode pmx_mode_lend_wifi_phone = {
0080     .name = "lend wifi phone mode",
0081     .mode = LEND_WIFI_PHONE_MODE,
0082     .reg = MODE_CONFIG_REG,
0083     .mask = 0x0000000F,
0084     .val = 0x05,
0085 };
0086
0087 static struct spear_pmx_mode pmx_mode_hend_wifi_phone = {
0088     .name = "hend wifi phone mode",
0089     .mode = HEND_WIFI_PHONE_MODE,
0090     .reg = MODE_CONFIG_REG,
0091     .mask = 0x0000000F,
0092     .val = 0x06,
0093 };
0094
0095 static struct spear_pmx_mode pmx_mode_ata_pabx_wi2s = {
0096     .name = "ata pabx wi2s mode",
0097     .mode = ATA_PABX_WI2S_MODE,
0098     .reg = MODE_CONFIG_REG,
0099     .mask = 0x0000000F,
0100     .val = 0x07,
0101 };
0102
0103 static struct spear_pmx_mode pmx_mode_ata_pabx_i2s = {
0104     .name = "ata pabx i2s mode",
0105     .mode = ATA_PABX_I2S_MODE,
0106     .reg = MODE_CONFIG_REG,
0107     .mask = 0x0000000F,
0108     .val = 0x08,
0109 };
0110
0111 static struct spear_pmx_mode pmx_mode_caml_lcdw = {
0112     .name = "caml lcdw mode",
0113     .mode = CAML_LCDW_MODE,
0114     .reg = MODE_CONFIG_REG,
0115     .mask = 0x0000000F,
0116     .val = 0x0C,
0117 };
0118
0119 static struct spear_pmx_mode pmx_mode_camu_lcd = {
0120     .name = "camu lcd mode",
0121     .mode = CAMU_LCD_MODE,
0122     .reg = MODE_CONFIG_REG,
0123     .mask = 0x0000000F,
0124     .val = 0x0D,
0125 };
0126
0127 static struct spear_pmx_mode pmx_mode_camu_wlcd = {
0128     .name = "camu wlcd mode",
0129     .mode = CAMU_WLCD_MODE,
0130     .reg = MODE_CONFIG_REG,
0131     .mask = 0x0000000F,
0132     .val = 0xE,
0133 };
0134
0135 static struct spear_pmx_mode pmx_mode_caml_lcd = {
0136     .name = "caml lcd mode",
0137     .mode = CAML_LCD_MODE,
0138     .reg = MODE_CONFIG_REG,
0139     .mask = 0x0000000F,
0140     .val = 0x0F,
0141 };
0142
0143 static struct spear_pmx_mode *spear300_pmx_modes[] = {
0144     &pmx_mode_nand,
0145     &pmx_mode_nor,
0146     &pmx_mode_photo_frame,
0147     &pmx_mode_lend_ip_phone,
0148     &pmx_mode_hend_ip_phone,
0149     &pmx_mode_lend_wifi_phone,
0150     &pmx_mode_hend_wifi_phone,
0151     &pmx_mode_ata_pabx_wi2s,
0152     &pmx_mode_ata_pabx_i2s,
0153     &pmx_mode_caml_lcdw,
0154     &pmx_mode_camu_lcd,
0155     &pmx_mode_camu_wlcd,
0156     &pmx_mode_caml_lcd,
0157 };
0158
0159 /* fsmc_2chips_pins */
0160 static const unsigned fsmc_2chips_pins[] = { 1, 97 };
0161 static struct spear_muxreg fsmc_2chips_muxreg[] = {
0162     {
0163         .reg = PMX_CONFIG_REG,
0164         .mask = PMX_FIRDA_MASK,
0165         .val = 0,
0166     },
0167 };
0168
0169 static struct spear_modemux fsmc_2chips_modemux[] = {
0170     {
0171         .modes = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |
0172             ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,
0173         .muxregs = fsmc_2chips_muxreg,
0174         .nmuxregs = ARRAY_SIZE(fsmc_2chips_muxreg),
0175     },
0176 };
0177
0178 static struct spear_pingroup fsmc_2chips_pingroup = {
0179     .name = "fsmc_2chips_grp",
0180     .pins = fsmc_2chips_pins,
0181     .npins = ARRAY_SIZE(fsmc_2chips_pins),
0182     .modemuxs = fsmc_2chips_modemux,
0183     .nmodemuxs = ARRAY_SIZE(fsmc_2chips_modemux),
0184 };
0185
0186 /* fsmc_4chips_pins */
0187 static const unsigned fsmc_4chips_pins[] = { 1, 2, 3, 97 };
0188 static struct spear_muxreg fsmc_4chips_muxreg[] = {
0189     {
0190         .reg = PMX_CONFIG_REG,
0191         .mask = PMX_FIRDA_MASK | PMX_UART0_MASK,
0192         .val = 0,
0193     },
0194 };
0195
0196 static struct spear_modemux fsmc_4chips_modemux[] = {
0197     {
0198         .modes = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |
0199             ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,
0200         .muxregs = fsmc_4chips_muxreg,
0201         .nmuxregs = ARRAY_SIZE(fsmc_4chips_muxreg),
0202     },
0203 };
0204
0205 static struct spear_pingroup fsmc_4chips_pingroup = {
0206     .name = "fsmc_4chips_grp",
0207     .pins = fsmc_4chips_pins,
0208     .npins = ARRAY_SIZE(fsmc_4chips_pins),
0209     .modemuxs = fsmc_4chips_modemux,
0210     .nmodemuxs = ARRAY_SIZE(fsmc_4chips_modemux),
0211 };
0212
0213 static const char *const fsmc_grps[] = { "fsmc_2chips_grp", "fsmc_4chips_grp"
0214 };
0215 static struct spear_function fsmc_function = {
0216     .name = "fsmc",
0217     .groups = fsmc_grps,
0218     .ngroups = ARRAY_SIZE(fsmc_grps),
0219 };
0220
0221 /* clcd_lcdmode_pins */
0222 static const unsigned clcd_lcdmode_pins[] = { 49, 50 };
0223 static struct spear_muxreg clcd_lcdmode_muxreg[] = {
0224     {
0225         .reg = PMX_CONFIG_REG,
0226         .mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK,
0227         .val = 0,
0228     },
0229 };
0230
0231 static struct spear_modemux clcd_lcdmode_modemux[] = {
0232     {
0233         .modes = HEND_IP_PHONE_MODE | HEND_WIFI_PHONE_MODE |
0234             CAMU_LCD_MODE | CAML_LCD_MODE,
0235         .muxregs = clcd_lcdmode_muxreg,
0236         .nmuxregs = ARRAY_SIZE(clcd_lcdmode_muxreg),
0237     },
0238 };
0239
0240 static struct spear_pingroup clcd_lcdmode_pingroup = {
0241     .name = "clcd_lcdmode_grp",
0242     .pins = clcd_lcdmode_pins,
0243     .npins = ARRAY_SIZE(clcd_lcdmode_pins),
0244     .modemuxs = clcd_lcdmode_modemux,
0245     .nmodemuxs = ARRAY_SIZE(clcd_lcdmode_modemux),
0246 };
0247
0248 /* clcd_pfmode_pins */
0249 static const unsigned clcd_pfmode_pins[] = { 47, 48, 49, 50 };
0250 static struct spear_muxreg clcd_pfmode_muxreg[] = {
0251     {
0252         .reg = PMX_CONFIG_REG,
0253         .mask = PMX_TIMER_2_3_MASK,
0254         .val = 0,
0255     },
0256 };
0257
0258 static struct spear_modemux clcd_pfmode_modemux[] = {
0259     {
0260         .modes = PHOTO_FRAME_MODE,
0261         .muxregs = clcd_pfmode_muxreg,
0262         .nmuxregs = ARRAY_SIZE(clcd_pfmode_muxreg),
0263     },
0264 };
0265
0266 static struct spear_pingroup clcd_pfmode_pingroup = {
0267     .name = "clcd_pfmode_grp",
0268     .pins = clcd_pfmode_pins,
0269     .npins = ARRAY_SIZE(clcd_pfmode_pins),
0270     .modemuxs = clcd_pfmode_modemux,
0271     .nmodemuxs = ARRAY_SIZE(clcd_pfmode_modemux),
0272 };
0273
0274 static const char *const clcd_grps[] = { "clcd_lcdmode_grp", "clcd_pfmode_grp"
0275 };
0276 static struct spear_function clcd_function = {
0277     .name = "clcd",
0278     .groups = clcd_grps,
0279     .ngroups = ARRAY_SIZE(clcd_grps),
0280 };
0281
0282 /* tdm_pins */
0283 static const unsigned tdm_pins[] = { 34, 35, 36, 37, 38 };
0284 static struct spear_muxreg tdm_muxreg[] = {
0285     {
0286         .reg = PMX_CONFIG_REG,
0287         .mask = PMX_UART0_MODEM_MASK | PMX_SSP_CS_MASK,
0288         .val = 0,
0289     },
0290 };
0291
0292 static struct spear_modemux tdm_modemux[] = {
0293     {
0294         .modes = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
0295             HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE
0296             | HEND_WIFI_PHONE_MODE | ATA_PABX_WI2S_MODE
0297             | ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
0298             | CAMU_WLCD_MODE | CAML_LCD_MODE,
0299         .muxregs = tdm_muxreg,
0300         .nmuxregs = ARRAY_SIZE(tdm_muxreg),
0301     },
0302 };
0303
0304 static struct spear_pingroup tdm_pingroup = {
0305     .name = "tdm_grp",
0306     .pins = tdm_pins,
0307     .npins = ARRAY_SIZE(tdm_pins),
0308     .modemuxs = tdm_modemux,
0309     .nmodemuxs = ARRAY_SIZE(tdm_modemux),
0310 };
0311
0312 static const char *const tdm_grps[] = { "tdm_grp" };
0313 static struct spear_function tdm_function = {
0314     .name = "tdm",
0315     .groups = tdm_grps,
0316     .ngroups = ARRAY_SIZE(tdm_grps),
0317 };
0318
0319 /* i2c_clk_pins */
0320 static const unsigned i2c_clk_pins[] = { 45, 46, 47, 48 };
0321 static struct spear_muxreg i2c_clk_muxreg[] = {
0322     {
0323         .reg = PMX_CONFIG_REG,
0324         .mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK,
0325         .val = 0,
0326     },
0327 };
0328
0329 static struct spear_modemux i2c_clk_modemux[] = {
0330     {
0331         .modes = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE |
0332             LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |
0333             ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE | CAML_LCDW_MODE
0334             | CAML_LCD_MODE,
0335         .muxregs = i2c_clk_muxreg,
0336         .nmuxregs = ARRAY_SIZE(i2c_clk_muxreg),
0337     },
0338 };
0339
0340 static struct spear_pingroup i2c_clk_pingroup = {
0341     .name = "i2c_clk_grp_grp",
0342     .pins = i2c_clk_pins,
0343     .npins = ARRAY_SIZE(i2c_clk_pins),
0344     .modemuxs = i2c_clk_modemux,
0345     .nmodemuxs = ARRAY_SIZE(i2c_clk_modemux),
0346 };
0347
0348 static const char *const i2c_grps[] = { "i2c_clk_grp" };
0349 static struct spear_function i2c_function = {
0350     .name = "i2c1",
0351     .groups = i2c_grps,
0352     .ngroups = ARRAY_SIZE(i2c_grps),
0353 };
0354
0355 /* caml_pins */
0356 static const unsigned caml_pins[] = { 12, 13, 14, 15, 16, 17, 18, 19, 20, 21 };
0357 static struct spear_muxreg caml_muxreg[] = {
0358     {
0359         .reg = PMX_CONFIG_REG,
0360         .mask = PMX_MII_MASK,
0361         .val = 0,
0362     },
0363 };
0364
0365 static struct spear_modemux caml_modemux[] = {
0366     {
0367         .modes = CAML_LCDW_MODE | CAML_LCD_MODE,
0368         .muxregs = caml_muxreg,
0369         .nmuxregs = ARRAY_SIZE(caml_muxreg),
0370     },
0371 };
0372
0373 static struct spear_pingroup caml_pingroup = {
0374     .name = "caml_grp",
0375     .pins = caml_pins,
0376     .npins = ARRAY_SIZE(caml_pins),
0377     .modemuxs = caml_modemux,
0378     .nmodemuxs = ARRAY_SIZE(caml_modemux),
0379 };
0380
0381 /* camu_pins */
0382 static const unsigned camu_pins[] = { 16, 17, 18, 19, 20, 21, 45, 46, 47, 48 };
0383 static struct spear_muxreg camu_muxreg[] = {
0384     {
0385         .reg = PMX_CONFIG_REG,
0386         .mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK | PMX_MII_MASK,
0387         .val = 0,
0388     },
0389 };
0390
0391 static struct spear_modemux camu_modemux[] = {
0392     {
0393         .modes = CAMU_LCD_MODE | CAMU_WLCD_MODE,
0394         .muxregs = camu_muxreg,
0395         .nmuxregs = ARRAY_SIZE(camu_muxreg),
0396     },
0397 };
0398
0399 static struct spear_pingroup camu_pingroup = {
0400     .name = "camu_grp",
0401     .pins = camu_pins,
0402     .npins = ARRAY_SIZE(camu_pins),
0403     .modemuxs = camu_modemux,
0404     .nmodemuxs = ARRAY_SIZE(camu_modemux),
0405 };
0406
0407 static const char *const cam_grps[] = { "caml_grp", "camu_grp" };
0408 static struct spear_function cam_function = {
0409     .name = "cam",
0410     .groups = cam_grps,
0411     .ngroups = ARRAY_SIZE(cam_grps),
0412 };
0413
0414 /* dac_pins */
0415 static const unsigned dac_pins[] = { 43, 44 };
0416 static struct spear_muxreg dac_muxreg[] = {
0417     {
0418         .reg = PMX_CONFIG_REG,
0419         .mask = PMX_TIMER_0_1_MASK,
0420         .val = 0,
0421     },
0422 };
0423
0424 static struct spear_modemux dac_modemux[] = {
0425     {
0426         .modes = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
0427             | CAMU_WLCD_MODE | CAML_LCD_MODE,
0428         .muxregs = dac_muxreg,
0429         .nmuxregs = ARRAY_SIZE(dac_muxreg),
0430     },
0431 };
0432
0433 static struct spear_pingroup dac_pingroup = {
0434     .name = "dac_grp",
0435     .pins = dac_pins,
0436     .npins = ARRAY_SIZE(dac_pins),
0437     .modemuxs = dac_modemux,
0438     .nmodemuxs = ARRAY_SIZE(dac_modemux),
0439 };
0440
0441 static const char *const dac_grps[] = { "dac_grp" };
0442 static struct spear_function dac_function = {
0443     .name = "dac",
0444     .groups = dac_grps,
0445     .ngroups = ARRAY_SIZE(dac_grps),
0446 };
0447
0448 /* i2s_pins */
0449 static const unsigned i2s_pins[] = { 39, 40, 41, 42 };
0450 static struct spear_muxreg i2s_muxreg[] = {
0451     {
0452         .reg = PMX_CONFIG_REG,
0453         .mask = PMX_UART0_MODEM_MASK,
0454         .val = 0,
0455     },
0456 };
0457
0458 static struct spear_modemux i2s_modemux[] = {
0459     {
0460         .modes = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE
0461             | LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |
0462             ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
0463             | CAMU_WLCD_MODE | CAML_LCD_MODE,
0464         .muxregs = i2s_muxreg,
0465         .nmuxregs = ARRAY_SIZE(i2s_muxreg),
0466     },
0467 };
0468
0469 static struct spear_pingroup i2s_pingroup = {
0470     .name = "i2s_grp",
0471     .pins = i2s_pins,
0472     .npins = ARRAY_SIZE(i2s_pins),
0473     .modemuxs = i2s_modemux,
0474     .nmodemuxs = ARRAY_SIZE(i2s_modemux),
0475 };
0476
0477 static const char *const i2s_grps[] = { "i2s_grp" };
0478 static struct spear_function i2s_function = {
0479     .name = "i2s",
0480     .groups = i2s_grps,
0481     .ngroups = ARRAY_SIZE(i2s_grps),
0482 };
0483
0484 /* sdhci_4bit_pins */
0485 static const unsigned sdhci_4bit_pins[] = { 28, 29, 30, 31, 32, 33 };
0486 static struct spear_muxreg sdhci_4bit_muxreg[] = {
0487     {
0488         .reg = PMX_CONFIG_REG,
0489         .mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK |
0490             PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |
0491             PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK,
0492         .val = 0,
0493     },
0494 };
0495
0496 static struct spear_modemux sdhci_4bit_modemux[] = {
0497     {
0498         .modes = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
0499             HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |
0500             HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE |
0501             CAMU_WLCD_MODE | CAML_LCD_MODE | ATA_PABX_WI2S_MODE,
0502         .muxregs = sdhci_4bit_muxreg,
0503         .nmuxregs = ARRAY_SIZE(sdhci_4bit_muxreg),
0504     },
0505 };
0506
0507 static struct spear_pingroup sdhci_4bit_pingroup = {
0508     .name = "sdhci_4bit_grp",
0509     .pins = sdhci_4bit_pins,
0510     .npins = ARRAY_SIZE(sdhci_4bit_pins),
0511     .modemuxs = sdhci_4bit_modemux,
0512     .nmodemuxs = ARRAY_SIZE(sdhci_4bit_modemux),
0513 };
0514
0515 /* sdhci_8bit_pins */
0516 static const unsigned sdhci_8bit_pins[] = { 24, 25, 26, 27, 28, 29, 30, 31, 32,
0517     33 };
0518 static struct spear_muxreg sdhci_8bit_muxreg[] = {
0519     {
0520         .reg = PMX_CONFIG_REG,
0521         .mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK |
0522             PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |
0523             PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK | PMX_MII_MASK,
0524         .val = 0,
0525     },
0526 };
0527
0528 static struct spear_modemux sdhci_8bit_modemux[] = {
0529     {
0530         .modes = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
0531             HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |
0532             HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE |
0533             CAMU_WLCD_MODE | CAML_LCD_MODE,
0534         .muxregs = sdhci_8bit_muxreg,
0535         .nmuxregs = ARRAY_SIZE(sdhci_8bit_muxreg),
0536     },
0537 };
0538
0539 static struct spear_pingroup sdhci_8bit_pingroup = {
0540     .name = "sdhci_8bit_grp",
0541     .pins = sdhci_8bit_pins,
0542     .npins = ARRAY_SIZE(sdhci_8bit_pins),
0543     .modemuxs = sdhci_8bit_modemux,
0544     .nmodemuxs = ARRAY_SIZE(sdhci_8bit_modemux),
0545 };
0546
0547 static const char *const sdhci_grps[] = { "sdhci_4bit_grp", "sdhci_8bit_grp" };
0548 static struct spear_function sdhci_function = {
0549     .name = "sdhci",
0550     .groups = sdhci_grps,
0551     .ngroups = ARRAY_SIZE(sdhci_grps),
0552 };
0553
0554 /* gpio1_0_to_3_pins */
0555 static const unsigned gpio1_0_to_3_pins[] = { 39, 40, 41, 42 };
0556 static struct spear_muxreg gpio1_0_to_3_muxreg[] = {
0557     {
0558         .reg = PMX_CONFIG_REG,
0559         .mask = PMX_UART0_MODEM_MASK,
0560         .val = 0,
0561     },
0562 };
0563
0564 static struct spear_modemux gpio1_0_to_3_modemux[] = {
0565     {
0566         .modes = PHOTO_FRAME_MODE,
0567         .muxregs = gpio1_0_to_3_muxreg,
0568         .nmuxregs = ARRAY_SIZE(gpio1_0_to_3_muxreg),
0569     },
0570 };
0571
0572 static struct spear_pingroup gpio1_0_to_3_pingroup = {
0573     .name = "gpio1_0_to_3_grp",
0574     .pins = gpio1_0_to_3_pins,
0575     .npins = ARRAY_SIZE(gpio1_0_to_3_pins),
0576     .modemuxs = gpio1_0_to_3_modemux,
0577     .nmodemuxs = ARRAY_SIZE(gpio1_0_to_3_modemux),
0578 };
0579
0580 /* gpio1_4_to_7_pins */
0581 static const unsigned gpio1_4_to_7_pins[] = { 43, 44, 45, 46 };
0582
0583 static struct spear_muxreg gpio1_4_to_7_muxreg[] = {
0584     {
0585         .reg = PMX_CONFIG_REG,
0586         .mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK,
0587         .val = 0,
0588     },
0589 };
0590
0591 static struct spear_modemux gpio1_4_to_7_modemux[] = {
0592     {
0593         .modes = PHOTO_FRAME_MODE,
0594         .muxregs = gpio1_4_to_7_muxreg,
0595         .nmuxregs = ARRAY_SIZE(gpio1_4_to_7_muxreg),
0596     },
0597 };
0598
0599 static struct spear_pingroup gpio1_4_to_7_pingroup = {
0600     .name = "gpio1_4_to_7_grp",
0601     .pins = gpio1_4_to_7_pins,
0602     .npins = ARRAY_SIZE(gpio1_4_to_7_pins),
0603     .modemuxs = gpio1_4_to_7_modemux,
0604     .nmodemuxs = ARRAY_SIZE(gpio1_4_to_7_modemux),
0605 };
0606
0607 static const char *const gpio1_grps[] = { "gpio1_0_to_3_grp", "gpio1_4_to_7_grp"
0608 };
0609 static struct spear_function gpio1_function = {
0610     .name = "gpio1",
0611     .groups = gpio1_grps,
0612     .ngroups = ARRAY_SIZE(gpio1_grps),
0613 };
0614
0615 /* pingroups */
0616 static struct spear_pingroup *spear300_pingroups[] = {
0617     SPEAR3XX_COMMON_PINGROUPS,
0618     &fsmc_2chips_pingroup,
0619     &fsmc_4chips_pingroup,
0620     &clcd_lcdmode_pingroup,
0621     &clcd_pfmode_pingroup,
0622     &tdm_pingroup,
0623     &i2c_clk_pingroup,
0624     &caml_pingroup,
0625     &camu_pingroup,
0626     &dac_pingroup,
0627     &i2s_pingroup,
0628     &sdhci_4bit_pingroup,
0629     &sdhci_8bit_pingroup,
0630     &gpio1_0_to_3_pingroup,
0631     &gpio1_4_to_7_pingroup,
0632 };
0633
0634 /* functions */
0635 static struct spear_function *spear300_functions[] = {
0636     SPEAR3XX_COMMON_FUNCTIONS,
0637     &fsmc_function,
0638     &clcd_function,
0639     &tdm_function,
0640     &i2c_function,
0641     &cam_function,
0642     &dac_function,
0643     &i2s_function,
0644     &sdhci_function,
0645     &gpio1_function,
0646 };
0647
0648 static const struct of_device_id spear300_pinctrl_of_match[] = {
0649     {
0650         .compatible = "st,spear300-pinmux",
0651     },
0652     {},
0653 };
0654
0655 static int spear300_pinctrl_probe(struct platform_device *pdev)
0656 {
0657     spear3xx_machdata.groups = spear300_pingroups;
0658     spear3xx_machdata.ngroups = ARRAY_SIZE(spear300_pingroups);
0659     spear3xx_machdata.functions = spear300_functions;
0660     spear3xx_machdata.nfunctions = ARRAY_SIZE(spear300_functions);
0661     spear3xx_machdata.gpio_pingroups = NULL;
0662     spear3xx_machdata.ngpio_pingroups = 0;
0663
0664     spear3xx_machdata.modes_supported = true;
0665     spear3xx_machdata.pmx_modes = spear300_pmx_modes;
0666     spear3xx_machdata.npmx_modes = ARRAY_SIZE(spear300_pmx_modes);
0667
0668     pmx_init_addr(&spear3xx_machdata, PMX_CONFIG_REG);
0669
0670     return spear_pinctrl_probe(pdev, &spear3xx_machdata);
0671 }
0672
0673 static struct platform_driver spear300_pinctrl_driver = {
0674     .driver = {
0675         .name = DRIVER_NAME,
0676         .of_match_table = spear300_pinctrl_of_match,
0677     },
0678     .probe = spear300_pinctrl_probe,
0679 };
0680
0681 static int __init spear300_pinctrl_init(void)
0682 {
0683     return platform_driver_register(&spear300_pinctrl_driver);
0684 }
0685 arch_initcall(spear300_pinctrl_init);