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OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * SH-X3 prototype CPU pinmux
0004  *
0005  * Copyright (C) 2010  Paul Mundt
0006  */
0007 #include <linux/kernel.h>
0008 #include <cpu/shx3.h>
0009 
0010 #include "sh_pfc.h"
0011 
0012 enum {
0013     PINMUX_RESERVED = 0,
0014 
0015     PINMUX_DATA_BEGIN,
0016     PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
0017     PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
0018     PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
0019     PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA,
0020     PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
0021     PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
0022     PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
0023     PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,
0024     PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
0025     PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA,
0026     PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
0027     PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,
0028     PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
0029     PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA,
0030 
0031     PH5_DATA, PH4_DATA,
0032     PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA,
0033     PINMUX_DATA_END,
0034 
0035     PINMUX_INPUT_BEGIN,
0036     PA7_IN, PA6_IN, PA5_IN, PA4_IN,
0037     PA3_IN, PA2_IN, PA1_IN, PA0_IN,
0038     PB7_IN, PB6_IN, PB5_IN, PB4_IN,
0039     PB3_IN, PB2_IN, PB1_IN, PB0_IN,
0040     PC7_IN, PC6_IN, PC5_IN, PC4_IN,
0041     PC3_IN, PC2_IN, PC1_IN, PC0_IN,
0042     PD7_IN, PD6_IN, PD5_IN, PD4_IN,
0043     PD3_IN, PD2_IN, PD1_IN, PD0_IN,
0044     PE7_IN, PE6_IN, PE5_IN, PE4_IN,
0045     PE3_IN, PE2_IN, PE1_IN, PE0_IN,
0046     PF7_IN, PF6_IN, PF5_IN, PF4_IN,
0047     PF3_IN, PF2_IN, PF1_IN, PF0_IN,
0048     PG7_IN, PG6_IN, PG5_IN, PG4_IN,
0049     PG3_IN, PG2_IN, PG1_IN, PG0_IN,
0050 
0051     PH5_IN, PH4_IN,
0052     PH3_IN, PH2_IN, PH1_IN, PH0_IN,
0053     PINMUX_INPUT_END,
0054 
0055     PINMUX_OUTPUT_BEGIN,
0056     PA7_OUT, PA6_OUT, PA5_OUT, PA4_OUT,
0057     PA3_OUT, PA2_OUT, PA1_OUT, PA0_OUT,
0058     PB7_OUT, PB6_OUT, PB5_OUT, PB4_OUT,
0059     PB3_OUT, PB2_OUT, PB1_OUT, PB0_OUT,
0060     PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT,
0061     PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT,
0062     PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT,
0063     PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT,
0064     PE7_OUT, PE6_OUT, PE5_OUT, PE4_OUT,
0065     PE3_OUT, PE2_OUT, PE1_OUT, PE0_OUT,
0066     PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT,
0067     PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT,
0068     PG7_OUT, PG6_OUT, PG5_OUT, PG4_OUT,
0069     PG3_OUT, PG2_OUT, PG1_OUT, PG0_OUT,
0070 
0071     PH5_OUT, PH4_OUT,
0072     PH3_OUT, PH2_OUT, PH1_OUT, PH0_OUT,
0073     PINMUX_OUTPUT_END,
0074 
0075     PINMUX_FUNCTION_BEGIN,
0076     PA7_FN, PA6_FN, PA5_FN, PA4_FN,
0077     PA3_FN, PA2_FN, PA1_FN, PA0_FN,
0078     PB7_FN, PB6_FN, PB5_FN, PB4_FN,
0079     PB3_FN, PB2_FN, PB1_FN, PB0_FN,
0080     PC7_FN, PC6_FN, PC5_FN, PC4_FN,
0081     PC3_FN, PC2_FN, PC1_FN, PC0_FN,
0082     PD7_FN, PD6_FN, PD5_FN, PD4_FN,
0083     PD3_FN, PD2_FN, PD1_FN, PD0_FN,
0084     PE7_FN, PE6_FN, PE5_FN, PE4_FN,
0085     PE3_FN, PE2_FN, PE1_FN, PE0_FN,
0086     PF7_FN, PF6_FN, PF5_FN, PF4_FN,
0087     PF3_FN, PF2_FN, PF1_FN, PF0_FN,
0088     PG7_FN, PG6_FN, PG5_FN, PG4_FN,
0089     PG3_FN, PG2_FN, PG1_FN, PG0_FN,
0090 
0091     PH5_FN, PH4_FN,
0092     PH3_FN, PH2_FN, PH1_FN, PH0_FN,
0093     PINMUX_FUNCTION_END,
0094 
0095     PINMUX_MARK_BEGIN,
0096 
0097     D31_MARK, D30_MARK, D29_MARK, D28_MARK, D27_MARK, D26_MARK,
0098     D25_MARK, D24_MARK, D23_MARK, D22_MARK, D21_MARK, D20_MARK,
0099     D19_MARK, D18_MARK, D17_MARK, D16_MARK,
0100 
0101     BACK_MARK, BREQ_MARK,
0102     WE3_MARK, WE2_MARK,
0103     CS6_MARK, CS5_MARK, CS4_MARK,
0104     CLKOUTENB_MARK,
0105 
0106     DACK3_MARK, DACK2_MARK, DACK1_MARK, DACK0_MARK,
0107     DREQ3_MARK, DREQ2_MARK, DREQ1_MARK, DREQ0_MARK,
0108 
0109     IRQ3_MARK, IRQ2_MARK, IRQ1_MARK, IRQ0_MARK,
0110 
0111     DRAK3_MARK, DRAK2_MARK, DRAK1_MARK, DRAK0_MARK,
0112 
0113     SCK3_MARK, SCK2_MARK, SCK1_MARK, SCK0_MARK,
0114     IRL3_MARK, IRL2_MARK, IRL1_MARK, IRL0_MARK,
0115     TXD3_MARK, TXD2_MARK, TXD1_MARK, TXD0_MARK,
0116     RXD3_MARK, RXD2_MARK, RXD1_MARK, RXD0_MARK,
0117 
0118     CE2B_MARK, CE2A_MARK, IOIS16_MARK,
0119     STATUS1_MARK, STATUS0_MARK,
0120 
0121     IRQOUT_MARK,
0122 
0123     PINMUX_MARK_END,
0124 };
0125 
0126 static const u16 pinmux_data[] = {
0127     /* PA GPIO */
0128     PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT),
0129     PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT),
0130     PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT),
0131     PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT),
0132     PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT),
0133     PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT),
0134     PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT),
0135     PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT),
0136 
0137     /* PB GPIO */
0138     PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT),
0139     PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT),
0140     PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT),
0141     PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT),
0142     PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT),
0143     PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT),
0144     PINMUX_DATA(PB1_DATA, PB1_IN, PB1_OUT),
0145     PINMUX_DATA(PB0_DATA, PB0_IN, PB0_OUT),
0146 
0147     /* PC GPIO */
0148     PINMUX_DATA(PC7_DATA, PC7_IN, PC7_OUT),
0149     PINMUX_DATA(PC6_DATA, PC6_IN, PC6_OUT),
0150     PINMUX_DATA(PC5_DATA, PC5_IN, PC5_OUT),
0151     PINMUX_DATA(PC4_DATA, PC4_IN, PC4_OUT),
0152     PINMUX_DATA(PC3_DATA, PC3_IN, PC3_OUT),
0153     PINMUX_DATA(PC2_DATA, PC2_IN, PC2_OUT),
0154     PINMUX_DATA(PC1_DATA, PC1_IN, PC1_OUT),
0155     PINMUX_DATA(PC0_DATA, PC0_IN, PC0_OUT),
0156 
0157     /* PD GPIO */
0158     PINMUX_DATA(PD7_DATA, PD7_IN, PD7_OUT),
0159     PINMUX_DATA(PD6_DATA, PD6_IN, PD6_OUT),
0160     PINMUX_DATA(PD5_DATA, PD5_IN, PD5_OUT),
0161     PINMUX_DATA(PD4_DATA, PD4_IN, PD4_OUT),
0162     PINMUX_DATA(PD3_DATA, PD3_IN, PD3_OUT),
0163     PINMUX_DATA(PD2_DATA, PD2_IN, PD2_OUT),
0164     PINMUX_DATA(PD1_DATA, PD1_IN, PD1_OUT),
0165     PINMUX_DATA(PD0_DATA, PD0_IN, PD0_OUT),
0166 
0167     /* PE GPIO */
0168     PINMUX_DATA(PE7_DATA, PE7_IN, PE7_OUT),
0169     PINMUX_DATA(PE6_DATA, PE6_IN, PE6_OUT),
0170     PINMUX_DATA(PE5_DATA, PE5_IN, PE5_OUT),
0171     PINMUX_DATA(PE4_DATA, PE4_IN, PE4_OUT),
0172     PINMUX_DATA(PE3_DATA, PE3_IN, PE3_OUT),
0173     PINMUX_DATA(PE2_DATA, PE2_IN, PE2_OUT),
0174     PINMUX_DATA(PE1_DATA, PE1_IN, PE1_OUT),
0175     PINMUX_DATA(PE0_DATA, PE0_IN, PE0_OUT),
0176 
0177     /* PF GPIO */
0178     PINMUX_DATA(PF7_DATA, PF7_IN, PF7_OUT),
0179     PINMUX_DATA(PF6_DATA, PF6_IN, PF6_OUT),
0180     PINMUX_DATA(PF5_DATA, PF5_IN, PF5_OUT),
0181     PINMUX_DATA(PF4_DATA, PF4_IN, PF4_OUT),
0182     PINMUX_DATA(PF3_DATA, PF3_IN, PF3_OUT),
0183     PINMUX_DATA(PF2_DATA, PF2_IN, PF2_OUT),
0184     PINMUX_DATA(PF1_DATA, PF1_IN, PF1_OUT),
0185     PINMUX_DATA(PF0_DATA, PF0_IN, PF0_OUT),
0186 
0187     /* PG GPIO */
0188     PINMUX_DATA(PG7_DATA, PG7_IN, PG7_OUT),
0189     PINMUX_DATA(PG6_DATA, PG6_IN, PG6_OUT),
0190     PINMUX_DATA(PG5_DATA, PG5_IN, PG5_OUT),
0191     PINMUX_DATA(PG4_DATA, PG4_IN, PG4_OUT),
0192     PINMUX_DATA(PG3_DATA, PG3_IN, PG3_OUT),
0193     PINMUX_DATA(PG2_DATA, PG2_IN, PG2_OUT),
0194     PINMUX_DATA(PG1_DATA, PG1_IN, PG1_OUT),
0195     PINMUX_DATA(PG0_DATA, PG0_IN, PG0_OUT),
0196 
0197     /* PH GPIO */
0198     PINMUX_DATA(PH5_DATA, PH5_IN, PH5_OUT),
0199     PINMUX_DATA(PH4_DATA, PH4_IN, PH4_OUT),
0200     PINMUX_DATA(PH3_DATA, PH3_IN, PH3_OUT),
0201     PINMUX_DATA(PH2_DATA, PH2_IN, PH2_OUT),
0202     PINMUX_DATA(PH1_DATA, PH1_IN, PH1_OUT),
0203     PINMUX_DATA(PH0_DATA, PH0_IN, PH0_OUT),
0204 
0205     /* PA FN */
0206     PINMUX_DATA(D31_MARK, PA7_FN),
0207     PINMUX_DATA(D30_MARK, PA6_FN),
0208     PINMUX_DATA(D29_MARK, PA5_FN),
0209     PINMUX_DATA(D28_MARK, PA4_FN),
0210     PINMUX_DATA(D27_MARK, PA3_FN),
0211     PINMUX_DATA(D26_MARK, PA2_FN),
0212     PINMUX_DATA(D25_MARK, PA1_FN),
0213     PINMUX_DATA(D24_MARK, PA0_FN),
0214 
0215     /* PB FN */
0216     PINMUX_DATA(D23_MARK, PB7_FN),
0217     PINMUX_DATA(D22_MARK, PB6_FN),
0218     PINMUX_DATA(D21_MARK, PB5_FN),
0219     PINMUX_DATA(D20_MARK, PB4_FN),
0220     PINMUX_DATA(D19_MARK, PB3_FN),
0221     PINMUX_DATA(D18_MARK, PB2_FN),
0222     PINMUX_DATA(D17_MARK, PB1_FN),
0223     PINMUX_DATA(D16_MARK, PB0_FN),
0224 
0225     /* PC FN */
0226     PINMUX_DATA(BACK_MARK,      PC7_FN),
0227     PINMUX_DATA(BREQ_MARK,      PC6_FN),
0228     PINMUX_DATA(WE3_MARK,       PC5_FN),
0229     PINMUX_DATA(WE2_MARK,       PC4_FN),
0230     PINMUX_DATA(CS6_MARK,       PC3_FN),
0231     PINMUX_DATA(CS5_MARK,       PC2_FN),
0232     PINMUX_DATA(CS4_MARK,       PC1_FN),
0233     PINMUX_DATA(CLKOUTENB_MARK, PC0_FN),
0234 
0235     /* PD FN */
0236     PINMUX_DATA(DACK3_MARK, PD7_FN),
0237     PINMUX_DATA(DACK2_MARK, PD6_FN),
0238     PINMUX_DATA(DACK1_MARK, PD5_FN),
0239     PINMUX_DATA(DACK0_MARK, PD4_FN),
0240     PINMUX_DATA(DREQ3_MARK, PD3_FN),
0241     PINMUX_DATA(DREQ2_MARK, PD2_FN),
0242     PINMUX_DATA(DREQ1_MARK, PD1_FN),
0243     PINMUX_DATA(DREQ0_MARK, PD0_FN),
0244 
0245     /* PE FN */
0246     PINMUX_DATA(IRQ3_MARK,  PE7_FN),
0247     PINMUX_DATA(IRQ2_MARK,  PE6_FN),
0248     PINMUX_DATA(IRQ1_MARK,  PE5_FN),
0249     PINMUX_DATA(IRQ0_MARK,  PE4_FN),
0250     PINMUX_DATA(DRAK3_MARK, PE3_FN),
0251     PINMUX_DATA(DRAK2_MARK, PE2_FN),
0252     PINMUX_DATA(DRAK1_MARK, PE1_FN),
0253     PINMUX_DATA(DRAK0_MARK, PE0_FN),
0254 
0255     /* PF FN */
0256     PINMUX_DATA(SCK3_MARK, PF7_FN),
0257     PINMUX_DATA(SCK2_MARK, PF6_FN),
0258     PINMUX_DATA(SCK1_MARK, PF5_FN),
0259     PINMUX_DATA(SCK0_MARK, PF4_FN),
0260     PINMUX_DATA(IRL3_MARK, PF3_FN),
0261     PINMUX_DATA(IRL2_MARK, PF2_FN),
0262     PINMUX_DATA(IRL1_MARK, PF1_FN),
0263     PINMUX_DATA(IRL0_MARK, PF0_FN),
0264 
0265     /* PG FN */
0266     PINMUX_DATA(TXD3_MARK, PG7_FN),
0267     PINMUX_DATA(TXD2_MARK, PG6_FN),
0268     PINMUX_DATA(TXD1_MARK, PG5_FN),
0269     PINMUX_DATA(TXD0_MARK, PG4_FN),
0270     PINMUX_DATA(RXD3_MARK, PG3_FN),
0271     PINMUX_DATA(RXD2_MARK, PG2_FN),
0272     PINMUX_DATA(RXD1_MARK, PG1_FN),
0273     PINMUX_DATA(RXD0_MARK, PG0_FN),
0274 
0275     /* PH FN */
0276     PINMUX_DATA(CE2B_MARK,      PH5_FN),
0277     PINMUX_DATA(CE2A_MARK,      PH4_FN),
0278     PINMUX_DATA(IOIS16_MARK,    PH3_FN),
0279     PINMUX_DATA(STATUS1_MARK,   PH2_FN),
0280     PINMUX_DATA(STATUS0_MARK,   PH1_FN),
0281     PINMUX_DATA(IRQOUT_MARK,    PH0_FN),
0282 };
0283 
0284 static const struct sh_pfc_pin pinmux_pins[] = {
0285     /* PA */
0286     PINMUX_GPIO(PA7),
0287     PINMUX_GPIO(PA6),
0288     PINMUX_GPIO(PA5),
0289     PINMUX_GPIO(PA4),
0290     PINMUX_GPIO(PA3),
0291     PINMUX_GPIO(PA2),
0292     PINMUX_GPIO(PA1),
0293     PINMUX_GPIO(PA0),
0294 
0295     /* PB */
0296     PINMUX_GPIO(PB7),
0297     PINMUX_GPIO(PB6),
0298     PINMUX_GPIO(PB5),
0299     PINMUX_GPIO(PB4),
0300     PINMUX_GPIO(PB3),
0301     PINMUX_GPIO(PB2),
0302     PINMUX_GPIO(PB1),
0303     PINMUX_GPIO(PB0),
0304 
0305     /* PC */
0306     PINMUX_GPIO(PC7),
0307     PINMUX_GPIO(PC6),
0308     PINMUX_GPIO(PC5),
0309     PINMUX_GPIO(PC4),
0310     PINMUX_GPIO(PC3),
0311     PINMUX_GPIO(PC2),
0312     PINMUX_GPIO(PC1),
0313     PINMUX_GPIO(PC0),
0314 
0315     /* PD */
0316     PINMUX_GPIO(PD7),
0317     PINMUX_GPIO(PD6),
0318     PINMUX_GPIO(PD5),
0319     PINMUX_GPIO(PD4),
0320     PINMUX_GPIO(PD3),
0321     PINMUX_GPIO(PD2),
0322     PINMUX_GPIO(PD1),
0323     PINMUX_GPIO(PD0),
0324 
0325     /* PE */
0326     PINMUX_GPIO(PE7),
0327     PINMUX_GPIO(PE6),
0328     PINMUX_GPIO(PE5),
0329     PINMUX_GPIO(PE4),
0330     PINMUX_GPIO(PE3),
0331     PINMUX_GPIO(PE2),
0332     PINMUX_GPIO(PE1),
0333     PINMUX_GPIO(PE0),
0334 
0335     /* PF */
0336     PINMUX_GPIO(PF7),
0337     PINMUX_GPIO(PF6),
0338     PINMUX_GPIO(PF5),
0339     PINMUX_GPIO(PF4),
0340     PINMUX_GPIO(PF3),
0341     PINMUX_GPIO(PF2),
0342     PINMUX_GPIO(PF1),
0343     PINMUX_GPIO(PF0),
0344 
0345     /* PG */
0346     PINMUX_GPIO(PG7),
0347     PINMUX_GPIO(PG6),
0348     PINMUX_GPIO(PG5),
0349     PINMUX_GPIO(PG4),
0350     PINMUX_GPIO(PG3),
0351     PINMUX_GPIO(PG2),
0352     PINMUX_GPIO(PG1),
0353     PINMUX_GPIO(PG0),
0354 
0355     /* PH */
0356     PINMUX_GPIO(PH5),
0357     PINMUX_GPIO(PH4),
0358     PINMUX_GPIO(PH3),
0359     PINMUX_GPIO(PH2),
0360     PINMUX_GPIO(PH1),
0361     PINMUX_GPIO(PH0),
0362 };
0363 
0364 #define PINMUX_FN_BASE  ARRAY_SIZE(pinmux_pins)
0365 
0366 static const struct pinmux_func pinmux_func_gpios[] = {
0367     /* FN */
0368     GPIO_FN(D31),
0369     GPIO_FN(D30),
0370     GPIO_FN(D29),
0371     GPIO_FN(D28),
0372     GPIO_FN(D27),
0373     GPIO_FN(D26),
0374     GPIO_FN(D25),
0375     GPIO_FN(D24),
0376     GPIO_FN(D23),
0377     GPIO_FN(D22),
0378     GPIO_FN(D21),
0379     GPIO_FN(D20),
0380     GPIO_FN(D19),
0381     GPIO_FN(D18),
0382     GPIO_FN(D17),
0383     GPIO_FN(D16),
0384     GPIO_FN(BACK),
0385     GPIO_FN(BREQ),
0386     GPIO_FN(WE3),
0387     GPIO_FN(WE2),
0388     GPIO_FN(CS6),
0389     GPIO_FN(CS5),
0390     GPIO_FN(CS4),
0391     GPIO_FN(CLKOUTENB),
0392     GPIO_FN(DACK3),
0393     GPIO_FN(DACK2),
0394     GPIO_FN(DACK1),
0395     GPIO_FN(DACK0),
0396     GPIO_FN(DREQ3),
0397     GPIO_FN(DREQ2),
0398     GPIO_FN(DREQ1),
0399     GPIO_FN(DREQ0),
0400     GPIO_FN(IRQ3),
0401     GPIO_FN(IRQ2),
0402     GPIO_FN(IRQ1),
0403     GPIO_FN(IRQ0),
0404     GPIO_FN(DRAK3),
0405     GPIO_FN(DRAK2),
0406     GPIO_FN(DRAK1),
0407     GPIO_FN(DRAK0),
0408     GPIO_FN(SCK3),
0409     GPIO_FN(SCK2),
0410     GPIO_FN(SCK1),
0411     GPIO_FN(SCK0),
0412     GPIO_FN(IRL3),
0413     GPIO_FN(IRL2),
0414     GPIO_FN(IRL1),
0415     GPIO_FN(IRL0),
0416     GPIO_FN(TXD3),
0417     GPIO_FN(TXD2),
0418     GPIO_FN(TXD1),
0419     GPIO_FN(TXD0),
0420     GPIO_FN(RXD3),
0421     GPIO_FN(RXD2),
0422     GPIO_FN(RXD1),
0423     GPIO_FN(RXD0),
0424     GPIO_FN(CE2B),
0425     GPIO_FN(CE2A),
0426     GPIO_FN(IOIS16),
0427     GPIO_FN(STATUS1),
0428     GPIO_FN(STATUS0),
0429     GPIO_FN(IRQOUT),
0430 };
0431 
0432 static const struct pinmux_cfg_reg pinmux_config_regs[] = {
0433     { PINMUX_CFG_REG("PABCR", 0xffc70000, 32, 2, GROUP(
0434         PA7_FN, PA7_OUT, PA7_IN, 0,
0435         PA6_FN, PA6_OUT, PA6_IN, 0,
0436         PA5_FN, PA5_OUT, PA5_IN, 0,
0437         PA4_FN, PA4_OUT, PA4_IN, 0,
0438         PA3_FN, PA3_OUT, PA3_IN, 0,
0439         PA2_FN, PA2_OUT, PA2_IN, 0,
0440         PA1_FN, PA1_OUT, PA1_IN, 0,
0441         PA0_FN, PA0_OUT, PA0_IN, 0,
0442         PB7_FN, PB7_OUT, PB7_IN, 0,
0443         PB6_FN, PB6_OUT, PB6_IN, 0,
0444         PB5_FN, PB5_OUT, PB5_IN, 0,
0445         PB4_FN, PB4_OUT, PB4_IN, 0,
0446         PB3_FN, PB3_OUT, PB3_IN, 0,
0447         PB2_FN, PB2_OUT, PB2_IN, 0,
0448         PB1_FN, PB1_OUT, PB1_IN, 0,
0449         PB0_FN, PB0_OUT, PB0_IN, 0, ))
0450     },
0451     { PINMUX_CFG_REG("PCDCR", 0xffc70004, 32, 2, GROUP(
0452         PC7_FN, PC7_OUT, PC7_IN, 0,
0453         PC6_FN, PC6_OUT, PC6_IN, 0,
0454         PC5_FN, PC5_OUT, PC5_IN, 0,
0455         PC4_FN, PC4_OUT, PC4_IN, 0,
0456         PC3_FN, PC3_OUT, PC3_IN, 0,
0457         PC2_FN, PC2_OUT, PC2_IN, 0,
0458         PC1_FN, PC1_OUT, PC1_IN, 0,
0459         PC0_FN, PC0_OUT, PC0_IN, 0,
0460         PD7_FN, PD7_OUT, PD7_IN, 0,
0461         PD6_FN, PD6_OUT, PD6_IN, 0,
0462         PD5_FN, PD5_OUT, PD5_IN, 0,
0463         PD4_FN, PD4_OUT, PD4_IN, 0,
0464         PD3_FN, PD3_OUT, PD3_IN, 0,
0465         PD2_FN, PD2_OUT, PD2_IN, 0,
0466         PD1_FN, PD1_OUT, PD1_IN, 0,
0467         PD0_FN, PD0_OUT, PD0_IN, 0, ))
0468     },
0469     { PINMUX_CFG_REG("PEFCR", 0xffc70008, 32, 2, GROUP(
0470         PE7_FN, PE7_OUT, PE7_IN, 0,
0471         PE6_FN, PE6_OUT, PE6_IN, 0,
0472         PE5_FN, PE5_OUT, PE5_IN, 0,
0473         PE4_FN, PE4_OUT, PE4_IN, 0,
0474         PE3_FN, PE3_OUT, PE3_IN, 0,
0475         PE2_FN, PE2_OUT, PE2_IN, 0,
0476         PE1_FN, PE1_OUT, PE1_IN, 0,
0477         PE0_FN, PE0_OUT, PE0_IN, 0,
0478         PF7_FN, PF7_OUT, PF7_IN, 0,
0479         PF6_FN, PF6_OUT, PF6_IN, 0,
0480         PF5_FN, PF5_OUT, PF5_IN, 0,
0481         PF4_FN, PF4_OUT, PF4_IN, 0,
0482         PF3_FN, PF3_OUT, PF3_IN, 0,
0483         PF2_FN, PF2_OUT, PF2_IN, 0,
0484         PF1_FN, PF1_OUT, PF1_IN, 0,
0485         PF0_FN, PF0_OUT, PF0_IN, 0, ))
0486     },
0487     { PINMUX_CFG_REG("PGHCR", 0xffc7000c, 32, 2, GROUP(
0488         PG7_FN, PG7_OUT, PG7_IN, 0,
0489         PG6_FN, PG6_OUT, PG6_IN, 0,
0490         PG5_FN, PG5_OUT, PG5_IN, 0,
0491         PG4_FN, PG4_OUT, PG4_IN, 0,
0492         PG3_FN, PG3_OUT, PG3_IN, 0,
0493         PG2_FN, PG2_OUT, PG2_IN, 0,
0494         PG1_FN, PG1_OUT, PG1_IN, 0,
0495         PG0_FN, PG0_OUT, PG0_IN, 0,
0496         0, 0, 0, 0,
0497         0, 0, 0, 0,
0498         PH5_FN, PH5_OUT, PH5_IN, 0,
0499         PH4_FN, PH4_OUT, PH4_IN, 0,
0500         PH3_FN, PH3_OUT, PH3_IN, 0,
0501         PH2_FN, PH2_OUT, PH2_IN, 0,
0502         PH1_FN, PH1_OUT, PH1_IN, 0,
0503         PH0_FN, PH0_OUT, PH0_IN, 0, ))
0504     },
0505     { },
0506 };
0507 
0508 static const struct pinmux_data_reg pinmux_data_regs[] = {
0509     { PINMUX_DATA_REG("PABDR", 0xffc70010, 32, GROUP(
0510         0, 0, 0, 0, 0, 0, 0, 0,
0511         PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
0512         PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
0513         0, 0, 0, 0, 0, 0, 0, 0,
0514         PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
0515         PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA, ))
0516     },
0517     { PINMUX_DATA_REG("PCDDR", 0xffc70014, 32, GROUP(
0518         0, 0, 0, 0, 0, 0, 0, 0,
0519         PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
0520         PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
0521         0, 0, 0, 0, 0, 0, 0, 0,
0522         PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
0523         PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA, ))
0524     },
0525     { PINMUX_DATA_REG("PEFDR", 0xffc70018, 32, GROUP(
0526         0, 0, 0, 0, 0, 0, 0, 0,
0527         PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
0528         PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA,
0529         0, 0, 0, 0, 0, 0, 0, 0,
0530         PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
0531         PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA, ))
0532     },
0533     { PINMUX_DATA_REG("PGHDR", 0xffc7001c, 32, GROUP(
0534         0, 0, 0, 0, 0, 0, 0, 0,
0535         PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
0536         PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA,
0537         0, 0, 0, 0, 0, 0, 0, 0,
0538         0, 0, PH5_DATA, PH4_DATA,
0539         PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA, ))
0540     },
0541     { },
0542 };
0543 
0544 const struct sh_pfc_soc_info shx3_pinmux_info = {
0545     .name       = "shx3_pfc",
0546     .input      = { PINMUX_INPUT_BEGIN,    PINMUX_INPUT_END },
0547     .output     = { PINMUX_OUTPUT_BEGIN,   PINMUX_OUTPUT_END },
0548     .function   = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
0549     .pins       = pinmux_pins,
0550     .nr_pins    = ARRAY_SIZE(pinmux_pins),
0551     .func_gpios = pinmux_func_gpios,
0552     .nr_func_gpios  = ARRAY_SIZE(pinmux_func_gpios),
0553     .pinmux_data    = pinmux_data,
0554     .pinmux_data_size = ARRAY_SIZE(pinmux_data),
0555     .cfg_regs   = pinmux_config_regs,
0556     .data_regs  = pinmux_data_regs,
0557 };
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