pinctrl/renesas/pfc-sh7786.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * SH7786 Pinmux
0004  *
0005  * Copyright (C) 2008, 2009  Renesas Solutions Corp.
0006  * Kuninori Morimoto <morimoto.kuninori@renesas.com>
0007  *
0008  *  Based on SH7785 pinmux
0009  *
0010  *  Copyright (C) 2008  Magnus Damm
0011  */
0012
0013 #include <linux/kernel.h>
0014 #include <cpu/sh7786.h>
0015
0016 #include "sh_pfc.h"
0017
0018 enum {
0019     PINMUX_RESERVED = 0,
0020
0021     PINMUX_DATA_BEGIN,
0022     PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
0023     PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
0024     PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
0025     PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA,
0026     PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
0027     PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
0028     PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
0029     PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,
0030     PE7_DATA, PE6_DATA,
0031     PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
0032     PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,
0033     PG7_DATA, PG6_DATA, PG5_DATA,
0034     PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,
0035     PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA,
0036     PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
0037     PJ3_DATA, PJ2_DATA, PJ1_DATA,
0038     PINMUX_DATA_END,
0039
0040     PINMUX_INPUT_BEGIN,
0041     PA7_IN, PA6_IN, PA5_IN, PA4_IN,
0042     PA3_IN, PA2_IN, PA1_IN, PA0_IN,
0043     PB7_IN, PB6_IN, PB5_IN, PB4_IN,
0044     PB3_IN, PB2_IN, PB1_IN, PB0_IN,
0045     PC7_IN, PC6_IN, PC5_IN, PC4_IN,
0046     PC3_IN, PC2_IN, PC1_IN, PC0_IN,
0047     PD7_IN, PD6_IN, PD5_IN, PD4_IN,
0048     PD3_IN, PD2_IN, PD1_IN, PD0_IN,
0049     PE7_IN, PE6_IN,
0050     PF7_IN, PF6_IN, PF5_IN, PF4_IN,
0051     PF3_IN, PF2_IN, PF1_IN, PF0_IN,
0052     PG7_IN, PG6_IN, PG5_IN,
0053     PH7_IN, PH6_IN, PH5_IN, PH4_IN,
0054     PH3_IN, PH2_IN, PH1_IN, PH0_IN,
0055     PJ7_IN, PJ6_IN, PJ5_IN, PJ4_IN,
0056     PJ3_IN, PJ2_IN, PJ1_IN,
0057     PINMUX_INPUT_END,
0058
0059     PINMUX_OUTPUT_BEGIN,
0060     PA7_OUT, PA6_OUT, PA5_OUT, PA4_OUT,
0061     PA3_OUT, PA2_OUT, PA1_OUT, PA0_OUT,
0062     PB7_OUT, PB6_OUT, PB5_OUT, PB4_OUT,
0063     PB3_OUT, PB2_OUT, PB1_OUT, PB0_OUT,
0064     PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT,
0065     PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT,
0066     PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT,
0067     PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT,
0068     PE7_OUT, PE6_OUT,
0069     PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT,
0070     PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT,
0071     PG7_OUT, PG6_OUT, PG5_OUT,
0072     PH7_OUT, PH6_OUT, PH5_OUT, PH4_OUT,
0073     PH3_OUT, PH2_OUT, PH1_OUT, PH0_OUT,
0074     PJ7_OUT, PJ6_OUT, PJ5_OUT, PJ4_OUT,
0075     PJ3_OUT, PJ2_OUT, PJ1_OUT,
0076     PINMUX_OUTPUT_END,
0077
0078     PINMUX_FUNCTION_BEGIN,
0079     PA7_FN, PA6_FN, PA5_FN, PA4_FN,
0080     PA3_FN, PA2_FN, PA1_FN, PA0_FN,
0081     PB7_FN, PB6_FN, PB5_FN, PB4_FN,
0082     PB3_FN, PB2_FN, PB1_FN, PB0_FN,
0083     PC7_FN, PC6_FN, PC5_FN, PC4_FN,
0084     PC3_FN, PC2_FN, PC1_FN, PC0_FN,
0085     PD7_FN, PD6_FN, PD5_FN, PD4_FN,
0086     PD3_FN, PD2_FN, PD1_FN, PD0_FN,
0087     PE7_FN, PE6_FN,
0088     PF7_FN, PF6_FN, PF5_FN, PF4_FN,
0089     PF3_FN, PF2_FN, PF1_FN, PF0_FN,
0090     PG7_FN, PG6_FN, PG5_FN,
0091     PH7_FN, PH6_FN, PH5_FN, PH4_FN,
0092     PH3_FN, PH2_FN, PH1_FN, PH0_FN,
0093     PJ7_FN, PJ6_FN, PJ5_FN, PJ4_FN,
0094     PJ3_FN, PJ2_FN, PJ1_FN,
0095     P1MSEL14_0, P1MSEL14_1,
0096     P1MSEL13_0, P1MSEL13_1,
0097     P1MSEL12_0, P1MSEL12_1,
0098     P1MSEL11_0, P1MSEL11_1,
0099     P1MSEL10_0, P1MSEL10_1,
0100     P1MSEL9_0, P1MSEL9_1,
0101     P1MSEL8_0, P1MSEL8_1,
0102     P1MSEL7_0, P1MSEL7_1,
0103     P1MSEL6_0, P1MSEL6_1,
0104     P1MSEL5_0, P1MSEL5_1,
0105     P1MSEL4_0, P1MSEL4_1,
0106     P1MSEL3_0, P1MSEL3_1,
0107     P1MSEL2_0, P1MSEL2_1,
0108     P1MSEL1_0, P1MSEL1_1,
0109     P1MSEL0_0, P1MSEL0_1,
0110
0111     P2MSEL15_0, P2MSEL15_1,
0112     P2MSEL14_0, P2MSEL14_1,
0113     P2MSEL13_0, P2MSEL13_1,
0114     P2MSEL12_0, P2MSEL12_1,
0115     P2MSEL11_0, P2MSEL11_1,
0116     P2MSEL10_0, P2MSEL10_1,
0117     P2MSEL9_0, P2MSEL9_1,
0118     P2MSEL8_0, P2MSEL8_1,
0119     P2MSEL7_0, P2MSEL7_1,
0120     P2MSEL6_0, P2MSEL6_1,
0121     P2MSEL5_0, P2MSEL5_1,
0122     P2MSEL4_0, P2MSEL4_1,
0123     P2MSEL3_0, P2MSEL3_1,
0124     P2MSEL2_0, P2MSEL2_1,
0125     P2MSEL1_0, P2MSEL1_1,
0126     P2MSEL0_0, P2MSEL0_1,
0127     PINMUX_FUNCTION_END,
0128
0129     PINMUX_MARK_BEGIN,
0130     DCLKIN_MARK, DCLKOUT_MARK, ODDF_MARK,
0131     VSYNC_MARK, HSYNC_MARK, CDE_MARK, DISP_MARK,
0132     DR0_MARK, DR1_MARK, DR2_MARK, DR3_MARK, DR4_MARK, DR5_MARK,
0133     DG0_MARK, DG1_MARK, DG2_MARK, DG3_MARK, DG4_MARK, DG5_MARK,
0134     DB0_MARK, DB1_MARK, DB2_MARK, DB3_MARK, DB4_MARK, DB5_MARK,
0135     ETH_MAGIC_MARK, ETH_LINK_MARK, ETH_TX_ER_MARK, ETH_TX_EN_MARK,
0136     ETH_MDIO_MARK, ETH_RX_CLK_MARK, ETH_MDC_MARK, ETH_COL_MARK,
0137     ETH_TX_CLK_MARK, ETH_CRS_MARK, ETH_RX_DV_MARK, ETH_RX_ER_MARK,
0138     ETH_TXD3_MARK, ETH_TXD2_MARK, ETH_TXD1_MARK, ETH_TXD0_MARK,
0139     ETH_RXD3_MARK, ETH_RXD2_MARK, ETH_RXD1_MARK, ETH_RXD0_MARK,
0140     HSPI_CLK_MARK, HSPI_CS_MARK, HSPI_RX_MARK, HSPI_TX_MARK,
0141     SCIF0_CTS_MARK, SCIF0_RTS_MARK,
0142     SCIF0_SCK_MARK, SCIF0_RXD_MARK, SCIF0_TXD_MARK,
0143     SCIF1_SCK_MARK, SCIF1_RXD_MARK, SCIF1_TXD_MARK,
0144     SCIF3_SCK_MARK, SCIF3_RXD_MARK, SCIF3_TXD_MARK,
0145     SCIF4_SCK_MARK, SCIF4_RXD_MARK, SCIF4_TXD_MARK,
0146     SCIF5_SCK_MARK, SCIF5_RXD_MARK, SCIF5_TXD_MARK,
0147     BREQ_MARK, IOIS16_MARK, CE2B_MARK, CE2A_MARK, BACK_MARK,
0148     FALE_MARK, FRB_MARK, FSTATUS_MARK,
0149     FSE_MARK, FCLE_MARK,
0150     DACK0_MARK, DACK1_MARK, DACK2_MARK, DACK3_MARK,
0151     DREQ0_MARK, DREQ1_MARK, DREQ2_MARK, DREQ3_MARK,
0152     DRAK0_MARK, DRAK1_MARK, DRAK2_MARK, DRAK3_MARK,
0153     USB_OVC1_MARK, USB_OVC0_MARK,
0154     USB_PENC1_MARK, USB_PENC0_MARK,
0155     HAC_RES_MARK,
0156     HAC1_SDOUT_MARK, HAC1_SDIN_MARK, HAC1_SYNC_MARK, HAC1_BITCLK_MARK,
0157     HAC0_SDOUT_MARK, HAC0_SDIN_MARK, HAC0_SYNC_MARK, HAC0_BITCLK_MARK,
0158     SSI0_SDATA_MARK, SSI0_SCK_MARK, SSI0_WS_MARK, SSI0_CLK_MARK,
0159     SSI1_SDATA_MARK, SSI1_SCK_MARK, SSI1_WS_MARK, SSI1_CLK_MARK,
0160     SSI2_SDATA_MARK, SSI2_SCK_MARK, SSI2_WS_MARK,
0161     SSI3_SDATA_MARK, SSI3_SCK_MARK, SSI3_WS_MARK,
0162     SDIF1CMD_MARK, SDIF1CD_MARK, SDIF1WP_MARK, SDIF1CLK_MARK,
0163     SDIF1D3_MARK, SDIF1D2_MARK, SDIF1D1_MARK, SDIF1D0_MARK,
0164     SDIF0CMD_MARK, SDIF0CD_MARK, SDIF0WP_MARK, SDIF0CLK_MARK,
0165     SDIF0D3_MARK, SDIF0D2_MARK, SDIF0D1_MARK, SDIF0D0_MARK,
0166     TCLK_MARK,
0167     IRL7_MARK, IRL6_MARK, IRL5_MARK, IRL4_MARK,
0168     PINMUX_MARK_END,
0169 };
0170
0171 static const u16 pinmux_data[] = {
0172     /* PA GPIO */
0173     PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT),
0174     PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT),
0175     PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT),
0176     PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT),
0177     PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT),
0178     PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT),
0179     PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT),
0180     PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT),
0181
0182     /* PB GPIO */
0183     PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT),
0184     PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT),
0185     PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT),
0186     PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT),
0187     PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT),
0188     PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT),
0189     PINMUX_DATA(PB1_DATA, PB1_IN, PB1_OUT),
0190     PINMUX_DATA(PB0_DATA, PB0_IN, PB0_OUT),
0191
0192     /* PC GPIO */
0193     PINMUX_DATA(PC7_DATA, PC7_IN, PC7_OUT),
0194     PINMUX_DATA(PC6_DATA, PC6_IN, PC6_OUT),
0195     PINMUX_DATA(PC5_DATA, PC5_IN, PC5_OUT),
0196     PINMUX_DATA(PC4_DATA, PC4_IN, PC4_OUT),
0197     PINMUX_DATA(PC3_DATA, PC3_IN, PC3_OUT),
0198     PINMUX_DATA(PC2_DATA, PC2_IN, PC2_OUT),
0199     PINMUX_DATA(PC1_DATA, PC1_IN, PC1_OUT),
0200     PINMUX_DATA(PC0_DATA, PC0_IN, PC0_OUT),
0201
0202     /* PD GPIO */
0203     PINMUX_DATA(PD7_DATA, PD7_IN, PD7_OUT),
0204     PINMUX_DATA(PD6_DATA, PD6_IN, PD6_OUT),
0205     PINMUX_DATA(PD5_DATA, PD5_IN, PD5_OUT),
0206     PINMUX_DATA(PD4_DATA, PD4_IN, PD4_OUT),
0207     PINMUX_DATA(PD3_DATA, PD3_IN, PD3_OUT),
0208     PINMUX_DATA(PD2_DATA, PD2_IN, PD2_OUT),
0209     PINMUX_DATA(PD1_DATA, PD1_IN, PD1_OUT),
0210     PINMUX_DATA(PD0_DATA, PD0_IN, PD0_OUT),
0211
0212     /* PE GPIO */
0213     PINMUX_DATA(PE7_DATA, PE7_IN, PE7_OUT),
0214     PINMUX_DATA(PE6_DATA, PE6_IN, PE6_OUT),
0215
0216     /* PF GPIO */
0217     PINMUX_DATA(PF7_DATA, PF7_IN, PF7_OUT),
0218     PINMUX_DATA(PF6_DATA, PF6_IN, PF6_OUT),
0219     PINMUX_DATA(PF5_DATA, PF5_IN, PF5_OUT),
0220     PINMUX_DATA(PF4_DATA, PF4_IN, PF4_OUT),
0221     PINMUX_DATA(PF3_DATA, PF3_IN, PF3_OUT),
0222     PINMUX_DATA(PF2_DATA, PF2_IN, PF2_OUT),
0223     PINMUX_DATA(PF1_DATA, PF1_IN, PF1_OUT),
0224     PINMUX_DATA(PF0_DATA, PF0_IN, PF0_OUT),
0225
0226     /* PG GPIO */
0227     PINMUX_DATA(PG7_DATA, PG7_IN, PG7_OUT),
0228     PINMUX_DATA(PG6_DATA, PG6_IN, PG6_OUT),
0229     PINMUX_DATA(PG5_DATA, PG5_IN, PG5_OUT),
0230
0231     /* PH GPIO */
0232     PINMUX_DATA(PH7_DATA, PH7_IN, PH7_OUT),
0233     PINMUX_DATA(PH6_DATA, PH6_IN, PH6_OUT),
0234     PINMUX_DATA(PH5_DATA, PH5_IN, PH5_OUT),
0235     PINMUX_DATA(PH4_DATA, PH4_IN, PH4_OUT),
0236     PINMUX_DATA(PH3_DATA, PH3_IN, PH3_OUT),
0237     PINMUX_DATA(PH2_DATA, PH2_IN, PH2_OUT),
0238     PINMUX_DATA(PH1_DATA, PH1_IN, PH1_OUT),
0239     PINMUX_DATA(PH0_DATA, PH0_IN, PH0_OUT),
0240
0241     /* PJ GPIO */
0242     PINMUX_DATA(PJ7_DATA, PJ7_IN, PJ7_OUT),
0243     PINMUX_DATA(PJ6_DATA, PJ6_IN, PJ6_OUT),
0244     PINMUX_DATA(PJ5_DATA, PJ5_IN, PJ5_OUT),
0245     PINMUX_DATA(PJ4_DATA, PJ4_IN, PJ4_OUT),
0246     PINMUX_DATA(PJ3_DATA, PJ3_IN, PJ3_OUT),
0247     PINMUX_DATA(PJ2_DATA, PJ2_IN, PJ2_OUT),
0248     PINMUX_DATA(PJ1_DATA, PJ1_IN, PJ1_OUT),
0249
0250     /* PA FN */
0251     PINMUX_DATA(CDE_MARK,       P1MSEL2_0, PA7_FN),
0252     PINMUX_DATA(DISP_MARK,      P1MSEL2_0, PA6_FN),
0253     PINMUX_DATA(DR5_MARK,       P1MSEL2_0, PA5_FN),
0254     PINMUX_DATA(DR4_MARK,       P1MSEL2_0, PA4_FN),
0255     PINMUX_DATA(DR3_MARK,       P1MSEL2_0, PA3_FN),
0256     PINMUX_DATA(DR2_MARK,       P1MSEL2_0, PA2_FN),
0257     PINMUX_DATA(DR1_MARK,       P1MSEL2_0, PA1_FN),
0258     PINMUX_DATA(DR0_MARK,       P1MSEL2_0, PA0_FN),
0259     PINMUX_DATA(ETH_MAGIC_MARK, P1MSEL2_1, PA7_FN),
0260     PINMUX_DATA(ETH_LINK_MARK,  P1MSEL2_1, PA6_FN),
0261     PINMUX_DATA(ETH_TX_ER_MARK, P1MSEL2_1, PA5_FN),
0262     PINMUX_DATA(ETH_TX_EN_MARK, P1MSEL2_1, PA4_FN),
0263     PINMUX_DATA(ETH_TXD3_MARK,  P1MSEL2_1, PA3_FN),
0264     PINMUX_DATA(ETH_TXD2_MARK,  P1MSEL2_1, PA2_FN),
0265     PINMUX_DATA(ETH_TXD1_MARK,  P1MSEL2_1, PA1_FN),
0266     PINMUX_DATA(ETH_TXD0_MARK,  P1MSEL2_1, PA0_FN),
0267
0268     /* PB FN */
0269     PINMUX_DATA(VSYNC_MARK,     P1MSEL3_0, PB7_FN),
0270     PINMUX_DATA(ODDF_MARK,      P1MSEL3_0, PB6_FN),
0271     PINMUX_DATA(DG5_MARK,       P1MSEL2_0, PB5_FN),
0272     PINMUX_DATA(DG4_MARK,       P1MSEL2_0, PB4_FN),
0273     PINMUX_DATA(DG3_MARK,       P1MSEL2_0, PB3_FN),
0274     PINMUX_DATA(DG2_MARK,       P1MSEL2_0, PB2_FN),
0275     PINMUX_DATA(DG1_MARK,       P1MSEL2_0, PB1_FN),
0276     PINMUX_DATA(DG0_MARK,       P1MSEL2_0, PB0_FN),
0277     PINMUX_DATA(HSPI_CLK_MARK,  P1MSEL3_1, PB7_FN),
0278     PINMUX_DATA(HSPI_CS_MARK,   P1MSEL3_1, PB6_FN),
0279     PINMUX_DATA(ETH_MDIO_MARK,  P1MSEL2_1, PB5_FN),
0280     PINMUX_DATA(ETH_RX_CLK_MARK,    P1MSEL2_1, PB4_FN),
0281     PINMUX_DATA(ETH_MDC_MARK,   P1MSEL2_1, PB3_FN),
0282     PINMUX_DATA(ETH_COL_MARK,   P1MSEL2_1, PB2_FN),
0283     PINMUX_DATA(ETH_TX_CLK_MARK,    P1MSEL2_1, PB1_FN),
0284     PINMUX_DATA(ETH_CRS_MARK,   P1MSEL2_1, PB0_FN),
0285
0286     /* PC FN */
0287     PINMUX_DATA(DCLKIN_MARK,    P1MSEL3_0, PC7_FN),
0288     PINMUX_DATA(HSYNC_MARK,     P1MSEL3_0, PC6_FN),
0289     PINMUX_DATA(DB5_MARK,       P1MSEL2_0, PC5_FN),
0290     PINMUX_DATA(DB4_MARK,       P1MSEL2_0, PC4_FN),
0291     PINMUX_DATA(DB3_MARK,       P1MSEL2_0, PC3_FN),
0292     PINMUX_DATA(DB2_MARK,       P1MSEL2_0, PC2_FN),
0293     PINMUX_DATA(DB1_MARK,       P1MSEL2_0, PC1_FN),
0294     PINMUX_DATA(DB0_MARK,       P1MSEL2_0, PC0_FN),
0295
0296     PINMUX_DATA(HSPI_RX_MARK,   P1MSEL3_1, PC7_FN),
0297     PINMUX_DATA(HSPI_TX_MARK,   P1MSEL3_1, PC6_FN),
0298     PINMUX_DATA(ETH_RXD3_MARK,  P1MSEL2_1, PC5_FN),
0299     PINMUX_DATA(ETH_RXD2_MARK,  P1MSEL2_1, PC4_FN),
0300     PINMUX_DATA(ETH_RXD1_MARK,  P1MSEL2_1, PC3_FN),
0301     PINMUX_DATA(ETH_RXD0_MARK,  P1MSEL2_1, PC2_FN),
0302     PINMUX_DATA(ETH_RX_DV_MARK, P1MSEL2_1, PC1_FN),
0303     PINMUX_DATA(ETH_RX_ER_MARK, P1MSEL2_1, PC0_FN),
0304
0305     /* PD FN */
0306     PINMUX_DATA(DCLKOUT_MARK,   PD7_FN),
0307     PINMUX_DATA(SCIF1_SCK_MARK, PD6_FN),
0308     PINMUX_DATA(SCIF1_RXD_MARK, PD5_FN),
0309     PINMUX_DATA(SCIF1_TXD_MARK, PD4_FN),
0310     PINMUX_DATA(DACK1_MARK,     P1MSEL13_1, P1MSEL12_0, PD3_FN),
0311     PINMUX_DATA(BACK_MARK,      P1MSEL13_0, P1MSEL12_1, PD3_FN),
0312     PINMUX_DATA(FALE_MARK,      P1MSEL13_0, P1MSEL12_0, PD3_FN),
0313     PINMUX_DATA(DACK0_MARK,     P1MSEL14_1, PD2_FN),
0314     PINMUX_DATA(FCLE_MARK,      P1MSEL14_0, PD2_FN),
0315     PINMUX_DATA(DREQ1_MARK,     P1MSEL10_0, P1MSEL9_1, PD1_FN),
0316     PINMUX_DATA(BREQ_MARK,      P1MSEL10_1, P1MSEL9_0, PD1_FN),
0317     PINMUX_DATA(USB_OVC1_MARK,  P1MSEL10_0, P1MSEL9_0, PD1_FN),
0318     PINMUX_DATA(DREQ0_MARK,     P1MSEL11_1, PD0_FN),
0319     PINMUX_DATA(USB_OVC0_MARK,  P1MSEL11_0, PD0_FN),
0320
0321     /* PE FN */
0322     PINMUX_DATA(USB_PENC1_MARK, PE7_FN),
0323     PINMUX_DATA(USB_PENC0_MARK, PE6_FN),
0324
0325     /* PF FN */
0326     PINMUX_DATA(HAC1_SDOUT_MARK,    P2MSEL15_0, P2MSEL14_0, PF7_FN),
0327     PINMUX_DATA(HAC1_SDIN_MARK, P2MSEL15_0, P2MSEL14_0, PF6_FN),
0328     PINMUX_DATA(HAC1_SYNC_MARK, P2MSEL15_0, P2MSEL14_0, PF5_FN),
0329     PINMUX_DATA(HAC1_BITCLK_MARK,   P2MSEL15_0, P2MSEL14_0, PF4_FN),
0330     PINMUX_DATA(HAC0_SDOUT_MARK,    P2MSEL13_0, P2MSEL12_0, PF3_FN),
0331     PINMUX_DATA(HAC0_SDIN_MARK, P2MSEL13_0, P2MSEL12_0, PF2_FN),
0332     PINMUX_DATA(HAC0_SYNC_MARK, P2MSEL13_0, P2MSEL12_0, PF1_FN),
0333     PINMUX_DATA(HAC0_BITCLK_MARK,   P2MSEL13_0, P2MSEL12_0, PF0_FN),
0334     PINMUX_DATA(SSI1_SDATA_MARK,    P2MSEL15_0, P2MSEL14_1, PF7_FN),
0335     PINMUX_DATA(SSI1_SCK_MARK,  P2MSEL15_0, P2MSEL14_1, PF6_FN),
0336     PINMUX_DATA(SSI1_WS_MARK,   P2MSEL15_0, P2MSEL14_1, PF5_FN),
0337     PINMUX_DATA(SSI1_CLK_MARK,  P2MSEL15_0, P2MSEL14_1, PF4_FN),
0338     PINMUX_DATA(SSI0_SDATA_MARK,    P2MSEL13_0, P2MSEL12_1, PF3_FN),
0339     PINMUX_DATA(SSI0_SCK_MARK,  P2MSEL13_0, P2MSEL12_1, PF2_FN),
0340     PINMUX_DATA(SSI0_WS_MARK,   P2MSEL13_0, P2MSEL12_1, PF1_FN),
0341     PINMUX_DATA(SSI0_CLK_MARK,  P2MSEL13_0, P2MSEL12_1, PF0_FN),
0342     PINMUX_DATA(SDIF1CMD_MARK,  P2MSEL15_1, P2MSEL14_0, PF7_FN),
0343     PINMUX_DATA(SDIF1CD_MARK,   P2MSEL15_1, P2MSEL14_0, PF6_FN),
0344     PINMUX_DATA(SDIF1WP_MARK,   P2MSEL15_1, P2MSEL14_0, PF5_FN),
0345     PINMUX_DATA(SDIF1CLK_MARK,  P2MSEL15_1, P2MSEL14_0, PF4_FN),
0346     PINMUX_DATA(SDIF1D3_MARK,   P2MSEL13_1, P2MSEL12_0, PF3_FN),
0347     PINMUX_DATA(SDIF1D2_MARK,   P2MSEL13_1, P2MSEL12_0, PF2_FN),
0348     PINMUX_DATA(SDIF1D1_MARK,   P2MSEL13_1, P2MSEL12_0, PF1_FN),
0349     PINMUX_DATA(SDIF1D0_MARK,   P2MSEL13_1, P2MSEL12_0, PF0_FN),
0350
0351     /* PG FN */
0352     PINMUX_DATA(SCIF3_SCK_MARK, P1MSEL8_0, PG7_FN),
0353     PINMUX_DATA(SSI2_SDATA_MARK,    P1MSEL8_1, PG7_FN),
0354     PINMUX_DATA(SCIF3_RXD_MARK, P1MSEL7_0, P1MSEL6_0, PG6_FN),
0355     PINMUX_DATA(SSI2_SCK_MARK,  P1MSEL7_1, P1MSEL6_0, PG6_FN),
0356     PINMUX_DATA(TCLK_MARK,      P1MSEL7_0, P1MSEL6_1, PG6_FN),
0357     PINMUX_DATA(SCIF3_TXD_MARK, P1MSEL5_0, P1MSEL4_0, PG5_FN),
0358     PINMUX_DATA(SSI2_WS_MARK,   P1MSEL5_1, P1MSEL4_0, PG5_FN),
0359     PINMUX_DATA(HAC_RES_MARK,   P1MSEL5_0, P1MSEL4_1, PG5_FN),
0360
0361     /* PH FN */
0362     PINMUX_DATA(DACK3_MARK,     P2MSEL4_0, PH7_FN),
0363     PINMUX_DATA(SDIF0CMD_MARK,  P2MSEL4_1, PH7_FN),
0364     PINMUX_DATA(DACK2_MARK,     P2MSEL4_0, PH6_FN),
0365     PINMUX_DATA(SDIF0CD_MARK,   P2MSEL4_1, PH6_FN),
0366     PINMUX_DATA(DREQ3_MARK,     P2MSEL4_0, PH5_FN),
0367     PINMUX_DATA(SDIF0WP_MARK,   P2MSEL4_1, PH5_FN),
0368     PINMUX_DATA(DREQ2_MARK,     P2MSEL3_0, P2MSEL2_1, PH4_FN),
0369     PINMUX_DATA(SDIF0CLK_MARK,  P2MSEL3_1, P2MSEL2_0, PH4_FN),
0370     PINMUX_DATA(SCIF0_CTS_MARK, P2MSEL3_0, P2MSEL2_0, PH4_FN),
0371     PINMUX_DATA(SDIF0D3_MARK,   P2MSEL1_1, P2MSEL0_0, PH3_FN),
0372     PINMUX_DATA(SCIF0_RTS_MARK, P2MSEL1_0, P2MSEL0_0, PH3_FN),
0373     PINMUX_DATA(IRL7_MARK,      P2MSEL1_0, P2MSEL0_1, PH3_FN),
0374     PINMUX_DATA(SDIF0D2_MARK,   P2MSEL1_1, P2MSEL0_0, PH2_FN),
0375     PINMUX_DATA(SCIF0_SCK_MARK, P2MSEL1_0, P2MSEL0_0, PH2_FN),
0376     PINMUX_DATA(IRL6_MARK,      P2MSEL1_0, P2MSEL0_1, PH2_FN),
0377     PINMUX_DATA(SDIF0D1_MARK,   P2MSEL1_1, P2MSEL0_0, PH1_FN),
0378     PINMUX_DATA(SCIF0_RXD_MARK, P2MSEL1_0, P2MSEL0_0, PH1_FN),
0379     PINMUX_DATA(IRL5_MARK,      P2MSEL1_0, P2MSEL0_1, PH1_FN),
0380     PINMUX_DATA(SDIF0D0_MARK,   P2MSEL1_1, P2MSEL0_0, PH0_FN),
0381     PINMUX_DATA(SCIF0_TXD_MARK, P2MSEL1_0, P2MSEL0_0, PH0_FN),
0382     PINMUX_DATA(IRL4_MARK,      P2MSEL1_0, P2MSEL0_1, PH0_FN),
0383
0384     /* PJ FN */
0385     PINMUX_DATA(SCIF5_SCK_MARK, P2MSEL11_1, PJ7_FN),
0386     PINMUX_DATA(FRB_MARK,       P2MSEL11_0, PJ7_FN),
0387     PINMUX_DATA(SCIF5_RXD_MARK, P2MSEL10_0, PJ6_FN),
0388     PINMUX_DATA(IOIS16_MARK,    P2MSEL10_1, PJ6_FN),
0389     PINMUX_DATA(SCIF5_TXD_MARK, P2MSEL10_0, PJ5_FN),
0390     PINMUX_DATA(CE2B_MARK,      P2MSEL10_1, PJ5_FN),
0391     PINMUX_DATA(DRAK3_MARK,     P2MSEL7_0, PJ4_FN),
0392     PINMUX_DATA(CE2A_MARK,      P2MSEL7_1, PJ4_FN),
0393     PINMUX_DATA(SCIF4_SCK_MARK, P2MSEL9_0, P2MSEL8_0, PJ3_FN),
0394     PINMUX_DATA(DRAK2_MARK,     P2MSEL9_0, P2MSEL8_1, PJ3_FN),
0395     PINMUX_DATA(SSI3_WS_MARK,   P2MSEL9_1, P2MSEL8_0, PJ3_FN),
0396     PINMUX_DATA(SCIF4_RXD_MARK, P2MSEL6_1, P2MSEL5_0, PJ2_FN),
0397     PINMUX_DATA(DRAK1_MARK,     P2MSEL6_0, P2MSEL5_1, PJ2_FN),
0398     PINMUX_DATA(FSTATUS_MARK,   P2MSEL6_0, P2MSEL5_0, PJ2_FN),
0399     PINMUX_DATA(SSI3_SDATA_MARK,    P2MSEL6_1, P2MSEL5_1, PJ2_FN),
0400     PINMUX_DATA(SCIF4_TXD_MARK, P2MSEL6_1, P2MSEL5_0, PJ1_FN),
0401     PINMUX_DATA(DRAK0_MARK,     P2MSEL6_0, P2MSEL5_1, PJ1_FN),
0402     PINMUX_DATA(FSE_MARK,       P2MSEL6_0, P2MSEL5_0, PJ1_FN),
0403     PINMUX_DATA(SSI3_SCK_MARK,  P2MSEL6_1, P2MSEL5_1, PJ1_FN),
0404 };
0405
0406 static const struct sh_pfc_pin pinmux_pins[] = {
0407     /* PA */
0408     PINMUX_GPIO(PA7),
0409     PINMUX_GPIO(PA6),
0410     PINMUX_GPIO(PA5),
0411     PINMUX_GPIO(PA4),
0412     PINMUX_GPIO(PA3),
0413     PINMUX_GPIO(PA2),
0414     PINMUX_GPIO(PA1),
0415     PINMUX_GPIO(PA0),
0416
0417     /* PB */
0418     PINMUX_GPIO(PB7),
0419     PINMUX_GPIO(PB6),
0420     PINMUX_GPIO(PB5),
0421     PINMUX_GPIO(PB4),
0422     PINMUX_GPIO(PB3),
0423     PINMUX_GPIO(PB2),
0424     PINMUX_GPIO(PB1),
0425     PINMUX_GPIO(PB0),
0426
0427     /* PC */
0428     PINMUX_GPIO(PC7),
0429     PINMUX_GPIO(PC6),
0430     PINMUX_GPIO(PC5),
0431     PINMUX_GPIO(PC4),
0432     PINMUX_GPIO(PC3),
0433     PINMUX_GPIO(PC2),
0434     PINMUX_GPIO(PC1),
0435     PINMUX_GPIO(PC0),
0436
0437     /* PD */
0438     PINMUX_GPIO(PD7),
0439     PINMUX_GPIO(PD6),
0440     PINMUX_GPIO(PD5),
0441     PINMUX_GPIO(PD4),
0442     PINMUX_GPIO(PD3),
0443     PINMUX_GPIO(PD2),
0444     PINMUX_GPIO(PD1),
0445     PINMUX_GPIO(PD0),
0446
0447     /* PE */
0448     PINMUX_GPIO(PE7),
0449     PINMUX_GPIO(PE6),
0450
0451     /* PF */
0452     PINMUX_GPIO(PF7),
0453     PINMUX_GPIO(PF6),
0454     PINMUX_GPIO(PF5),
0455     PINMUX_GPIO(PF4),
0456     PINMUX_GPIO(PF3),
0457     PINMUX_GPIO(PF2),
0458     PINMUX_GPIO(PF1),
0459     PINMUX_GPIO(PF0),
0460
0461     /* PG */
0462     PINMUX_GPIO(PG7),
0463     PINMUX_GPIO(PG6),
0464     PINMUX_GPIO(PG5),
0465
0466     /* PH */
0467     PINMUX_GPIO(PH7),
0468     PINMUX_GPIO(PH6),
0469     PINMUX_GPIO(PH5),
0470     PINMUX_GPIO(PH4),
0471     PINMUX_GPIO(PH3),
0472     PINMUX_GPIO(PH2),
0473     PINMUX_GPIO(PH1),
0474     PINMUX_GPIO(PH0),
0475
0476     /* PJ */
0477     PINMUX_GPIO(PJ7),
0478     PINMUX_GPIO(PJ6),
0479     PINMUX_GPIO(PJ5),
0480     PINMUX_GPIO(PJ4),
0481     PINMUX_GPIO(PJ3),
0482     PINMUX_GPIO(PJ2),
0483     PINMUX_GPIO(PJ1),
0484 };
0485
0486 #define PINMUX_FN_BASE  ARRAY_SIZE(pinmux_pins)
0487
0488 static const struct pinmux_func pinmux_func_gpios[] = {
0489     /* FN */
0490     GPIO_FN(CDE),
0491     GPIO_FN(ETH_MAGIC),
0492     GPIO_FN(DISP),
0493     GPIO_FN(ETH_LINK),
0494     GPIO_FN(DR5),
0495     GPIO_FN(ETH_TX_ER),
0496     GPIO_FN(DR4),
0497     GPIO_FN(ETH_TX_EN),
0498     GPIO_FN(DR3),
0499     GPIO_FN(ETH_TXD3),
0500     GPIO_FN(DR2),
0501     GPIO_FN(ETH_TXD2),
0502     GPIO_FN(DR1),
0503     GPIO_FN(ETH_TXD1),
0504     GPIO_FN(DR0),
0505     GPIO_FN(ETH_TXD0),
0506     GPIO_FN(VSYNC),
0507     GPIO_FN(HSPI_CLK),
0508     GPIO_FN(ODDF),
0509     GPIO_FN(HSPI_CS),
0510     GPIO_FN(DG5),
0511     GPIO_FN(ETH_MDIO),
0512     GPIO_FN(DG4),
0513     GPIO_FN(ETH_RX_CLK),
0514     GPIO_FN(DG3),
0515     GPIO_FN(ETH_MDC),
0516     GPIO_FN(DG2),
0517     GPIO_FN(ETH_COL),
0518     GPIO_FN(DG1),
0519     GPIO_FN(ETH_TX_CLK),
0520     GPIO_FN(DG0),
0521     GPIO_FN(ETH_CRS),
0522     GPIO_FN(DCLKIN),
0523     GPIO_FN(HSPI_RX),
0524     GPIO_FN(HSYNC),
0525     GPIO_FN(HSPI_TX),
0526     GPIO_FN(DB5),
0527     GPIO_FN(ETH_RXD3),
0528     GPIO_FN(DB4),
0529     GPIO_FN(ETH_RXD2),
0530     GPIO_FN(DB3),
0531     GPIO_FN(ETH_RXD1),
0532     GPIO_FN(DB2),
0533     GPIO_FN(ETH_RXD0),
0534     GPIO_FN(DB1),
0535     GPIO_FN(ETH_RX_DV),
0536     GPIO_FN(DB0),
0537     GPIO_FN(ETH_RX_ER),
0538     GPIO_FN(DCLKOUT),
0539     GPIO_FN(SCIF1_SCK),
0540     GPIO_FN(SCIF1_RXD),
0541     GPIO_FN(SCIF1_TXD),
0542     GPIO_FN(DACK1),
0543     GPIO_FN(BACK),
0544     GPIO_FN(FALE),
0545     GPIO_FN(DACK0),
0546     GPIO_FN(FCLE),
0547     GPIO_FN(DREQ1),
0548     GPIO_FN(BREQ),
0549     GPIO_FN(USB_OVC1),
0550     GPIO_FN(DREQ0),
0551     GPIO_FN(USB_OVC0),
0552     GPIO_FN(USB_PENC1),
0553     GPIO_FN(USB_PENC0),
0554     GPIO_FN(HAC1_SDOUT),
0555     GPIO_FN(SSI1_SDATA),
0556     GPIO_FN(SDIF1CMD),
0557     GPIO_FN(HAC1_SDIN),
0558     GPIO_FN(SSI1_SCK),
0559     GPIO_FN(SDIF1CD),
0560     GPIO_FN(HAC1_SYNC),
0561     GPIO_FN(SSI1_WS),
0562     GPIO_FN(SDIF1WP),
0563     GPIO_FN(HAC1_BITCLK),
0564     GPIO_FN(SSI1_CLK),
0565     GPIO_FN(SDIF1CLK),
0566     GPIO_FN(HAC0_SDOUT),
0567     GPIO_FN(SSI0_SDATA),
0568     GPIO_FN(SDIF1D3),
0569     GPIO_FN(HAC0_SDIN),
0570     GPIO_FN(SSI0_SCK),
0571     GPIO_FN(SDIF1D2),
0572     GPIO_FN(HAC0_SYNC),
0573     GPIO_FN(SSI0_WS),
0574     GPIO_FN(SDIF1D1),
0575     GPIO_FN(HAC0_BITCLK),
0576     GPIO_FN(SSI0_CLK),
0577     GPIO_FN(SDIF1D0),
0578     GPIO_FN(SCIF3_SCK),
0579     GPIO_FN(SSI2_SDATA),
0580     GPIO_FN(SCIF3_RXD),
0581     GPIO_FN(TCLK),
0582     GPIO_FN(SSI2_SCK),
0583     GPIO_FN(SCIF3_TXD),
0584     GPIO_FN(HAC_RES),
0585     GPIO_FN(SSI2_WS),
0586     GPIO_FN(DACK3),
0587     GPIO_FN(SDIF0CMD),
0588     GPIO_FN(DACK2),
0589     GPIO_FN(SDIF0CD),
0590     GPIO_FN(DREQ3),
0591     GPIO_FN(SDIF0WP),
0592     GPIO_FN(SCIF0_CTS),
0593     GPIO_FN(DREQ2),
0594     GPIO_FN(SDIF0CLK),
0595     GPIO_FN(SCIF0_RTS),
0596     GPIO_FN(IRL7),
0597     GPIO_FN(SDIF0D3),
0598     GPIO_FN(SCIF0_SCK),
0599     GPIO_FN(IRL6),
0600     GPIO_FN(SDIF0D2),
0601     GPIO_FN(SCIF0_RXD),
0602     GPIO_FN(IRL5),
0603     GPIO_FN(SDIF0D1),
0604     GPIO_FN(SCIF0_TXD),
0605     GPIO_FN(IRL4),
0606     GPIO_FN(SDIF0D0),
0607     GPIO_FN(SCIF5_SCK),
0608     GPIO_FN(FRB),
0609     GPIO_FN(SCIF5_RXD),
0610     GPIO_FN(IOIS16),
0611     GPIO_FN(SCIF5_TXD),
0612     GPIO_FN(CE2B),
0613     GPIO_FN(DRAK3),
0614     GPIO_FN(CE2A),
0615     GPIO_FN(SCIF4_SCK),
0616     GPIO_FN(DRAK2),
0617     GPIO_FN(SSI3_WS),
0618     GPIO_FN(SCIF4_RXD),
0619     GPIO_FN(DRAK1),
0620     GPIO_FN(SSI3_SDATA),
0621     GPIO_FN(FSTATUS),
0622     GPIO_FN(SCIF4_TXD),
0623     GPIO_FN(DRAK0),
0624     GPIO_FN(SSI3_SCK),
0625     GPIO_FN(FSE),
0626 };
0627
0628 static const struct pinmux_cfg_reg pinmux_config_regs[] = {
0629     { PINMUX_CFG_REG("PACR", 0xffcc0000, 16, 2, GROUP(
0630         PA7_FN, PA7_OUT, PA7_IN, 0,
0631         PA6_FN, PA6_OUT, PA6_IN, 0,
0632         PA5_FN, PA5_OUT, PA5_IN, 0,
0633         PA4_FN, PA4_OUT, PA4_IN, 0,
0634         PA3_FN, PA3_OUT, PA3_IN, 0,
0635         PA2_FN, PA2_OUT, PA2_IN, 0,
0636         PA1_FN, PA1_OUT, PA1_IN, 0,
0637         PA0_FN, PA0_OUT, PA0_IN, 0 ))
0638     },
0639     { PINMUX_CFG_REG("PBCR", 0xffcc0002, 16, 2, GROUP(
0640         PB7_FN, PB7_OUT, PB7_IN, 0,
0641         PB6_FN, PB6_OUT, PB6_IN, 0,
0642         PB5_FN, PB5_OUT, PB5_IN, 0,
0643         PB4_FN, PB4_OUT, PB4_IN, 0,
0644         PB3_FN, PB3_OUT, PB3_IN, 0,
0645         PB2_FN, PB2_OUT, PB2_IN, 0,
0646         PB1_FN, PB1_OUT, PB1_IN, 0,
0647         PB0_FN, PB0_OUT, PB0_IN, 0 ))
0648     },
0649     { PINMUX_CFG_REG("PCCR", 0xffcc0004, 16, 2, GROUP(
0650         PC7_FN, PC7_OUT, PC7_IN, 0,
0651         PC6_FN, PC6_OUT, PC6_IN, 0,
0652         PC5_FN, PC5_OUT, PC5_IN, 0,
0653         PC4_FN, PC4_OUT, PC4_IN, 0,
0654         PC3_FN, PC3_OUT, PC3_IN, 0,
0655         PC2_FN, PC2_OUT, PC2_IN, 0,
0656         PC1_FN, PC1_OUT, PC1_IN, 0,
0657         PC0_FN, PC0_OUT, PC0_IN, 0 ))
0658     },
0659     { PINMUX_CFG_REG("PDCR", 0xffcc0006, 16, 2, GROUP(
0660         PD7_FN, PD7_OUT, PD7_IN, 0,
0661         PD6_FN, PD6_OUT, PD6_IN, 0,
0662         PD5_FN, PD5_OUT, PD5_IN, 0,
0663         PD4_FN, PD4_OUT, PD4_IN, 0,
0664         PD3_FN, PD3_OUT, PD3_IN, 0,
0665         PD2_FN, PD2_OUT, PD2_IN, 0,
0666         PD1_FN, PD1_OUT, PD1_IN, 0,
0667         PD0_FN, PD0_OUT, PD0_IN, 0 ))
0668     },
0669     { PINMUX_CFG_REG_VAR("PECR", 0xffcc0008, 16,
0670                  GROUP(2, 2, -12),
0671                  GROUP(
0672         PE7_FN, PE7_OUT, PE7_IN, 0,
0673         PE6_FN, PE6_OUT, PE6_IN, 0,
0674         /* RESERVED [12] */ ))
0675     },
0676     { PINMUX_CFG_REG("PFCR", 0xffcc000a, 16, 2, GROUP(
0677         PF7_FN, PF7_OUT, PF7_IN, 0,
0678         PF6_FN, PF6_OUT, PF6_IN, 0,
0679         PF5_FN, PF5_OUT, PF5_IN, 0,
0680         PF4_FN, PF4_OUT, PF4_IN, 0,
0681         PF3_FN, PF3_OUT, PF3_IN, 0,
0682         PF2_FN, PF2_OUT, PF2_IN, 0,
0683         PF1_FN, PF1_OUT, PF1_IN, 0,
0684         PF0_FN, PF0_OUT, PF0_IN, 0 ))
0685     },
0686     { PINMUX_CFG_REG_VAR("PGCR", 0xffcc000c, 16,
0687                  GROUP(2, 2, 2, -10),
0688                  GROUP(
0689         PG7_FN, PG7_OUT, PG7_IN, 0,
0690         PG6_FN, PG6_OUT, PG6_IN, 0,
0691         PG5_FN, PG5_OUT, PG5_IN, 0,
0692         /* RESERVED [10] */ ))
0693     },
0694     { PINMUX_CFG_REG("PHCR", 0xffcc000e, 16, 2, GROUP(
0695         PH7_FN, PH7_OUT, PH7_IN, 0,
0696         PH6_FN, PH6_OUT, PH6_IN, 0,
0697         PH5_FN, PH5_OUT, PH5_IN, 0,
0698         PH4_FN, PH4_OUT, PH4_IN, 0,
0699         PH3_FN, PH3_OUT, PH3_IN, 0,
0700         PH2_FN, PH2_OUT, PH2_IN, 0,
0701         PH1_FN, PH1_OUT, PH1_IN, 0,
0702         PH0_FN, PH0_OUT, PH0_IN, 0 ))
0703     },
0704     { PINMUX_CFG_REG("PJCR", 0xffcc0010, 16, 2, GROUP(
0705         PJ7_FN, PJ7_OUT, PJ7_IN, 0,
0706         PJ6_FN, PJ6_OUT, PJ6_IN, 0,
0707         PJ5_FN, PJ5_OUT, PJ5_IN, 0,
0708         PJ4_FN, PJ4_OUT, PJ4_IN, 0,
0709         PJ3_FN, PJ3_OUT, PJ3_IN, 0,
0710         PJ2_FN, PJ2_OUT, PJ2_IN, 0,
0711         PJ1_FN, PJ1_OUT, PJ1_IN, 0,
0712         0, 0, 0, 0, ))
0713     },
0714     { PINMUX_CFG_REG("P1MSELR", 0xffcc0080, 16, 1, GROUP(
0715         0, 0,
0716         P1MSEL14_0, P1MSEL14_1,
0717         P1MSEL13_0, P1MSEL13_1,
0718         P1MSEL12_0, P1MSEL12_1,
0719         P1MSEL11_0, P1MSEL11_1,
0720         P1MSEL10_0, P1MSEL10_1,
0721         P1MSEL9_0,  P1MSEL9_1,
0722         P1MSEL8_0,  P1MSEL8_1,
0723         P1MSEL7_0,  P1MSEL7_1,
0724         P1MSEL6_0,  P1MSEL6_1,
0725         P1MSEL5_0,  P1MSEL5_1,
0726         P1MSEL4_0,  P1MSEL4_1,
0727         P1MSEL3_0,  P1MSEL3_1,
0728         P1MSEL2_0,  P1MSEL2_1,
0729         P1MSEL1_0,  P1MSEL1_1,
0730         P1MSEL0_0,  P1MSEL0_1 ))
0731     },
0732     { PINMUX_CFG_REG("P2MSELR", 0xffcc0082, 16, 1, GROUP(
0733         P2MSEL15_0, P2MSEL15_1,
0734         P2MSEL14_0, P2MSEL14_1,
0735         P2MSEL13_0, P2MSEL13_1,
0736         P2MSEL12_0, P2MSEL12_1,
0737         P2MSEL11_0, P2MSEL11_1,
0738         P2MSEL10_0, P2MSEL10_1,
0739         P2MSEL9_0,  P2MSEL9_1,
0740         P2MSEL8_0,  P2MSEL8_1,
0741         P2MSEL7_0,  P2MSEL7_1,
0742         P2MSEL6_0,  P2MSEL6_1,
0743         P2MSEL5_0,  P2MSEL5_1,
0744         P2MSEL4_0,  P2MSEL4_1,
0745         P2MSEL3_0,  P2MSEL3_1,
0746         P2MSEL2_0,  P2MSEL2_1,
0747         P2MSEL1_0,  P2MSEL1_1,
0748         P2MSEL0_0,  P2MSEL0_1 ))
0749     },
0750     {}
0751 };
0752
0753 static const struct pinmux_data_reg pinmux_data_regs[] = {
0754     { PINMUX_DATA_REG("PADR", 0xffcc0020, 8, GROUP(
0755         PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
0756         PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA ))
0757     },
0758     { PINMUX_DATA_REG("PBDR", 0xffcc0022, 8, GROUP(
0759         PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
0760         PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA ))
0761     },
0762     { PINMUX_DATA_REG("PCDR", 0xffcc0024, 8, GROUP(
0763         PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
0764         PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA ))
0765     },
0766     { PINMUX_DATA_REG("PDDR", 0xffcc0026, 8, GROUP(
0767         PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
0768         PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA ))
0769     },
0770     { PINMUX_DATA_REG("PEDR", 0xffcc0028, 8, GROUP(
0771         PE7_DATA, PE6_DATA,
0772         0, 0, 0, 0, 0, 0 ))
0773     },
0774     { PINMUX_DATA_REG("PFDR", 0xffcc002a, 8, GROUP(
0775         PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
0776         PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA ))
0777     },
0778     { PINMUX_DATA_REG("PGDR", 0xffcc002c, 8, GROUP(
0779         PG7_DATA, PG6_DATA, PG5_DATA, 0,
0780         0, 0, 0, 0 ))
0781     },
0782     { PINMUX_DATA_REG("PHDR", 0xffcc002e, 8, GROUP(
0783         PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,
0784         PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA ))
0785     },
0786     { PINMUX_DATA_REG("PJDR", 0xffcc0030, 8, GROUP(
0787         PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
0788         PJ3_DATA, PJ2_DATA, PJ1_DATA, 0 ))
0789     },
0790     { },
0791 };
0792
0793 const struct sh_pfc_soc_info sh7786_pinmux_info = {
0794     .name = "sh7786_pfc",
0795     .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
0796     .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
0797     .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
0798
0799     .pins = pinmux_pins,
0800     .nr_pins = ARRAY_SIZE(pinmux_pins),
0801     .func_gpios = pinmux_func_gpios,
0802     .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
0803
0804     .cfg_regs = pinmux_config_regs,
0805     .data_regs = pinmux_data_regs,
0806
0807     .pinmux_data = pinmux_data,
0808     .pinmux_data_size = ARRAY_SIZE(pinmux_data),
0809 };