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OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0
0002 #include <linux/kernel.h>
0003 #include <cpu/sh7722.h>
0004 
0005 #include "sh_pfc.h"
0006 
0007 enum {
0008     PINMUX_RESERVED = 0,
0009 
0010     PINMUX_DATA_BEGIN,
0011     PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
0012     PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA,
0013     PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
0014     PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA,
0015     PTC7_DATA, PTC5_DATA, PTC4_DATA, PTC3_DATA, PTC2_DATA, PTC0_DATA,
0016     PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
0017     PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA,
0018     PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA, PTE1_DATA, PTE0_DATA,
0019     PTF6_DATA, PTF5_DATA, PTF4_DATA,
0020     PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA,
0021     PTG4_DATA, PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA,
0022     PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
0023     PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA,
0024     PTJ7_DATA, PTJ6_DATA, PTJ5_DATA, PTJ1_DATA, PTJ0_DATA,
0025     PTK6_DATA, PTK5_DATA, PTK4_DATA,
0026     PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA,
0027     PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
0028     PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA,
0029     PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
0030     PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA,
0031     PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA,
0032     PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA,
0033     PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
0034     PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA,
0035     PTR4_DATA, PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA,
0036     PTS4_DATA, PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA,
0037     PTT4_DATA, PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA,
0038     PTU4_DATA, PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA,
0039     PTV4_DATA, PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA,
0040     PTW6_DATA, PTW5_DATA, PTW4_DATA,
0041     PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA,
0042     PTX6_DATA, PTX5_DATA, PTX4_DATA,
0043     PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA,
0044     PTY6_DATA, PTY5_DATA, PTY4_DATA,
0045     PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA,
0046     PTZ5_DATA, PTZ4_DATA, PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA,
0047     PINMUX_DATA_END,
0048 
0049     PINMUX_INPUT_BEGIN,
0050     PTA7_IN, PTA6_IN, PTA5_IN, PTA4_IN,
0051     PTA3_IN, PTA2_IN, PTA1_IN, PTA0_IN,
0052     PTB7_IN, PTB6_IN, PTB5_IN, PTB4_IN,
0053     PTB3_IN, PTB2_IN, PTB1_IN, PTB0_IN,
0054     PTC7_IN, PTC5_IN, PTC4_IN, PTC3_IN, PTC2_IN, PTC0_IN,
0055     PTD7_IN, PTD6_IN, PTD5_IN, PTD4_IN, PTD3_IN, PTD2_IN, PTD1_IN,
0056     PTE7_IN, PTE6_IN, PTE5_IN, PTE4_IN, PTE1_IN, PTE0_IN,
0057     PTF6_IN, PTF5_IN, PTF4_IN, PTF3_IN, PTF2_IN, PTF1_IN,
0058     PTH6_IN, PTH5_IN, PTH1_IN, PTH0_IN,
0059     PTJ1_IN, PTJ0_IN,
0060     PTK6_IN, PTK5_IN, PTK4_IN, PTK3_IN, PTK2_IN, PTK0_IN,
0061     PTL7_IN, PTL6_IN, PTL5_IN, PTL4_IN,
0062     PTL3_IN, PTL2_IN, PTL1_IN, PTL0_IN,
0063     PTM7_IN, PTM6_IN, PTM5_IN, PTM4_IN,
0064     PTM3_IN, PTM2_IN, PTM1_IN, PTM0_IN,
0065     PTN7_IN, PTN6_IN, PTN5_IN, PTN4_IN,
0066     PTN3_IN, PTN2_IN, PTN1_IN, PTN0_IN,
0067     PTQ5_IN, PTQ4_IN, PTQ3_IN, PTQ2_IN, PTQ0_IN,
0068     PTR2_IN,
0069     PTS4_IN, PTS2_IN, PTS1_IN,
0070     PTT4_IN, PTT3_IN, PTT2_IN, PTT1_IN,
0071     PTU4_IN, PTU3_IN, PTU2_IN, PTU1_IN, PTU0_IN,
0072     PTV4_IN, PTV3_IN, PTV2_IN, PTV1_IN, PTV0_IN,
0073     PTW6_IN, PTW4_IN, PTW3_IN, PTW2_IN, PTW1_IN, PTW0_IN,
0074     PTX6_IN, PTX5_IN, PTX4_IN, PTX3_IN, PTX2_IN, PTX1_IN, PTX0_IN,
0075     PTY5_IN, PTY4_IN, PTY3_IN, PTY2_IN, PTY0_IN,
0076     PTZ5_IN, PTZ4_IN, PTZ3_IN, PTZ2_IN, PTZ1_IN,
0077     PINMUX_INPUT_END,
0078 
0079     PINMUX_OUTPUT_BEGIN,
0080     PTA7_OUT, PTA5_OUT,
0081     PTB7_OUT, PTB6_OUT, PTB5_OUT, PTB4_OUT,
0082     PTB3_OUT, PTB2_OUT, PTB1_OUT, PTB0_OUT,
0083     PTC4_OUT, PTC3_OUT, PTC2_OUT, PTC0_OUT,
0084     PTD6_OUT, PTD5_OUT, PTD4_OUT,
0085     PTD3_OUT, PTD2_OUT, PTD1_OUT, PTD0_OUT,
0086     PTE7_OUT, PTE6_OUT, PTE5_OUT, PTE4_OUT, PTE1_OUT, PTE0_OUT,
0087     PTF6_OUT, PTF5_OUT, PTF4_OUT, PTF3_OUT, PTF2_OUT, PTF0_OUT,
0088     PTG4_OUT, PTG3_OUT, PTG2_OUT, PTG1_OUT, PTG0_OUT,
0089     PTH7_OUT, PTH6_OUT, PTH5_OUT, PTH4_OUT,
0090     PTH3_OUT, PTH2_OUT, PTH1_OUT, PTH0_OUT,
0091     PTJ7_OUT, PTJ6_OUT, PTJ5_OUT, PTJ1_OUT, PTJ0_OUT,
0092     PTK6_OUT, PTK5_OUT, PTK4_OUT, PTK3_OUT, PTK1_OUT, PTK0_OUT,
0093     PTL7_OUT, PTL6_OUT, PTL5_OUT, PTL4_OUT,
0094     PTL3_OUT, PTL2_OUT, PTL1_OUT, PTL0_OUT,
0095     PTM7_OUT, PTM6_OUT, PTM5_OUT, PTM4_OUT,
0096     PTM3_OUT, PTM2_OUT, PTM1_OUT, PTM0_OUT,
0097     PTN7_OUT, PTN6_OUT, PTN5_OUT, PTN4_OUT,
0098     PTN3_OUT, PTN2_OUT, PTN1_OUT, PTN0_OUT, PTQ6_OUT, PTQ5_OUT, PTQ4_OUT,
0099     PTQ3_OUT, PTQ2_OUT, PTQ1_OUT, PTQ0_OUT,
0100     PTR4_OUT, PTR3_OUT, PTR1_OUT, PTR0_OUT,
0101     PTS3_OUT, PTS2_OUT, PTS0_OUT,
0102     PTT4_OUT, PTT3_OUT, PTT2_OUT, PTT0_OUT,
0103     PTU4_OUT, PTU3_OUT, PTU2_OUT, PTU0_OUT,
0104     PTV4_OUT, PTV3_OUT, PTV2_OUT, PTV1_OUT, PTV0_OUT,
0105     PTW5_OUT, PTW4_OUT, PTW3_OUT, PTW2_OUT, PTW1_OUT, PTW0_OUT,
0106     PTX6_OUT, PTX5_OUT, PTX4_OUT, PTX3_OUT, PTX2_OUT, PTX1_OUT, PTX0_OUT,
0107     PTY5_OUT, PTY4_OUT, PTY3_OUT, PTY2_OUT, PTY1_OUT, PTY0_OUT,
0108     PINMUX_OUTPUT_END,
0109 
0110     PINMUX_MARK_BEGIN,
0111     SCIF0_TXD_MARK, SCIF0_RXD_MARK,
0112     SCIF0_RTS_MARK, SCIF0_CTS_MARK, SCIF0_SCK_MARK,
0113     SCIF1_TXD_MARK, SCIF1_RXD_MARK,
0114     SCIF1_RTS_MARK, SCIF1_CTS_MARK, SCIF1_SCK_MARK,
0115     SCIF2_TXD_MARK, SCIF2_RXD_MARK,
0116     SCIF2_RTS_MARK, SCIF2_CTS_MARK, SCIF2_SCK_MARK,
0117     SIOTXD_MARK, SIORXD_MARK,
0118     SIOD_MARK, SIOSTRB0_MARK, SIOSTRB1_MARK,
0119     SIOSCK_MARK, SIOMCK_MARK,
0120     VIO_D15_MARK, VIO_D14_MARK, VIO_D13_MARK, VIO_D12_MARK,
0121     VIO_D11_MARK, VIO_D10_MARK, VIO_D9_MARK, VIO_D8_MARK,
0122     VIO_D7_MARK, VIO_D6_MARK, VIO_D5_MARK, VIO_D4_MARK,
0123     VIO_D3_MARK, VIO_D2_MARK, VIO_D1_MARK, VIO_D0_MARK,
0124     VIO_CLK_MARK, VIO_VD_MARK, VIO_HD_MARK, VIO_FLD_MARK,
0125     VIO_CKO_MARK, VIO_STEX_MARK, VIO_STEM_MARK, VIO_VD2_MARK,
0126     VIO_HD2_MARK, VIO_CLK2_MARK,
0127     LCDD23_MARK, LCDD22_MARK, LCDD21_MARK, LCDD20_MARK,
0128     LCDD19_MARK, LCDD18_MARK, LCDD17_MARK, LCDD16_MARK,
0129     LCDD15_MARK, LCDD14_MARK, LCDD13_MARK, LCDD12_MARK,
0130     LCDD11_MARK, LCDD10_MARK, LCDD9_MARK, LCDD8_MARK,
0131     LCDD7_MARK, LCDD6_MARK, LCDD5_MARK, LCDD4_MARK,
0132     LCDD3_MARK, LCDD2_MARK, LCDD1_MARK, LCDD0_MARK,
0133     LCDLCLK_MARK, LCDDON_MARK, LCDVCPWC_MARK, LCDVEPWC_MARK,
0134     LCDVSYN_MARK, LCDDCK_MARK, LCDHSYN_MARK, LCDDISP_MARK,
0135     LCDRS_MARK, LCDCS_MARK, LCDWR_MARK, LCDRD_MARK,
0136     LCDDON2_MARK, LCDVCPWC2_MARK, LCDVEPWC2_MARK, LCDVSYN2_MARK,
0137     LCDCS2_MARK,
0138     IOIS16_MARK, A25_MARK, A24_MARK, A23_MARK, A22_MARK,
0139     BS_MARK, CS6B_CE1B_MARK, WAIT_MARK, CS6A_CE2B_MARK,
0140     HPD63_MARK, HPD62_MARK, HPD61_MARK, HPD60_MARK,
0141     HPD59_MARK, HPD58_MARK, HPD57_MARK, HPD56_MARK,
0142     HPD55_MARK, HPD54_MARK, HPD53_MARK, HPD52_MARK,
0143     HPD51_MARK, HPD50_MARK, HPD49_MARK, HPD48_MARK,
0144     HPDQM7_MARK, HPDQM6_MARK, HPDQM5_MARK, HPDQM4_MARK,
0145     IRQ0_MARK, IRQ1_MARK, IRQ2_MARK, IRQ3_MARK,
0146     IRQ4_MARK, IRQ5_MARK, IRQ6_MARK, IRQ7_MARK,
0147     SDHICD_MARK, SDHIWP_MARK, SDHID3_MARK, SDHID2_MARK,
0148     SDHID1_MARK, SDHID0_MARK, SDHICMD_MARK, SDHICLK_MARK,
0149     SIUAOLR_MARK, SIUAOBT_MARK, SIUAISLD_MARK, SIUAILR_MARK,
0150     SIUAIBT_MARK, SIUAOSLD_MARK, SIUMCKA_MARK, SIUFCKA_MARK,
0151     SIUBOLR_MARK, SIUBOBT_MARK, SIUBISLD_MARK, SIUBILR_MARK,
0152     SIUBIBT_MARK, SIUBOSLD_MARK, SIUMCKB_MARK, SIUFCKB_MARK,
0153     AUDSYNC_MARK, AUDATA3_MARK, AUDATA2_MARK, AUDATA1_MARK, AUDATA0_MARK,
0154     DACK_MARK, DREQ0_MARK,
0155     DV_CLKI_MARK, DV_CLK_MARK, DV_HSYNC_MARK, DV_VSYNC_MARK,
0156     DV_D15_MARK, DV_D14_MARK, DV_D13_MARK, DV_D12_MARK,
0157     DV_D11_MARK, DV_D10_MARK, DV_D9_MARK, DV_D8_MARK,
0158     DV_D7_MARK, DV_D6_MARK, DV_D5_MARK, DV_D4_MARK,
0159     DV_D3_MARK, DV_D2_MARK, DV_D1_MARK, DV_D0_MARK,
0160     STATUS0_MARK, PDSTATUS_MARK,
0161     SIOF0_MCK_MARK, SIOF0_SCK_MARK,
0162     SIOF0_SYNC_MARK, SIOF0_SS1_MARK, SIOF0_SS2_MARK,
0163     SIOF0_TXD_MARK, SIOF0_RXD_MARK,
0164     SIOF1_MCK_MARK, SIOF1_SCK_MARK,
0165     SIOF1_SYNC_MARK, SIOF1_SS1_MARK, SIOF1_SS2_MARK,
0166     SIOF1_TXD_MARK, SIOF1_RXD_MARK,
0167     SIM_D_MARK, SIM_CLK_MARK, SIM_RST_MARK,
0168     TS_SDAT_MARK, TS_SCK_MARK, TS_SDEN_MARK, TS_SPSYNC_MARK,
0169     IRDA_IN_MARK, IRDA_OUT_MARK,
0170     TPUTO_MARK,
0171     FCE_MARK, NAF7_MARK, NAF6_MARK, NAF5_MARK, NAF4_MARK,
0172     NAF3_MARK, NAF2_MARK, NAF1_MARK, NAF0_MARK, FCDE_MARK,
0173     FOE_MARK, FSC_MARK, FWE_MARK, FRB_MARK,
0174     KEYIN0_MARK, KEYIN1_MARK, KEYIN2_MARK, KEYIN3_MARK, KEYIN4_MARK,
0175     KEYOUT0_MARK, KEYOUT1_MARK, KEYOUT2_MARK, KEYOUT3_MARK,
0176     KEYOUT4_IN6_MARK, KEYOUT5_IN5_MARK,
0177     PINMUX_MARK_END,
0178 
0179     PINMUX_FUNCTION_BEGIN,
0180     VIO_D7_SCIF1_SCK, VIO_D6_SCIF1_RXD, VIO_D5_SCIF1_TXD, VIO_D4,
0181     VIO_D3, VIO_D2, VIO_D1, VIO_D0_LCDLCLK,
0182     HPD55, HPD54, HPD53, HPD52, HPD51, HPD50, HPD49, HPD48,
0183     IOIS16, HPDQM7, HPDQM6, HPDQM5, HPDQM4,
0184     SDHICD, SDHIWP, SDHID3, IRQ2_SDHID2, SDHID1, SDHID0, SDHICMD, SDHICLK,
0185     A25, A24, A23, A22, IRQ5, IRQ4_BS,
0186     PTF6, SIOSCK_SIUBOBT, SIOSTRB1_SIUBOLR,
0187     SIOSTRB0_SIUBIBT, SIOD_SIUBILR, SIORXD_SIUBISLD, SIOTXD_SIUBOSLD,
0188     AUDSYNC, AUDATA3, AUDATA2, AUDATA1, AUDATA0,
0189     LCDVCPWC_LCDVCPWC2, LCDVSYN2_DACK, LCDVSYN, LCDDISP_LCDRS,
0190     LCDHSYN_LCDCS, LCDDON_LCDDON2, LCDD17_DV_HSYNC, LCDD16_DV_VSYNC,
0191     STATUS0, PDSTATUS, IRQ1, IRQ0,
0192     SIUAILR_SIOF1_SS2, SIUAIBT_SIOF1_SS1, SIUAOLR_SIOF1_SYNC,
0193     SIUAOBT_SIOF1_SCK, SIUAISLD_SIOF1_RXD, SIUAOSLD_SIOF1_TXD, PTK0,
0194     LCDD15_DV_D15, LCDD14_DV_D14, LCDD13_DV_D13, LCDD12_DV_D12,
0195     LCDD11_DV_D11, LCDD10_DV_D10, LCDD9_DV_D9, LCDD8_DV_D8,
0196     LCDD7_DV_D7, LCDD6_DV_D6, LCDD5_DV_D5, LCDD4_DV_D4,
0197     LCDD3_DV_D3, LCDD2_DV_D2, LCDD1_DV_D1, LCDD0_DV_D0,
0198     HPD63, HPD62, HPD61, HPD60, HPD59, HPD58, HPD57, HPD56,
0199     SIOF0_SS2_SIM_RST, SIOF0_SS1_TS_SPSYNC, SIOF0_SYNC_TS_SDEN,
0200     SIOF0_SCK_TS_SCK, PTQ2, PTQ1, PTQ0,
0201     LCDRD, CS6B_CE1B_LCDCS2, WAIT, LCDDCK_LCDWR, LCDVEPWC_LCDVEPWC2,
0202     SCIF0_CTS_SIUAISPD, SCIF0_RTS_SIUAOSPD,
0203     SCIF0_SCK_TPUTO, SCIF0_RXD, SCIF0_TXD,
0204     FOE_VIO_VD2, FWE, FSC, DREQ0, FCDE,
0205     NAF2_VIO_D10, NAF1_VIO_D9, NAF0_VIO_D8,
0206     FRB_VIO_CLK2, FCE_VIO_HD2,
0207     NAF7_VIO_D15, NAF6_VIO_D14, NAF5_VIO_D13, NAF4_VIO_D12, NAF3_VIO_D11,
0208     VIO_FLD_SCIF2_CTS, VIO_CKO_SCIF2_RTS, VIO_STEX_SCIF2_SCK,
0209     VIO_STEM_SCIF2_TXD, VIO_HD_SCIF2_RXD,
0210     VIO_VD_SCIF1_CTS, VIO_CLK_SCIF1_RTS,
0211     CS6A_CE2B, LCDD23, LCDD22, LCDD21, LCDD20,
0212     LCDD19_DV_CLKI, LCDD18_DV_CLK,
0213     KEYOUT5_IN5, KEYOUT4_IN6, KEYOUT3, KEYOUT2, KEYOUT1, KEYOUT0,
0214     KEYIN4_IRQ7, KEYIN3, KEYIN2, KEYIN1, KEYIN0_IRQ6,
0215 
0216     PSA15_KEYIN0, PSA15_IRQ6, PSA14_KEYIN4, PSA14_IRQ7,
0217     PSA9_IRQ4, PSA9_BS, PSA4_IRQ2, PSA4_SDHID2,
0218     PSB15_SIOTXD, PSB15_SIUBOSLD, PSB14_SIORXD, PSB14_SIUBISLD,
0219     PSB13_SIOD, PSB13_SIUBILR, PSB12_SIOSTRB0, PSB12_SIUBIBT,
0220     PSB11_SIOSTRB1, PSB11_SIUBOLR, PSB10_SIOSCK, PSB10_SIUBOBT,
0221     PSB9_SIOMCK, PSB9_SIUMCKB, PSB8_SIOF0_MCK, PSB8_IRQ3,
0222     PSB7_SIOF0_TXD, PSB7_IRDA_OUT, PSB6_SIOF0_RXD, PSB6_IRDA_IN,
0223     PSB5_SIOF0_SCK, PSB5_TS_SCK, PSB4_SIOF0_SYNC, PSB4_TS_SDEN,
0224     PSB3_SIOF0_SS1, PSB3_TS_SPSYNC, PSB2_SIOF0_SS2, PSB2_SIM_RST,
0225     PSB1_SIUMCKA, PSB1_SIOF1_MCK, PSB0_SIUAOSLD, PSB0_SIOF1_TXD,
0226     PSC15_SIUAISLD, PSC15_SIOF1_RXD, PSC14_SIUAOBT, PSC14_SIOF1_SCK,
0227     PSC13_SIUAOLR, PSC13_SIOF1_SYNC, PSC12_SIUAIBT, PSC12_SIOF1_SS1,
0228     PSC11_SIUAILR, PSC11_SIOF1_SS2, PSC0_NAF, PSC0_VIO,
0229     PSD13_VIO, PSD13_SCIF2, PSD12_VIO, PSD12_SCIF1,
0230     PSD11_VIO, PSD11_SCIF1, PSD10_VIO_D0, PSD10_LCDLCLK,
0231     PSD9_SIOMCK_SIUMCKB, PSD9_SIUFCKB, PSD8_SCIF0_SCK, PSD8_TPUTO,
0232     PSD7_SCIF0_RTS, PSD7_SIUAOSPD, PSD6_SCIF0_CTS, PSD6_SIUAISPD,
0233     PSD5_CS6B_CE1B, PSD5_LCDCS2,
0234     PSD3_LCDVEPWC_LCDVCPWC, PSD3_LCDVEPWC2_LCDVCPWC2,
0235     PSD2_LCDDON, PSD2_LCDDON2, PSD0_LCDD19_LCDD0, PSD0_DV,
0236     PSE15_SIOF0_MCK_IRQ3, PSE15_SIM_D,
0237     PSE14_SIOF0_TXD_IRDA_OUT, PSE14_SIM_CLK,
0238     PSE13_SIOF0_RXD_IRDA_IN, PSE13_TS_SDAT, PSE12_LCDVSYN2, PSE12_DACK,
0239     PSE11_SIUMCKA_SIOF1_MCK, PSE11_SIUFCKA,
0240     PSE3_FLCTL, PSE3_VIO, PSE2_NAF2, PSE2_VIO_D10,
0241     PSE1_NAF1, PSE1_VIO_D9, PSE0_NAF0, PSE0_VIO_D8,
0242 
0243     HIZA14_KEYSC, HIZA14_HIZ,
0244     HIZA10_NAF, HIZA10_HIZ,
0245     HIZA9_VIO, HIZA9_HIZ,
0246     HIZA8_LCDC, HIZA8_HIZ,
0247     HIZA7_LCDC, HIZA7_HIZ,
0248     HIZA6_LCDC, HIZA6_HIZ,
0249     HIZB4_SIUA, HIZB4_HIZ,
0250     HIZB1_VIO, HIZB1_HIZ,
0251     HIZB0_VIO, HIZB0_HIZ,
0252     HIZC15_IRQ7, HIZC15_HIZ,
0253     HIZC14_IRQ6, HIZC14_HIZ,
0254     HIZC13_IRQ5, HIZC13_HIZ,
0255     HIZC12_IRQ4, HIZC12_HIZ,
0256     HIZC11_IRQ3, HIZC11_HIZ,
0257     HIZC10_IRQ2, HIZC10_HIZ,
0258     HIZC9_IRQ1, HIZC9_HIZ,
0259     HIZC8_IRQ0, HIZC8_HIZ,
0260     MSELB9_VIO, MSELB9_VIO2,
0261     MSELB8_RGB, MSELB8_SYS,
0262     PINMUX_FUNCTION_END,
0263 };
0264 
0265 static const u16 pinmux_data[] = {
0266     /* PTA */
0267     PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT),
0268     PINMUX_DATA(PTA6_DATA, PTA6_IN),
0269     PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT),
0270     PINMUX_DATA(PTA4_DATA, PTA4_IN),
0271     PINMUX_DATA(PTA3_DATA, PTA3_IN),
0272     PINMUX_DATA(PTA2_DATA, PTA2_IN),
0273     PINMUX_DATA(PTA1_DATA, PTA1_IN),
0274     PINMUX_DATA(PTA0_DATA, PTA0_IN),
0275 
0276     /* PTB */
0277     PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT),
0278     PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT),
0279     PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT),
0280     PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT),
0281     PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT),
0282     PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT),
0283     PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT),
0284     PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT),
0285 
0286     /* PTC */
0287     PINMUX_DATA(PTC7_DATA, PTC7_IN),
0288     PINMUX_DATA(PTC5_DATA, PTC5_IN),
0289     PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT),
0290     PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT),
0291     PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT),
0292     PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT),
0293 
0294     /* PTD */
0295     PINMUX_DATA(PTD7_DATA, PTD7_IN),
0296     PINMUX_DATA(PTD6_DATA, PTD6_OUT, PTD6_IN),
0297     PINMUX_DATA(PTD5_DATA, PTD5_OUT, PTD5_IN),
0298     PINMUX_DATA(PTD4_DATA, PTD4_OUT, PTD4_IN),
0299     PINMUX_DATA(PTD3_DATA, PTD3_OUT, PTD3_IN),
0300     PINMUX_DATA(PTD2_DATA, PTD2_OUT, PTD2_IN),
0301     PINMUX_DATA(PTD1_DATA, PTD1_OUT, PTD1_IN),
0302     PINMUX_DATA(PTD0_DATA, PTD0_OUT),
0303 
0304     /* PTE */
0305     PINMUX_DATA(PTE7_DATA, PTE7_OUT, PTE7_IN),
0306     PINMUX_DATA(PTE6_DATA, PTE6_OUT, PTE6_IN),
0307     PINMUX_DATA(PTE5_DATA, PTE5_OUT, PTE5_IN),
0308     PINMUX_DATA(PTE4_DATA, PTE4_OUT, PTE4_IN),
0309     PINMUX_DATA(PTE1_DATA, PTE1_OUT, PTE1_IN),
0310     PINMUX_DATA(PTE0_DATA, PTE0_OUT, PTE0_IN),
0311 
0312     /* PTF */
0313     PINMUX_DATA(PTF6_DATA, PTF6_OUT, PTF6_IN),
0314     PINMUX_DATA(PTF5_DATA, PTF5_OUT, PTF5_IN),
0315     PINMUX_DATA(PTF4_DATA, PTF4_OUT, PTF4_IN),
0316     PINMUX_DATA(PTF3_DATA, PTF3_OUT, PTF3_IN),
0317     PINMUX_DATA(PTF2_DATA, PTF2_OUT, PTF2_IN),
0318     PINMUX_DATA(PTF1_DATA, PTF1_IN),
0319     PINMUX_DATA(PTF0_DATA, PTF0_OUT),
0320 
0321     /* PTG */
0322     PINMUX_DATA(PTG4_DATA, PTG4_OUT),
0323     PINMUX_DATA(PTG3_DATA, PTG3_OUT),
0324     PINMUX_DATA(PTG2_DATA, PTG2_OUT),
0325     PINMUX_DATA(PTG1_DATA, PTG1_OUT),
0326     PINMUX_DATA(PTG0_DATA, PTG0_OUT),
0327 
0328     /* PTH */
0329     PINMUX_DATA(PTH7_DATA, PTH7_OUT),
0330     PINMUX_DATA(PTH6_DATA, PTH6_OUT, PTH6_IN),
0331     PINMUX_DATA(PTH5_DATA, PTH5_OUT, PTH5_IN),
0332     PINMUX_DATA(PTH4_DATA, PTH4_OUT),
0333     PINMUX_DATA(PTH3_DATA, PTH3_OUT),
0334     PINMUX_DATA(PTH2_DATA, PTH2_OUT),
0335     PINMUX_DATA(PTH1_DATA, PTH1_OUT, PTH1_IN),
0336     PINMUX_DATA(PTH0_DATA, PTH0_OUT, PTH0_IN),
0337 
0338     /* PTJ */
0339     PINMUX_DATA(PTJ7_DATA, PTJ7_OUT),
0340     PINMUX_DATA(PTJ6_DATA, PTJ6_OUT),
0341     PINMUX_DATA(PTJ5_DATA, PTJ5_OUT),
0342     PINMUX_DATA(PTJ1_DATA, PTJ1_OUT, PTJ1_IN),
0343     PINMUX_DATA(PTJ0_DATA, PTJ0_OUT, PTJ0_IN),
0344 
0345     /* PTK */
0346     PINMUX_DATA(PTK6_DATA, PTK6_OUT, PTK6_IN),
0347     PINMUX_DATA(PTK5_DATA, PTK5_OUT, PTK5_IN),
0348     PINMUX_DATA(PTK4_DATA, PTK4_OUT, PTK4_IN),
0349     PINMUX_DATA(PTK3_DATA, PTK3_OUT, PTK3_IN),
0350     PINMUX_DATA(PTK2_DATA, PTK2_IN),
0351     PINMUX_DATA(PTK1_DATA, PTK1_OUT),
0352     PINMUX_DATA(PTK0_DATA, PTK0_OUT, PTK0_IN),
0353 
0354     /* PTL */
0355     PINMUX_DATA(PTL7_DATA, PTL7_OUT, PTL7_IN),
0356     PINMUX_DATA(PTL6_DATA, PTL6_OUT, PTL6_IN),
0357     PINMUX_DATA(PTL5_DATA, PTL5_OUT, PTL5_IN),
0358     PINMUX_DATA(PTL4_DATA, PTL4_OUT, PTL4_IN),
0359     PINMUX_DATA(PTL3_DATA, PTL3_OUT, PTL3_IN),
0360     PINMUX_DATA(PTL2_DATA, PTL2_OUT, PTL2_IN),
0361     PINMUX_DATA(PTL1_DATA, PTL1_OUT, PTL1_IN),
0362     PINMUX_DATA(PTL0_DATA, PTL0_OUT, PTL0_IN),
0363 
0364     /* PTM */
0365     PINMUX_DATA(PTM7_DATA, PTM7_OUT, PTM7_IN),
0366     PINMUX_DATA(PTM6_DATA, PTM6_OUT, PTM6_IN),
0367     PINMUX_DATA(PTM5_DATA, PTM5_OUT, PTM5_IN),
0368     PINMUX_DATA(PTM4_DATA, PTM4_OUT, PTM4_IN),
0369     PINMUX_DATA(PTM3_DATA, PTM3_OUT, PTM3_IN),
0370     PINMUX_DATA(PTM2_DATA, PTM2_OUT, PTM2_IN),
0371     PINMUX_DATA(PTM1_DATA, PTM1_OUT, PTM1_IN),
0372     PINMUX_DATA(PTM0_DATA, PTM0_OUT, PTM0_IN),
0373 
0374     /* PTN */
0375     PINMUX_DATA(PTN7_DATA, PTN7_OUT, PTN7_IN),
0376     PINMUX_DATA(PTN6_DATA, PTN6_OUT, PTN6_IN),
0377     PINMUX_DATA(PTN5_DATA, PTN5_OUT, PTN5_IN),
0378     PINMUX_DATA(PTN4_DATA, PTN4_OUT, PTN4_IN),
0379     PINMUX_DATA(PTN3_DATA, PTN3_OUT, PTN3_IN),
0380     PINMUX_DATA(PTN2_DATA, PTN2_OUT, PTN2_IN),
0381     PINMUX_DATA(PTN1_DATA, PTN1_OUT, PTN1_IN),
0382     PINMUX_DATA(PTN0_DATA, PTN0_OUT, PTN0_IN),
0383 
0384     /* PTQ */
0385     PINMUX_DATA(PTQ6_DATA, PTQ6_OUT),
0386     PINMUX_DATA(PTQ5_DATA, PTQ5_OUT, PTQ5_IN),
0387     PINMUX_DATA(PTQ4_DATA, PTQ4_OUT, PTQ4_IN),
0388     PINMUX_DATA(PTQ3_DATA, PTQ3_OUT, PTQ3_IN),
0389     PINMUX_DATA(PTQ2_DATA, PTQ2_IN),
0390     PINMUX_DATA(PTQ1_DATA, PTQ1_OUT),
0391     PINMUX_DATA(PTQ0_DATA, PTQ0_OUT, PTQ0_IN),
0392 
0393     /* PTR */
0394     PINMUX_DATA(PTR4_DATA, PTR4_OUT),
0395     PINMUX_DATA(PTR3_DATA, PTR3_OUT),
0396     PINMUX_DATA(PTR2_DATA, PTR2_IN),
0397     PINMUX_DATA(PTR1_DATA, PTR1_OUT),
0398     PINMUX_DATA(PTR0_DATA, PTR0_OUT),
0399 
0400     /* PTS */
0401     PINMUX_DATA(PTS4_DATA, PTS4_IN),
0402     PINMUX_DATA(PTS3_DATA, PTS3_OUT),
0403     PINMUX_DATA(PTS2_DATA, PTS2_OUT, PTS2_IN),
0404     PINMUX_DATA(PTS1_DATA, PTS1_IN),
0405     PINMUX_DATA(PTS0_DATA, PTS0_OUT),
0406 
0407     /* PTT */
0408     PINMUX_DATA(PTT4_DATA, PTT4_OUT, PTT4_IN),
0409     PINMUX_DATA(PTT3_DATA, PTT3_OUT, PTT3_IN),
0410     PINMUX_DATA(PTT2_DATA, PTT2_OUT, PTT2_IN),
0411     PINMUX_DATA(PTT1_DATA, PTT1_IN),
0412     PINMUX_DATA(PTT0_DATA, PTT0_OUT),
0413 
0414     /* PTU */
0415     PINMUX_DATA(PTU4_DATA, PTU4_OUT, PTU4_IN),
0416     PINMUX_DATA(PTU3_DATA, PTU3_OUT, PTU3_IN),
0417     PINMUX_DATA(PTU2_DATA, PTU2_OUT, PTU2_IN),
0418     PINMUX_DATA(PTU1_DATA, PTU1_IN),
0419     PINMUX_DATA(PTU0_DATA, PTU0_OUT, PTU0_IN),
0420 
0421     /* PTV */
0422     PINMUX_DATA(PTV4_DATA, PTV4_OUT, PTV4_IN),
0423     PINMUX_DATA(PTV3_DATA, PTV3_OUT, PTV3_IN),
0424     PINMUX_DATA(PTV2_DATA, PTV2_OUT, PTV2_IN),
0425     PINMUX_DATA(PTV1_DATA, PTV1_OUT, PTV1_IN),
0426     PINMUX_DATA(PTV0_DATA, PTV0_OUT, PTV0_IN),
0427 
0428     /* PTW */
0429     PINMUX_DATA(PTW6_DATA, PTW6_IN),
0430     PINMUX_DATA(PTW5_DATA, PTW5_OUT),
0431     PINMUX_DATA(PTW4_DATA, PTW4_OUT, PTW4_IN),
0432     PINMUX_DATA(PTW3_DATA, PTW3_OUT, PTW3_IN),
0433     PINMUX_DATA(PTW2_DATA, PTW2_OUT, PTW2_IN),
0434     PINMUX_DATA(PTW1_DATA, PTW1_OUT, PTW1_IN),
0435     PINMUX_DATA(PTW0_DATA, PTW0_OUT, PTW0_IN),
0436 
0437     /* PTX */
0438     PINMUX_DATA(PTX6_DATA, PTX6_OUT, PTX6_IN),
0439     PINMUX_DATA(PTX5_DATA, PTX5_OUT, PTX5_IN),
0440     PINMUX_DATA(PTX4_DATA, PTX4_OUT, PTX4_IN),
0441     PINMUX_DATA(PTX3_DATA, PTX3_OUT, PTX3_IN),
0442     PINMUX_DATA(PTX2_DATA, PTX2_OUT, PTX2_IN),
0443     PINMUX_DATA(PTX1_DATA, PTX1_OUT, PTX1_IN),
0444     PINMUX_DATA(PTX0_DATA, PTX0_OUT, PTX0_IN),
0445 
0446     /* PTY */
0447     PINMUX_DATA(PTY5_DATA, PTY5_OUT, PTY5_IN),
0448     PINMUX_DATA(PTY4_DATA, PTY4_OUT, PTY4_IN),
0449     PINMUX_DATA(PTY3_DATA, PTY3_OUT, PTY3_IN),
0450     PINMUX_DATA(PTY2_DATA, PTY2_OUT, PTY2_IN),
0451     PINMUX_DATA(PTY1_DATA, PTY1_OUT),
0452     PINMUX_DATA(PTY0_DATA, PTY0_OUT, PTY0_IN),
0453 
0454     /* PTZ */
0455     PINMUX_DATA(PTZ5_DATA, PTZ5_IN),
0456     PINMUX_DATA(PTZ4_DATA, PTZ4_IN),
0457     PINMUX_DATA(PTZ3_DATA, PTZ3_IN),
0458     PINMUX_DATA(PTZ2_DATA, PTZ2_IN),
0459     PINMUX_DATA(PTZ1_DATA, PTZ1_IN),
0460 
0461     /* SCIF0 */
0462     PINMUX_DATA(SCIF0_TXD_MARK, SCIF0_TXD),
0463     PINMUX_DATA(SCIF0_RXD_MARK, SCIF0_RXD),
0464     PINMUX_DATA(SCIF0_RTS_MARK, PSD7_SCIF0_RTS, SCIF0_RTS_SIUAOSPD),
0465     PINMUX_DATA(SCIF0_CTS_MARK, PSD6_SCIF0_CTS, SCIF0_CTS_SIUAISPD),
0466     PINMUX_DATA(SCIF0_SCK_MARK, PSD8_SCIF0_SCK, SCIF0_SCK_TPUTO),
0467 
0468     /* SCIF1 */
0469     PINMUX_DATA(SCIF1_TXD_MARK, PSD11_SCIF1, VIO_D5_SCIF1_TXD),
0470     PINMUX_DATA(SCIF1_RXD_MARK, PSD11_SCIF1, VIO_D6_SCIF1_RXD),
0471     PINMUX_DATA(SCIF1_RTS_MARK, PSD12_SCIF1, VIO_CLK_SCIF1_RTS),
0472     PINMUX_DATA(SCIF1_CTS_MARK, PSD12_SCIF1, VIO_VD_SCIF1_CTS),
0473     PINMUX_DATA(SCIF1_SCK_MARK, PSD11_SCIF1, VIO_D7_SCIF1_SCK),
0474 
0475     /* SCIF2 */
0476     PINMUX_DATA(SCIF2_TXD_MARK, PSD13_SCIF2, VIO_STEM_SCIF2_TXD),
0477     PINMUX_DATA(SCIF2_RXD_MARK, PSD13_SCIF2, VIO_HD_SCIF2_RXD),
0478     PINMUX_DATA(SCIF2_RTS_MARK, PSD13_SCIF2, VIO_CKO_SCIF2_RTS),
0479     PINMUX_DATA(SCIF2_CTS_MARK, PSD13_SCIF2, VIO_FLD_SCIF2_CTS),
0480     PINMUX_DATA(SCIF2_SCK_MARK, PSD13_SCIF2, VIO_STEX_SCIF2_SCK),
0481 
0482     /* SIO */
0483     PINMUX_DATA(SIOTXD_MARK, PSB15_SIOTXD, SIOTXD_SIUBOSLD),
0484     PINMUX_DATA(SIORXD_MARK, PSB14_SIORXD, SIORXD_SIUBISLD),
0485     PINMUX_DATA(SIOD_MARK, PSB13_SIOD, SIOD_SIUBILR),
0486     PINMUX_DATA(SIOSTRB0_MARK, PSB12_SIOSTRB0, SIOSTRB0_SIUBIBT),
0487     PINMUX_DATA(SIOSTRB1_MARK, PSB11_SIOSTRB1, SIOSTRB1_SIUBOLR),
0488     PINMUX_DATA(SIOSCK_MARK, PSB10_SIOSCK, SIOSCK_SIUBOBT),
0489     PINMUX_DATA(SIOMCK_MARK, PSD9_SIOMCK_SIUMCKB, PSB9_SIOMCK, PTF6),
0490 
0491     /* CEU */
0492     PINMUX_DATA(VIO_D15_MARK, PSC0_VIO, HIZA10_NAF, NAF7_VIO_D15),
0493     PINMUX_DATA(VIO_D14_MARK, PSC0_VIO, HIZA10_NAF, NAF6_VIO_D14),
0494     PINMUX_DATA(VIO_D13_MARK, PSC0_VIO, HIZA10_NAF, NAF5_VIO_D13),
0495     PINMUX_DATA(VIO_D12_MARK, PSC0_VIO, HIZA10_NAF, NAF4_VIO_D12),
0496     PINMUX_DATA(VIO_D11_MARK, PSC0_VIO, HIZA10_NAF, NAF3_VIO_D11),
0497     PINMUX_DATA(VIO_D10_MARK, PSE2_VIO_D10, HIZB0_VIO, NAF2_VIO_D10),
0498     PINMUX_DATA(VIO_D9_MARK, PSE1_VIO_D9, HIZB0_VIO, NAF1_VIO_D9),
0499     PINMUX_DATA(VIO_D8_MARK, PSE0_VIO_D8, HIZB0_VIO, NAF0_VIO_D8),
0500     PINMUX_DATA(VIO_D7_MARK, PSD11_VIO, VIO_D7_SCIF1_SCK),
0501     PINMUX_DATA(VIO_D6_MARK, PSD11_VIO, VIO_D6_SCIF1_RXD),
0502     PINMUX_DATA(VIO_D5_MARK, PSD11_VIO, VIO_D5_SCIF1_TXD),
0503     PINMUX_DATA(VIO_D4_MARK, VIO_D4),
0504     PINMUX_DATA(VIO_D3_MARK, VIO_D3),
0505     PINMUX_DATA(VIO_D2_MARK, VIO_D2),
0506     PINMUX_DATA(VIO_D1_MARK, VIO_D1),
0507     PINMUX_DATA(VIO_D0_MARK, PSD10_VIO_D0, VIO_D0_LCDLCLK),
0508     PINMUX_DATA(VIO_CLK_MARK, PSD12_VIO, MSELB9_VIO, VIO_CLK_SCIF1_RTS),
0509     PINMUX_DATA(VIO_VD_MARK, PSD12_VIO, MSELB9_VIO, VIO_VD_SCIF1_CTS),
0510     PINMUX_DATA(VIO_HD_MARK, PSD13_VIO, MSELB9_VIO, VIO_HD_SCIF2_RXD),
0511     PINMUX_DATA(VIO_FLD_MARK, PSD13_VIO, HIZA9_VIO, VIO_FLD_SCIF2_CTS),
0512     PINMUX_DATA(VIO_CKO_MARK, PSD13_VIO, HIZA9_VIO, VIO_CKO_SCIF2_RTS),
0513     PINMUX_DATA(VIO_STEX_MARK, PSD13_VIO, HIZA9_VIO, VIO_STEX_SCIF2_SCK),
0514     PINMUX_DATA(VIO_STEM_MARK, PSD13_VIO, HIZA9_VIO, VIO_STEM_SCIF2_TXD),
0515     PINMUX_DATA(VIO_VD2_MARK, PSE3_VIO, MSELB9_VIO2,
0516             HIZB0_VIO, FOE_VIO_VD2),
0517     PINMUX_DATA(VIO_HD2_MARK, PSE3_VIO, MSELB9_VIO2,
0518             HIZB1_VIO, FCE_VIO_HD2),
0519     PINMUX_DATA(VIO_CLK2_MARK, PSE3_VIO, MSELB9_VIO2,
0520             HIZB1_VIO, FRB_VIO_CLK2),
0521 
0522     /* LCDC */
0523     PINMUX_DATA(LCDD23_MARK, HIZA8_LCDC, LCDD23),
0524     PINMUX_DATA(LCDD22_MARK, HIZA8_LCDC, LCDD22),
0525     PINMUX_DATA(LCDD21_MARK, HIZA8_LCDC, LCDD21),
0526     PINMUX_DATA(LCDD20_MARK, HIZA8_LCDC, LCDD20),
0527     PINMUX_DATA(LCDD19_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD19_DV_CLKI),
0528     PINMUX_DATA(LCDD18_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD18_DV_CLK),
0529     PINMUX_DATA(LCDD17_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC,
0530             LCDD17_DV_HSYNC),
0531     PINMUX_DATA(LCDD16_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC,
0532             LCDD16_DV_VSYNC),
0533     PINMUX_DATA(LCDD15_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD15_DV_D15),
0534     PINMUX_DATA(LCDD14_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD14_DV_D14),
0535     PINMUX_DATA(LCDD13_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD13_DV_D13),
0536     PINMUX_DATA(LCDD12_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD12_DV_D12),
0537     PINMUX_DATA(LCDD11_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD11_DV_D11),
0538     PINMUX_DATA(LCDD10_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD10_DV_D10),
0539     PINMUX_DATA(LCDD9_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD9_DV_D9),
0540     PINMUX_DATA(LCDD8_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD8_DV_D8),
0541     PINMUX_DATA(LCDD7_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD7_DV_D7),
0542     PINMUX_DATA(LCDD6_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD6_DV_D6),
0543     PINMUX_DATA(LCDD5_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD5_DV_D5),
0544     PINMUX_DATA(LCDD4_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD4_DV_D4),
0545     PINMUX_DATA(LCDD3_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD3_DV_D3),
0546     PINMUX_DATA(LCDD2_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD2_DV_D2),
0547     PINMUX_DATA(LCDD1_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD1_DV_D1),
0548     PINMUX_DATA(LCDD0_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD0_DV_D0),
0549     PINMUX_DATA(LCDLCLK_MARK, PSD10_LCDLCLK, VIO_D0_LCDLCLK),
0550     /* Main LCD */
0551     PINMUX_DATA(LCDDON_MARK, PSD2_LCDDON, HIZA7_LCDC, LCDDON_LCDDON2),
0552     PINMUX_DATA(LCDVCPWC_MARK, PSD3_LCDVEPWC_LCDVCPWC,
0553             HIZA6_LCDC, LCDVCPWC_LCDVCPWC2),
0554     PINMUX_DATA(LCDVEPWC_MARK, PSD3_LCDVEPWC_LCDVCPWC,
0555             HIZA6_LCDC, LCDVEPWC_LCDVEPWC2),
0556     PINMUX_DATA(LCDVSYN_MARK, HIZA7_LCDC, LCDVSYN),
0557     /* Main LCD - RGB Mode */
0558     PINMUX_DATA(LCDDCK_MARK, MSELB8_RGB, HIZA8_LCDC, LCDDCK_LCDWR),
0559     PINMUX_DATA(LCDHSYN_MARK, MSELB8_RGB, HIZA7_LCDC, LCDHSYN_LCDCS),
0560     PINMUX_DATA(LCDDISP_MARK, MSELB8_RGB, HIZA7_LCDC, LCDDISP_LCDRS),
0561     /* Main LCD - SYS Mode */
0562     PINMUX_DATA(LCDRS_MARK, MSELB8_SYS, HIZA7_LCDC, LCDDISP_LCDRS),
0563     PINMUX_DATA(LCDCS_MARK, MSELB8_SYS, HIZA7_LCDC, LCDHSYN_LCDCS),
0564     PINMUX_DATA(LCDWR_MARK, MSELB8_SYS, HIZA8_LCDC, LCDDCK_LCDWR),
0565     PINMUX_DATA(LCDRD_MARK, HIZA7_LCDC, LCDRD),
0566     /* Sub LCD - SYS Mode */
0567     PINMUX_DATA(LCDDON2_MARK, PSD2_LCDDON2, HIZA7_LCDC, LCDDON_LCDDON2),
0568     PINMUX_DATA(LCDVCPWC2_MARK, PSD3_LCDVEPWC2_LCDVCPWC2,
0569             HIZA6_LCDC, LCDVCPWC_LCDVCPWC2),
0570     PINMUX_DATA(LCDVEPWC2_MARK, PSD3_LCDVEPWC2_LCDVCPWC2,
0571             HIZA6_LCDC, LCDVEPWC_LCDVEPWC2),
0572     PINMUX_DATA(LCDVSYN2_MARK, PSE12_LCDVSYN2, HIZA8_LCDC, LCDVSYN2_DACK),
0573     PINMUX_DATA(LCDCS2_MARK, PSD5_LCDCS2, CS6B_CE1B_LCDCS2),
0574 
0575     /* BSC */
0576     PINMUX_DATA(IOIS16_MARK, IOIS16),
0577     PINMUX_DATA(A25_MARK, A25),
0578     PINMUX_DATA(A24_MARK, A24),
0579     PINMUX_DATA(A23_MARK, A23),
0580     PINMUX_DATA(A22_MARK, A22),
0581     PINMUX_DATA(BS_MARK, PSA9_BS, IRQ4_BS),
0582     PINMUX_DATA(CS6B_CE1B_MARK, PSD5_CS6B_CE1B, CS6B_CE1B_LCDCS2),
0583     PINMUX_DATA(WAIT_MARK, WAIT),
0584     PINMUX_DATA(CS6A_CE2B_MARK, CS6A_CE2B),
0585 
0586     /* SBSC */
0587     PINMUX_DATA(HPD63_MARK, HPD63),
0588     PINMUX_DATA(HPD62_MARK, HPD62),
0589     PINMUX_DATA(HPD61_MARK, HPD61),
0590     PINMUX_DATA(HPD60_MARK, HPD60),
0591     PINMUX_DATA(HPD59_MARK, HPD59),
0592     PINMUX_DATA(HPD58_MARK, HPD58),
0593     PINMUX_DATA(HPD57_MARK, HPD57),
0594     PINMUX_DATA(HPD56_MARK, HPD56),
0595     PINMUX_DATA(HPD55_MARK, HPD55),
0596     PINMUX_DATA(HPD54_MARK, HPD54),
0597     PINMUX_DATA(HPD53_MARK, HPD53),
0598     PINMUX_DATA(HPD52_MARK, HPD52),
0599     PINMUX_DATA(HPD51_MARK, HPD51),
0600     PINMUX_DATA(HPD50_MARK, HPD50),
0601     PINMUX_DATA(HPD49_MARK, HPD49),
0602     PINMUX_DATA(HPD48_MARK, HPD48),
0603     PINMUX_DATA(HPDQM7_MARK, HPDQM7),
0604     PINMUX_DATA(HPDQM6_MARK, HPDQM6),
0605     PINMUX_DATA(HPDQM5_MARK, HPDQM5),
0606     PINMUX_DATA(HPDQM4_MARK, HPDQM4),
0607 
0608     /* IRQ */
0609     PINMUX_DATA(IRQ0_MARK, HIZC8_IRQ0, IRQ0),
0610     PINMUX_DATA(IRQ1_MARK, HIZC9_IRQ1, IRQ1),
0611     PINMUX_DATA(IRQ2_MARK, PSA4_IRQ2, HIZC10_IRQ2, IRQ2_SDHID2),
0612     PINMUX_DATA(IRQ3_MARK, PSE15_SIOF0_MCK_IRQ3, PSB8_IRQ3,
0613             HIZC11_IRQ3, PTQ0),
0614     PINMUX_DATA(IRQ4_MARK, PSA9_IRQ4, HIZC12_IRQ4, IRQ4_BS),
0615     PINMUX_DATA(IRQ5_MARK, HIZC13_IRQ5, IRQ5),
0616     PINMUX_DATA(IRQ6_MARK, PSA15_IRQ6, HIZC14_IRQ6, KEYIN0_IRQ6),
0617     PINMUX_DATA(IRQ7_MARK, PSA14_IRQ7, HIZC15_IRQ7, KEYIN4_IRQ7),
0618 
0619     /* SDHI */
0620     PINMUX_DATA(SDHICD_MARK, SDHICD),
0621     PINMUX_DATA(SDHIWP_MARK, SDHIWP),
0622     PINMUX_DATA(SDHID3_MARK, SDHID3),
0623     PINMUX_DATA(SDHID2_MARK, PSA4_SDHID2, IRQ2_SDHID2),
0624     PINMUX_DATA(SDHID1_MARK, SDHID1),
0625     PINMUX_DATA(SDHID0_MARK, SDHID0),
0626     PINMUX_DATA(SDHICMD_MARK, SDHICMD),
0627     PINMUX_DATA(SDHICLK_MARK, SDHICLK),
0628 
0629     /* SIU - Port A */
0630     PINMUX_DATA(SIUAOLR_MARK, PSC13_SIUAOLR, HIZB4_SIUA, SIUAOLR_SIOF1_SYNC),
0631     PINMUX_DATA(SIUAOBT_MARK, PSC14_SIUAOBT, HIZB4_SIUA, SIUAOBT_SIOF1_SCK),
0632     PINMUX_DATA(SIUAISLD_MARK, PSC15_SIUAISLD, HIZB4_SIUA, SIUAISLD_SIOF1_RXD),
0633     PINMUX_DATA(SIUAILR_MARK, PSC11_SIUAILR, HIZB4_SIUA, SIUAILR_SIOF1_SS2),
0634     PINMUX_DATA(SIUAIBT_MARK, PSC12_SIUAIBT, HIZB4_SIUA, SIUAIBT_SIOF1_SS1),
0635     PINMUX_DATA(SIUAOSLD_MARK, PSB0_SIUAOSLD, HIZB4_SIUA, SIUAOSLD_SIOF1_TXD),
0636     PINMUX_DATA(SIUMCKA_MARK, PSE11_SIUMCKA_SIOF1_MCK, HIZB4_SIUA, PSB1_SIUMCKA, PTK0),
0637     PINMUX_DATA(SIUFCKA_MARK, PSE11_SIUFCKA, HIZB4_SIUA, PTK0),
0638 
0639     /* SIU - Port B */
0640     PINMUX_DATA(SIUBOLR_MARK, PSB11_SIUBOLR, SIOSTRB1_SIUBOLR),
0641     PINMUX_DATA(SIUBOBT_MARK, PSB10_SIUBOBT, SIOSCK_SIUBOBT),
0642     PINMUX_DATA(SIUBISLD_MARK, PSB14_SIUBISLD, SIORXD_SIUBISLD),
0643     PINMUX_DATA(SIUBILR_MARK, PSB13_SIUBILR, SIOD_SIUBILR),
0644     PINMUX_DATA(SIUBIBT_MARK, PSB12_SIUBIBT, SIOSTRB0_SIUBIBT),
0645     PINMUX_DATA(SIUBOSLD_MARK, PSB15_SIUBOSLD, SIOTXD_SIUBOSLD),
0646     PINMUX_DATA(SIUMCKB_MARK, PSD9_SIOMCK_SIUMCKB, PSB9_SIUMCKB, PTF6),
0647     PINMUX_DATA(SIUFCKB_MARK, PSD9_SIUFCKB, PTF6),
0648 
0649     /* AUD */
0650     PINMUX_DATA(AUDSYNC_MARK, AUDSYNC),
0651     PINMUX_DATA(AUDATA3_MARK, AUDATA3),
0652     PINMUX_DATA(AUDATA2_MARK, AUDATA2),
0653     PINMUX_DATA(AUDATA1_MARK, AUDATA1),
0654     PINMUX_DATA(AUDATA0_MARK, AUDATA0),
0655 
0656     /* DMAC */
0657     PINMUX_DATA(DACK_MARK, PSE12_DACK, LCDVSYN2_DACK),
0658     PINMUX_DATA(DREQ0_MARK, DREQ0),
0659 
0660     /* VOU */
0661     PINMUX_DATA(DV_CLKI_MARK, PSD0_DV, LCDD19_DV_CLKI),
0662     PINMUX_DATA(DV_CLK_MARK, PSD0_DV, LCDD18_DV_CLK),
0663     PINMUX_DATA(DV_HSYNC_MARK, PSD0_DV, LCDD17_DV_HSYNC),
0664     PINMUX_DATA(DV_VSYNC_MARK, PSD0_DV, LCDD16_DV_VSYNC),
0665     PINMUX_DATA(DV_D15_MARK, PSD0_DV, LCDD15_DV_D15),
0666     PINMUX_DATA(DV_D14_MARK, PSD0_DV, LCDD14_DV_D14),
0667     PINMUX_DATA(DV_D13_MARK, PSD0_DV, LCDD13_DV_D13),
0668     PINMUX_DATA(DV_D12_MARK, PSD0_DV, LCDD12_DV_D12),
0669     PINMUX_DATA(DV_D11_MARK, PSD0_DV, LCDD11_DV_D11),
0670     PINMUX_DATA(DV_D10_MARK, PSD0_DV, LCDD10_DV_D10),
0671     PINMUX_DATA(DV_D9_MARK, PSD0_DV, LCDD9_DV_D9),
0672     PINMUX_DATA(DV_D8_MARK, PSD0_DV, LCDD8_DV_D8),
0673     PINMUX_DATA(DV_D7_MARK, PSD0_DV, LCDD7_DV_D7),
0674     PINMUX_DATA(DV_D6_MARK, PSD0_DV, LCDD6_DV_D6),
0675     PINMUX_DATA(DV_D5_MARK, PSD0_DV, LCDD5_DV_D5),
0676     PINMUX_DATA(DV_D4_MARK, PSD0_DV, LCDD4_DV_D4),
0677     PINMUX_DATA(DV_D3_MARK, PSD0_DV, LCDD3_DV_D3),
0678     PINMUX_DATA(DV_D2_MARK, PSD0_DV, LCDD2_DV_D2),
0679     PINMUX_DATA(DV_D1_MARK, PSD0_DV, LCDD1_DV_D1),
0680     PINMUX_DATA(DV_D0_MARK, PSD0_DV, LCDD0_DV_D0),
0681 
0682     /* CPG */
0683     PINMUX_DATA(STATUS0_MARK, STATUS0),
0684     PINMUX_DATA(PDSTATUS_MARK, PDSTATUS),
0685 
0686     /* SIOF0 */
0687     PINMUX_DATA(SIOF0_MCK_MARK, PSE15_SIOF0_MCK_IRQ3, PSB8_SIOF0_MCK, PTQ0),
0688     PINMUX_DATA(SIOF0_SCK_MARK, PSB5_SIOF0_SCK, SIOF0_SCK_TS_SCK),
0689     PINMUX_DATA(SIOF0_SYNC_MARK, PSB4_SIOF0_SYNC, SIOF0_SYNC_TS_SDEN),
0690     PINMUX_DATA(SIOF0_SS1_MARK, PSB3_SIOF0_SS1, SIOF0_SS1_TS_SPSYNC),
0691     PINMUX_DATA(SIOF0_SS2_MARK, PSB2_SIOF0_SS2, SIOF0_SS2_SIM_RST),
0692     PINMUX_DATA(SIOF0_TXD_MARK, PSE14_SIOF0_TXD_IRDA_OUT,
0693             PSB7_SIOF0_TXD, PTQ1),
0694     PINMUX_DATA(SIOF0_RXD_MARK, PSE13_SIOF0_RXD_IRDA_IN,
0695             PSB6_SIOF0_RXD, PTQ2),
0696 
0697     /* SIOF1 */
0698     PINMUX_DATA(SIOF1_MCK_MARK, PSE11_SIUMCKA_SIOF1_MCK,
0699             PSB1_SIOF1_MCK, PTK0),
0700     PINMUX_DATA(SIOF1_SCK_MARK, PSC14_SIOF1_SCK, SIUAOBT_SIOF1_SCK),
0701     PINMUX_DATA(SIOF1_SYNC_MARK, PSC13_SIOF1_SYNC, SIUAOLR_SIOF1_SYNC),
0702     PINMUX_DATA(SIOF1_SS1_MARK, PSC12_SIOF1_SS1, SIUAIBT_SIOF1_SS1),
0703     PINMUX_DATA(SIOF1_SS2_MARK, PSC11_SIOF1_SS2, SIUAILR_SIOF1_SS2),
0704     PINMUX_DATA(SIOF1_TXD_MARK, PSB0_SIOF1_TXD, SIUAOSLD_SIOF1_TXD),
0705     PINMUX_DATA(SIOF1_RXD_MARK, PSC15_SIOF1_RXD, SIUAISLD_SIOF1_RXD),
0706 
0707     /* SIM */
0708     PINMUX_DATA(SIM_D_MARK, PSE15_SIM_D, PTQ0),
0709     PINMUX_DATA(SIM_CLK_MARK, PSE14_SIM_CLK, PTQ1),
0710     PINMUX_DATA(SIM_RST_MARK, PSB2_SIM_RST, SIOF0_SS2_SIM_RST),
0711 
0712     /* TSIF */
0713     PINMUX_DATA(TS_SDAT_MARK, PSE13_TS_SDAT, PTQ2),
0714     PINMUX_DATA(TS_SCK_MARK, PSB5_TS_SCK, SIOF0_SCK_TS_SCK),
0715     PINMUX_DATA(TS_SDEN_MARK, PSB4_TS_SDEN, SIOF0_SYNC_TS_SDEN),
0716     PINMUX_DATA(TS_SPSYNC_MARK, PSB3_TS_SPSYNC, SIOF0_SS1_TS_SPSYNC),
0717 
0718     /* IRDA */
0719     PINMUX_DATA(IRDA_IN_MARK, PSE13_SIOF0_RXD_IRDA_IN, PSB6_IRDA_IN, PTQ2),
0720     PINMUX_DATA(IRDA_OUT_MARK, PSE14_SIOF0_TXD_IRDA_OUT,
0721             PSB7_IRDA_OUT, PTQ1),
0722 
0723     /* TPU */
0724     PINMUX_DATA(TPUTO_MARK, PSD8_TPUTO, SCIF0_SCK_TPUTO),
0725 
0726     /* FLCTL */
0727     PINMUX_DATA(FCE_MARK, PSE3_FLCTL, FCE_VIO_HD2),
0728     PINMUX_DATA(NAF7_MARK, PSC0_NAF, HIZA10_NAF, NAF7_VIO_D15),
0729     PINMUX_DATA(NAF6_MARK, PSC0_NAF, HIZA10_NAF, NAF6_VIO_D14),
0730     PINMUX_DATA(NAF5_MARK, PSC0_NAF, HIZA10_NAF, NAF5_VIO_D13),
0731     PINMUX_DATA(NAF4_MARK, PSC0_NAF, HIZA10_NAF, NAF4_VIO_D12),
0732     PINMUX_DATA(NAF3_MARK, PSC0_NAF, HIZA10_NAF, NAF3_VIO_D11),
0733     PINMUX_DATA(NAF2_MARK, PSE2_NAF2, HIZB0_VIO, NAF2_VIO_D10),
0734     PINMUX_DATA(NAF1_MARK, PSE1_NAF1, HIZB0_VIO, NAF1_VIO_D9),
0735     PINMUX_DATA(NAF0_MARK, PSE0_NAF0, HIZB0_VIO, NAF0_VIO_D8),
0736     PINMUX_DATA(FCDE_MARK, FCDE),
0737     PINMUX_DATA(FOE_MARK, PSE3_FLCTL, HIZB0_VIO, FOE_VIO_VD2),
0738     PINMUX_DATA(FSC_MARK, FSC),
0739     PINMUX_DATA(FWE_MARK, FWE),
0740     PINMUX_DATA(FRB_MARK, PSE3_FLCTL, FRB_VIO_CLK2),
0741 
0742     /* KEYSC */
0743     PINMUX_DATA(KEYIN0_MARK, PSA15_KEYIN0, HIZC14_IRQ6, KEYIN0_IRQ6),
0744     PINMUX_DATA(KEYIN1_MARK, HIZA14_KEYSC, KEYIN1),
0745     PINMUX_DATA(KEYIN2_MARK, HIZA14_KEYSC, KEYIN2),
0746     PINMUX_DATA(KEYIN3_MARK, HIZA14_KEYSC, KEYIN3),
0747     PINMUX_DATA(KEYIN4_MARK, PSA14_KEYIN4, HIZC15_IRQ7, KEYIN4_IRQ7),
0748     PINMUX_DATA(KEYOUT0_MARK, HIZA14_KEYSC, KEYOUT0),
0749     PINMUX_DATA(KEYOUT1_MARK, HIZA14_KEYSC, KEYOUT1),
0750     PINMUX_DATA(KEYOUT2_MARK, HIZA14_KEYSC, KEYOUT2),
0751     PINMUX_DATA(KEYOUT3_MARK, HIZA14_KEYSC, KEYOUT3),
0752     PINMUX_DATA(KEYOUT4_IN6_MARK, HIZA14_KEYSC, KEYOUT4_IN6),
0753     PINMUX_DATA(KEYOUT5_IN5_MARK, HIZA14_KEYSC, KEYOUT5_IN5),
0754 };
0755 
0756 static const struct sh_pfc_pin pinmux_pins[] = {
0757     /* PTA */
0758     PINMUX_GPIO(PTA7),
0759     PINMUX_GPIO(PTA6),
0760     PINMUX_GPIO(PTA5),
0761     PINMUX_GPIO(PTA4),
0762     PINMUX_GPIO(PTA3),
0763     PINMUX_GPIO(PTA2),
0764     PINMUX_GPIO(PTA1),
0765     PINMUX_GPIO(PTA0),
0766 
0767     /* PTB */
0768     PINMUX_GPIO(PTB7),
0769     PINMUX_GPIO(PTB6),
0770     PINMUX_GPIO(PTB5),
0771     PINMUX_GPIO(PTB4),
0772     PINMUX_GPIO(PTB3),
0773     PINMUX_GPIO(PTB2),
0774     PINMUX_GPIO(PTB1),
0775     PINMUX_GPIO(PTB0),
0776 
0777     /* PTC */
0778     PINMUX_GPIO(PTC7),
0779     PINMUX_GPIO(PTC5),
0780     PINMUX_GPIO(PTC4),
0781     PINMUX_GPIO(PTC3),
0782     PINMUX_GPIO(PTC2),
0783     PINMUX_GPIO(PTC0),
0784 
0785     /* PTD */
0786     PINMUX_GPIO(PTD7),
0787     PINMUX_GPIO(PTD6),
0788     PINMUX_GPIO(PTD5),
0789     PINMUX_GPIO(PTD4),
0790     PINMUX_GPIO(PTD3),
0791     PINMUX_GPIO(PTD2),
0792     PINMUX_GPIO(PTD1),
0793     PINMUX_GPIO(PTD0),
0794 
0795     /* PTE */
0796     PINMUX_GPIO(PTE7),
0797     PINMUX_GPIO(PTE6),
0798     PINMUX_GPIO(PTE5),
0799     PINMUX_GPIO(PTE4),
0800     PINMUX_GPIO(PTE1),
0801     PINMUX_GPIO(PTE0),
0802 
0803     /* PTF */
0804     PINMUX_GPIO(PTF6),
0805     PINMUX_GPIO(PTF5),
0806     PINMUX_GPIO(PTF4),
0807     PINMUX_GPIO(PTF3),
0808     PINMUX_GPIO(PTF2),
0809     PINMUX_GPIO(PTF1),
0810     PINMUX_GPIO(PTF0),
0811 
0812     /* PTG */
0813     PINMUX_GPIO(PTG4),
0814     PINMUX_GPIO(PTG3),
0815     PINMUX_GPIO(PTG2),
0816     PINMUX_GPIO(PTG1),
0817     PINMUX_GPIO(PTG0),
0818 
0819     /* PTH */
0820     PINMUX_GPIO(PTH7),
0821     PINMUX_GPIO(PTH6),
0822     PINMUX_GPIO(PTH5),
0823     PINMUX_GPIO(PTH4),
0824     PINMUX_GPIO(PTH3),
0825     PINMUX_GPIO(PTH2),
0826     PINMUX_GPIO(PTH1),
0827     PINMUX_GPIO(PTH0),
0828 
0829     /* PTJ */
0830     PINMUX_GPIO(PTJ7),
0831     PINMUX_GPIO(PTJ6),
0832     PINMUX_GPIO(PTJ5),
0833     PINMUX_GPIO(PTJ1),
0834     PINMUX_GPIO(PTJ0),
0835 
0836     /* PTK */
0837     PINMUX_GPIO(PTK6),
0838     PINMUX_GPIO(PTK5),
0839     PINMUX_GPIO(PTK4),
0840     PINMUX_GPIO(PTK3),
0841     PINMUX_GPIO(PTK2),
0842     PINMUX_GPIO(PTK1),
0843     PINMUX_GPIO(PTK0),
0844 
0845     /* PTL */
0846     PINMUX_GPIO(PTL7),
0847     PINMUX_GPIO(PTL6),
0848     PINMUX_GPIO(PTL5),
0849     PINMUX_GPIO(PTL4),
0850     PINMUX_GPIO(PTL3),
0851     PINMUX_GPIO(PTL2),
0852     PINMUX_GPIO(PTL1),
0853     PINMUX_GPIO(PTL0),
0854 
0855     /* PTM */
0856     PINMUX_GPIO(PTM7),
0857     PINMUX_GPIO(PTM6),
0858     PINMUX_GPIO(PTM5),
0859     PINMUX_GPIO(PTM4),
0860     PINMUX_GPIO(PTM3),
0861     PINMUX_GPIO(PTM2),
0862     PINMUX_GPIO(PTM1),
0863     PINMUX_GPIO(PTM0),
0864 
0865     /* PTN */
0866     PINMUX_GPIO(PTN7),
0867     PINMUX_GPIO(PTN6),
0868     PINMUX_GPIO(PTN5),
0869     PINMUX_GPIO(PTN4),
0870     PINMUX_GPIO(PTN3),
0871     PINMUX_GPIO(PTN2),
0872     PINMUX_GPIO(PTN1),
0873     PINMUX_GPIO(PTN0),
0874 
0875     /* PTQ */
0876     PINMUX_GPIO(PTQ6),
0877     PINMUX_GPIO(PTQ5),
0878     PINMUX_GPIO(PTQ4),
0879     PINMUX_GPIO(PTQ3),
0880     PINMUX_GPIO(PTQ2),
0881     PINMUX_GPIO(PTQ1),
0882     PINMUX_GPIO(PTQ0),
0883 
0884     /* PTR */
0885     PINMUX_GPIO(PTR4),
0886     PINMUX_GPIO(PTR3),
0887     PINMUX_GPIO(PTR2),
0888     PINMUX_GPIO(PTR1),
0889     PINMUX_GPIO(PTR0),
0890 
0891     /* PTS */
0892     PINMUX_GPIO(PTS4),
0893     PINMUX_GPIO(PTS3),
0894     PINMUX_GPIO(PTS2),
0895     PINMUX_GPIO(PTS1),
0896     PINMUX_GPIO(PTS0),
0897 
0898     /* PTT */
0899     PINMUX_GPIO(PTT4),
0900     PINMUX_GPIO(PTT3),
0901     PINMUX_GPIO(PTT2),
0902     PINMUX_GPIO(PTT1),
0903     PINMUX_GPIO(PTT0),
0904 
0905     /* PTU */
0906     PINMUX_GPIO(PTU4),
0907     PINMUX_GPIO(PTU3),
0908     PINMUX_GPIO(PTU2),
0909     PINMUX_GPIO(PTU1),
0910     PINMUX_GPIO(PTU0),
0911 
0912     /* PTV */
0913     PINMUX_GPIO(PTV4),
0914     PINMUX_GPIO(PTV3),
0915     PINMUX_GPIO(PTV2),
0916     PINMUX_GPIO(PTV1),
0917     PINMUX_GPIO(PTV0),
0918 
0919     /* PTW */
0920     PINMUX_GPIO(PTW6),
0921     PINMUX_GPIO(PTW5),
0922     PINMUX_GPIO(PTW4),
0923     PINMUX_GPIO(PTW3),
0924     PINMUX_GPIO(PTW2),
0925     PINMUX_GPIO(PTW1),
0926     PINMUX_GPIO(PTW0),
0927 
0928     /* PTX */
0929     PINMUX_GPIO(PTX6),
0930     PINMUX_GPIO(PTX5),
0931     PINMUX_GPIO(PTX4),
0932     PINMUX_GPIO(PTX3),
0933     PINMUX_GPIO(PTX2),
0934     PINMUX_GPIO(PTX1),
0935     PINMUX_GPIO(PTX0),
0936 
0937     /* PTY */
0938     PINMUX_GPIO(PTY5),
0939     PINMUX_GPIO(PTY4),
0940     PINMUX_GPIO(PTY3),
0941     PINMUX_GPIO(PTY2),
0942     PINMUX_GPIO(PTY1),
0943     PINMUX_GPIO(PTY0),
0944 
0945     /* PTZ */
0946     PINMUX_GPIO(PTZ5),
0947     PINMUX_GPIO(PTZ4),
0948     PINMUX_GPIO(PTZ3),
0949     PINMUX_GPIO(PTZ2),
0950     PINMUX_GPIO(PTZ1),
0951 };
0952 
0953 #define PINMUX_FN_BASE  ARRAY_SIZE(pinmux_pins)
0954 
0955 static const struct pinmux_func pinmux_func_gpios[] = {
0956     /* SCIF0 */
0957     GPIO_FN(SCIF0_TXD),
0958     GPIO_FN(SCIF0_RXD),
0959     GPIO_FN(SCIF0_RTS),
0960     GPIO_FN(SCIF0_CTS),
0961     GPIO_FN(SCIF0_SCK),
0962 
0963     /* SCIF1 */
0964     GPIO_FN(SCIF1_TXD),
0965     GPIO_FN(SCIF1_RXD),
0966     GPIO_FN(SCIF1_RTS),
0967     GPIO_FN(SCIF1_CTS),
0968     GPIO_FN(SCIF1_SCK),
0969 
0970     /* SCIF2 */
0971     GPIO_FN(SCIF2_TXD),
0972     GPIO_FN(SCIF2_RXD),
0973     GPIO_FN(SCIF2_RTS),
0974     GPIO_FN(SCIF2_CTS),
0975     GPIO_FN(SCIF2_SCK),
0976 
0977     /* SIO */
0978     GPIO_FN(SIOTXD),
0979     GPIO_FN(SIORXD),
0980     GPIO_FN(SIOD),
0981     GPIO_FN(SIOSTRB0),
0982     GPIO_FN(SIOSTRB1),
0983     GPIO_FN(SIOSCK),
0984     GPIO_FN(SIOMCK),
0985 
0986     /* CEU */
0987     GPIO_FN(VIO_D15),
0988     GPIO_FN(VIO_D14),
0989     GPIO_FN(VIO_D13),
0990     GPIO_FN(VIO_D12),
0991     GPIO_FN(VIO_D11),
0992     GPIO_FN(VIO_D10),
0993     GPIO_FN(VIO_D9),
0994     GPIO_FN(VIO_D8),
0995     GPIO_FN(VIO_D7),
0996     GPIO_FN(VIO_D6),
0997     GPIO_FN(VIO_D5),
0998     GPIO_FN(VIO_D4),
0999     GPIO_FN(VIO_D3),
1000     GPIO_FN(VIO_D2),
1001     GPIO_FN(VIO_D1),
1002     GPIO_FN(VIO_D0),
1003     GPIO_FN(VIO_CLK),
1004     GPIO_FN(VIO_VD),
1005     GPIO_FN(VIO_HD),
1006     GPIO_FN(VIO_FLD),
1007     GPIO_FN(VIO_CKO),
1008     GPIO_FN(VIO_STEX),
1009     GPIO_FN(VIO_STEM),
1010     GPIO_FN(VIO_VD2),
1011     GPIO_FN(VIO_HD2),
1012     GPIO_FN(VIO_CLK2),
1013 
1014     /* LCDC */
1015     GPIO_FN(LCDD23),
1016     GPIO_FN(LCDD22),
1017     GPIO_FN(LCDD21),
1018     GPIO_FN(LCDD20),
1019     GPIO_FN(LCDD19),
1020     GPIO_FN(LCDD18),
1021     GPIO_FN(LCDD17),
1022     GPIO_FN(LCDD16),
1023     GPIO_FN(LCDD15),
1024     GPIO_FN(LCDD14),
1025     GPIO_FN(LCDD13),
1026     GPIO_FN(LCDD12),
1027     GPIO_FN(LCDD11),
1028     GPIO_FN(LCDD10),
1029     GPIO_FN(LCDD9),
1030     GPIO_FN(LCDD8),
1031     GPIO_FN(LCDD7),
1032     GPIO_FN(LCDD6),
1033     GPIO_FN(LCDD5),
1034     GPIO_FN(LCDD4),
1035     GPIO_FN(LCDD3),
1036     GPIO_FN(LCDD2),
1037     GPIO_FN(LCDD1),
1038     GPIO_FN(LCDD0),
1039     GPIO_FN(LCDLCLK),
1040     /* Main LCD */
1041     GPIO_FN(LCDDON),
1042     GPIO_FN(LCDVCPWC),
1043     GPIO_FN(LCDVEPWC),
1044     GPIO_FN(LCDVSYN),
1045     /* Main LCD - RGB Mode */
1046     GPIO_FN(LCDDCK),
1047     GPIO_FN(LCDHSYN),
1048     GPIO_FN(LCDDISP),
1049     /* Main LCD - SYS Mode */
1050     GPIO_FN(LCDRS),
1051     GPIO_FN(LCDCS),
1052     GPIO_FN(LCDWR),
1053     GPIO_FN(LCDRD),
1054     /* Sub LCD - SYS Mode */
1055     GPIO_FN(LCDDON2),
1056     GPIO_FN(LCDVCPWC2),
1057     GPIO_FN(LCDVEPWC2),
1058     GPIO_FN(LCDVSYN2),
1059     GPIO_FN(LCDCS2),
1060 
1061     /* BSC */
1062     GPIO_FN(IOIS16),
1063     GPIO_FN(A25),
1064     GPIO_FN(A24),
1065     GPIO_FN(A23),
1066     GPIO_FN(A22),
1067     GPIO_FN(BS),
1068     GPIO_FN(CS6B_CE1B),
1069     GPIO_FN(WAIT),
1070     GPIO_FN(CS6A_CE2B),
1071 
1072     /* SBSC */
1073     GPIO_FN(HPD63),
1074     GPIO_FN(HPD62),
1075     GPIO_FN(HPD61),
1076     GPIO_FN(HPD60),
1077     GPIO_FN(HPD59),
1078     GPIO_FN(HPD58),
1079     GPIO_FN(HPD57),
1080     GPIO_FN(HPD56),
1081     GPIO_FN(HPD55),
1082     GPIO_FN(HPD54),
1083     GPIO_FN(HPD53),
1084     GPIO_FN(HPD52),
1085     GPIO_FN(HPD51),
1086     GPIO_FN(HPD50),
1087     GPIO_FN(HPD49),
1088     GPIO_FN(HPD48),
1089     GPIO_FN(HPDQM7),
1090     GPIO_FN(HPDQM6),
1091     GPIO_FN(HPDQM5),
1092     GPIO_FN(HPDQM4),
1093 
1094     /* IRQ */
1095     GPIO_FN(IRQ0),
1096     GPIO_FN(IRQ1),
1097     GPIO_FN(IRQ2),
1098     GPIO_FN(IRQ3),
1099     GPIO_FN(IRQ4),
1100     GPIO_FN(IRQ5),
1101     GPIO_FN(IRQ6),
1102     GPIO_FN(IRQ7),
1103 
1104     /* SDHI */
1105     GPIO_FN(SDHICD),
1106     GPIO_FN(SDHIWP),
1107     GPIO_FN(SDHID3),
1108     GPIO_FN(SDHID2),
1109     GPIO_FN(SDHID1),
1110     GPIO_FN(SDHID0),
1111     GPIO_FN(SDHICMD),
1112     GPIO_FN(SDHICLK),
1113 
1114     /* SIU - Port A */
1115     GPIO_FN(SIUAOLR),
1116     GPIO_FN(SIUAOBT),
1117     GPIO_FN(SIUAISLD),
1118     GPIO_FN(SIUAILR),
1119     GPIO_FN(SIUAIBT),
1120     GPIO_FN(SIUAOSLD),
1121     GPIO_FN(SIUMCKA),
1122     GPIO_FN(SIUFCKA),
1123 
1124     /* SIU - Port B */
1125     GPIO_FN(SIUBOLR),
1126     GPIO_FN(SIUBOBT),
1127     GPIO_FN(SIUBISLD),
1128     GPIO_FN(SIUBILR),
1129     GPIO_FN(SIUBIBT),
1130     GPIO_FN(SIUBOSLD),
1131     GPIO_FN(SIUMCKB),
1132     GPIO_FN(SIUFCKB),
1133 
1134     /* AUD */
1135     GPIO_FN(AUDSYNC),
1136     GPIO_FN(AUDATA3),
1137     GPIO_FN(AUDATA2),
1138     GPIO_FN(AUDATA1),
1139     GPIO_FN(AUDATA0),
1140 
1141     /* DMAC */
1142     GPIO_FN(DACK),
1143     GPIO_FN(DREQ0),
1144 
1145     /* VOU */
1146     GPIO_FN(DV_CLKI),
1147     GPIO_FN(DV_CLK),
1148     GPIO_FN(DV_HSYNC),
1149     GPIO_FN(DV_VSYNC),
1150     GPIO_FN(DV_D15),
1151     GPIO_FN(DV_D14),
1152     GPIO_FN(DV_D13),
1153     GPIO_FN(DV_D12),
1154     GPIO_FN(DV_D11),
1155     GPIO_FN(DV_D10),
1156     GPIO_FN(DV_D9),
1157     GPIO_FN(DV_D8),
1158     GPIO_FN(DV_D7),
1159     GPIO_FN(DV_D6),
1160     GPIO_FN(DV_D5),
1161     GPIO_FN(DV_D4),
1162     GPIO_FN(DV_D3),
1163     GPIO_FN(DV_D2),
1164     GPIO_FN(DV_D1),
1165     GPIO_FN(DV_D0),
1166 
1167     /* CPG */
1168     GPIO_FN(STATUS0),
1169     GPIO_FN(PDSTATUS),
1170 
1171     /* SIOF0 */
1172     GPIO_FN(SIOF0_MCK),
1173     GPIO_FN(SIOF0_SCK),
1174     GPIO_FN(SIOF0_SYNC),
1175     GPIO_FN(SIOF0_SS1),
1176     GPIO_FN(SIOF0_SS2),
1177     GPIO_FN(SIOF0_TXD),
1178     GPIO_FN(SIOF0_RXD),
1179 
1180     /* SIOF1 */
1181     GPIO_FN(SIOF1_MCK),
1182     GPIO_FN(SIOF1_SCK),
1183     GPIO_FN(SIOF1_SYNC),
1184     GPIO_FN(SIOF1_SS1),
1185     GPIO_FN(SIOF1_SS2),
1186     GPIO_FN(SIOF1_TXD),
1187     GPIO_FN(SIOF1_RXD),
1188 
1189     /* SIM */
1190     GPIO_FN(SIM_D),
1191     GPIO_FN(SIM_CLK),
1192     GPIO_FN(SIM_RST),
1193 
1194     /* TSIF */
1195     GPIO_FN(TS_SDAT),
1196     GPIO_FN(TS_SCK),
1197     GPIO_FN(TS_SDEN),
1198     GPIO_FN(TS_SPSYNC),
1199 
1200     /* IRDA */
1201     GPIO_FN(IRDA_IN),
1202     GPIO_FN(IRDA_OUT),
1203 
1204     /* TPU */
1205     GPIO_FN(TPUTO),
1206 
1207     /* FLCTL */
1208     GPIO_FN(FCE),
1209     GPIO_FN(NAF7),
1210     GPIO_FN(NAF6),
1211     GPIO_FN(NAF5),
1212     GPIO_FN(NAF4),
1213     GPIO_FN(NAF3),
1214     GPIO_FN(NAF2),
1215     GPIO_FN(NAF1),
1216     GPIO_FN(NAF0),
1217     GPIO_FN(FCDE),
1218     GPIO_FN(FOE),
1219     GPIO_FN(FSC),
1220     GPIO_FN(FWE),
1221     GPIO_FN(FRB),
1222 
1223     /* KEYSC */
1224     GPIO_FN(KEYIN0),
1225     GPIO_FN(KEYIN1),
1226     GPIO_FN(KEYIN2),
1227     GPIO_FN(KEYIN3),
1228     GPIO_FN(KEYIN4),
1229     GPIO_FN(KEYOUT0),
1230     GPIO_FN(KEYOUT1),
1231     GPIO_FN(KEYOUT2),
1232     GPIO_FN(KEYOUT3),
1233     GPIO_FN(KEYOUT4_IN6),
1234     GPIO_FN(KEYOUT5_IN5),
1235 };
1236 
1237 static const struct pinmux_cfg_reg pinmux_config_regs[] = {
1238     { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2, GROUP(
1239         VIO_D7_SCIF1_SCK, PTA7_OUT, 0, PTA7_IN,
1240         VIO_D6_SCIF1_RXD, 0, 0, PTA6_IN,
1241         VIO_D5_SCIF1_TXD, PTA5_OUT, 0, PTA5_IN,
1242         VIO_D4, 0, 0, PTA4_IN,
1243         VIO_D3, 0, 0, PTA3_IN,
1244         VIO_D2, 0, 0, PTA2_IN,
1245         VIO_D1, 0, 0, PTA1_IN,
1246         VIO_D0_LCDLCLK, 0, 0, PTA0_IN ))
1247     },
1248     { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2, GROUP(
1249         HPD55, PTB7_OUT, 0, PTB7_IN,
1250         HPD54, PTB6_OUT, 0, PTB6_IN,
1251         HPD53, PTB5_OUT, 0, PTB5_IN,
1252         HPD52, PTB4_OUT, 0, PTB4_IN,
1253         HPD51, PTB3_OUT, 0, PTB3_IN,
1254         HPD50, PTB2_OUT, 0, PTB2_IN,
1255         HPD49, PTB1_OUT, 0, PTB1_IN,
1256         HPD48, PTB0_OUT, 0, PTB0_IN ))
1257     },
1258     { PINMUX_CFG_REG_VAR("PCCR", 0xa4050104, 16,
1259                  GROUP(2, -2, 2, 2, 2, 2, -2, 2),
1260                  GROUP(
1261         0, 0, 0, PTC7_IN,
1262         /* RESERVED [2] */
1263         IOIS16, 0, 0, PTC5_IN,
1264         HPDQM7, PTC4_OUT, 0, PTC4_IN,
1265         HPDQM6, PTC3_OUT, 0, PTC3_IN,
1266         HPDQM5, PTC2_OUT, 0, PTC2_IN,
1267         /* RESERVED [2] */
1268         HPDQM4, PTC0_OUT, 0, PTC0_IN ))
1269     },
1270     { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2, GROUP(
1271         SDHICD, 0, 0, PTD7_IN,
1272         SDHIWP, PTD6_OUT, 0, PTD6_IN,
1273         SDHID3, PTD5_OUT, 0, PTD5_IN,
1274         IRQ2_SDHID2, PTD4_OUT, 0, PTD4_IN,
1275         SDHID1, PTD3_OUT, 0, PTD3_IN,
1276         SDHID0, PTD2_OUT, 0, PTD2_IN,
1277         SDHICMD, PTD1_OUT, 0, PTD1_IN,
1278         SDHICLK, PTD0_OUT, 0, 0 ))
1279     },
1280     { PINMUX_CFG_REG_VAR("PECR", 0xa4050108, 16,
1281                  GROUP(2, 2, 2, 2, -4, 2, 2),
1282                  GROUP(
1283         A25, PTE7_OUT, 0, PTE7_IN,
1284         A24, PTE6_OUT, 0, PTE6_IN,
1285         A23, PTE5_OUT, 0, PTE5_IN,
1286         A22, PTE4_OUT, 0, PTE4_IN,
1287         /* RESERVED [4] */
1288         IRQ5, PTE1_OUT, 0, PTE1_IN,
1289         IRQ4_BS, PTE0_OUT, 0, PTE0_IN ))
1290     },
1291     { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2, GROUP(
1292         0, 0, 0, 0,
1293         PTF6, PTF6_OUT, 0, PTF6_IN,
1294         SIOSCK_SIUBOBT, PTF5_OUT, 0, PTF5_IN,
1295         SIOSTRB1_SIUBOLR, PTF4_OUT, 0, PTF4_IN,
1296         SIOSTRB0_SIUBIBT, PTF3_OUT, 0, PTF3_IN,
1297         SIOD_SIUBILR, PTF2_OUT, 0, PTF2_IN,
1298         SIORXD_SIUBISLD, 0, 0, PTF1_IN,
1299         SIOTXD_SIUBOSLD, PTF0_OUT, 0, 0 ))
1300     },
1301     { PINMUX_CFG_REG_VAR("PGCR", 0xa405010c, 16,
1302                  GROUP(-6, 2, 2, 2, 2, 2),
1303                  GROUP(
1304         /* RESERVED [6] */
1305         AUDSYNC, PTG4_OUT, 0, 0,
1306         AUDATA3, PTG3_OUT, 0, 0,
1307         AUDATA2, PTG2_OUT, 0, 0,
1308         AUDATA1, PTG1_OUT, 0, 0,
1309         AUDATA0, PTG0_OUT, 0, 0 ))
1310     },
1311     { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2, GROUP(
1312         LCDVCPWC_LCDVCPWC2, PTH7_OUT, 0, 0,
1313         LCDVSYN2_DACK, PTH6_OUT, 0, PTH6_IN,
1314         LCDVSYN, PTH5_OUT, 0, PTH5_IN,
1315         LCDDISP_LCDRS, PTH4_OUT, 0, 0,
1316         LCDHSYN_LCDCS, PTH3_OUT, 0, 0,
1317         LCDDON_LCDDON2, PTH2_OUT, 0, 0,
1318         LCDD17_DV_HSYNC, PTH1_OUT, 0, PTH1_IN,
1319         LCDD16_DV_VSYNC, PTH0_OUT, 0, PTH0_IN ))
1320     },
1321     { PINMUX_CFG_REG_VAR("PJCR", 0xa4050110, 16,
1322                  GROUP(2, 2, 2, -6, 2, 2),
1323                  GROUP(
1324         STATUS0, PTJ7_OUT, 0, 0,
1325         0, PTJ6_OUT, 0, 0,
1326         PDSTATUS, PTJ5_OUT, 0, 0,
1327         /* RESERVED [6] */
1328         IRQ1, PTJ1_OUT, 0, PTJ1_IN,
1329         IRQ0, PTJ0_OUT, 0, PTJ0_IN ))
1330     },
1331     { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2, GROUP(
1332         0, 0, 0, 0,
1333         SIUAILR_SIOF1_SS2, PTK6_OUT, 0, PTK6_IN,
1334         SIUAIBT_SIOF1_SS1, PTK5_OUT, 0, PTK5_IN,
1335         SIUAOLR_SIOF1_SYNC, PTK4_OUT, 0, PTK4_IN,
1336         SIUAOBT_SIOF1_SCK, PTK3_OUT, 0, PTK3_IN,
1337         SIUAISLD_SIOF1_RXD, 0, 0, PTK2_IN,
1338         SIUAOSLD_SIOF1_TXD, PTK1_OUT, 0, 0,
1339         PTK0, PTK0_OUT, 0, PTK0_IN ))
1340     },
1341     { PINMUX_CFG_REG("PLCR", 0xa4050114, 16, 2, GROUP(
1342         LCDD15_DV_D15, PTL7_OUT, 0, PTL7_IN,
1343         LCDD14_DV_D14, PTL6_OUT, 0, PTL6_IN,
1344         LCDD13_DV_D13, PTL5_OUT, 0, PTL5_IN,
1345         LCDD12_DV_D12, PTL4_OUT, 0, PTL4_IN,
1346         LCDD11_DV_D11, PTL3_OUT, 0, PTL3_IN,
1347         LCDD10_DV_D10, PTL2_OUT, 0, PTL2_IN,
1348         LCDD9_DV_D9, PTL1_OUT, 0, PTL1_IN,
1349         LCDD8_DV_D8, PTL0_OUT, 0, PTL0_IN ))
1350     },
1351     { PINMUX_CFG_REG("PMCR", 0xa4050116, 16, 2, GROUP(
1352         LCDD7_DV_D7, PTM7_OUT, 0, PTM7_IN,
1353         LCDD6_DV_D6, PTM6_OUT, 0, PTM6_IN,
1354         LCDD5_DV_D5, PTM5_OUT, 0, PTM5_IN,
1355         LCDD4_DV_D4, PTM4_OUT, 0, PTM4_IN,
1356         LCDD3_DV_D3, PTM3_OUT, 0, PTM3_IN,
1357         LCDD2_DV_D2, PTM2_OUT, 0, PTM2_IN,
1358         LCDD1_DV_D1, PTM1_OUT, 0, PTM1_IN,
1359         LCDD0_DV_D0, PTM0_OUT, 0, PTM0_IN ))
1360     },
1361     { PINMUX_CFG_REG("PNCR", 0xa4050118, 16, 2, GROUP(
1362         HPD63, PTN7_OUT, 0, PTN7_IN,
1363         HPD62, PTN6_OUT, 0, PTN6_IN,
1364         HPD61, PTN5_OUT, 0, PTN5_IN,
1365         HPD60, PTN4_OUT, 0, PTN4_IN,
1366         HPD59, PTN3_OUT, 0, PTN3_IN,
1367         HPD58, PTN2_OUT, 0, PTN2_IN,
1368         HPD57, PTN1_OUT, 0, PTN1_IN,
1369         HPD56, PTN0_OUT, 0, PTN0_IN ))
1370     },
1371     { PINMUX_CFG_REG("PQCR", 0xa405011a, 16, 2, GROUP(
1372         0, 0, 0, 0,
1373         SIOF0_SS2_SIM_RST, PTQ6_OUT, 0, 0,
1374         SIOF0_SS1_TS_SPSYNC, PTQ5_OUT, 0, PTQ5_IN,
1375         SIOF0_SYNC_TS_SDEN, PTQ4_OUT, 0, PTQ4_IN,
1376         SIOF0_SCK_TS_SCK, PTQ3_OUT, 0, PTQ3_IN,
1377         PTQ2, 0, 0, PTQ2_IN,
1378         PTQ1, PTQ1_OUT, 0, 0,
1379         PTQ0, PTQ0_OUT, 0, PTQ0_IN ))
1380     },
1381     { PINMUX_CFG_REG_VAR("PRCR", 0xa405011c, 16,
1382                  GROUP(-6, 2, 2, 2, 2, 2),
1383                  GROUP(
1384         /* RESERVED [6] */
1385         LCDRD, PTR4_OUT, 0, 0,
1386         CS6B_CE1B_LCDCS2, PTR3_OUT, 0, 0,
1387         WAIT, 0, 0, PTR2_IN,
1388         LCDDCK_LCDWR, PTR1_OUT, 0, 0,
1389         LCDVEPWC_LCDVEPWC2, PTR0_OUT, 0, 0 ))
1390     },
1391     { PINMUX_CFG_REG_VAR("PSCR", 0xa405011e, 16,
1392                  GROUP(-6, 2, 2, 2, 2, 2),
1393                  GROUP(
1394         /* RESERVED [6] */
1395         SCIF0_CTS_SIUAISPD, 0, 0, PTS4_IN,
1396         SCIF0_RTS_SIUAOSPD, PTS3_OUT, 0, 0,
1397         SCIF0_SCK_TPUTO, PTS2_OUT, 0, PTS2_IN,
1398         SCIF0_RXD, 0, 0, PTS1_IN,
1399         SCIF0_TXD, PTS0_OUT, 0, 0 ))
1400     },
1401     { PINMUX_CFG_REG_VAR("PTCR", 0xa4050140, 16,
1402                  GROUP(-6, 2, 2, 2, 2, 2),
1403                  GROUP(
1404         /* RESERVED [6] */
1405         FOE_VIO_VD2, PTT4_OUT, 0, PTT4_IN,
1406         FWE, PTT3_OUT, 0, PTT3_IN,
1407         FSC, PTT2_OUT, 0, PTT2_IN,
1408         DREQ0, 0, 0, PTT1_IN,
1409         FCDE, PTT0_OUT, 0, 0 ))
1410     },
1411     { PINMUX_CFG_REG_VAR("PUCR", 0xa4050142, 16,
1412                  GROUP(-6, 2, 2, 2, 2, 2),
1413                  GROUP(
1414         /* RESERVED [6] */
1415         NAF2_VIO_D10, PTU4_OUT, 0, PTU4_IN,
1416         NAF1_VIO_D9, PTU3_OUT, 0, PTU3_IN,
1417         NAF0_VIO_D8, PTU2_OUT, 0, PTU2_IN,
1418         FRB_VIO_CLK2, 0, 0, PTU1_IN,
1419         FCE_VIO_HD2, PTU0_OUT, 0, PTU0_IN ))
1420     },
1421     { PINMUX_CFG_REG_VAR("PVCR", 0xa4050144, 16,
1422                  GROUP(-6, 2, 2, 2, 2, 2),
1423                  GROUP(
1424         /* RESERVED [6] */
1425         NAF7_VIO_D15, PTV4_OUT, 0, PTV4_IN,
1426         NAF6_VIO_D14, PTV3_OUT, 0, PTV3_IN,
1427         NAF5_VIO_D13, PTV2_OUT, 0, PTV2_IN,
1428         NAF4_VIO_D12, PTV1_OUT, 0, PTV1_IN,
1429         NAF3_VIO_D11, PTV0_OUT, 0, PTV0_IN ))
1430     },
1431     { PINMUX_CFG_REG("PWCR", 0xa4050146, 16, 2, GROUP(
1432         0, 0, 0, 0,
1433         VIO_FLD_SCIF2_CTS, 0, 0, PTW6_IN,
1434         VIO_CKO_SCIF2_RTS, PTW5_OUT, 0, 0,
1435         VIO_STEX_SCIF2_SCK, PTW4_OUT, 0, PTW4_IN,
1436         VIO_STEM_SCIF2_TXD, PTW3_OUT, 0, PTW3_IN,
1437         VIO_HD_SCIF2_RXD, PTW2_OUT, 0, PTW2_IN,
1438         VIO_VD_SCIF1_CTS, PTW1_OUT, 0, PTW1_IN,
1439         VIO_CLK_SCIF1_RTS, PTW0_OUT, 0, PTW0_IN ))
1440     },
1441     { PINMUX_CFG_REG("PXCR", 0xa4050148, 16, 2, GROUP(
1442         0, 0, 0, 0,
1443         CS6A_CE2B, PTX6_OUT, 0, PTX6_IN,
1444         LCDD23, PTX5_OUT, 0, PTX5_IN,
1445         LCDD22, PTX4_OUT, 0, PTX4_IN,
1446         LCDD21, PTX3_OUT, 0, PTX3_IN,
1447         LCDD20, PTX2_OUT, 0, PTX2_IN,
1448         LCDD19_DV_CLKI, PTX1_OUT, 0, PTX1_IN,
1449         LCDD18_DV_CLK, PTX0_OUT, 0, PTX0_IN ))
1450     },
1451     { PINMUX_CFG_REG_VAR("PYCR", 0xa405014a, 16,
1452                  GROUP(-4, 2, 2, 2, 2, 2, 2),
1453                  GROUP(
1454         /* RESERVED [4] */
1455         KEYOUT5_IN5, PTY5_OUT, 0, PTY5_IN,
1456         KEYOUT4_IN6, PTY4_OUT, 0, PTY4_IN,
1457         KEYOUT3, PTY3_OUT, 0, PTY3_IN,
1458         KEYOUT2, PTY2_OUT, 0, PTY2_IN,
1459         KEYOUT1, PTY1_OUT, 0, 0,
1460         KEYOUT0, PTY0_OUT, 0, PTY0_IN ))
1461     },
1462     { PINMUX_CFG_REG_VAR("PZCR", 0xa405014c, 16,
1463                  GROUP(-4, 2, 2, 2, 2, 2, -2),
1464                  GROUP(
1465         /* RESERVED [4] */
1466         KEYIN4_IRQ7, 0, 0, PTZ5_IN,
1467         KEYIN3, 0, 0, PTZ4_IN,
1468         KEYIN2, 0, 0, PTZ3_IN,
1469         KEYIN1, 0, 0, PTZ2_IN,
1470         KEYIN0_IRQ6, 0, 0, PTZ1_IN,
1471         /* RESERVED [2] */ ))
1472     },
1473     { PINMUX_CFG_REG_VAR("PSELA", 0xa405014e, 16,
1474                  GROUP(1, 1, -4, 1, -4, 1, -4),
1475                  GROUP(
1476         PSA15_KEYIN0, PSA15_IRQ6,
1477         PSA14_KEYIN4, PSA14_IRQ7,
1478         /* RESERVED [4] */
1479         PSA9_IRQ4, PSA9_BS,
1480         /* RESERVED [4] */
1481         PSA4_IRQ2, PSA4_SDHID2,
1482         /* RESERVED [4] */ ))
1483     },
1484     { PINMUX_CFG_REG("PSELB", 0xa4050150, 16, 1, GROUP(
1485         PSB15_SIOTXD, PSB15_SIUBOSLD,
1486         PSB14_SIORXD, PSB14_SIUBISLD,
1487         PSB13_SIOD, PSB13_SIUBILR,
1488         PSB12_SIOSTRB0, PSB12_SIUBIBT,
1489         PSB11_SIOSTRB1, PSB11_SIUBOLR,
1490         PSB10_SIOSCK, PSB10_SIUBOBT,
1491         PSB9_SIOMCK, PSB9_SIUMCKB,
1492         PSB8_SIOF0_MCK, PSB8_IRQ3,
1493         PSB7_SIOF0_TXD, PSB7_IRDA_OUT,
1494         PSB6_SIOF0_RXD, PSB6_IRDA_IN,
1495         PSB5_SIOF0_SCK, PSB5_TS_SCK,
1496         PSB4_SIOF0_SYNC, PSB4_TS_SDEN,
1497         PSB3_SIOF0_SS1, PSB3_TS_SPSYNC,
1498         PSB2_SIOF0_SS2, PSB2_SIM_RST,
1499         PSB1_SIUMCKA, PSB1_SIOF1_MCK,
1500         PSB0_SIUAOSLD, PSB0_SIOF1_TXD ))
1501     },
1502     { PINMUX_CFG_REG_VAR("PSELC", 0xa4050152, 16,
1503                  GROUP(1, 1, 1, 1, 1, -10, 1),
1504                  GROUP(
1505         PSC15_SIUAISLD, PSC15_SIOF1_RXD,
1506         PSC14_SIUAOBT, PSC14_SIOF1_SCK,
1507         PSC13_SIUAOLR, PSC13_SIOF1_SYNC,
1508         PSC12_SIUAIBT, PSC12_SIOF1_SS1,
1509         PSC11_SIUAILR, PSC11_SIOF1_SS2,
1510         /* RESERVED [10] */
1511         PSC0_NAF, PSC0_VIO ))
1512     },
1513     { PINMUX_CFG_REG("PSELD", 0xa4050154, 16, 1, GROUP(
1514         0, 0,
1515         0, 0,
1516         PSD13_VIO, PSD13_SCIF2,
1517         PSD12_VIO, PSD12_SCIF1,
1518         PSD11_VIO, PSD11_SCIF1,
1519         PSD10_VIO_D0, PSD10_LCDLCLK,
1520         PSD9_SIOMCK_SIUMCKB, PSD9_SIUFCKB,
1521         PSD8_SCIF0_SCK, PSD8_TPUTO,
1522         PSD7_SCIF0_RTS, PSD7_SIUAOSPD,
1523         PSD6_SCIF0_CTS, PSD6_SIUAISPD,
1524         PSD5_CS6B_CE1B, PSD5_LCDCS2,
1525         0, 0,
1526         PSD3_LCDVEPWC_LCDVCPWC, PSD3_LCDVEPWC2_LCDVCPWC2,
1527         PSD2_LCDDON, PSD2_LCDDON2,
1528         0, 0,
1529         PSD0_LCDD19_LCDD0, PSD0_DV ))
1530     },
1531     { PINMUX_CFG_REG_VAR("PSELE", 0xa4050156, 16,
1532                  GROUP(1, 1, 1, 1, 1, -7, 1, 1, 1, 1),
1533                  GROUP(
1534         PSE15_SIOF0_MCK_IRQ3, PSE15_SIM_D,
1535         PSE14_SIOF0_TXD_IRDA_OUT, PSE14_SIM_CLK,
1536         PSE13_SIOF0_RXD_IRDA_IN, PSE13_TS_SDAT,
1537         PSE12_LCDVSYN2, PSE12_DACK,
1538         PSE11_SIUMCKA_SIOF1_MCK, PSE11_SIUFCKA,
1539         /* RESERVED [7] */
1540         PSE3_FLCTL, PSE3_VIO,
1541         PSE2_NAF2, PSE2_VIO_D10,
1542         PSE1_NAF1, PSE1_VIO_D9,
1543         PSE0_NAF0, PSE0_VIO_D8 ))
1544     },
1545     { PINMUX_CFG_REG_VAR("HIZCRA", 0xa4050158, 16,
1546                  GROUP(-1, 1, -3, 1, 1, 1, 1, 1, -6),
1547                  GROUP(
1548         /* RESERVED [1] */
1549         HIZA14_KEYSC, HIZA14_HIZ,
1550         /* RESERVED [3] */
1551         HIZA10_NAF, HIZA10_HIZ,
1552         HIZA9_VIO, HIZA9_HIZ,
1553         HIZA8_LCDC, HIZA8_HIZ,
1554         HIZA7_LCDC, HIZA7_HIZ,
1555         HIZA6_LCDC, HIZA6_HIZ,
1556         /* RESERVED [6] */ ))
1557     },
1558     { PINMUX_CFG_REG_VAR("HIZCRB", 0xa405015a, 16,
1559                  GROUP(-11, 1, -2, 1, 1),
1560                  GROUP(
1561         /* RESERVED [11] */
1562         HIZB4_SIUA, HIZB4_HIZ,
1563         /* RESERVED [2] */
1564         HIZB1_VIO, HIZB1_HIZ,
1565         HIZB0_VIO, HIZB0_HIZ ))
1566     },
1567     { PINMUX_CFG_REG_VAR("HIZCRC", 0xa405015c, 16,
1568                  GROUP(1, 1, 1, 1, 1, 1, 1, 1, -8),
1569                  GROUP(
1570         HIZC15_IRQ7, HIZC15_HIZ,
1571         HIZC14_IRQ6, HIZC14_HIZ,
1572         HIZC13_IRQ5, HIZC13_HIZ,
1573         HIZC12_IRQ4, HIZC12_HIZ,
1574         HIZC11_IRQ3, HIZC11_HIZ,
1575         HIZC10_IRQ2, HIZC10_HIZ,
1576         HIZC9_IRQ1, HIZC9_HIZ,
1577         HIZC8_IRQ0, HIZC8_HIZ,
1578         /* RESERVED [8] */ ))
1579     },
1580     { PINMUX_CFG_REG_VAR("MSELCRB", 0xa4050182, 16,
1581                  GROUP(-6, 1, 1, -8),
1582                  GROUP(
1583         /* RESERVED [6] */
1584         MSELB9_VIO, MSELB9_VIO2,
1585         MSELB8_RGB, MSELB8_SYS,
1586         /* RESERVED [8] */ ))
1587     },
1588     {}
1589 };
1590 
1591 static const struct pinmux_data_reg pinmux_data_regs[] = {
1592     { PINMUX_DATA_REG("PADR", 0xa4050120, 8, GROUP(
1593         PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
1594         PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA ))
1595     },
1596     { PINMUX_DATA_REG("PBDR", 0xa4050122, 8, GROUP(
1597         PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
1598         PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA ))
1599     },
1600     { PINMUX_DATA_REG("PCDR", 0xa4050124, 8, GROUP(
1601         PTC7_DATA, 0, PTC5_DATA, PTC4_DATA,
1602         PTC3_DATA, PTC2_DATA, 0, PTC0_DATA ))
1603     },
1604     { PINMUX_DATA_REG("PDDR", 0xa4050126, 8, GROUP(
1605         PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
1606         PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA ))
1607     },
1608     { PINMUX_DATA_REG("PEDR", 0xa4050128, 8, GROUP(
1609         PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA,
1610         0, 0, PTE1_DATA, PTE0_DATA ))
1611     },
1612     { PINMUX_DATA_REG("PFDR", 0xa405012a, 8, GROUP(
1613         0, PTF6_DATA, PTF5_DATA, PTF4_DATA,
1614         PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA ))
1615     },
1616     { PINMUX_DATA_REG("PGDR", 0xa405012c, 8, GROUP(
1617         0, 0, 0, PTG4_DATA,
1618         PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA ))
1619     },
1620     { PINMUX_DATA_REG("PHDR", 0xa405012e, 8, GROUP(
1621         PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
1622         PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA ))
1623     },
1624     { PINMUX_DATA_REG("PJDR", 0xa4050130, 8, GROUP(
1625         PTJ7_DATA, PTJ6_DATA, PTJ5_DATA, 0,
1626         0, 0, PTJ1_DATA, PTJ0_DATA ))
1627     },
1628     { PINMUX_DATA_REG("PKDR", 0xa4050132, 8, GROUP(
1629         0, PTK6_DATA, PTK5_DATA, PTK4_DATA,
1630         PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA ))
1631     },
1632     { PINMUX_DATA_REG("PLDR", 0xa4050134, 8, GROUP(
1633         PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
1634         PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA ))
1635     },
1636     { PINMUX_DATA_REG("PMDR", 0xa4050136, 8, GROUP(
1637         PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
1638         PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA ))
1639     },
1640     { PINMUX_DATA_REG("PNDR", 0xa4050138, 8, GROUP(
1641         PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA,
1642         PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA ))
1643     },
1644     { PINMUX_DATA_REG("PQDR", 0xa405013a, 8, GROUP(
1645         0, PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
1646         PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA ))
1647     },
1648     { PINMUX_DATA_REG("PRDR", 0xa405013c, 8, GROUP(
1649         0, 0, 0, PTR4_DATA,
1650         PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA ))
1651     },
1652     { PINMUX_DATA_REG("PSDR", 0xa405013e, 8, GROUP(
1653         0, 0, 0, PTS4_DATA,
1654         PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA ))
1655     },
1656     { PINMUX_DATA_REG("PTDR", 0xa4050160, 8, GROUP(
1657         0, 0, 0, PTT4_DATA,
1658         PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA ))
1659     },
1660     { PINMUX_DATA_REG("PUDR", 0xa4050162, 8, GROUP(
1661         0, 0, 0, PTU4_DATA,
1662         PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA ))
1663     },
1664     { PINMUX_DATA_REG("PVDR", 0xa4050164, 8, GROUP(
1665         0, 0, 0, PTV4_DATA,
1666         PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA ))
1667     },
1668     { PINMUX_DATA_REG("PWDR", 0xa4050166, 8, GROUP(
1669         0, PTW6_DATA, PTW5_DATA, PTW4_DATA,
1670         PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA ))
1671     },
1672     { PINMUX_DATA_REG("PXDR", 0xa4050168, 8, GROUP(
1673         0, PTX6_DATA, PTX5_DATA, PTX4_DATA,
1674         PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA ))
1675     },
1676     { PINMUX_DATA_REG("PYDR", 0xa405016a, 8, GROUP(
1677         0, PTY6_DATA, PTY5_DATA, PTY4_DATA,
1678         PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA ))
1679     },
1680     { PINMUX_DATA_REG("PZDR", 0xa405016c, 8, GROUP(
1681         0, 0, PTZ5_DATA, PTZ4_DATA,
1682         PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA ))
1683     },
1684     { },
1685 };
1686 
1687 const struct sh_pfc_soc_info sh7722_pinmux_info = {
1688     .name = "sh7722_pfc",
1689     .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
1690     .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
1691     .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
1692 
1693     .pins = pinmux_pins,
1694     .nr_pins = ARRAY_SIZE(pinmux_pins),
1695     .func_gpios = pinmux_func_gpios,
1696     .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
1697 
1698     .cfg_regs = pinmux_config_regs,
1699     .data_regs = pinmux_data_regs,
1700 
1701     .pinmux_data = pinmux_data,
1702     .pinmux_data_size = ARRAY_SIZE(pinmux_data),
1703 };