Back to home page

OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (c) 2015, Sony Mobile Communications AB.
0004  * Copyright (c) 2013, The Linux Foundation. All rights reserved.
0005  */
0006 
0007 #include <linux/module.h>
0008 #include <linux/platform_device.h>
0009 #include <linux/pinctrl/pinctrl.h>
0010 #include <linux/pinctrl/pinmux.h>
0011 #include <linux/pinctrl/pinconf.h>
0012 #include <linux/pinctrl/pinconf-generic.h>
0013 #include <linux/slab.h>
0014 #include <linux/regmap.h>
0015 #include <linux/gpio/driver.h>
0016 #include <linux/interrupt.h>
0017 #include <linux/of_device.h>
0018 #include <linux/of_irq.h>
0019 
0020 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
0021 
0022 #include "../core.h"
0023 #include "../pinctrl-utils.h"
0024 
0025 /* MPP registers */
0026 #define SSBI_REG_ADDR_MPP_BASE      0x50
0027 #define SSBI_REG_ADDR_MPP(n)        (SSBI_REG_ADDR_MPP_BASE + n)
0028 
0029 /* MPP Type: type */
0030 #define PM8XXX_MPP_TYPE_D_INPUT         0
0031 #define PM8XXX_MPP_TYPE_D_OUTPUT        1
0032 #define PM8XXX_MPP_TYPE_D_BI_DIR        2
0033 #define PM8XXX_MPP_TYPE_A_INPUT         3
0034 #define PM8XXX_MPP_TYPE_A_OUTPUT        4
0035 #define PM8XXX_MPP_TYPE_SINK            5
0036 #define PM8XXX_MPP_TYPE_DTEST_SINK      6
0037 #define PM8XXX_MPP_TYPE_DTEST_OUTPUT    7
0038 
0039 /* Digital Input: control */
0040 #define PM8XXX_MPP_DIN_TO_INT           0
0041 #define PM8XXX_MPP_DIN_TO_DBUS1         1
0042 #define PM8XXX_MPP_DIN_TO_DBUS2         2
0043 #define PM8XXX_MPP_DIN_TO_DBUS3         3
0044 
0045 /* Digital Output: control */
0046 #define PM8XXX_MPP_DOUT_CTRL_LOW        0
0047 #define PM8XXX_MPP_DOUT_CTRL_HIGH       1
0048 #define PM8XXX_MPP_DOUT_CTRL_MPP        2
0049 #define PM8XXX_MPP_DOUT_CTRL_INV_MPP    3
0050 
0051 /* Bidirectional: control */
0052 #define PM8XXX_MPP_BI_PULLUP_1KOHM      0
0053 #define PM8XXX_MPP_BI_PULLUP_OPEN       1
0054 #define PM8XXX_MPP_BI_PULLUP_10KOHM     2
0055 #define PM8XXX_MPP_BI_PULLUP_30KOHM     3
0056 
0057 /* Analog Output: control */
0058 #define PM8XXX_MPP_AOUT_CTRL_DISABLE            0
0059 #define PM8XXX_MPP_AOUT_CTRL_ENABLE             1
0060 #define PM8XXX_MPP_AOUT_CTRL_MPP_HIGH_EN        2
0061 #define PM8XXX_MPP_AOUT_CTRL_MPP_LOW_EN         3
0062 
0063 /* Current Sink: control */
0064 #define PM8XXX_MPP_CS_CTRL_DISABLE      0
0065 #define PM8XXX_MPP_CS_CTRL_ENABLE       1
0066 #define PM8XXX_MPP_CS_CTRL_MPP_HIGH_EN  2
0067 #define PM8XXX_MPP_CS_CTRL_MPP_LOW_EN   3
0068 
0069 /* DTEST Current Sink: control */
0070 #define PM8XXX_MPP_DTEST_CS_CTRL_EN1    0
0071 #define PM8XXX_MPP_DTEST_CS_CTRL_EN2    1
0072 #define PM8XXX_MPP_DTEST_CS_CTRL_EN3    2
0073 #define PM8XXX_MPP_DTEST_CS_CTRL_EN4    3
0074 
0075 /* DTEST Digital Output: control */
0076 #define PM8XXX_MPP_DTEST_DBUS1          0
0077 #define PM8XXX_MPP_DTEST_DBUS2          1
0078 #define PM8XXX_MPP_DTEST_DBUS3          2
0079 #define PM8XXX_MPP_DTEST_DBUS4          3
0080 
0081 /* custom pinconf parameters */
0082 #define PM8XXX_CONFIG_AMUX      (PIN_CONFIG_END + 1)
0083 #define PM8XXX_CONFIG_DTEST_SELECTOR    (PIN_CONFIG_END + 2)
0084 #define PM8XXX_CONFIG_ALEVEL        (PIN_CONFIG_END + 3)
0085 #define PM8XXX_CONFIG_PAIRED        (PIN_CONFIG_END + 4)
0086 
0087 /**
0088  * struct pm8xxx_pin_data - dynamic configuration for a pin
0089  * @reg:        address of the control register
0090  * @mode:       operating mode for the pin (digital, analog or current sink)
0091  * @input:      pin is input
0092  * @output:     pin is output
0093  * @high_z:     pin is floating
0094  * @paired:     mpp operates in paired mode
0095  * @output_value:   logical output value of the mpp
0096  * @power_source:   selected power source
0097  * @dtest:      DTEST route selector
0098  * @amux:       input muxing in analog mode
0099  * @aout_level:     selector of the output in analog mode
0100  * @drive_strength: drive strength of the current sink
0101  * @pullup:     pull up value, when in digital bidirectional mode
0102  */
0103 struct pm8xxx_pin_data {
0104     unsigned reg;
0105 
0106     u8 mode;
0107 
0108     bool input;
0109     bool output;
0110     bool high_z;
0111     bool paired;
0112     bool output_value;
0113 
0114     u8 power_source;
0115     u8 dtest;
0116     u8 amux;
0117     u8 aout_level;
0118     u8 drive_strength;
0119     unsigned pullup;
0120 };
0121 
0122 struct pm8xxx_mpp {
0123     struct device *dev;
0124     struct regmap *regmap;
0125     struct pinctrl_dev *pctrl;
0126     struct gpio_chip chip;
0127     struct irq_chip irq;
0128 
0129     struct pinctrl_desc desc;
0130     unsigned npins;
0131 };
0132 
0133 static const struct pinconf_generic_params pm8xxx_mpp_bindings[] = {
0134     {"qcom,amux-route", PM8XXX_CONFIG_AMUX,     0},
0135     {"qcom,analog-level",   PM8XXX_CONFIG_ALEVEL,       0},
0136     {"qcom,dtest",      PM8XXX_CONFIG_DTEST_SELECTOR,   0},
0137     {"qcom,paired",     PM8XXX_CONFIG_PAIRED,       0},
0138 };
0139 
0140 #ifdef CONFIG_DEBUG_FS
0141 static const struct pin_config_item pm8xxx_conf_items[] = {
0142     PCONFDUMP(PM8XXX_CONFIG_AMUX, "analog mux", NULL, true),
0143     PCONFDUMP(PM8XXX_CONFIG_ALEVEL, "analog level", NULL, true),
0144     PCONFDUMP(PM8XXX_CONFIG_DTEST_SELECTOR, "dtest", NULL, true),
0145     PCONFDUMP(PM8XXX_CONFIG_PAIRED, "paired", NULL, false),
0146 };
0147 #endif
0148 
0149 #define PM8XXX_MAX_MPPS 12
0150 #define PM8XXX_MPP_PHYSICAL_OFFSET    1
0151 
0152 static const char * const pm8xxx_groups[PM8XXX_MAX_MPPS] = {
0153     "mpp1", "mpp2", "mpp3", "mpp4", "mpp5", "mpp6", "mpp7", "mpp8",
0154     "mpp9", "mpp10", "mpp11", "mpp12",
0155 };
0156 
0157 #define PM8XXX_MPP_DIGITAL  0
0158 #define PM8XXX_MPP_ANALOG   1
0159 #define PM8XXX_MPP_SINK     2
0160 
0161 static const char * const pm8xxx_mpp_functions[] = {
0162     "digital", "analog", "sink",
0163 };
0164 
0165 static int pm8xxx_mpp_update(struct pm8xxx_mpp *pctrl,
0166                  struct pm8xxx_pin_data *pin)
0167 {
0168     unsigned level;
0169     unsigned ctrl;
0170     unsigned type;
0171     int ret;
0172     u8 val;
0173 
0174     switch (pin->mode) {
0175     case PM8XXX_MPP_DIGITAL:
0176         if (pin->dtest) {
0177             type = PM8XXX_MPP_TYPE_DTEST_OUTPUT;
0178             ctrl = pin->dtest - 1;
0179         } else if (pin->input && pin->output) {
0180             type = PM8XXX_MPP_TYPE_D_BI_DIR;
0181             if (pin->high_z)
0182                 ctrl = PM8XXX_MPP_BI_PULLUP_OPEN;
0183             else if (pin->pullup == 600)
0184                 ctrl = PM8XXX_MPP_BI_PULLUP_1KOHM;
0185             else if (pin->pullup == 10000)
0186                 ctrl = PM8XXX_MPP_BI_PULLUP_10KOHM;
0187             else
0188                 ctrl = PM8XXX_MPP_BI_PULLUP_30KOHM;
0189         } else if (pin->input) {
0190             type = PM8XXX_MPP_TYPE_D_INPUT;
0191             if (pin->dtest)
0192                 ctrl = pin->dtest;
0193             else
0194                 ctrl = PM8XXX_MPP_DIN_TO_INT;
0195         } else {
0196             type = PM8XXX_MPP_TYPE_D_OUTPUT;
0197             ctrl = !!pin->output_value;
0198             if (pin->paired)
0199                 ctrl |= BIT(1);
0200         }
0201 
0202         level = pin->power_source;
0203         break;
0204     case PM8XXX_MPP_ANALOG:
0205         if (pin->output) {
0206             type = PM8XXX_MPP_TYPE_A_OUTPUT;
0207             level = pin->aout_level;
0208             ctrl = pin->output_value;
0209             if (pin->paired)
0210                 ctrl |= BIT(1);
0211         } else {
0212             type = PM8XXX_MPP_TYPE_A_INPUT;
0213             level = pin->amux;
0214             ctrl = 0;
0215         }
0216         break;
0217     case PM8XXX_MPP_SINK:
0218         level = (pin->drive_strength / 5) - 1;
0219         if (pin->dtest) {
0220             type = PM8XXX_MPP_TYPE_DTEST_SINK;
0221             ctrl = pin->dtest - 1;
0222         } else {
0223             type = PM8XXX_MPP_TYPE_SINK;
0224             ctrl = pin->output_value;
0225             if (pin->paired)
0226                 ctrl |= BIT(1);
0227         }
0228         break;
0229     default:
0230         return -EINVAL;
0231     }
0232 
0233     val = type << 5 | level << 2 | ctrl;
0234     ret = regmap_write(pctrl->regmap, pin->reg, val);
0235     if (ret)
0236         dev_err(pctrl->dev, "failed to write register\n");
0237 
0238     return ret;
0239 }
0240 
0241 static int pm8xxx_get_groups_count(struct pinctrl_dev *pctldev)
0242 {
0243     struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
0244 
0245     return pctrl->npins;
0246 }
0247 
0248 static const char *pm8xxx_get_group_name(struct pinctrl_dev *pctldev,
0249                      unsigned group)
0250 {
0251     return pm8xxx_groups[group];
0252 }
0253 
0254 
0255 static int pm8xxx_get_group_pins(struct pinctrl_dev *pctldev,
0256                  unsigned group,
0257                  const unsigned **pins,
0258                  unsigned *num_pins)
0259 {
0260     struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
0261 
0262     *pins = &pctrl->desc.pins[group].number;
0263     *num_pins = 1;
0264 
0265     return 0;
0266 }
0267 
0268 static const struct pinctrl_ops pm8xxx_pinctrl_ops = {
0269     .get_groups_count   = pm8xxx_get_groups_count,
0270     .get_group_name     = pm8xxx_get_group_name,
0271     .get_group_pins         = pm8xxx_get_group_pins,
0272     .dt_node_to_map     = pinconf_generic_dt_node_to_map_group,
0273     .dt_free_map        = pinctrl_utils_free_map,
0274 };
0275 
0276 static int pm8xxx_get_functions_count(struct pinctrl_dev *pctldev)
0277 {
0278     return ARRAY_SIZE(pm8xxx_mpp_functions);
0279 }
0280 
0281 static const char *pm8xxx_get_function_name(struct pinctrl_dev *pctldev,
0282                         unsigned function)
0283 {
0284     return pm8xxx_mpp_functions[function];
0285 }
0286 
0287 static int pm8xxx_get_function_groups(struct pinctrl_dev *pctldev,
0288                       unsigned function,
0289                       const char * const **groups,
0290                       unsigned * const num_groups)
0291 {
0292     struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
0293 
0294     *groups = pm8xxx_groups;
0295     *num_groups = pctrl->npins;
0296     return 0;
0297 }
0298 
0299 static int pm8xxx_pinmux_set_mux(struct pinctrl_dev *pctldev,
0300                  unsigned function,
0301                  unsigned group)
0302 {
0303     struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
0304     struct pm8xxx_pin_data *pin = pctrl->desc.pins[group].drv_data;
0305 
0306     pin->mode = function;
0307     pm8xxx_mpp_update(pctrl, pin);
0308 
0309     return 0;
0310 }
0311 
0312 static const struct pinmux_ops pm8xxx_pinmux_ops = {
0313     .get_functions_count    = pm8xxx_get_functions_count,
0314     .get_function_name  = pm8xxx_get_function_name,
0315     .get_function_groups    = pm8xxx_get_function_groups,
0316     .set_mux        = pm8xxx_pinmux_set_mux,
0317 };
0318 
0319 static int pm8xxx_pin_config_get(struct pinctrl_dev *pctldev,
0320                  unsigned int offset,
0321                  unsigned long *config)
0322 {
0323     struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
0324     struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
0325     unsigned param = pinconf_to_config_param(*config);
0326     unsigned arg;
0327 
0328     switch (param) {
0329     case PIN_CONFIG_BIAS_PULL_UP:
0330         arg = pin->pullup;
0331         break;
0332     case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
0333         arg = pin->high_z;
0334         break;
0335     case PIN_CONFIG_INPUT_ENABLE:
0336         arg = pin->input;
0337         break;
0338     case PIN_CONFIG_OUTPUT:
0339         arg = pin->output_value;
0340         break;
0341     case PIN_CONFIG_POWER_SOURCE:
0342         arg = pin->power_source;
0343         break;
0344     case PIN_CONFIG_DRIVE_STRENGTH:
0345         arg = pin->drive_strength;
0346         break;
0347     case PM8XXX_CONFIG_DTEST_SELECTOR:
0348         arg = pin->dtest;
0349         break;
0350     case PM8XXX_CONFIG_AMUX:
0351         arg = pin->amux;
0352         break;
0353     case PM8XXX_CONFIG_ALEVEL:
0354         arg = pin->aout_level;
0355         break;
0356     case PM8XXX_CONFIG_PAIRED:
0357         arg = pin->paired;
0358         break;
0359     default:
0360         return -EINVAL;
0361     }
0362 
0363     *config = pinconf_to_config_packed(param, arg);
0364 
0365     return 0;
0366 }
0367 
0368 static int pm8xxx_pin_config_set(struct pinctrl_dev *pctldev,
0369                  unsigned int offset,
0370                  unsigned long *configs,
0371                  unsigned num_configs)
0372 {
0373     struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
0374     struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
0375     unsigned param;
0376     unsigned arg;
0377     unsigned i;
0378 
0379     for (i = 0; i < num_configs; i++) {
0380         param = pinconf_to_config_param(configs[i]);
0381         arg = pinconf_to_config_argument(configs[i]);
0382 
0383         switch (param) {
0384         case PIN_CONFIG_BIAS_PULL_UP:
0385             pin->pullup = arg;
0386             break;
0387         case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
0388             pin->high_z = true;
0389             break;
0390         case PIN_CONFIG_INPUT_ENABLE:
0391             pin->input = true;
0392             break;
0393         case PIN_CONFIG_OUTPUT:
0394             pin->output = true;
0395             pin->output_value = !!arg;
0396             break;
0397         case PIN_CONFIG_POWER_SOURCE:
0398             pin->power_source = arg;
0399             break;
0400         case PIN_CONFIG_DRIVE_STRENGTH:
0401             pin->drive_strength = arg;
0402             break;
0403         case PM8XXX_CONFIG_DTEST_SELECTOR:
0404             pin->dtest = arg;
0405             break;
0406         case PM8XXX_CONFIG_AMUX:
0407             pin->amux = arg;
0408             break;
0409         case PM8XXX_CONFIG_ALEVEL:
0410             pin->aout_level = arg;
0411             break;
0412         case PM8XXX_CONFIG_PAIRED:
0413             pin->paired = !!arg;
0414             break;
0415         default:
0416             dev_err(pctrl->dev,
0417                 "unsupported config parameter: %x\n",
0418                 param);
0419             return -EINVAL;
0420         }
0421     }
0422 
0423     pm8xxx_mpp_update(pctrl, pin);
0424 
0425     return 0;
0426 }
0427 
0428 static const struct pinconf_ops pm8xxx_pinconf_ops = {
0429     .is_generic = true,
0430     .pin_config_group_get = pm8xxx_pin_config_get,
0431     .pin_config_group_set = pm8xxx_pin_config_set,
0432 };
0433 
0434 static const struct pinctrl_desc pm8xxx_pinctrl_desc = {
0435     .name = "pm8xxx_mpp",
0436     .pctlops = &pm8xxx_pinctrl_ops,
0437     .pmxops = &pm8xxx_pinmux_ops,
0438     .confops = &pm8xxx_pinconf_ops,
0439     .owner = THIS_MODULE,
0440 };
0441 
0442 static int pm8xxx_mpp_direction_input(struct gpio_chip *chip,
0443                        unsigned offset)
0444 {
0445     struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
0446     struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
0447 
0448     switch (pin->mode) {
0449     case PM8XXX_MPP_DIGITAL:
0450         pin->input = true;
0451         break;
0452     case PM8XXX_MPP_ANALOG:
0453         pin->input = true;
0454         pin->output = true;
0455         break;
0456     case PM8XXX_MPP_SINK:
0457         return -EINVAL;
0458     }
0459 
0460     pm8xxx_mpp_update(pctrl, pin);
0461 
0462     return 0;
0463 }
0464 
0465 static int pm8xxx_mpp_direction_output(struct gpio_chip *chip,
0466                     unsigned offset,
0467                     int value)
0468 {
0469     struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
0470     struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
0471 
0472     switch (pin->mode) {
0473     case PM8XXX_MPP_DIGITAL:
0474         pin->output = true;
0475         break;
0476     case PM8XXX_MPP_ANALOG:
0477         pin->input = false;
0478         pin->output = true;
0479         break;
0480     case PM8XXX_MPP_SINK:
0481         pin->input = false;
0482         pin->output = true;
0483         break;
0484     }
0485 
0486     pm8xxx_mpp_update(pctrl, pin);
0487 
0488     return 0;
0489 }
0490 
0491 static int pm8xxx_mpp_get(struct gpio_chip *chip, unsigned offset)
0492 {
0493     struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
0494     struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
0495     bool state;
0496     int ret, irq;
0497 
0498     if (!pin->input)
0499         return !!pin->output_value;
0500 
0501     irq = chip->to_irq(chip, offset);
0502     if (irq < 0)
0503         return irq;
0504 
0505     ret = irq_get_irqchip_state(irq, IRQCHIP_STATE_LINE_LEVEL, &state);
0506     if (!ret)
0507         ret = !!state;
0508 
0509     return ret;
0510 }
0511 
0512 static void pm8xxx_mpp_set(struct gpio_chip *chip, unsigned offset, int value)
0513 {
0514     struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
0515     struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
0516 
0517     pin->output_value = !!value;
0518 
0519     pm8xxx_mpp_update(pctrl, pin);
0520 }
0521 
0522 static int pm8xxx_mpp_of_xlate(struct gpio_chip *chip,
0523                 const struct of_phandle_args *gpio_desc,
0524                 u32 *flags)
0525 {
0526     if (chip->of_gpio_n_cells < 2)
0527         return -EINVAL;
0528 
0529     if (flags)
0530         *flags = gpio_desc->args[1];
0531 
0532     return gpio_desc->args[0] - PM8XXX_MPP_PHYSICAL_OFFSET;
0533 }
0534 
0535 
0536 #ifdef CONFIG_DEBUG_FS
0537 #include <linux/seq_file.h>
0538 
0539 static void pm8xxx_mpp_dbg_show_one(struct seq_file *s,
0540                   struct pinctrl_dev *pctldev,
0541                   struct gpio_chip *chip,
0542                   unsigned offset,
0543                   unsigned gpio)
0544 {
0545     struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
0546     struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
0547 
0548     static const char * const aout_lvls[] = {
0549         "1v25", "1v25_2", "0v625", "0v3125", "mpp", "abus1", "abus2",
0550         "abus3"
0551     };
0552 
0553     static const char * const amuxs[] = {
0554         "amux5", "amux6", "amux7", "amux8", "amux9", "abus1", "abus2",
0555         "abus3",
0556     };
0557 
0558     seq_printf(s, " mpp%-2d:", offset + PM8XXX_MPP_PHYSICAL_OFFSET);
0559 
0560     switch (pin->mode) {
0561     case PM8XXX_MPP_DIGITAL:
0562         seq_puts(s, " digital ");
0563         if (pin->dtest) {
0564             seq_printf(s, "dtest%d\n", pin->dtest);
0565         } else if (pin->input && pin->output) {
0566             if (pin->high_z)
0567                 seq_puts(s, "bi-dir high-z");
0568             else
0569                 seq_printf(s, "bi-dir %dOhm", pin->pullup);
0570         } else if (pin->input) {
0571             if (pin->dtest)
0572                 seq_printf(s, "in dtest%d", pin->dtest);
0573             else
0574                 seq_puts(s, "in gpio");
0575         } else if (pin->output) {
0576             seq_puts(s, "out ");
0577 
0578             if (!pin->paired) {
0579                 seq_puts(s, pin->output_value ?
0580                      "high" : "low");
0581             } else {
0582                 seq_puts(s, pin->output_value ?
0583                      "inverted" : "follow");
0584             }
0585         }
0586         break;
0587     case PM8XXX_MPP_ANALOG:
0588         seq_puts(s, " analog ");
0589         if (pin->output) {
0590             seq_printf(s, "out %s ", aout_lvls[pin->aout_level]);
0591             if (!pin->paired) {
0592                 seq_puts(s, pin->output_value ?
0593                      "high" : "low");
0594             } else {
0595                 seq_puts(s, pin->output_value ?
0596                      "inverted" : "follow");
0597             }
0598         } else {
0599             seq_printf(s, "input mux %s", amuxs[pin->amux]);
0600         }
0601         break;
0602     case PM8XXX_MPP_SINK:
0603         seq_printf(s, " sink %dmA ", pin->drive_strength);
0604         if (pin->dtest) {
0605             seq_printf(s, "dtest%d", pin->dtest);
0606         } else {
0607             if (!pin->paired) {
0608                 seq_puts(s, pin->output_value ?
0609                      "high" : "low");
0610             } else {
0611                 seq_puts(s, pin->output_value ?
0612                      "inverted" : "follow");
0613             }
0614         }
0615         break;
0616     }
0617 }
0618 
0619 static void pm8xxx_mpp_dbg_show(struct seq_file *s, struct gpio_chip *chip)
0620 {
0621     unsigned gpio = chip->base;
0622     unsigned i;
0623 
0624     for (i = 0; i < chip->ngpio; i++, gpio++) {
0625         pm8xxx_mpp_dbg_show_one(s, NULL, chip, i, gpio);
0626         seq_puts(s, "\n");
0627     }
0628 }
0629 
0630 #else
0631 #define pm8xxx_mpp_dbg_show NULL
0632 #endif
0633 
0634 static const struct gpio_chip pm8xxx_mpp_template = {
0635     .direction_input = pm8xxx_mpp_direction_input,
0636     .direction_output = pm8xxx_mpp_direction_output,
0637     .get = pm8xxx_mpp_get,
0638     .set = pm8xxx_mpp_set,
0639     .of_xlate = pm8xxx_mpp_of_xlate,
0640     .dbg_show = pm8xxx_mpp_dbg_show,
0641     .owner = THIS_MODULE,
0642 };
0643 
0644 static int pm8xxx_pin_populate(struct pm8xxx_mpp *pctrl,
0645                    struct pm8xxx_pin_data *pin)
0646 {
0647     unsigned int val;
0648     unsigned level;
0649     unsigned ctrl;
0650     unsigned type;
0651     int ret;
0652 
0653     ret = regmap_read(pctrl->regmap, pin->reg, &val);
0654     if (ret) {
0655         dev_err(pctrl->dev, "failed to read register\n");
0656         return ret;
0657     }
0658 
0659     type = (val >> 5) & 7;
0660     level = (val >> 2) & 7;
0661     ctrl = (val) & 3;
0662 
0663     switch (type) {
0664     case PM8XXX_MPP_TYPE_D_INPUT:
0665         pin->mode = PM8XXX_MPP_DIGITAL;
0666         pin->input = true;
0667         pin->power_source = level;
0668         pin->dtest = ctrl;
0669         break;
0670     case PM8XXX_MPP_TYPE_D_OUTPUT:
0671         pin->mode = PM8XXX_MPP_DIGITAL;
0672         pin->output = true;
0673         pin->power_source = level;
0674         pin->output_value = !!(ctrl & BIT(0));
0675         pin->paired = !!(ctrl & BIT(1));
0676         break;
0677     case PM8XXX_MPP_TYPE_D_BI_DIR:
0678         pin->mode = PM8XXX_MPP_DIGITAL;
0679         pin->input = true;
0680         pin->output = true;
0681         pin->power_source = level;
0682         switch (ctrl) {
0683         case PM8XXX_MPP_BI_PULLUP_1KOHM:
0684             pin->pullup = 600;
0685             break;
0686         case PM8XXX_MPP_BI_PULLUP_OPEN:
0687             pin->high_z = true;
0688             break;
0689         case PM8XXX_MPP_BI_PULLUP_10KOHM:
0690             pin->pullup = 10000;
0691             break;
0692         case PM8XXX_MPP_BI_PULLUP_30KOHM:
0693             pin->pullup = 30000;
0694             break;
0695         }
0696         break;
0697     case PM8XXX_MPP_TYPE_A_INPUT:
0698         pin->mode = PM8XXX_MPP_ANALOG;
0699         pin->input = true;
0700         pin->amux = level;
0701         break;
0702     case PM8XXX_MPP_TYPE_A_OUTPUT:
0703         pin->mode = PM8XXX_MPP_ANALOG;
0704         pin->output = true;
0705         pin->aout_level = level;
0706         pin->output_value = !!(ctrl & BIT(0));
0707         pin->paired = !!(ctrl & BIT(1));
0708         break;
0709     case PM8XXX_MPP_TYPE_SINK:
0710         pin->mode = PM8XXX_MPP_SINK;
0711         pin->drive_strength = 5 * (level + 1);
0712         pin->output_value = !!(ctrl & BIT(0));
0713         pin->paired = !!(ctrl & BIT(1));
0714         break;
0715     case PM8XXX_MPP_TYPE_DTEST_SINK:
0716         pin->mode = PM8XXX_MPP_SINK;
0717         pin->dtest = ctrl + 1;
0718         pin->drive_strength = 5 * (level + 1);
0719         break;
0720     case PM8XXX_MPP_TYPE_DTEST_OUTPUT:
0721         pin->mode = PM8XXX_MPP_DIGITAL;
0722         pin->power_source = level;
0723         if (ctrl >= 1)
0724             pin->dtest = ctrl;
0725         break;
0726     }
0727 
0728     return 0;
0729 }
0730 
0731 static int pm8xxx_mpp_domain_translate(struct irq_domain *domain,
0732                    struct irq_fwspec *fwspec,
0733                    unsigned long *hwirq,
0734                    unsigned int *type)
0735 {
0736     struct pm8xxx_mpp *pctrl = container_of(domain->host_data,
0737                          struct pm8xxx_mpp, chip);
0738 
0739     if (fwspec->param_count != 2 ||
0740         fwspec->param[0] < PM8XXX_MPP_PHYSICAL_OFFSET ||
0741         fwspec->param[0] > pctrl->chip.ngpio)
0742         return -EINVAL;
0743 
0744     *hwirq = fwspec->param[0] - PM8XXX_MPP_PHYSICAL_OFFSET;
0745     *type = fwspec->param[1];
0746 
0747     return 0;
0748 }
0749 
0750 static unsigned int pm8xxx_mpp_child_offset_to_irq(struct gpio_chip *chip,
0751                            unsigned int offset)
0752 {
0753     return offset + PM8XXX_MPP_PHYSICAL_OFFSET;
0754 }
0755 
0756 static int pm8821_mpp_child_to_parent_hwirq(struct gpio_chip *chip,
0757                         unsigned int child_hwirq,
0758                         unsigned int child_type,
0759                         unsigned int *parent_hwirq,
0760                         unsigned int *parent_type)
0761 {
0762     *parent_hwirq = child_hwirq + 24;
0763     *parent_type = child_type;
0764 
0765     return 0;
0766 }
0767 
0768 static int pm8xxx_mpp_child_to_parent_hwirq(struct gpio_chip *chip,
0769                         unsigned int child_hwirq,
0770                         unsigned int child_type,
0771                         unsigned int *parent_hwirq,
0772                         unsigned int *parent_type)
0773 {
0774     *parent_hwirq = child_hwirq + 0x80;
0775     *parent_type = child_type;
0776 
0777     return 0;
0778 }
0779 
0780 static const struct of_device_id pm8xxx_mpp_of_match[] = {
0781     { .compatible = "qcom,pm8018-mpp", .data = (void *) 6 },
0782     { .compatible = "qcom,pm8038-mpp", .data = (void *) 6 },
0783     { .compatible = "qcom,pm8058-mpp", .data = (void *) 12 },
0784     { .compatible = "qcom,pm8821-mpp", .data = (void *) 4 },
0785     { .compatible = "qcom,pm8917-mpp", .data = (void *) 10 },
0786     { .compatible = "qcom,pm8921-mpp", .data = (void *) 12 },
0787     { },
0788 };
0789 MODULE_DEVICE_TABLE(of, pm8xxx_mpp_of_match);
0790 
0791 static int pm8xxx_mpp_probe(struct platform_device *pdev)
0792 {
0793     struct pm8xxx_pin_data *pin_data;
0794     struct irq_domain *parent_domain;
0795     struct device_node *parent_node;
0796     struct pinctrl_pin_desc *pins;
0797     struct gpio_irq_chip *girq;
0798     struct pm8xxx_mpp *pctrl;
0799     int ret;
0800     int i;
0801 
0802     pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);
0803     if (!pctrl)
0804         return -ENOMEM;
0805 
0806     pctrl->dev = &pdev->dev;
0807     pctrl->npins = (uintptr_t) device_get_match_data(&pdev->dev);
0808 
0809     pctrl->regmap = dev_get_regmap(pdev->dev.parent, NULL);
0810     if (!pctrl->regmap) {
0811         dev_err(&pdev->dev, "parent regmap unavailable\n");
0812         return -ENXIO;
0813     }
0814 
0815     pctrl->desc = pm8xxx_pinctrl_desc;
0816     pctrl->desc.npins = pctrl->npins;
0817 
0818     pins = devm_kcalloc(&pdev->dev,
0819                 pctrl->desc.npins,
0820                 sizeof(struct pinctrl_pin_desc),
0821                 GFP_KERNEL);
0822     if (!pins)
0823         return -ENOMEM;
0824 
0825     pin_data = devm_kcalloc(&pdev->dev,
0826                 pctrl->desc.npins,
0827                 sizeof(struct pm8xxx_pin_data),
0828                 GFP_KERNEL);
0829     if (!pin_data)
0830         return -ENOMEM;
0831 
0832     for (i = 0; i < pctrl->desc.npins; i++) {
0833         pin_data[i].reg = SSBI_REG_ADDR_MPP(i);
0834 
0835         ret = pm8xxx_pin_populate(pctrl, &pin_data[i]);
0836         if (ret)
0837             return ret;
0838 
0839         pins[i].number = i;
0840         pins[i].name = pm8xxx_groups[i];
0841         pins[i].drv_data = &pin_data[i];
0842     }
0843     pctrl->desc.pins = pins;
0844 
0845     pctrl->desc.num_custom_params = ARRAY_SIZE(pm8xxx_mpp_bindings);
0846     pctrl->desc.custom_params = pm8xxx_mpp_bindings;
0847 #ifdef CONFIG_DEBUG_FS
0848     pctrl->desc.custom_conf_items = pm8xxx_conf_items;
0849 #endif
0850 
0851     pctrl->pctrl = devm_pinctrl_register(&pdev->dev, &pctrl->desc, pctrl);
0852     if (IS_ERR(pctrl->pctrl)) {
0853         dev_err(&pdev->dev, "couldn't register pm8xxx mpp driver\n");
0854         return PTR_ERR(pctrl->pctrl);
0855     }
0856 
0857     pctrl->chip = pm8xxx_mpp_template;
0858     pctrl->chip.base = -1;
0859     pctrl->chip.parent = &pdev->dev;
0860     pctrl->chip.of_gpio_n_cells = 2;
0861     pctrl->chip.label = dev_name(pctrl->dev);
0862     pctrl->chip.ngpio = pctrl->npins;
0863 
0864     parent_node = of_irq_find_parent(pctrl->dev->of_node);
0865     if (!parent_node)
0866         return -ENXIO;
0867 
0868     parent_domain = irq_find_host(parent_node);
0869     of_node_put(parent_node);
0870     if (!parent_domain)
0871         return -ENXIO;
0872 
0873     pctrl->irq.name = "ssbi-mpp";
0874     pctrl->irq.irq_mask_ack = irq_chip_mask_ack_parent;
0875     pctrl->irq.irq_unmask = irq_chip_unmask_parent;
0876     pctrl->irq.irq_set_type = irq_chip_set_type_parent;
0877     pctrl->irq.flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SKIP_SET_WAKE;
0878 
0879     girq = &pctrl->chip.irq;
0880     girq->chip = &pctrl->irq;
0881     girq->default_type = IRQ_TYPE_NONE;
0882     girq->handler = handle_level_irq;
0883     girq->fwnode = of_node_to_fwnode(pctrl->dev->of_node);
0884     girq->parent_domain = parent_domain;
0885     if (of_device_is_compatible(pdev->dev.of_node, "qcom,pm8821-mpp"))
0886         girq->child_to_parent_hwirq = pm8821_mpp_child_to_parent_hwirq;
0887     else
0888         girq->child_to_parent_hwirq = pm8xxx_mpp_child_to_parent_hwirq;
0889     girq->populate_parent_alloc_arg = gpiochip_populate_parent_fwspec_twocell;
0890     girq->child_offset_to_irq = pm8xxx_mpp_child_offset_to_irq;
0891     girq->child_irq_domain_ops.translate = pm8xxx_mpp_domain_translate;
0892 
0893     ret = gpiochip_add_data(&pctrl->chip, pctrl);
0894     if (ret) {
0895         dev_err(&pdev->dev, "failed register gpiochip\n");
0896         return ret;
0897     }
0898 
0899     ret = gpiochip_add_pin_range(&pctrl->chip,
0900                      dev_name(pctrl->dev),
0901                      0, 0, pctrl->chip.ngpio);
0902     if (ret) {
0903         dev_err(pctrl->dev, "failed to add pin range\n");
0904         goto unregister_gpiochip;
0905     }
0906 
0907     platform_set_drvdata(pdev, pctrl);
0908 
0909     dev_dbg(&pdev->dev, "Qualcomm pm8xxx mpp driver probed\n");
0910 
0911     return 0;
0912 
0913 unregister_gpiochip:
0914     gpiochip_remove(&pctrl->chip);
0915 
0916     return ret;
0917 }
0918 
0919 static int pm8xxx_mpp_remove(struct platform_device *pdev)
0920 {
0921     struct pm8xxx_mpp *pctrl = platform_get_drvdata(pdev);
0922 
0923     gpiochip_remove(&pctrl->chip);
0924 
0925     return 0;
0926 }
0927 
0928 static struct platform_driver pm8xxx_mpp_driver = {
0929     .driver = {
0930         .name = "qcom-ssbi-mpp",
0931         .of_match_table = pm8xxx_mpp_of_match,
0932     },
0933     .probe = pm8xxx_mpp_probe,
0934     .remove = pm8xxx_mpp_remove,
0935 };
0936 
0937 module_platform_driver(pm8xxx_mpp_driver);
0938 
0939 MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>");
0940 MODULE_DESCRIPTION("Qualcomm PM8xxx MPP driver");
0941 MODULE_LICENSE("GPL v2");
[ Source navigation ] [ Diff markup ] [ Identifier search ] [ general search ]

This page was automatically generated by the 2.1.0 LXR engine.

The LXR team
Valid CSS 2.1! Valid HTML 4.01!