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OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
0004  * Copyright (c) 2021, Linaro Limited
0005  */
0006 
0007 #include <linux/module.h>
0008 #include <linux/of.h>
0009 #include <linux/platform_device.h>
0010 #include <linux/pinctrl/pinctrl.h>
0011 
0012 #include "pinctrl-msm.h"
0013 
0014 #define FUNCTION(fname)                         \
0015     [msm_mux_##fname] = {                       \
0016         .name = #fname,             \
0017         .groups = fname##_groups,               \
0018         .ngroups = ARRAY_SIZE(fname##_groups),  \
0019     }
0020 
0021 #define REG_SIZE 0x1000
0022 
0023 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9)    \
0024     {                           \
0025         .name = "gpio" #id,         \
0026         .pins = gpio##id##_pins,        \
0027         .npins = (unsigned int)ARRAY_SIZE(gpio##id##_pins), \
0028         .funcs = (int[]){           \
0029             msm_mux_gpio, /* gpio mode */   \
0030             msm_mux_##f1,           \
0031             msm_mux_##f2,           \
0032             msm_mux_##f3,           \
0033             msm_mux_##f4,           \
0034             msm_mux_##f5,           \
0035             msm_mux_##f6,           \
0036             msm_mux_##f7,           \
0037             msm_mux_##f8,           \
0038             msm_mux_##f9            \
0039         },                      \
0040         .nfuncs = 10,               \
0041         .ctl_reg = REG_SIZE * id,           \
0042         .io_reg = 0x4 + REG_SIZE * id,      \
0043         .intr_cfg_reg = 0x8 + REG_SIZE * id,        \
0044         .intr_status_reg = 0xc + REG_SIZE * id, \
0045         .intr_target_reg = 0x8 + REG_SIZE * id, \
0046         .mux_bit = 2,           \
0047         .pull_bit = 0,          \
0048         .drv_bit = 6,           \
0049         .egpio_enable = 12,     \
0050         .egpio_present = 11,        \
0051         .oe_bit = 9,            \
0052         .in_bit = 0,            \
0053         .out_bit = 1,           \
0054         .intr_enable_bit = 0,       \
0055         .intr_status_bit = 0,       \
0056         .intr_target_bit = 5,       \
0057         .intr_target_kpss_val = 3,  \
0058         .intr_raw_status_bit = 4,   \
0059         .intr_polarity_bit = 1,     \
0060         .intr_detection_bit = 2,    \
0061         .intr_detection_width = 2,  \
0062     }
0063 
0064 #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv)  \
0065     {                           \
0066         .name = #pg_name,           \
0067         .pins = pg_name##_pins,         \
0068         .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins),  \
0069         .ctl_reg = ctl,             \
0070         .io_reg = 0,                \
0071         .intr_cfg_reg = 0,          \
0072         .intr_status_reg = 0,           \
0073         .intr_target_reg = 0,           \
0074         .mux_bit = -1,              \
0075         .pull_bit = pull,           \
0076         .drv_bit = drv,             \
0077         .oe_bit = -1,               \
0078         .in_bit = -1,               \
0079         .out_bit = -1,              \
0080         .intr_enable_bit = -1,          \
0081         .intr_status_bit = -1,          \
0082         .intr_target_bit = -1,          \
0083         .intr_raw_status_bit = -1,      \
0084         .intr_polarity_bit = -1,        \
0085         .intr_detection_bit = -1,       \
0086         .intr_detection_width = -1,     \
0087     }
0088 
0089 #define UFS_RESET(pg_name, offset)              \
0090     {                           \
0091         .name = #pg_name,           \
0092         .pins = pg_name##_pins,         \
0093         .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins),  \
0094         .ctl_reg = offset,          \
0095         .io_reg = offset + 0x4,         \
0096         .intr_cfg_reg = 0,          \
0097         .intr_status_reg = 0,           \
0098         .intr_target_reg = 0,           \
0099         .mux_bit = -1,              \
0100         .pull_bit = 3,              \
0101         .drv_bit = 0,               \
0102         .oe_bit = -1,               \
0103         .in_bit = -1,               \
0104         .out_bit = 0,               \
0105         .intr_enable_bit = -1,          \
0106         .intr_status_bit = -1,          \
0107         .intr_target_bit = -1,          \
0108         .intr_raw_status_bit = -1,      \
0109         .intr_polarity_bit = -1,        \
0110         .intr_detection_bit = -1,       \
0111         .intr_detection_width = -1,     \
0112     }
0113 
0114 static const struct pinctrl_pin_desc sm8450_pins[] = {
0115     PINCTRL_PIN(0, "GPIO_0"),
0116     PINCTRL_PIN(1, "GPIO_1"),
0117     PINCTRL_PIN(2, "GPIO_2"),
0118     PINCTRL_PIN(3, "GPIO_3"),
0119     PINCTRL_PIN(4, "GPIO_4"),
0120     PINCTRL_PIN(5, "GPIO_5"),
0121     PINCTRL_PIN(6, "GPIO_6"),
0122     PINCTRL_PIN(7, "GPIO_7"),
0123     PINCTRL_PIN(8, "GPIO_8"),
0124     PINCTRL_PIN(9, "GPIO_9"),
0125     PINCTRL_PIN(10, "GPIO_10"),
0126     PINCTRL_PIN(11, "GPIO_11"),
0127     PINCTRL_PIN(12, "GPIO_12"),
0128     PINCTRL_PIN(13, "GPIO_13"),
0129     PINCTRL_PIN(14, "GPIO_14"),
0130     PINCTRL_PIN(15, "GPIO_15"),
0131     PINCTRL_PIN(16, "GPIO_16"),
0132     PINCTRL_PIN(17, "GPIO_17"),
0133     PINCTRL_PIN(18, "GPIO_18"),
0134     PINCTRL_PIN(19, "GPIO_19"),
0135     PINCTRL_PIN(20, "GPIO_20"),
0136     PINCTRL_PIN(21, "GPIO_21"),
0137     PINCTRL_PIN(22, "GPIO_22"),
0138     PINCTRL_PIN(23, "GPIO_23"),
0139     PINCTRL_PIN(24, "GPIO_24"),
0140     PINCTRL_PIN(25, "GPIO_25"),
0141     PINCTRL_PIN(26, "GPIO_26"),
0142     PINCTRL_PIN(27, "GPIO_27"),
0143     PINCTRL_PIN(28, "GPIO_28"),
0144     PINCTRL_PIN(29, "GPIO_29"),
0145     PINCTRL_PIN(30, "GPIO_30"),
0146     PINCTRL_PIN(31, "GPIO_31"),
0147     PINCTRL_PIN(32, "GPIO_32"),
0148     PINCTRL_PIN(33, "GPIO_33"),
0149     PINCTRL_PIN(34, "GPIO_34"),
0150     PINCTRL_PIN(35, "GPIO_35"),
0151     PINCTRL_PIN(36, "GPIO_36"),
0152     PINCTRL_PIN(37, "GPIO_37"),
0153     PINCTRL_PIN(38, "GPIO_38"),
0154     PINCTRL_PIN(39, "GPIO_39"),
0155     PINCTRL_PIN(40, "GPIO_40"),
0156     PINCTRL_PIN(41, "GPIO_41"),
0157     PINCTRL_PIN(42, "GPIO_42"),
0158     PINCTRL_PIN(43, "GPIO_43"),
0159     PINCTRL_PIN(44, "GPIO_44"),
0160     PINCTRL_PIN(45, "GPIO_45"),
0161     PINCTRL_PIN(46, "GPIO_46"),
0162     PINCTRL_PIN(47, "GPIO_47"),
0163     PINCTRL_PIN(48, "GPIO_48"),
0164     PINCTRL_PIN(49, "GPIO_49"),
0165     PINCTRL_PIN(50, "GPIO_50"),
0166     PINCTRL_PIN(51, "GPIO_51"),
0167     PINCTRL_PIN(52, "GPIO_52"),
0168     PINCTRL_PIN(53, "GPIO_53"),
0169     PINCTRL_PIN(54, "GPIO_54"),
0170     PINCTRL_PIN(55, "GPIO_55"),
0171     PINCTRL_PIN(56, "GPIO_56"),
0172     PINCTRL_PIN(57, "GPIO_57"),
0173     PINCTRL_PIN(58, "GPIO_58"),
0174     PINCTRL_PIN(59, "GPIO_59"),
0175     PINCTRL_PIN(60, "GPIO_60"),
0176     PINCTRL_PIN(61, "GPIO_61"),
0177     PINCTRL_PIN(62, "GPIO_62"),
0178     PINCTRL_PIN(63, "GPIO_63"),
0179     PINCTRL_PIN(64, "GPIO_64"),
0180     PINCTRL_PIN(65, "GPIO_65"),
0181     PINCTRL_PIN(66, "GPIO_66"),
0182     PINCTRL_PIN(67, "GPIO_67"),
0183     PINCTRL_PIN(68, "GPIO_68"),
0184     PINCTRL_PIN(69, "GPIO_69"),
0185     PINCTRL_PIN(70, "GPIO_70"),
0186     PINCTRL_PIN(71, "GPIO_71"),
0187     PINCTRL_PIN(72, "GPIO_72"),
0188     PINCTRL_PIN(73, "GPIO_73"),
0189     PINCTRL_PIN(74, "GPIO_74"),
0190     PINCTRL_PIN(75, "GPIO_75"),
0191     PINCTRL_PIN(76, "GPIO_76"),
0192     PINCTRL_PIN(77, "GPIO_77"),
0193     PINCTRL_PIN(78, "GPIO_78"),
0194     PINCTRL_PIN(79, "GPIO_79"),
0195     PINCTRL_PIN(80, "GPIO_80"),
0196     PINCTRL_PIN(81, "GPIO_81"),
0197     PINCTRL_PIN(82, "GPIO_82"),
0198     PINCTRL_PIN(83, "GPIO_83"),
0199     PINCTRL_PIN(84, "GPIO_84"),
0200     PINCTRL_PIN(85, "GPIO_85"),
0201     PINCTRL_PIN(86, "GPIO_86"),
0202     PINCTRL_PIN(87, "GPIO_87"),
0203     PINCTRL_PIN(88, "GPIO_88"),
0204     PINCTRL_PIN(89, "GPIO_89"),
0205     PINCTRL_PIN(90, "GPIO_90"),
0206     PINCTRL_PIN(91, "GPIO_91"),
0207     PINCTRL_PIN(92, "GPIO_92"),
0208     PINCTRL_PIN(93, "GPIO_93"),
0209     PINCTRL_PIN(94, "GPIO_94"),
0210     PINCTRL_PIN(95, "GPIO_95"),
0211     PINCTRL_PIN(96, "GPIO_96"),
0212     PINCTRL_PIN(97, "GPIO_97"),
0213     PINCTRL_PIN(98, "GPIO_98"),
0214     PINCTRL_PIN(99, "GPIO_99"),
0215     PINCTRL_PIN(100, "GPIO_100"),
0216     PINCTRL_PIN(101, "GPIO_101"),
0217     PINCTRL_PIN(102, "GPIO_102"),
0218     PINCTRL_PIN(103, "GPIO_103"),
0219     PINCTRL_PIN(104, "GPIO_104"),
0220     PINCTRL_PIN(105, "GPIO_105"),
0221     PINCTRL_PIN(106, "GPIO_106"),
0222     PINCTRL_PIN(107, "GPIO_107"),
0223     PINCTRL_PIN(108, "GPIO_108"),
0224     PINCTRL_PIN(109, "GPIO_109"),
0225     PINCTRL_PIN(110, "GPIO_110"),
0226     PINCTRL_PIN(111, "GPIO_111"),
0227     PINCTRL_PIN(112, "GPIO_112"),
0228     PINCTRL_PIN(113, "GPIO_113"),
0229     PINCTRL_PIN(114, "GPIO_114"),
0230     PINCTRL_PIN(115, "GPIO_115"),
0231     PINCTRL_PIN(116, "GPIO_116"),
0232     PINCTRL_PIN(117, "GPIO_117"),
0233     PINCTRL_PIN(118, "GPIO_118"),
0234     PINCTRL_PIN(119, "GPIO_119"),
0235     PINCTRL_PIN(120, "GPIO_120"),
0236     PINCTRL_PIN(121, "GPIO_121"),
0237     PINCTRL_PIN(122, "GPIO_122"),
0238     PINCTRL_PIN(123, "GPIO_123"),
0239     PINCTRL_PIN(124, "GPIO_124"),
0240     PINCTRL_PIN(125, "GPIO_125"),
0241     PINCTRL_PIN(126, "GPIO_126"),
0242     PINCTRL_PIN(127, "GPIO_127"),
0243     PINCTRL_PIN(128, "GPIO_128"),
0244     PINCTRL_PIN(129, "GPIO_129"),
0245     PINCTRL_PIN(130, "GPIO_130"),
0246     PINCTRL_PIN(131, "GPIO_131"),
0247     PINCTRL_PIN(132, "GPIO_132"),
0248     PINCTRL_PIN(133, "GPIO_133"),
0249     PINCTRL_PIN(134, "GPIO_134"),
0250     PINCTRL_PIN(135, "GPIO_135"),
0251     PINCTRL_PIN(136, "GPIO_136"),
0252     PINCTRL_PIN(137, "GPIO_137"),
0253     PINCTRL_PIN(138, "GPIO_138"),
0254     PINCTRL_PIN(139, "GPIO_139"),
0255     PINCTRL_PIN(140, "GPIO_140"),
0256     PINCTRL_PIN(141, "GPIO_141"),
0257     PINCTRL_PIN(142, "GPIO_142"),
0258     PINCTRL_PIN(143, "GPIO_143"),
0259     PINCTRL_PIN(144, "GPIO_144"),
0260     PINCTRL_PIN(145, "GPIO_145"),
0261     PINCTRL_PIN(146, "GPIO_146"),
0262     PINCTRL_PIN(147, "GPIO_147"),
0263     PINCTRL_PIN(148, "GPIO_148"),
0264     PINCTRL_PIN(149, "GPIO_149"),
0265     PINCTRL_PIN(150, "GPIO_150"),
0266     PINCTRL_PIN(151, "GPIO_151"),
0267     PINCTRL_PIN(152, "GPIO_152"),
0268     PINCTRL_PIN(153, "GPIO_153"),
0269     PINCTRL_PIN(154, "GPIO_154"),
0270     PINCTRL_PIN(155, "GPIO_155"),
0271     PINCTRL_PIN(156, "GPIO_156"),
0272     PINCTRL_PIN(157, "GPIO_157"),
0273     PINCTRL_PIN(158, "GPIO_158"),
0274     PINCTRL_PIN(159, "GPIO_159"),
0275     PINCTRL_PIN(160, "GPIO_160"),
0276     PINCTRL_PIN(161, "GPIO_161"),
0277     PINCTRL_PIN(162, "GPIO_162"),
0278     PINCTRL_PIN(163, "GPIO_163"),
0279     PINCTRL_PIN(164, "GPIO_164"),
0280     PINCTRL_PIN(165, "GPIO_165"),
0281     PINCTRL_PIN(166, "GPIO_166"),
0282     PINCTRL_PIN(167, "GPIO_167"),
0283     PINCTRL_PIN(168, "GPIO_168"),
0284     PINCTRL_PIN(169, "GPIO_169"),
0285     PINCTRL_PIN(170, "GPIO_170"),
0286     PINCTRL_PIN(171, "GPIO_171"),
0287     PINCTRL_PIN(172, "GPIO_172"),
0288     PINCTRL_PIN(173, "GPIO_173"),
0289     PINCTRL_PIN(174, "GPIO_174"),
0290     PINCTRL_PIN(175, "GPIO_175"),
0291     PINCTRL_PIN(176, "GPIO_176"),
0292     PINCTRL_PIN(177, "GPIO_177"),
0293     PINCTRL_PIN(178, "GPIO_178"),
0294     PINCTRL_PIN(179, "GPIO_179"),
0295     PINCTRL_PIN(180, "GPIO_180"),
0296     PINCTRL_PIN(181, "GPIO_181"),
0297     PINCTRL_PIN(182, "GPIO_182"),
0298     PINCTRL_PIN(183, "GPIO_183"),
0299     PINCTRL_PIN(184, "GPIO_184"),
0300     PINCTRL_PIN(185, "GPIO_185"),
0301     PINCTRL_PIN(186, "GPIO_186"),
0302     PINCTRL_PIN(187, "GPIO_187"),
0303     PINCTRL_PIN(188, "GPIO_188"),
0304     PINCTRL_PIN(189, "GPIO_189"),
0305     PINCTRL_PIN(190, "GPIO_190"),
0306     PINCTRL_PIN(191, "GPIO_191"),
0307     PINCTRL_PIN(192, "GPIO_192"),
0308     PINCTRL_PIN(193, "GPIO_193"),
0309     PINCTRL_PIN(194, "GPIO_194"),
0310     PINCTRL_PIN(195, "GPIO_195"),
0311     PINCTRL_PIN(196, "GPIO_196"),
0312     PINCTRL_PIN(197, "GPIO_197"),
0313     PINCTRL_PIN(198, "GPIO_198"),
0314     PINCTRL_PIN(199, "GPIO_199"),
0315     PINCTRL_PIN(200, "GPIO_200"),
0316     PINCTRL_PIN(201, "GPIO_201"),
0317     PINCTRL_PIN(202, "GPIO_202"),
0318     PINCTRL_PIN(203, "GPIO_203"),
0319     PINCTRL_PIN(204, "GPIO_204"),
0320     PINCTRL_PIN(205, "GPIO_205"),
0321     PINCTRL_PIN(206, "GPIO_206"),
0322     PINCTRL_PIN(207, "GPIO_207"),
0323     PINCTRL_PIN(208, "GPIO_208"),
0324     PINCTRL_PIN(209, "GPIO_209"),
0325     PINCTRL_PIN(210, "UFS_RESET"),
0326     PINCTRL_PIN(211, "SDC2_CLK"),
0327     PINCTRL_PIN(212, "SDC2_CMD"),
0328     PINCTRL_PIN(213, "SDC2_DATA"),
0329 };
0330 
0331 #define DECLARE_MSM_GPIO_PINS(pin) \
0332     static const unsigned int gpio##pin##_pins[] = { pin }
0333 DECLARE_MSM_GPIO_PINS(0);
0334 DECLARE_MSM_GPIO_PINS(1);
0335 DECLARE_MSM_GPIO_PINS(2);
0336 DECLARE_MSM_GPIO_PINS(3);
0337 DECLARE_MSM_GPIO_PINS(4);
0338 DECLARE_MSM_GPIO_PINS(5);
0339 DECLARE_MSM_GPIO_PINS(6);
0340 DECLARE_MSM_GPIO_PINS(7);
0341 DECLARE_MSM_GPIO_PINS(8);
0342 DECLARE_MSM_GPIO_PINS(9);
0343 DECLARE_MSM_GPIO_PINS(10);
0344 DECLARE_MSM_GPIO_PINS(11);
0345 DECLARE_MSM_GPIO_PINS(12);
0346 DECLARE_MSM_GPIO_PINS(13);
0347 DECLARE_MSM_GPIO_PINS(14);
0348 DECLARE_MSM_GPIO_PINS(15);
0349 DECLARE_MSM_GPIO_PINS(16);
0350 DECLARE_MSM_GPIO_PINS(17);
0351 DECLARE_MSM_GPIO_PINS(18);
0352 DECLARE_MSM_GPIO_PINS(19);
0353 DECLARE_MSM_GPIO_PINS(20);
0354 DECLARE_MSM_GPIO_PINS(21);
0355 DECLARE_MSM_GPIO_PINS(22);
0356 DECLARE_MSM_GPIO_PINS(23);
0357 DECLARE_MSM_GPIO_PINS(24);
0358 DECLARE_MSM_GPIO_PINS(25);
0359 DECLARE_MSM_GPIO_PINS(26);
0360 DECLARE_MSM_GPIO_PINS(27);
0361 DECLARE_MSM_GPIO_PINS(28);
0362 DECLARE_MSM_GPIO_PINS(29);
0363 DECLARE_MSM_GPIO_PINS(30);
0364 DECLARE_MSM_GPIO_PINS(31);
0365 DECLARE_MSM_GPIO_PINS(32);
0366 DECLARE_MSM_GPIO_PINS(33);
0367 DECLARE_MSM_GPIO_PINS(34);
0368 DECLARE_MSM_GPIO_PINS(35);
0369 DECLARE_MSM_GPIO_PINS(36);
0370 DECLARE_MSM_GPIO_PINS(37);
0371 DECLARE_MSM_GPIO_PINS(38);
0372 DECLARE_MSM_GPIO_PINS(39);
0373 DECLARE_MSM_GPIO_PINS(40);
0374 DECLARE_MSM_GPIO_PINS(41);
0375 DECLARE_MSM_GPIO_PINS(42);
0376 DECLARE_MSM_GPIO_PINS(43);
0377 DECLARE_MSM_GPIO_PINS(44);
0378 DECLARE_MSM_GPIO_PINS(45);
0379 DECLARE_MSM_GPIO_PINS(46);
0380 DECLARE_MSM_GPIO_PINS(47);
0381 DECLARE_MSM_GPIO_PINS(48);
0382 DECLARE_MSM_GPIO_PINS(49);
0383 DECLARE_MSM_GPIO_PINS(50);
0384 DECLARE_MSM_GPIO_PINS(51);
0385 DECLARE_MSM_GPIO_PINS(52);
0386 DECLARE_MSM_GPIO_PINS(53);
0387 DECLARE_MSM_GPIO_PINS(54);
0388 DECLARE_MSM_GPIO_PINS(55);
0389 DECLARE_MSM_GPIO_PINS(56);
0390 DECLARE_MSM_GPIO_PINS(57);
0391 DECLARE_MSM_GPIO_PINS(58);
0392 DECLARE_MSM_GPIO_PINS(59);
0393 DECLARE_MSM_GPIO_PINS(60);
0394 DECLARE_MSM_GPIO_PINS(61);
0395 DECLARE_MSM_GPIO_PINS(62);
0396 DECLARE_MSM_GPIO_PINS(63);
0397 DECLARE_MSM_GPIO_PINS(64);
0398 DECLARE_MSM_GPIO_PINS(65);
0399 DECLARE_MSM_GPIO_PINS(66);
0400 DECLARE_MSM_GPIO_PINS(67);
0401 DECLARE_MSM_GPIO_PINS(68);
0402 DECLARE_MSM_GPIO_PINS(69);
0403 DECLARE_MSM_GPIO_PINS(70);
0404 DECLARE_MSM_GPIO_PINS(71);
0405 DECLARE_MSM_GPIO_PINS(72);
0406 DECLARE_MSM_GPIO_PINS(73);
0407 DECLARE_MSM_GPIO_PINS(74);
0408 DECLARE_MSM_GPIO_PINS(75);
0409 DECLARE_MSM_GPIO_PINS(76);
0410 DECLARE_MSM_GPIO_PINS(77);
0411 DECLARE_MSM_GPIO_PINS(78);
0412 DECLARE_MSM_GPIO_PINS(79);
0413 DECLARE_MSM_GPIO_PINS(80);
0414 DECLARE_MSM_GPIO_PINS(81);
0415 DECLARE_MSM_GPIO_PINS(82);
0416 DECLARE_MSM_GPIO_PINS(83);
0417 DECLARE_MSM_GPIO_PINS(84);
0418 DECLARE_MSM_GPIO_PINS(85);
0419 DECLARE_MSM_GPIO_PINS(86);
0420 DECLARE_MSM_GPIO_PINS(87);
0421 DECLARE_MSM_GPIO_PINS(88);
0422 DECLARE_MSM_GPIO_PINS(89);
0423 DECLARE_MSM_GPIO_PINS(90);
0424 DECLARE_MSM_GPIO_PINS(91);
0425 DECLARE_MSM_GPIO_PINS(92);
0426 DECLARE_MSM_GPIO_PINS(93);
0427 DECLARE_MSM_GPIO_PINS(94);
0428 DECLARE_MSM_GPIO_PINS(95);
0429 DECLARE_MSM_GPIO_PINS(96);
0430 DECLARE_MSM_GPIO_PINS(97);
0431 DECLARE_MSM_GPIO_PINS(98);
0432 DECLARE_MSM_GPIO_PINS(99);
0433 DECLARE_MSM_GPIO_PINS(100);
0434 DECLARE_MSM_GPIO_PINS(101);
0435 DECLARE_MSM_GPIO_PINS(102);
0436 DECLARE_MSM_GPIO_PINS(103);
0437 DECLARE_MSM_GPIO_PINS(104);
0438 DECLARE_MSM_GPIO_PINS(105);
0439 DECLARE_MSM_GPIO_PINS(106);
0440 DECLARE_MSM_GPIO_PINS(107);
0441 DECLARE_MSM_GPIO_PINS(108);
0442 DECLARE_MSM_GPIO_PINS(109);
0443 DECLARE_MSM_GPIO_PINS(110);
0444 DECLARE_MSM_GPIO_PINS(111);
0445 DECLARE_MSM_GPIO_PINS(112);
0446 DECLARE_MSM_GPIO_PINS(113);
0447 DECLARE_MSM_GPIO_PINS(114);
0448 DECLARE_MSM_GPIO_PINS(115);
0449 DECLARE_MSM_GPIO_PINS(116);
0450 DECLARE_MSM_GPIO_PINS(117);
0451 DECLARE_MSM_GPIO_PINS(118);
0452 DECLARE_MSM_GPIO_PINS(119);
0453 DECLARE_MSM_GPIO_PINS(120);
0454 DECLARE_MSM_GPIO_PINS(121);
0455 DECLARE_MSM_GPIO_PINS(122);
0456 DECLARE_MSM_GPIO_PINS(123);
0457 DECLARE_MSM_GPIO_PINS(124);
0458 DECLARE_MSM_GPIO_PINS(125);
0459 DECLARE_MSM_GPIO_PINS(126);
0460 DECLARE_MSM_GPIO_PINS(127);
0461 DECLARE_MSM_GPIO_PINS(128);
0462 DECLARE_MSM_GPIO_PINS(129);
0463 DECLARE_MSM_GPIO_PINS(130);
0464 DECLARE_MSM_GPIO_PINS(131);
0465 DECLARE_MSM_GPIO_PINS(132);
0466 DECLARE_MSM_GPIO_PINS(133);
0467 DECLARE_MSM_GPIO_PINS(134);
0468 DECLARE_MSM_GPIO_PINS(135);
0469 DECLARE_MSM_GPIO_PINS(136);
0470 DECLARE_MSM_GPIO_PINS(137);
0471 DECLARE_MSM_GPIO_PINS(138);
0472 DECLARE_MSM_GPIO_PINS(139);
0473 DECLARE_MSM_GPIO_PINS(140);
0474 DECLARE_MSM_GPIO_PINS(141);
0475 DECLARE_MSM_GPIO_PINS(142);
0476 DECLARE_MSM_GPIO_PINS(143);
0477 DECLARE_MSM_GPIO_PINS(144);
0478 DECLARE_MSM_GPIO_PINS(145);
0479 DECLARE_MSM_GPIO_PINS(146);
0480 DECLARE_MSM_GPIO_PINS(147);
0481 DECLARE_MSM_GPIO_PINS(148);
0482 DECLARE_MSM_GPIO_PINS(149);
0483 DECLARE_MSM_GPIO_PINS(150);
0484 DECLARE_MSM_GPIO_PINS(151);
0485 DECLARE_MSM_GPIO_PINS(152);
0486 DECLARE_MSM_GPIO_PINS(153);
0487 DECLARE_MSM_GPIO_PINS(154);
0488 DECLARE_MSM_GPIO_PINS(155);
0489 DECLARE_MSM_GPIO_PINS(156);
0490 DECLARE_MSM_GPIO_PINS(157);
0491 DECLARE_MSM_GPIO_PINS(158);
0492 DECLARE_MSM_GPIO_PINS(159);
0493 DECLARE_MSM_GPIO_PINS(160);
0494 DECLARE_MSM_GPIO_PINS(161);
0495 DECLARE_MSM_GPIO_PINS(162);
0496 DECLARE_MSM_GPIO_PINS(163);
0497 DECLARE_MSM_GPIO_PINS(164);
0498 DECLARE_MSM_GPIO_PINS(165);
0499 DECLARE_MSM_GPIO_PINS(166);
0500 DECLARE_MSM_GPIO_PINS(167);
0501 DECLARE_MSM_GPIO_PINS(168);
0502 DECLARE_MSM_GPIO_PINS(169);
0503 DECLARE_MSM_GPIO_PINS(170);
0504 DECLARE_MSM_GPIO_PINS(171);
0505 DECLARE_MSM_GPIO_PINS(172);
0506 DECLARE_MSM_GPIO_PINS(173);
0507 DECLARE_MSM_GPIO_PINS(174);
0508 DECLARE_MSM_GPIO_PINS(175);
0509 DECLARE_MSM_GPIO_PINS(176);
0510 DECLARE_MSM_GPIO_PINS(177);
0511 DECLARE_MSM_GPIO_PINS(178);
0512 DECLARE_MSM_GPIO_PINS(179);
0513 DECLARE_MSM_GPIO_PINS(180);
0514 DECLARE_MSM_GPIO_PINS(181);
0515 DECLARE_MSM_GPIO_PINS(182);
0516 DECLARE_MSM_GPIO_PINS(183);
0517 DECLARE_MSM_GPIO_PINS(184);
0518 DECLARE_MSM_GPIO_PINS(185);
0519 DECLARE_MSM_GPIO_PINS(186);
0520 DECLARE_MSM_GPIO_PINS(187);
0521 DECLARE_MSM_GPIO_PINS(188);
0522 DECLARE_MSM_GPIO_PINS(189);
0523 DECLARE_MSM_GPIO_PINS(190);
0524 DECLARE_MSM_GPIO_PINS(191);
0525 DECLARE_MSM_GPIO_PINS(192);
0526 DECLARE_MSM_GPIO_PINS(193);
0527 DECLARE_MSM_GPIO_PINS(194);
0528 DECLARE_MSM_GPIO_PINS(195);
0529 DECLARE_MSM_GPIO_PINS(196);
0530 DECLARE_MSM_GPIO_PINS(197);
0531 DECLARE_MSM_GPIO_PINS(198);
0532 DECLARE_MSM_GPIO_PINS(199);
0533 DECLARE_MSM_GPIO_PINS(200);
0534 DECLARE_MSM_GPIO_PINS(201);
0535 DECLARE_MSM_GPIO_PINS(202);
0536 DECLARE_MSM_GPIO_PINS(203);
0537 DECLARE_MSM_GPIO_PINS(204);
0538 DECLARE_MSM_GPIO_PINS(205);
0539 DECLARE_MSM_GPIO_PINS(206);
0540 DECLARE_MSM_GPIO_PINS(207);
0541 DECLARE_MSM_GPIO_PINS(208);
0542 DECLARE_MSM_GPIO_PINS(209);
0543 
0544 static const unsigned int ufs_reset_pins[] = { 210 };
0545 static const unsigned int sdc2_clk_pins[] = { 211 };
0546 static const unsigned int sdc2_cmd_pins[] = { 212 };
0547 static const unsigned int sdc2_data_pins[] = { 213 };
0548 
0549 enum sm8450_functions {
0550     msm_mux_gpio,
0551     msm_mux_aon_cam,
0552     msm_mux_atest_char,
0553     msm_mux_atest_usb,
0554     msm_mux_audio_ref,
0555     msm_mux_cam_mclk,
0556     msm_mux_cci_async,
0557     msm_mux_cci_i2c,
0558     msm_mux_cci_timer,
0559     msm_mux_cmu_rng,
0560     msm_mux_coex_uart1,
0561     msm_mux_coex_uart2,
0562     msm_mux_cri_trng,
0563     msm_mux_cri_trng0,
0564     msm_mux_cri_trng1,
0565     msm_mux_dbg_out,
0566     msm_mux_ddr_bist,
0567     msm_mux_ddr_pxi0,
0568     msm_mux_ddr_pxi1,
0569     msm_mux_ddr_pxi2,
0570     msm_mux_ddr_pxi3,
0571     msm_mux_dp_hot,
0572     msm_mux_egpio,
0573     msm_mux_gcc_gp1,
0574     msm_mux_gcc_gp2,
0575     msm_mux_gcc_gp3,
0576     msm_mux_ibi_i3c,
0577     msm_mux_jitter_bist,
0578     msm_mux_mdp_vsync,
0579     msm_mux_mdp_vsync0,
0580     msm_mux_mdp_vsync1,
0581     msm_mux_mdp_vsync2,
0582     msm_mux_mdp_vsync3,
0583     msm_mux_mi2s0_data0,
0584     msm_mux_mi2s0_data1,
0585     msm_mux_mi2s0_sck,
0586     msm_mux_mi2s0_ws,
0587     msm_mux_mi2s2_data0,
0588     msm_mux_mi2s2_data1,
0589     msm_mux_mi2s2_sck,
0590     msm_mux_mi2s2_ws,
0591     msm_mux_mss_grfc0,
0592     msm_mux_mss_grfc1,
0593     msm_mux_mss_grfc10,
0594     msm_mux_mss_grfc11,
0595     msm_mux_mss_grfc12,
0596     msm_mux_mss_grfc2,
0597     msm_mux_mss_grfc3,
0598     msm_mux_mss_grfc4,
0599     msm_mux_mss_grfc5,
0600     msm_mux_mss_grfc6,
0601     msm_mux_mss_grfc7,
0602     msm_mux_mss_grfc8,
0603     msm_mux_mss_grfc9,
0604     msm_mux_nav,
0605     msm_mux_pcie0_clkreqn,
0606     msm_mux_pcie1_clkreqn,
0607     msm_mux_phase_flag,
0608     msm_mux_pll_bist,
0609     msm_mux_pll_clk,
0610     msm_mux_pri_mi2s,
0611     msm_mux_prng_rosc,
0612     msm_mux_qdss_cti,
0613     msm_mux_qdss_gpio,
0614     msm_mux_qlink0_enable,
0615     msm_mux_qlink0_request,
0616     msm_mux_qlink0_wmss,
0617     msm_mux_qlink1_enable,
0618     msm_mux_qlink1_request,
0619     msm_mux_qlink1_wmss,
0620     msm_mux_qlink2_enable,
0621     msm_mux_qlink2_request,
0622     msm_mux_qlink2_wmss,
0623     msm_mux_qspi0,
0624     msm_mux_qspi1,
0625     msm_mux_qspi2,
0626     msm_mux_qspi3,
0627     msm_mux_qspi_clk,
0628     msm_mux_qspi_cs,
0629     msm_mux_qup0,
0630     msm_mux_qup1,
0631     msm_mux_qup10,
0632     msm_mux_qup11,
0633     msm_mux_qup12,
0634     msm_mux_qup13,
0635     msm_mux_qup14,
0636     msm_mux_qup15,
0637     msm_mux_qup16,
0638     msm_mux_qup17,
0639     msm_mux_qup18,
0640     msm_mux_qup19,
0641     msm_mux_qup2,
0642     msm_mux_qup20,
0643     msm_mux_qup21,
0644     msm_mux_qup3,
0645     msm_mux_qup4,
0646     msm_mux_qup5,
0647     msm_mux_qup6,
0648     msm_mux_qup7,
0649     msm_mux_qup8,
0650     msm_mux_qup9,
0651     msm_mux_qup_l4,
0652     msm_mux_qup_l5,
0653     msm_mux_qup_l6,
0654     msm_mux_sd_write,
0655     msm_mux_sdc40,
0656     msm_mux_sdc41,
0657     msm_mux_sdc42,
0658     msm_mux_sdc43,
0659     msm_mux_sdc4_clk,
0660     msm_mux_sdc4_cmd,
0661     msm_mux_sec_mi2s,
0662     msm_mux_tb_trig,
0663     msm_mux_tgu_ch0,
0664     msm_mux_tgu_ch1,
0665     msm_mux_tgu_ch2,
0666     msm_mux_tgu_ch3,
0667     msm_mux_tmess_prng0,
0668     msm_mux_tmess_prng1,
0669     msm_mux_tmess_prng2,
0670     msm_mux_tmess_prng3,
0671     msm_mux_tsense_pwm1,
0672     msm_mux_tsense_pwm2,
0673     msm_mux_uim0_clk,
0674     msm_mux_uim0_data,
0675     msm_mux_uim0_present,
0676     msm_mux_uim0_reset,
0677     msm_mux_uim1_clk,
0678     msm_mux_uim1_data,
0679     msm_mux_uim1_present,
0680     msm_mux_uim1_reset,
0681     msm_mux_usb2phy_ac,
0682     msm_mux_usb_phy,
0683     msm_mux_vfr_0,
0684     msm_mux_vfr_1,
0685     msm_mux_vsense_trigger,
0686     msm_mux__,
0687 };
0688 
0689 static const char * const gpio_groups[] = {
0690     "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
0691     "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
0692     "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
0693     "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
0694     "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
0695     "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
0696     "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
0697     "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
0698     "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
0699     "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
0700     "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
0701     "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
0702     "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
0703     "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
0704     "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
0705     "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
0706     "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
0707     "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122",
0708     "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", "gpio128",
0709     "gpio129", "gpio130", "gpio131", "gpio132", "gpio133", "gpio134",
0710     "gpio135", "gpio136", "gpio137", "gpio138", "gpio139", "gpio140",
0711     "gpio141", "gpio142", "gpio143", "gpio144", "gpio145", "gpio146",
0712     "gpio147", "gpio148", "gpio149", "gpio150", "gpio151", "gpio152",
0713     "gpio153", "gpio154", "gpio155", "gpio156", "gpio157", "gpio158",
0714     "gpio159", "gpio160", "gpio161", "gpio162", "gpio163", "gpio164",
0715     "gpio165", "gpio166", "gpio167", "gpio168", "gpio169", "gpio170",
0716     "gpio171", "gpio172", "gpio173", "gpio174", "gpio175", "gpio176",
0717     "gpio177", "gpio178", "gpio179", "gpio180", "gpio181", "gpio182",
0718     "gpio183", "gpio184", "gpio185", "gpio186", "gpio187", "gpio188",
0719     "gpio189", "gpio190", "gpio191", "gpio192", "gpio193", "gpio194",
0720     "gpio195", "gpio196", "gpio197", "gpio198", "gpio199", "gpio200",
0721     "gpio201", "gpio202", "gpio203", "gpio204", "gpio205", "gpio206",
0722     "gpio207", "gpio208", "gpio209",
0723 };
0724 
0725 static const char * const egpio_groups[] = {
0726     "gpio165", "gpio166", "gpio167", "gpio168", "gpio169", "gpio170",
0727     "gpio171", "gpio172", "gpio173", "gpio174", "gpio175", "gpio176",
0728     "gpio177", "gpio178", "gpio179", "gpio180", "gpio181", "gpio182",
0729     "gpio183", "gpio184", "gpio185", "gpio186", "gpio187", "gpio188",
0730     "gpio189", "gpio190", "gpio191", "gpio192", "gpio193", "gpio194",
0731     "gpio195", "gpio196", "gpio197", "gpio198", "gpio199", "gpio200",
0732     "gpio201", "gpio202", "gpio203", "gpio204", "gpio205", "gpio206",
0733     "gpio207", "gpio208", "gpio209",
0734 };
0735 
0736 static const char * const aon_cam_groups[] = {
0737     "gpio108",
0738 };
0739 
0740 static const char * const atest_char_groups[] = {
0741     "gpio86", "gpio87", "gpio88", "gpio89", "gpio90",
0742 };
0743 
0744 static const char * const atest_usb_groups[] = {
0745     "gpio37", "gpio39", "gpio55", "gpio148", "gpio149",
0746 };
0747 
0748 static const char * const audio_ref_groups[] = {
0749     "gpio124",
0750 };
0751 
0752 static const char * const cam_mclk_groups[] = {
0753     "gpio100", "gpio101", "gpio102", "gpio103", "gpio104", "gpio105", "gpio106", "gpio107",
0754 };
0755 
0756 static const char * const cci_async_groups[] = {
0757     "gpio109", "gpio119", "gpio120",
0758 };
0759 
0760 static const char * const cci_i2c_groups[] = {
0761     "gpio110", "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio208", "gpio209",
0762 };
0763 
0764 static const char * const cci_timer_groups[] = {
0765     "gpio116", "gpio117", "gpio118", "gpio119", "gpio120",
0766 };
0767 
0768 static const char * const cmu_rng_groups[] = {
0769     "gpio94", "gpio95", "gpio96", "gpio97",
0770 };
0771 
0772 static const char * const coex_uart1_groups[] = {
0773     "gpio148", "gpio149",
0774 };
0775 
0776 static const char * const coex_uart2_groups[] = {
0777     "gpio150", "gpio151",
0778 };
0779 
0780 static const char * const cri_trng_groups[] = {
0781     "gpio99",
0782 };
0783 
0784 static const char * const cri_trng0_groups[] = {
0785     "gpio71",
0786 };
0787 
0788 static const char * const cri_trng1_groups[] = {
0789     "gpio72",
0790 };
0791 
0792 static const char * const dbg_out_groups[] = {
0793     "gpio9",
0794 };
0795 
0796 static const char * const ddr_bist_groups[] = {
0797     "gpio36", "gpio37", "gpio40", "gpio41",
0798 };
0799 
0800 static const char * const ddr_pxi0_groups[] = {
0801     "gpio51", "gpio52",
0802 };
0803 
0804 static const char * const ddr_pxi1_groups[] = {
0805     "gpio40", "gpio41",
0806 };
0807 
0808 static const char * const ddr_pxi2_groups[] = {
0809     "gpio45", "gpio47",
0810 };
0811 
0812 static const char * const ddr_pxi3_groups[] = {
0813     "gpio43", "gpio44",
0814 };
0815 
0816 static const char * const dp_hot_groups[] = {
0817     "gpio47",
0818 };
0819 
0820 static const char * const gcc_gp1_groups[] = {
0821     "gpio86", "gpio134",
0822 };
0823 
0824 static const char * const gcc_gp2_groups[] = {
0825     "gpio87", "gpio135",
0826 };
0827 
0828 static const char * const gcc_gp3_groups[] = {
0829     "gpio88", "gpio136",
0830 };
0831 
0832 static const char * const ibi_i3c_groups[] = {
0833     "gpio28", "gpio29", "gpio32", "gpio33", "gpio56", "gpio57", "gpio60", "gpio61",
0834 };
0835 
0836 static const char * const jitter_bist_groups[] = {
0837     "gpio24",
0838 };
0839 
0840 static const char * const mdp_vsync_groups[] = {
0841     "gpio46", "gpio47", "gpio86", "gpio87", "gpio88",
0842 };
0843 
0844 static const char * const mdp_vsync0_groups[] = {
0845     "gpio86",
0846 };
0847 
0848 static const char * const mdp_vsync1_groups[] = {
0849     "gpio86",
0850 };
0851 
0852 static const char * const mdp_vsync2_groups[] = {
0853     "gpio87",
0854 };
0855 
0856 static const char * const mdp_vsync3_groups[] = {
0857     "gpio87",
0858 };
0859 
0860 static const char * const mi2s0_data0_groups[] = {
0861     "gpio127",
0862 };
0863 
0864 static const char * const mi2s0_data1_groups[] = {
0865     "gpio128",
0866 };
0867 
0868 static const char * const mi2s0_sck_groups[] = {
0869     "gpio126",
0870 };
0871 
0872 static const char * const mi2s0_ws_groups[] = {
0873     "gpio129",
0874 };
0875 
0876 static const char * const mi2s2_data0_groups[] = {
0877     "gpio122",
0878 };
0879 
0880 static const char * const mi2s2_data1_groups[] = {
0881     "gpio124",
0882 };
0883 
0884 static const char * const mi2s2_sck_groups[] = {
0885     "gpio121",
0886 };
0887 
0888 static const char * const mi2s2_ws_groups[] = {
0889     "gpio123",
0890 };
0891 
0892 static const char * const mss_grfc0_groups[] = {
0893     "gpio138", "gpio153",
0894 };
0895 
0896 static const char * const mss_grfc1_groups[] = {
0897     "gpio139",
0898 };
0899 
0900 static const char * const mss_grfc10_groups[] = {
0901     "gpio150",
0902 };
0903 
0904 static const char * const mss_grfc11_groups[] = {
0905     "gpio151",
0906 };
0907 
0908 static const char * const mss_grfc12_groups[] = {
0909     "gpio152",
0910 };
0911 
0912 static const char * const mss_grfc2_groups[] = {
0913     "gpio140",
0914 };
0915 
0916 static const char * const mss_grfc3_groups[] = {
0917     "gpio141",
0918 };
0919 
0920 static const char * const mss_grfc4_groups[] = {
0921     "gpio142",
0922 };
0923 
0924 static const char * const mss_grfc5_groups[] = {
0925     "gpio143",
0926 };
0927 
0928 static const char * const mss_grfc6_groups[] = {
0929     "gpio144",
0930 };
0931 
0932 static const char * const mss_grfc7_groups[] = {
0933     "gpio145",
0934 };
0935 
0936 static const char * const mss_grfc8_groups[] = {
0937     "gpio146",
0938 };
0939 
0940 static const char * const mss_grfc9_groups[] = {
0941     "gpio147",
0942 };
0943 
0944 static const char * const nav_groups[] = {
0945     "gpio153", "gpio154", "gpio155",
0946 };
0947 
0948 static const char * const pcie0_clkreqn_groups[] = {
0949     "gpio95",
0950 };
0951 
0952 static const char * const pcie1_clkreqn_groups[] = {
0953     "gpio98",
0954 };
0955 
0956 static const char * const phase_flag_groups[] = {
0957     "gpio4", "gpio5", "gpio6", "gpio7", "gpio10", "gpio11", "gpio12", "gpio13",
0958     "gpio14", "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio25", "gpio26",
0959     "gpio76", "gpio77", "gpio78", "gpio79", "gpio81", "gpio82", "gpio83", "gpio92",
0960     "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98", "gpio99",
0961 };
0962 
0963 static const char * const pll_bist_groups[] = {
0964     "gpio20",
0965 };
0966 
0967 static const char * const pll_clk_groups[] = {
0968     "gpio107",
0969 };
0970 
0971 static const char * const pri_mi2s_groups[] = {
0972     "gpio125",
0973 };
0974 
0975 static const char * const prng_rosc_groups[] = {
0976     "gpio73", "gpio75", "gpio81", "gpio83",  "gpio81",
0977 };
0978 
0979 static const char * const qdss_cti_groups[] = {
0980     "gpio2", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84", "gpio85", "gpio93",
0981 };
0982 
0983 static const char * const qdss_gpio_groups[] = {
0984     "gpio100", "gpio101", "gpio102", "gpio103", "gpio104", "gpio105", "gpio106", "gpio107",
0985     "gpio110", "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio117", "gpio118",
0986     "gpio119", "gpio120", "gpio188", "gpio189", "gpio190", "gpio191", "gpio192", "gpio193",
0987     "gpio194", "gpio195", "gpio196", "gpio197", "gpio198", "gpio199", "gpio200", "gpio201",
0988     "gpio202", "gpio203", "gpio204", "gpio205",
0989 };
0990 
0991 static const char * const qlink0_enable_groups[] = {
0992     "gpio157",
0993 };
0994 
0995 static const char * const qlink0_request_groups[] = {
0996     "gpio156",
0997 };
0998 
0999 static const char * const qlink0_wmss_groups[] = {
1000     "gpio158",
1001 };
1002 
1003 static const char * const qlink1_enable_groups[] = {
1004     "gpio160",
1005 };
1006 
1007 static const char * const qlink1_request_groups[] = {
1008     "gpio159",
1009 };
1010 
1011 static const char * const qlink1_wmss_groups[] = {
1012     "gpio161",
1013 };
1014 
1015 static const char * const qlink2_enable_groups[] = {
1016     "gpio163",
1017 };
1018 
1019 static const char * const qlink2_request_groups[] = {
1020     "gpio162",
1021 };
1022 
1023 static const char * const qlink2_wmss_groups[] = {
1024     "gpio164",
1025 };
1026 
1027 static const char * const qspi0_groups[] = {
1028     "gpio52",
1029 };
1030 
1031 static const char * const qspi1_groups[] = {
1032     "gpio53",
1033 };
1034 
1035 static const char * const qspi2_groups[] = {
1036     "gpio48",
1037 };
1038 
1039 static const char * const qspi3_groups[] = {
1040     "gpio49",
1041 };
1042 
1043 static const char * const qspi_clk_groups[] = {
1044     "gpio50",
1045 };
1046 
1047 static const char * const qspi_cs_groups[] = {
1048     "gpio51", "gpio54",
1049 };
1050 
1051 static const char * const qup0_groups[] = {
1052     "gpio0", "gpio1", "gpio2", "gpio3",
1053 };
1054 
1055 static const char * const qup1_groups[] = {
1056     "gpio4", "gpio5", "gpio6", "gpio7",
1057 };
1058 
1059 static const char * const qup10_groups[] = {
1060     "gpio36", "gpio37", "gpio38", "gpio39",
1061 };
1062 
1063 static const char * const qup11_groups[] = {
1064     "gpio40", "gpio41", "gpio42", "gpio43",
1065 };
1066 
1067 static const char * const qup12_groups[] = {
1068     "gpio44", "gpio45", "gpio46", "gpio47",
1069 };
1070 
1071 static const char * const qup13_groups[] = {
1072     "gpio48", "gpio49", "gpio50", "gpio51",
1073 };
1074 
1075 static const char * const qup14_groups[] = {
1076     "gpio52", "gpio53", "gpio54", "gpio55",
1077 };
1078 
1079 static const char * const qup15_groups[] = {
1080     "gpio56", "gpio57", "gpio58", "gpio59",
1081 };
1082 
1083 static const char * const qup16_groups[] = {
1084     "gpio60", "gpio61", "gpio62", "gpio63",
1085 };
1086 
1087 static const char * const qup17_groups[] = {
1088     "gpio64", "gpio65", "gpio66", "gpio67",
1089 };
1090 
1091 static const char * const qup18_groups[] = {
1092     "gpio68", "gpio69", "gpio70", "gpio71",
1093 };
1094 
1095 static const char * const qup19_groups[] = {
1096     "gpio72", "gpio73", "gpio74", "gpio75",
1097 };
1098 
1099 static const char * const qup2_groups[] = {
1100     "gpio8", "gpio9", "gpio10", "gpio11",
1101 };
1102 
1103 static const char * const qup20_groups[] = {
1104     "gpio76", "gpio77", "gpio78", "gpio79",
1105 };
1106 
1107 static const char * const qup21_groups[] = {
1108     "gpio80", "gpio81", "gpio82", "gpio83",
1109 };
1110 
1111 static const char * const qup3_groups[] = {
1112     "gpio12", "gpio13", "gpio14", "gpio15",
1113 };
1114 
1115 static const char * const qup4_groups[] = {
1116     "gpio16", "gpio17", "gpio18", "gpio19",
1117 };
1118 
1119 static const char * const qup5_groups[] = {
1120     "gpio84", "gpio85", "gpio206", "gpio207",
1121 };
1122 
1123 static const char * const qup6_groups[] = {
1124     "gpio20", "gpio21", "gpio22", "gpio23",
1125 };
1126 
1127 static const char * const qup7_groups[] = {
1128     "gpio24", "gpio25", "gpio26", "gpio27",
1129 };
1130 
1131 static const char * const qup8_groups[] = {
1132     "gpio28", "gpio29", "gpio30", "gpio31",
1133 };
1134 
1135 static const char * const qup9_groups[] = {
1136     "gpio32", "gpio33", "gpio34", "gpio35",
1137 };
1138 
1139 static const char * const qup_l4_groups[] = {
1140     "gpio24", "gpio40", "gpio58", "gpio63",
1141 };
1142 
1143 static const char * const qup_l5_groups[] = {
1144     "gpio25", "gpio41", "gpio59", "gpio66",
1145 };
1146 
1147 static const char * const qup_l6_groups[] = {
1148     "gpio26", "gpio42", "gpio62", "gpio67",
1149 };
1150 
1151 static const char * const sd_write_groups[] = {
1152     "gpio93",
1153 };
1154 
1155 static const char * const sdc40_groups[] = {
1156     "gpio52",
1157 };
1158 
1159 static const char * const sdc41_groups[] = {
1160     "gpio53",
1161 };
1162 
1163 static const char * const sdc42_groups[] = {
1164     "gpio48",
1165 };
1166 
1167 static const char * const sdc43_groups[] = {
1168     "gpio49",
1169 };
1170 
1171 static const char * const sdc4_clk_groups[] = {
1172     "gpio50",
1173 };
1174 
1175 static const char * const sdc4_cmd_groups[] = {
1176     "gpio51",
1177 };
1178 
1179 static const char * const sec_mi2s_groups[] = {
1180     "gpio124",
1181 };
1182 
1183 static const char * const tb_trig_groups[] = {
1184     "gpio64", "gpio137",
1185 };
1186 
1187 static const char * const tgu_ch0_groups[] = {
1188     "gpio64",
1189 };
1190 
1191 static const char * const tgu_ch1_groups[] = {
1192     "gpio65",
1193 };
1194 
1195 static const char * const tgu_ch2_groups[] = {
1196     "gpio66",
1197 };
1198 
1199 static const char * const tgu_ch3_groups[] = {
1200     "gpio67",
1201 };
1202 
1203 static const char * const tmess_prng0_groups[] = {
1204     "gpio80",
1205 };
1206 
1207 static const char * const tmess_prng1_groups[] = {
1208     "gpio79",
1209 };
1210 
1211 static const char * const tmess_prng2_groups[] = {
1212     "gpio77",
1213 };
1214 
1215 static const char * const tmess_prng3_groups[] = {
1216     "gpio76",
1217 };
1218 
1219 static const char * const tsense_pwm1_groups[] = {
1220     "gpio91",
1221 };
1222 
1223 static const char * const tsense_pwm2_groups[] = {
1224     "gpio91",
1225 };
1226 
1227 static const char * const uim0_clk_groups[] = {
1228     "gpio131",
1229 };
1230 
1231 static const char * const uim0_data_groups[] = {
1232     "gpio130",
1233 };
1234 
1235 static const char * const uim0_present_groups[] = {
1236     "gpio133",
1237 };
1238 
1239 static const char * const uim0_reset_groups[] = {
1240     "gpio132",
1241 };
1242 
1243 static const char * const uim1_clk_groups[] = {
1244     "gpio135",
1245 };
1246 
1247 static const char * const uim1_data_groups[] = {
1248     "gpio134",
1249 };
1250 
1251 static const char * const uim1_present_groups[] = {
1252     "gpio137",
1253 };
1254 
1255 static const char * const uim1_reset_groups[] = {
1256     "gpio136",
1257 };
1258 
1259 static const char * const usb2phy_ac_groups[] = {
1260     "gpio90",
1261 };
1262 
1263 static const char * const usb_phy_groups[] = {
1264     "gpio91",
1265 };
1266 
1267 static const char * const vfr_0_groups[] = {
1268     "gpio89",
1269 };
1270 
1271 static const char * const vfr_1_groups[] = {
1272     "gpio155",
1273 };
1274 
1275 static const char * const vsense_trigger_groups[] = {
1276     "gpio18",
1277 };
1278 
1279 static const struct msm_function sm8450_functions[] = {
1280     FUNCTION(gpio),
1281     FUNCTION(aon_cam),
1282     FUNCTION(atest_char),
1283     FUNCTION(atest_usb),
1284     FUNCTION(audio_ref),
1285     FUNCTION(cam_mclk),
1286     FUNCTION(cci_async),
1287     FUNCTION(cci_i2c),
1288     FUNCTION(cci_timer),
1289     FUNCTION(cmu_rng),
1290     FUNCTION(coex_uart1),
1291     FUNCTION(coex_uart2),
1292     FUNCTION(cri_trng),
1293     FUNCTION(cri_trng0),
1294     FUNCTION(cri_trng1),
1295     FUNCTION(dbg_out),
1296     FUNCTION(ddr_bist),
1297     FUNCTION(ddr_pxi0),
1298     FUNCTION(ddr_pxi1),
1299     FUNCTION(ddr_pxi2),
1300     FUNCTION(ddr_pxi3),
1301     FUNCTION(dp_hot),
1302     FUNCTION(egpio),
1303     FUNCTION(gcc_gp1),
1304     FUNCTION(gcc_gp2),
1305     FUNCTION(gcc_gp3),
1306     FUNCTION(ibi_i3c),
1307     FUNCTION(jitter_bist),
1308     FUNCTION(mdp_vsync),
1309     FUNCTION(mdp_vsync0),
1310     FUNCTION(mdp_vsync1),
1311     FUNCTION(mdp_vsync2),
1312     FUNCTION(mdp_vsync3),
1313     FUNCTION(mi2s0_data0),
1314     FUNCTION(mi2s0_data1),
1315     FUNCTION(mi2s0_sck),
1316     FUNCTION(mi2s0_ws),
1317     FUNCTION(mi2s2_data0),
1318     FUNCTION(mi2s2_data1),
1319     FUNCTION(mi2s2_sck),
1320     FUNCTION(mi2s2_ws),
1321     FUNCTION(mss_grfc0),
1322     FUNCTION(mss_grfc1),
1323     FUNCTION(mss_grfc10),
1324     FUNCTION(mss_grfc11),
1325     FUNCTION(mss_grfc12),
1326     FUNCTION(mss_grfc2),
1327     FUNCTION(mss_grfc3),
1328     FUNCTION(mss_grfc4),
1329     FUNCTION(mss_grfc5),
1330     FUNCTION(mss_grfc6),
1331     FUNCTION(mss_grfc7),
1332     FUNCTION(mss_grfc8),
1333     FUNCTION(mss_grfc9),
1334     FUNCTION(nav),
1335     FUNCTION(pcie0_clkreqn),
1336     FUNCTION(pcie1_clkreqn),
1337     FUNCTION(phase_flag),
1338     FUNCTION(pll_bist),
1339     FUNCTION(pll_clk),
1340     FUNCTION(pri_mi2s),
1341     FUNCTION(prng_rosc),
1342     FUNCTION(qdss_cti),
1343     FUNCTION(qdss_gpio),
1344     FUNCTION(qlink0_enable),
1345     FUNCTION(qlink0_request),
1346     FUNCTION(qlink0_wmss),
1347     FUNCTION(qlink1_enable),
1348     FUNCTION(qlink1_request),
1349     FUNCTION(qlink1_wmss),
1350     FUNCTION(qlink2_enable),
1351     FUNCTION(qlink2_request),
1352     FUNCTION(qlink2_wmss),
1353     FUNCTION(qspi0),
1354     FUNCTION(qspi1),
1355     FUNCTION(qspi2),
1356     FUNCTION(qspi3),
1357     FUNCTION(qspi_clk),
1358     FUNCTION(qspi_cs),
1359     FUNCTION(qup0),
1360     FUNCTION(qup1),
1361     FUNCTION(qup10),
1362     FUNCTION(qup11),
1363     FUNCTION(qup12),
1364     FUNCTION(qup13),
1365     FUNCTION(qup14),
1366     FUNCTION(qup15),
1367     FUNCTION(qup16),
1368     FUNCTION(qup17),
1369     FUNCTION(qup18),
1370     FUNCTION(qup19),
1371     FUNCTION(qup2),
1372     FUNCTION(qup20),
1373     FUNCTION(qup21),
1374     FUNCTION(qup3),
1375     FUNCTION(qup4),
1376     FUNCTION(qup5),
1377     FUNCTION(qup6),
1378     FUNCTION(qup7),
1379     FUNCTION(qup8),
1380     FUNCTION(qup9),
1381     FUNCTION(qup_l4),
1382     FUNCTION(qup_l5),
1383     FUNCTION(qup_l6),
1384     FUNCTION(sd_write),
1385     FUNCTION(sdc40),
1386     FUNCTION(sdc41),
1387     FUNCTION(sdc42),
1388     FUNCTION(sdc43),
1389     FUNCTION(sdc4_clk),
1390     FUNCTION(sdc4_cmd),
1391     FUNCTION(sec_mi2s),
1392     FUNCTION(tb_trig),
1393     FUNCTION(tgu_ch0),
1394     FUNCTION(tgu_ch1),
1395     FUNCTION(tgu_ch2),
1396     FUNCTION(tgu_ch3),
1397     FUNCTION(tmess_prng0),
1398     FUNCTION(tmess_prng1),
1399     FUNCTION(tmess_prng2),
1400     FUNCTION(tmess_prng3),
1401     FUNCTION(tsense_pwm1),
1402     FUNCTION(tsense_pwm2),
1403     FUNCTION(uim0_clk),
1404     FUNCTION(uim0_data),
1405     FUNCTION(uim0_present),
1406     FUNCTION(uim0_reset),
1407     FUNCTION(uim1_clk),
1408     FUNCTION(uim1_data),
1409     FUNCTION(uim1_present),
1410     FUNCTION(uim1_reset),
1411     FUNCTION(usb2phy_ac),
1412     FUNCTION(usb_phy),
1413     FUNCTION(vfr_0),
1414     FUNCTION(vfr_1),
1415     FUNCTION(vsense_trigger),
1416 };
1417 
1418 /* Every pin is maintained as a single group, and missing or non-existing pin
1419  * would be maintained as dummy group to synchronize pin group index with
1420  * pin descriptor registered with pinctrl core.
1421  * Clients would not be able to request these dummy pin groups.
1422  */
1423 static const struct msm_pingroup sm8450_groups[] = {
1424     [0] = PINGROUP(0, qup0, _, _, _, _, _, _, _, _),
1425     [1] = PINGROUP(1, qup0, _, _, _, _, _, _, _, _),
1426     [2] = PINGROUP(2, qup0, qdss_cti, _, _, _, _, _, _, _),
1427     [3] = PINGROUP(3, qup0, _, _, _, _, _, _, _, _),
1428     [4] = PINGROUP(4, qup1, phase_flag, _, _, _, _, _, _, _),
1429     [5] = PINGROUP(5, qup1, phase_flag, _, _, _, _, _, _, _),
1430     [6] = PINGROUP(6, qup1, phase_flag, _, _, _, _, _, _, _),
1431     [7] = PINGROUP(7, qup1, phase_flag, _, _, _, _, _, _, _),
1432     [8] = PINGROUP(8, qup2, _, _, _, _, _, _, _, _),
1433     [9] = PINGROUP(9, qup2, dbg_out, _, _, _, _, _, _, _),
1434     [10] = PINGROUP(10, qup2, phase_flag, _, _, _, _, _, _, _),
1435     [11] = PINGROUP(11, qup2, phase_flag, _, _, _, _, _, _, _),
1436     [12] = PINGROUP(12, qup3, phase_flag, _, _, _, _, _, _, _),
1437     [13] = PINGROUP(13, qup3, phase_flag, _, _, _, _, _, _, _),
1438     [14] = PINGROUP(14, qup3, phase_flag, _, _, _, _, _, _, _),
1439     [15] = PINGROUP(15, qup3, phase_flag, _, _, _, _, _, _, _),
1440     [16] = PINGROUP(16, qup4, phase_flag, _, _, _, _, _, _, _),
1441     [17] = PINGROUP(17, qup4, phase_flag, _, _, _, _, _, _, _),
1442     [18] = PINGROUP(18, qup4, phase_flag, _, vsense_trigger, _, _, _, _, _),
1443     [19] = PINGROUP(19, qup4, phase_flag, _, _, _, _, _, _, _),
1444     [20] = PINGROUP(20, qup6, pll_bist, _, _, _, _, _, _, _),
1445     [21] = PINGROUP(21, qup6, _, _, _, _, _, _, _, _),
1446     [22] = PINGROUP(22, qup6, _, _, _, _, _, _, _, _),
1447     [23] = PINGROUP(23, qup6, _, _, _, _, _, _, _, _),
1448     [24] = PINGROUP(24, qup7, qup_l4, jitter_bist, _, _, _, _, _, _),
1449     [25] = PINGROUP(25, qup7, qup_l5, phase_flag, _, _, _, _, _, _),
1450     [26] = PINGROUP(26, qup7, qup_l6, phase_flag, _, _, _, _, _, _),
1451     [27] = PINGROUP(27, qup7, _, _, _, _, _, _, _, _),
1452     [28] = PINGROUP(28, qup8, ibi_i3c, _, _, _, _, _, _, _),
1453     [29] = PINGROUP(29, qup8, ibi_i3c, _, _, _, _, _, _, _),
1454     [30] = PINGROUP(30, qup8, _, _, _, _, _, _, _, _),
1455     [31] = PINGROUP(31, qup8, _, _, _, _, _, _, _, _),
1456     [32] = PINGROUP(32, qup9, ibi_i3c, _, _, _, _, _, _, _),
1457     [33] = PINGROUP(33, qup9, ibi_i3c, _, _, _, _, _, _, _),
1458     [34] = PINGROUP(34, qup9, _, _, _, _, _, _, _, _),
1459     [35] = PINGROUP(35, qup9, _, _, _, _, _, _, _, _),
1460     [36] = PINGROUP(36, qup10, ddr_bist, _, _, _, _, _, _, _),
1461     [37] = PINGROUP(37, qup10, ddr_bist, atest_usb, _, _, _, _, _, _),
1462     [38] = PINGROUP(38, qup10, _, _, _, _, _, _, _, _),
1463     [39] = PINGROUP(39, qup10, atest_usb, _, _, _, _, _, _, _),
1464     [40] = PINGROUP(40, qup11, qup_l4, ddr_bist, ddr_pxi1, _, _, _, _, _),
1465     [41] = PINGROUP(41, qup11, qup_l5, ddr_bist, ddr_pxi1, _, _, _, _, _),
1466     [42] = PINGROUP(42, qup11, qup_l6, _, _, _, _, _, _, _),
1467     [43] = PINGROUP(43, qup11, ddr_pxi3, _, _, _, _, _, _, _),
1468     [44] = PINGROUP(44, qup12, ddr_pxi3, _, _, _, _, _, _, _),
1469     [45] = PINGROUP(45, qup12, ddr_pxi2, _, _, _, _, _, _, _),
1470     [46] = PINGROUP(46, qup12, mdp_vsync, _, _, _, _, _, _, _),
1471     [47] = PINGROUP(47, qup12, dp_hot, mdp_vsync, ddr_pxi2, _, _, _, _, _),
1472     [48] = PINGROUP(48, qup13, qspi2, sdc42, _, _, _, _, _, _),
1473     [49] = PINGROUP(49, qup13, qspi3, sdc43, _, _, _, _, _, _),
1474     [50] = PINGROUP(50, qup13, qspi_clk, sdc4_clk, _, _, _, _, _, _),
1475     [51] = PINGROUP(51, qup13, qspi_cs, sdc4_cmd, ddr_pxi0, _, _, _, _, _),
1476     [52] = PINGROUP(52, qup14, qspi0, sdc40, ddr_pxi0, _, _, _, _, _),
1477     [53] = PINGROUP(53, qup14, qspi1, sdc41, _, _, _, _, _, _),
1478     [54] = PINGROUP(54, qup14, qspi_cs, _, _, _, _, _, _, _),
1479     [55] = PINGROUP(55, qup14, atest_usb, _, _, _, _, _, _, _),
1480     [56] = PINGROUP(56, qup15, ibi_i3c, _, _, _, _, _, _, _),
1481     [57] = PINGROUP(57, qup15, ibi_i3c, _, _, _, _, _, _, _),
1482     [58] = PINGROUP(58, qup15, qup_l4, _, _, _, _, _, _, _),
1483     [59] = PINGROUP(59, qup15, qup_l5, _, _, _, _, _, _, _),
1484     [60] = PINGROUP(60, qup16, ibi_i3c, _, _, _, _, _, _, _),
1485     [61] = PINGROUP(61, qup16, ibi_i3c, _, _, _, _, _, _, _),
1486     [62] = PINGROUP(62, qup16, qup_l6, _, _, _, _, _, _, _),
1487     [63] = PINGROUP(63, qup16, qup_l4, _, _, _, _, _, _, _),
1488     [64] = PINGROUP(64, qup17, tb_trig, tgu_ch0, _, _, _, _, _, _),
1489     [65] = PINGROUP(65, qup17, tgu_ch1, _, _, _, _, _, _, _),
1490     [66] = PINGROUP(66, qup17, qup_l5, tgu_ch2, _, _, _, _, _, _),
1491     [67] = PINGROUP(67, qup17, qup_l6, tgu_ch3, _, _, _, _, _, _),
1492     [68] = PINGROUP(68, qup18, _, _, _, _, _, _, _, _),
1493     [69] = PINGROUP(69, qup18, _, _, _, _, _, _, _, _),
1494     [70] = PINGROUP(70, qup18, _, _, _, _, _, _, _, _),
1495     [71] = PINGROUP(71, qup18, cri_trng0, _, _, _, _, _, _, _),
1496     [72] = PINGROUP(72, qup19, cri_trng1, _, _, _, _, _, _, _),
1497     [73] = PINGROUP(73, qup19, prng_rosc, _, _, _, _, _, _, _),
1498     [74] = PINGROUP(74, qup19, _, _, _, _, _, _, _, _),
1499     [75] = PINGROUP(75, qup19, prng_rosc, _, _, _, _, _, _, _),
1500     [76] = PINGROUP(76, qup20, phase_flag, tmess_prng3, _, _, _, _, _, _),
1501     [77] = PINGROUP(77, qup20, phase_flag, tmess_prng2, _, _, _, _, _, _),
1502     [78] = PINGROUP(78, qup20, phase_flag, _, _, _, _, _, _, _),
1503     [79] = PINGROUP(79, qup20, phase_flag, tmess_prng1, _, _, _, _, _, _),
1504     [80] = PINGROUP(80, qup21, qdss_cti, phase_flag, tmess_prng0, _, _, _, _, _),
1505     [81] = PINGROUP(81, qup21, qdss_cti, phase_flag, prng_rosc, _, _, _, _, _),
1506     [82] = PINGROUP(82, qup21, qdss_cti, phase_flag, _, _, _, _, _, _),
1507     [83] = PINGROUP(83, qup21, qdss_cti, phase_flag, prng_rosc, _, _, _, _, _),
1508     [84] = PINGROUP(84, qup5, qdss_cti, _, _, _, _, _, _, _),
1509     [85] = PINGROUP(85, qup5, qdss_cti, _, _, _, _, _, _, _),
1510     [86] = PINGROUP(86, mdp_vsync, mdp_vsync0, mdp_vsync1, gcc_gp1, atest_char, _, _, _, _),
1511     [87] = PINGROUP(87, mdp_vsync, mdp_vsync2, mdp_vsync3, gcc_gp2, atest_char, _, _, _, _),
1512     [88] = PINGROUP(88, mdp_vsync, gcc_gp3, atest_char, _, _, _, _, _, _),
1513     [89] = PINGROUP(89, vfr_0, atest_char, _, _, _, _, _, _, _),
1514     [90] = PINGROUP(90, usb2phy_ac, atest_char, _, _, _, _, _, _, _),
1515     [91] = PINGROUP(91, usb_phy, tsense_pwm1, tsense_pwm2, _, _, _, _, _, _),
1516     [92] = PINGROUP(92, phase_flag, _, _, _, _, _, _, _, _),
1517     [93] = PINGROUP(93, sd_write, qdss_cti, phase_flag, _, _, _, _, _, _),
1518     [94] = PINGROUP(94, cmu_rng, phase_flag, _, _, _, _, _, _, _),
1519     [95] = PINGROUP(95, pcie0_clkreqn, cmu_rng, phase_flag, _, _, _, _, _, _),
1520     [96] = PINGROUP(96, cmu_rng, phase_flag, _, _, _, _, _, _, _),
1521     [97] = PINGROUP(97, cmu_rng, phase_flag, _, _, _, _, _, _, _),
1522     [98] = PINGROUP(98, pcie1_clkreqn, phase_flag, _, _, _, _, _, _, _),
1523     [99] = PINGROUP(99, phase_flag, cri_trng, _, _, _, _, _, _, _),
1524     [100] = PINGROUP(100, cam_mclk, qdss_gpio, _, _, _, _, _, _, _),
1525     [101] = PINGROUP(101, cam_mclk, qdss_gpio, _, _, _, _, _, _, _),
1526     [102] = PINGROUP(102, cam_mclk, qdss_gpio, _, _, _, _, _, _, _),
1527     [103] = PINGROUP(103, cam_mclk, qdss_gpio, _, _, _, _, _, _, _),
1528     [104] = PINGROUP(104, cam_mclk, qdss_gpio, _, _, _, _, _, _, _),
1529     [105] = PINGROUP(105, cam_mclk, qdss_gpio, _, _, _, _, _, _, _),
1530     [106] = PINGROUP(106, cam_mclk, qdss_gpio, _, _, _, _, _, _, _),
1531     [107] = PINGROUP(107, cam_mclk, qdss_gpio, pll_clk, _, _, _, _, _, _),
1532     [108] = PINGROUP(108, aon_cam, _, _, _, _, _, _, _, _),
1533     [109] = PINGROUP(109, cci_async, _, _, _, _, _, _, _, _),
1534     [110] = PINGROUP(110, cci_i2c, qdss_gpio, _, _, _, _, _, _, _),
1535     [111] = PINGROUP(111, cci_i2c, qdss_gpio, _, _, _, _, _, _, _),
1536     [112] = PINGROUP(112, cci_i2c, qdss_gpio, _, _, _, _, _, _, _),
1537     [113] = PINGROUP(113, cci_i2c, qdss_gpio, _, _, _, _, _, _, _),
1538     [114] = PINGROUP(114, cci_i2c, qdss_gpio, _, _, _, _, _, _, _),
1539     [115] = PINGROUP(115, cci_i2c, qdss_gpio, _, _, _, _, _, _, _),
1540     [116] = PINGROUP(116, cci_timer, _, _, _, _, _, _, _, _),
1541     [117] = PINGROUP(117, cci_timer, qdss_gpio, _, _, _, _, _, _, _),
1542     [118] = PINGROUP(118, cci_timer, qdss_gpio, _, _, _, _, _, _, _),
1543     [119] = PINGROUP(119, cci_timer, cci_async, qdss_gpio, _, _, _, _, _, _),
1544     [120] = PINGROUP(120, cci_timer, cci_async, qdss_gpio, _, _, _, _, _, _),
1545     [121] = PINGROUP(121, mi2s2_sck, _, _, _, _, _, _, _, _),
1546     [122] = PINGROUP(122, mi2s2_data0, _, _, _, _, _, _, _, _),
1547     [123] = PINGROUP(123, mi2s2_ws, _, _, _, _, _, _, _, _),
1548     [124] = PINGROUP(124, mi2s2_data1, sec_mi2s, audio_ref, _, _, _, _, _, _),
1549     [125] = PINGROUP(125, pri_mi2s, _, _, _, _, _, _, _, _),
1550     [126] = PINGROUP(126, mi2s0_sck, _, _, _, _, _, _, _, _),
1551     [127] = PINGROUP(127, mi2s0_data0, _, _, _, _, _, _, _, _),
1552     [128] = PINGROUP(128, mi2s0_data1, _, _, _, _, _, _, _, _),
1553     [129] = PINGROUP(129, mi2s0_ws, _, _, _, _, _, _, _, _),
1554     [130] = PINGROUP(130, uim0_data, _, _, _, _, _, _, _, _),
1555     [131] = PINGROUP(131, uim0_clk, _, _, _, _, _, _, _, _),
1556     [132] = PINGROUP(132, uim0_reset, _, _, _, _, _, _, _, _),
1557     [133] = PINGROUP(133, uim0_present, _, _, _, _, _, _, _, _),
1558     [134] = PINGROUP(134, uim1_data, gcc_gp1, _, _, _, _, _, _, _),
1559     [135] = PINGROUP(135, uim1_clk, gcc_gp2, _, _, _, _, _, _, _),
1560     [136] = PINGROUP(136, uim1_reset, gcc_gp3, _, _, _, _, _, _, _),
1561     [137] = PINGROUP(137, uim1_present, tb_trig, _, _, _, _, _, _,  _),
1562     [138] = PINGROUP(138, _, mss_grfc0, _, _, _, _, _, _, _),
1563     [139] = PINGROUP(139, _, mss_grfc1, _, _, _, _, _, _, _),
1564     [140] = PINGROUP(140, _, mss_grfc2, _, _, _, _, _, _, _),
1565     [141] = PINGROUP(141, _, mss_grfc3, _, _, _, _, _, _, _),
1566     [142] = PINGROUP(142, _, mss_grfc4, _, _, _, _, _, _, _),
1567     [143] = PINGROUP(143, _, mss_grfc5, _, _, _, _, _, _, _),
1568     [144] = PINGROUP(144, _, mss_grfc6, _, _, _, _, _, _, _),
1569     [145] = PINGROUP(145, _, mss_grfc7, _, _, _, _, _, _, _),
1570     [146] = PINGROUP(146, _, mss_grfc8, _, _, _, _, _, _, _),
1571     [147] = PINGROUP(147, _, mss_grfc9, _, _, _, _, _, _, _),
1572     [148] = PINGROUP(148, coex_uart1, atest_usb, _, _, _, _, _, _, _),
1573     [149] = PINGROUP(149, coex_uart1, atest_usb, _, _, _, _, _, _, _),
1574     [150] = PINGROUP(150, coex_uart2, mss_grfc10, _, _, _, _, _, _, _),
1575     [151] = PINGROUP(151, coex_uart2, mss_grfc11, _, _, _, _, _, _, _),
1576     [152] = PINGROUP(152, mss_grfc12, _, _, _, _, _, _, _, _),
1577     [153] = PINGROUP(153, mss_grfc0, nav, _, _, _, _, _, _, _),
1578     [154] = PINGROUP(154, nav, _, _, _, _, _, _, _, _),
1579     [155] = PINGROUP(155, nav, vfr_1, _, _, _, _, _, _, _),
1580     [156] = PINGROUP(156, qlink0_request, _, _, _, _, _, _, _, _),
1581     [157] = PINGROUP(157, qlink0_enable, _, _, _, _, _, _, _, _),
1582     [158] = PINGROUP(158, qlink0_wmss, _, _, _, _, _, _, _, _),
1583     [159] = PINGROUP(159, qlink1_request, _, _, _, _, _, _, _, _),
1584     [160] = PINGROUP(160, qlink1_enable, _, _, _, _, _, _, _, _),
1585     [161] = PINGROUP(161, qlink1_wmss, _, _, _, _, _, _, _, _),
1586     [162] = PINGROUP(162, qlink2_request, _, _, _, _, _, _, _, _),
1587     [163] = PINGROUP(163, qlink2_enable, _, _, _, _, _, _, _, _),
1588     [164] = PINGROUP(164, qlink2_wmss, _, _, _, _, _, _, _, _),
1589     [165] = PINGROUP(165, _, _, _, _, _, _, _, _, egpio),
1590     [166] = PINGROUP(166, _, _, _, _, _, _, _, _, egpio),
1591     [167] = PINGROUP(167, _, _, _, _, _, _, _, _, egpio),
1592     [168] = PINGROUP(168, _, _, _, _, _, _, _, _, egpio),
1593     [169] = PINGROUP(169, _, _, _, _, _, _, _, _, egpio),
1594     [170] = PINGROUP(170, _, _, _, _, _, _, _, _, egpio),
1595     [171] = PINGROUP(171, _, _, _, _, _, _, _, _, egpio),
1596     [172] = PINGROUP(172, _, _, _, _, _, _, _, _, egpio),
1597     [173] = PINGROUP(173, _, _, _, _, _, _, _, _, egpio),
1598     [174] = PINGROUP(174, _, _, _, _, _, _, _, _, egpio),
1599     [175] = PINGROUP(175, _, _, _, _, _, _, _, _, egpio),
1600     [176] = PINGROUP(176, _, _, _, _, _, _, _, _, egpio),
1601     [177] = PINGROUP(177, _, _, _, _, _, _, _, _, egpio),
1602     [178] = PINGROUP(178, _, _, _, _, _, _, _, _, egpio),
1603     [179] = PINGROUP(179, _, _, _, _, _, _, _, _, egpio),
1604     [180] = PINGROUP(180, _, _, _, _, _, _, _, _, egpio),
1605     [181] = PINGROUP(181, _, _, _, _, _, _, _, _, egpio),
1606     [182] = PINGROUP(182, _, _, _, _, _, _, _, _, egpio),
1607     [183] = PINGROUP(183, _, _, _, _, _, _, _, _, egpio),
1608     [184] = PINGROUP(184, _, _, _, _, _, _, _, _, egpio),
1609     [185] = PINGROUP(185, _, _, _, _, _, _, _, _, egpio),
1610     [186] = PINGROUP(186, _, _, _, _, _, _, _, _, egpio),
1611     [187] = PINGROUP(187, _, _, _, _, _, _, _, _, egpio),
1612     [188] = PINGROUP(188, _, qdss_gpio, _, _, _, _, _, _, egpio),
1613     [189] = PINGROUP(189, _, qdss_gpio, _, _, _, _, _, _, egpio),
1614     [190] = PINGROUP(190, qdss_gpio, _, _, _, _, _, _, _, egpio),
1615     [191] = PINGROUP(191, qdss_gpio, _, _, _, _, _, _, _, egpio),
1616     [192] = PINGROUP(192, _, qdss_gpio, _, _, _, _, _, _, egpio),
1617     [193] = PINGROUP(193, _, qdss_gpio, _, _, _, _, _, _, egpio),
1618     [194] = PINGROUP(194, _, qdss_gpio, _, _, _, _, _, _, egpio),
1619     [195] = PINGROUP(195, _, qdss_gpio, _, _, _, _, _, _, egpio),
1620     [196] = PINGROUP(196, _, qdss_gpio, _, _, _, _, _, _, egpio),
1621     [197] = PINGROUP(197, _, qdss_gpio, _, _, _, _, _, _, egpio),
1622     [198] = PINGROUP(198, _, qdss_gpio, _, _, _, _, _, _, egpio),
1623     [199] = PINGROUP(199, _, qdss_gpio, _, _, _, _, _, _, egpio),
1624     [200] = PINGROUP(200, _, qdss_gpio, _, _, _, _, _, _, egpio),
1625     [201] = PINGROUP(201, _, qdss_gpio, _, _, _, _, _, _, egpio),
1626     [202] = PINGROUP(202, qdss_gpio, _, _, _, _, _, _, _, egpio),
1627     [203] = PINGROUP(203, qdss_gpio, _, _, _, _, _, _, _, egpio),
1628     [204] = PINGROUP(204, qdss_gpio, _, _, _, _, _, _, _, egpio),
1629     [205] = PINGROUP(205, qdss_gpio, _, _, _, _, _, _, _, egpio),
1630     [206] = PINGROUP(206, qup5, _, _, _, _, _, _, _, egpio),
1631     [207] = PINGROUP(207, qup5, _, _, _, _, _, _, _, egpio),
1632     [208] = PINGROUP(208, cci_i2c, _, _, _, _, _, _, _, egpio),
1633     [209] = PINGROUP(209, cci_i2c, _, _, _, _, _, _, _, egpio),
1634     [210] = UFS_RESET(ufs_reset, 0xde000),
1635     [211] = SDC_QDSD_PINGROUP(sdc2_clk, 0xd6000, 14, 6),
1636     [212] = SDC_QDSD_PINGROUP(sdc2_cmd, 0xd6000, 11, 3),
1637     [213] = SDC_QDSD_PINGROUP(sdc2_data, 0xd6000, 9, 0),
1638 };
1639 
1640 static const struct msm_gpio_wakeirq_map sm8450_pdc_map[] = {
1641     { 2, 70 }, { 3, 77 }, { 7, 52 }, { 8, 108 }, { 10, 128 }, { 11, 53 },
1642     { 12, 129 }, { 13, 130 }, { 14, 131 }, { 15, 67 }, { 19, 69 }, { 21, 132 },
1643     { 23, 54 }, { 26, 56 }, { 27, 71 }, { 28, 57 }, { 31, 55 }, { 32, 58 },
1644     { 34, 72 }, { 35, 43 }, { 36, 78 }, { 38, 79 }, { 39, 62 }, { 40, 80 },
1645     { 41, 133 }, { 43, 81 }, { 44, 87 }, { 45, 134 }, { 46, 66 }, { 47, 63 },
1646     { 50, 88 }, { 51, 89 }, { 55, 90 }, { 56, 59 }, { 59, 82 }, { 60, 60 },
1647     { 62, 135 }, { 63, 91 }, { 66, 136 }, { 67, 44 }, { 69, 137 }, { 71, 97 },
1648     { 75, 73 }, { 79, 74 }, { 80, 96 }, { 81, 98 }, { 82, 45 }, { 83, 99 },
1649     { 84, 94 }, { 85, 100 }, { 86, 101 }, { 87, 102 }, { 88, 92 }, { 89, 83 },
1650     { 90, 84 }, { 91, 85 }, { 92, 46 }, { 95, 103 }, { 96, 104 }, { 98, 105 },
1651     { 99, 106 }, { 115, 95 }, { 116, 76 }, { 117, 75 }, { 118, 86 }, { 119, 93 },
1652     { 133, 47 }, { 137, 42 }, { 148, 61 }, { 150, 68 }, { 153, 65 }, { 154, 48 },
1653     { 155, 49 }, { 156, 64 }, { 159, 50 }, { 162, 51 }, { 166, 111 }, { 169, 114 },
1654     { 171, 115 }, { 172, 116 }, { 174, 117 }, { 176, 107 }, { 181, 109 },
1655     { 182, 110 }, { 185, 112 }, { 187, 113 }, { 188, 118 }, { 190, 122 },
1656     { 192, 123 }, { 195, 124 }, { 201, 119 }, { 203, 120 }, { 205, 121 },
1657 };
1658 
1659 static const struct msm_pinctrl_soc_data sm8450_tlmm = {
1660     .pins = sm8450_pins,
1661     .npins = ARRAY_SIZE(sm8450_pins),
1662     .functions = sm8450_functions,
1663     .nfunctions = ARRAY_SIZE(sm8450_functions),
1664     .groups = sm8450_groups,
1665     .ngroups = ARRAY_SIZE(sm8450_groups),
1666     .ngpios = 211,
1667     .wakeirq_map = sm8450_pdc_map,
1668     .nwakeirq_map = ARRAY_SIZE(sm8450_pdc_map),
1669     .egpio_func = 9,
1670 };
1671 
1672 static int sm8450_tlmm_probe(struct platform_device *pdev)
1673 {
1674     return msm_pinctrl_probe(pdev, &sm8450_tlmm);
1675 }
1676 
1677 static const struct of_device_id sm8450_tlmm_of_match[] = {
1678     { .compatible = "qcom,sm8450-tlmm", },
1679     { },
1680 };
1681 
1682 static struct platform_driver sm8450_tlmm_driver = {
1683     .driver = {
1684         .name = "sm8450-tlmm",
1685         .of_match_table = sm8450_tlmm_of_match,
1686     },
1687     .probe = sm8450_tlmm_probe,
1688     .remove = msm_pinctrl_remove,
1689 };
1690 
1691 static int __init sm8450_tlmm_init(void)
1692 {
1693     return platform_driver_register(&sm8450_tlmm_driver);
1694 }
1695 arch_initcall(sm8450_tlmm_init);
1696 
1697 static void __exit sm8450_tlmm_exit(void)
1698 {
1699     platform_driver_unregister(&sm8450_tlmm_driver);
1700 }
1701 module_exit(sm8450_tlmm_exit);
1702 
1703 MODULE_DESCRIPTION("QTI SM8450 TLMM driver");
1704 MODULE_LICENSE("GPL v2");
1705 MODULE_DEVICE_TABLE(of, sm8450_tlmm_of_match);
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