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OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
0004  * Copyright (c) 2020-2021, Linaro Limited
0005  */
0006 
0007 #include <linux/module.h>
0008 #include <linux/of.h>
0009 #include <linux/platform_device.h>
0010 #include <linux/pinctrl/pinctrl.h>
0011 
0012 #include "pinctrl-msm.h"
0013 
0014 #define FUNCTION(fname)                         \
0015     [msm_mux_##fname] = {                       \
0016         .name = #fname,             \
0017         .groups = fname##_groups,               \
0018         .ngroups = ARRAY_SIZE(fname##_groups),  \
0019     }
0020 
0021 #define REG_SIZE 0x1000
0022 
0023 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
0024     {                           \
0025         .name = "gpio" #id,         \
0026         .pins = gpio##id##_pins,        \
0027         .npins = (unsigned int)ARRAY_SIZE(gpio##id##_pins), \
0028         .funcs = (int[]){           \
0029             msm_mux_gpio, /* gpio mode */   \
0030             msm_mux_##f1,           \
0031             msm_mux_##f2,           \
0032             msm_mux_##f3,           \
0033             msm_mux_##f4,           \
0034             msm_mux_##f5,           \
0035             msm_mux_##f6,           \
0036             msm_mux_##f7,           \
0037             msm_mux_##f8,           \
0038             msm_mux_##f9            \
0039         },                      \
0040         .nfuncs = 10,               \
0041         .ctl_reg = REG_SIZE * id,       \
0042         .io_reg = REG_SIZE * id + 0x4,      \
0043         .intr_cfg_reg = REG_SIZE * id + 0x8,    \
0044         .intr_status_reg = REG_SIZE * id + 0xc, \
0045         .intr_target_reg = REG_SIZE * id + 0x8, \
0046         .mux_bit = 2,           \
0047         .pull_bit = 0,          \
0048         .drv_bit = 6,           \
0049         .oe_bit = 9,            \
0050         .in_bit = 0,            \
0051         .out_bit = 1,           \
0052         .intr_enable_bit = 0,       \
0053         .intr_status_bit = 0,       \
0054         .intr_target_bit = 5,       \
0055         .intr_target_kpss_val = 3,  \
0056         .intr_raw_status_bit = 4,   \
0057         .intr_polarity_bit = 1,     \
0058         .intr_detection_bit = 2,    \
0059         .intr_detection_width = 2,  \
0060     }
0061 
0062 #define SDC_PINGROUP(pg_name, ctl, pull, drv)   \
0063     {                           \
0064         .name = #pg_name,           \
0065         .pins = pg_name##_pins,         \
0066         .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins),  \
0067         .ctl_reg = ctl,             \
0068         .io_reg = 0,                \
0069         .intr_cfg_reg = 0,          \
0070         .intr_status_reg = 0,           \
0071         .intr_target_reg = 0,           \
0072         .mux_bit = -1,              \
0073         .pull_bit = pull,           \
0074         .drv_bit = drv,             \
0075         .oe_bit = -1,               \
0076         .in_bit = -1,               \
0077         .out_bit = -1,              \
0078         .intr_enable_bit = -1,          \
0079         .intr_status_bit = -1,          \
0080         .intr_target_bit = -1,          \
0081         .intr_raw_status_bit = -1,      \
0082         .intr_polarity_bit = -1,        \
0083         .intr_detection_bit = -1,       \
0084         .intr_detection_width = -1,     \
0085     }
0086 
0087 #define UFS_RESET(pg_name, offset)              \
0088     {                           \
0089         .name = #pg_name,           \
0090         .pins = pg_name##_pins,         \
0091         .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins),  \
0092         .ctl_reg = offset,          \
0093         .io_reg = offset + 0x4,         \
0094         .intr_cfg_reg = 0,          \
0095         .intr_status_reg = 0,           \
0096         .intr_target_reg = 0,           \
0097         .mux_bit = -1,              \
0098         .pull_bit = 3,              \
0099         .drv_bit = 0,               \
0100         .oe_bit = -1,               \
0101         .in_bit = -1,               \
0102         .out_bit = 0,               \
0103         .intr_enable_bit = -1,          \
0104         .intr_status_bit = -1,          \
0105         .intr_target_bit = -1,          \
0106         .intr_raw_status_bit = -1,      \
0107         .intr_polarity_bit = -1,        \
0108         .intr_detection_bit = -1,       \
0109         .intr_detection_width = -1,     \
0110     }
0111 
0112 static const struct pinctrl_pin_desc sm8350_pins[] = {
0113     PINCTRL_PIN(0, "GPIO_0"),
0114     PINCTRL_PIN(1, "GPIO_1"),
0115     PINCTRL_PIN(2, "GPIO_2"),
0116     PINCTRL_PIN(3, "GPIO_3"),
0117     PINCTRL_PIN(4, "GPIO_4"),
0118     PINCTRL_PIN(5, "GPIO_5"),
0119     PINCTRL_PIN(6, "GPIO_6"),
0120     PINCTRL_PIN(7, "GPIO_7"),
0121     PINCTRL_PIN(8, "GPIO_8"),
0122     PINCTRL_PIN(9, "GPIO_9"),
0123     PINCTRL_PIN(10, "GPIO_10"),
0124     PINCTRL_PIN(11, "GPIO_11"),
0125     PINCTRL_PIN(12, "GPIO_12"),
0126     PINCTRL_PIN(13, "GPIO_13"),
0127     PINCTRL_PIN(14, "GPIO_14"),
0128     PINCTRL_PIN(15, "GPIO_15"),
0129     PINCTRL_PIN(16, "GPIO_16"),
0130     PINCTRL_PIN(17, "GPIO_17"),
0131     PINCTRL_PIN(18, "GPIO_18"),
0132     PINCTRL_PIN(19, "GPIO_19"),
0133     PINCTRL_PIN(20, "GPIO_20"),
0134     PINCTRL_PIN(21, "GPIO_21"),
0135     PINCTRL_PIN(22, "GPIO_22"),
0136     PINCTRL_PIN(23, "GPIO_23"),
0137     PINCTRL_PIN(24, "GPIO_24"),
0138     PINCTRL_PIN(25, "GPIO_25"),
0139     PINCTRL_PIN(26, "GPIO_26"),
0140     PINCTRL_PIN(27, "GPIO_27"),
0141     PINCTRL_PIN(28, "GPIO_28"),
0142     PINCTRL_PIN(29, "GPIO_29"),
0143     PINCTRL_PIN(30, "GPIO_30"),
0144     PINCTRL_PIN(31, "GPIO_31"),
0145     PINCTRL_PIN(32, "GPIO_32"),
0146     PINCTRL_PIN(33, "GPIO_33"),
0147     PINCTRL_PIN(34, "GPIO_34"),
0148     PINCTRL_PIN(35, "GPIO_35"),
0149     PINCTRL_PIN(36, "GPIO_36"),
0150     PINCTRL_PIN(37, "GPIO_37"),
0151     PINCTRL_PIN(38, "GPIO_38"),
0152     PINCTRL_PIN(39, "GPIO_39"),
0153     PINCTRL_PIN(40, "GPIO_40"),
0154     PINCTRL_PIN(41, "GPIO_41"),
0155     PINCTRL_PIN(42, "GPIO_42"),
0156     PINCTRL_PIN(43, "GPIO_43"),
0157     PINCTRL_PIN(44, "GPIO_44"),
0158     PINCTRL_PIN(45, "GPIO_45"),
0159     PINCTRL_PIN(46, "GPIO_46"),
0160     PINCTRL_PIN(47, "GPIO_47"),
0161     PINCTRL_PIN(48, "GPIO_48"),
0162     PINCTRL_PIN(49, "GPIO_49"),
0163     PINCTRL_PIN(50, "GPIO_50"),
0164     PINCTRL_PIN(51, "GPIO_51"),
0165     PINCTRL_PIN(52, "GPIO_52"),
0166     PINCTRL_PIN(53, "GPIO_53"),
0167     PINCTRL_PIN(54, "GPIO_54"),
0168     PINCTRL_PIN(55, "GPIO_55"),
0169     PINCTRL_PIN(56, "GPIO_56"),
0170     PINCTRL_PIN(57, "GPIO_57"),
0171     PINCTRL_PIN(58, "GPIO_58"),
0172     PINCTRL_PIN(59, "GPIO_59"),
0173     PINCTRL_PIN(60, "GPIO_60"),
0174     PINCTRL_PIN(61, "GPIO_61"),
0175     PINCTRL_PIN(62, "GPIO_62"),
0176     PINCTRL_PIN(63, "GPIO_63"),
0177     PINCTRL_PIN(64, "GPIO_64"),
0178     PINCTRL_PIN(65, "GPIO_65"),
0179     PINCTRL_PIN(66, "GPIO_66"),
0180     PINCTRL_PIN(67, "GPIO_67"),
0181     PINCTRL_PIN(68, "GPIO_68"),
0182     PINCTRL_PIN(69, "GPIO_69"),
0183     PINCTRL_PIN(70, "GPIO_70"),
0184     PINCTRL_PIN(71, "GPIO_71"),
0185     PINCTRL_PIN(72, "GPIO_72"),
0186     PINCTRL_PIN(73, "GPIO_73"),
0187     PINCTRL_PIN(74, "GPIO_74"),
0188     PINCTRL_PIN(75, "GPIO_75"),
0189     PINCTRL_PIN(76, "GPIO_76"),
0190     PINCTRL_PIN(77, "GPIO_77"),
0191     PINCTRL_PIN(78, "GPIO_78"),
0192     PINCTRL_PIN(79, "GPIO_79"),
0193     PINCTRL_PIN(80, "GPIO_80"),
0194     PINCTRL_PIN(81, "GPIO_81"),
0195     PINCTRL_PIN(82, "GPIO_82"),
0196     PINCTRL_PIN(83, "GPIO_83"),
0197     PINCTRL_PIN(84, "GPIO_84"),
0198     PINCTRL_PIN(85, "GPIO_85"),
0199     PINCTRL_PIN(86, "GPIO_86"),
0200     PINCTRL_PIN(87, "GPIO_87"),
0201     PINCTRL_PIN(88, "GPIO_88"),
0202     PINCTRL_PIN(89, "GPIO_89"),
0203     PINCTRL_PIN(90, "GPIO_90"),
0204     PINCTRL_PIN(91, "GPIO_91"),
0205     PINCTRL_PIN(92, "GPIO_92"),
0206     PINCTRL_PIN(93, "GPIO_93"),
0207     PINCTRL_PIN(94, "GPIO_94"),
0208     PINCTRL_PIN(95, "GPIO_95"),
0209     PINCTRL_PIN(96, "GPIO_96"),
0210     PINCTRL_PIN(97, "GPIO_97"),
0211     PINCTRL_PIN(98, "GPIO_98"),
0212     PINCTRL_PIN(99, "GPIO_99"),
0213     PINCTRL_PIN(100, "GPIO_100"),
0214     PINCTRL_PIN(101, "GPIO_101"),
0215     PINCTRL_PIN(102, "GPIO_102"),
0216     PINCTRL_PIN(103, "GPIO_103"),
0217     PINCTRL_PIN(104, "GPIO_104"),
0218     PINCTRL_PIN(105, "GPIO_105"),
0219     PINCTRL_PIN(106, "GPIO_106"),
0220     PINCTRL_PIN(107, "GPIO_107"),
0221     PINCTRL_PIN(108, "GPIO_108"),
0222     PINCTRL_PIN(109, "GPIO_109"),
0223     PINCTRL_PIN(110, "GPIO_110"),
0224     PINCTRL_PIN(111, "GPIO_111"),
0225     PINCTRL_PIN(112, "GPIO_112"),
0226     PINCTRL_PIN(113, "GPIO_113"),
0227     PINCTRL_PIN(114, "GPIO_114"),
0228     PINCTRL_PIN(115, "GPIO_115"),
0229     PINCTRL_PIN(116, "GPIO_116"),
0230     PINCTRL_PIN(117, "GPIO_117"),
0231     PINCTRL_PIN(118, "GPIO_118"),
0232     PINCTRL_PIN(119, "GPIO_119"),
0233     PINCTRL_PIN(120, "GPIO_120"),
0234     PINCTRL_PIN(121, "GPIO_121"),
0235     PINCTRL_PIN(122, "GPIO_122"),
0236     PINCTRL_PIN(123, "GPIO_123"),
0237     PINCTRL_PIN(124, "GPIO_124"),
0238     PINCTRL_PIN(125, "GPIO_125"),
0239     PINCTRL_PIN(126, "GPIO_126"),
0240     PINCTRL_PIN(127, "GPIO_127"),
0241     PINCTRL_PIN(128, "GPIO_128"),
0242     PINCTRL_PIN(129, "GPIO_129"),
0243     PINCTRL_PIN(130, "GPIO_130"),
0244     PINCTRL_PIN(131, "GPIO_131"),
0245     PINCTRL_PIN(132, "GPIO_132"),
0246     PINCTRL_PIN(133, "GPIO_133"),
0247     PINCTRL_PIN(134, "GPIO_134"),
0248     PINCTRL_PIN(135, "GPIO_135"),
0249     PINCTRL_PIN(136, "GPIO_136"),
0250     PINCTRL_PIN(137, "GPIO_137"),
0251     PINCTRL_PIN(138, "GPIO_138"),
0252     PINCTRL_PIN(139, "GPIO_139"),
0253     PINCTRL_PIN(140, "GPIO_140"),
0254     PINCTRL_PIN(141, "GPIO_141"),
0255     PINCTRL_PIN(142, "GPIO_142"),
0256     PINCTRL_PIN(143, "GPIO_143"),
0257     PINCTRL_PIN(144, "GPIO_144"),
0258     PINCTRL_PIN(145, "GPIO_145"),
0259     PINCTRL_PIN(146, "GPIO_146"),
0260     PINCTRL_PIN(147, "GPIO_147"),
0261     PINCTRL_PIN(148, "GPIO_148"),
0262     PINCTRL_PIN(149, "GPIO_149"),
0263     PINCTRL_PIN(150, "GPIO_150"),
0264     PINCTRL_PIN(151, "GPIO_151"),
0265     PINCTRL_PIN(152, "GPIO_152"),
0266     PINCTRL_PIN(153, "GPIO_153"),
0267     PINCTRL_PIN(154, "GPIO_154"),
0268     PINCTRL_PIN(155, "GPIO_155"),
0269     PINCTRL_PIN(156, "GPIO_156"),
0270     PINCTRL_PIN(157, "GPIO_157"),
0271     PINCTRL_PIN(158, "GPIO_158"),
0272     PINCTRL_PIN(159, "GPIO_159"),
0273     PINCTRL_PIN(160, "GPIO_160"),
0274     PINCTRL_PIN(161, "GPIO_161"),
0275     PINCTRL_PIN(162, "GPIO_162"),
0276     PINCTRL_PIN(163, "GPIO_163"),
0277     PINCTRL_PIN(164, "GPIO_164"),
0278     PINCTRL_PIN(165, "GPIO_165"),
0279     PINCTRL_PIN(166, "GPIO_166"),
0280     PINCTRL_PIN(167, "GPIO_167"),
0281     PINCTRL_PIN(168, "GPIO_168"),
0282     PINCTRL_PIN(169, "GPIO_169"),
0283     PINCTRL_PIN(170, "GPIO_170"),
0284     PINCTRL_PIN(171, "GPIO_171"),
0285     PINCTRL_PIN(172, "GPIO_172"),
0286     PINCTRL_PIN(173, "GPIO_173"),
0287     PINCTRL_PIN(174, "GPIO_174"),
0288     PINCTRL_PIN(175, "GPIO_175"),
0289     PINCTRL_PIN(176, "GPIO_176"),
0290     PINCTRL_PIN(177, "GPIO_177"),
0291     PINCTRL_PIN(178, "GPIO_178"),
0292     PINCTRL_PIN(179, "GPIO_179"),
0293     PINCTRL_PIN(180, "GPIO_180"),
0294     PINCTRL_PIN(181, "GPIO_181"),
0295     PINCTRL_PIN(182, "GPIO_182"),
0296     PINCTRL_PIN(183, "GPIO_183"),
0297     PINCTRL_PIN(184, "GPIO_184"),
0298     PINCTRL_PIN(185, "GPIO_185"),
0299     PINCTRL_PIN(186, "GPIO_186"),
0300     PINCTRL_PIN(187, "GPIO_187"),
0301     PINCTRL_PIN(188, "GPIO_188"),
0302     PINCTRL_PIN(189, "GPIO_189"),
0303     PINCTRL_PIN(190, "GPIO_190"),
0304     PINCTRL_PIN(191, "GPIO_191"),
0305     PINCTRL_PIN(192, "GPIO_192"),
0306     PINCTRL_PIN(193, "GPIO_193"),
0307     PINCTRL_PIN(194, "GPIO_194"),
0308     PINCTRL_PIN(195, "GPIO_195"),
0309     PINCTRL_PIN(196, "GPIO_196"),
0310     PINCTRL_PIN(197, "GPIO_197"),
0311     PINCTRL_PIN(198, "GPIO_198"),
0312     PINCTRL_PIN(199, "GPIO_199"),
0313     PINCTRL_PIN(200, "GPIO_200"),
0314     PINCTRL_PIN(201, "GPIO_201"),
0315     PINCTRL_PIN(202, "GPIO_202"),
0316     PINCTRL_PIN(203, "UFS_RESET"),
0317     PINCTRL_PIN(204, "SDC2_CLK"),
0318     PINCTRL_PIN(205, "SDC2_CMD"),
0319     PINCTRL_PIN(206, "SDC2_DATA"),
0320 };
0321 
0322 #define DECLARE_MSM_GPIO_PINS(pin) \
0323     static const unsigned int gpio##pin##_pins[] = { pin }
0324 DECLARE_MSM_GPIO_PINS(0);
0325 DECLARE_MSM_GPIO_PINS(1);
0326 DECLARE_MSM_GPIO_PINS(2);
0327 DECLARE_MSM_GPIO_PINS(3);
0328 DECLARE_MSM_GPIO_PINS(4);
0329 DECLARE_MSM_GPIO_PINS(5);
0330 DECLARE_MSM_GPIO_PINS(6);
0331 DECLARE_MSM_GPIO_PINS(7);
0332 DECLARE_MSM_GPIO_PINS(8);
0333 DECLARE_MSM_GPIO_PINS(9);
0334 DECLARE_MSM_GPIO_PINS(10);
0335 DECLARE_MSM_GPIO_PINS(11);
0336 DECLARE_MSM_GPIO_PINS(12);
0337 DECLARE_MSM_GPIO_PINS(13);
0338 DECLARE_MSM_GPIO_PINS(14);
0339 DECLARE_MSM_GPIO_PINS(15);
0340 DECLARE_MSM_GPIO_PINS(16);
0341 DECLARE_MSM_GPIO_PINS(17);
0342 DECLARE_MSM_GPIO_PINS(18);
0343 DECLARE_MSM_GPIO_PINS(19);
0344 DECLARE_MSM_GPIO_PINS(20);
0345 DECLARE_MSM_GPIO_PINS(21);
0346 DECLARE_MSM_GPIO_PINS(22);
0347 DECLARE_MSM_GPIO_PINS(23);
0348 DECLARE_MSM_GPIO_PINS(24);
0349 DECLARE_MSM_GPIO_PINS(25);
0350 DECLARE_MSM_GPIO_PINS(26);
0351 DECLARE_MSM_GPIO_PINS(27);
0352 DECLARE_MSM_GPIO_PINS(28);
0353 DECLARE_MSM_GPIO_PINS(29);
0354 DECLARE_MSM_GPIO_PINS(30);
0355 DECLARE_MSM_GPIO_PINS(31);
0356 DECLARE_MSM_GPIO_PINS(32);
0357 DECLARE_MSM_GPIO_PINS(33);
0358 DECLARE_MSM_GPIO_PINS(34);
0359 DECLARE_MSM_GPIO_PINS(35);
0360 DECLARE_MSM_GPIO_PINS(36);
0361 DECLARE_MSM_GPIO_PINS(37);
0362 DECLARE_MSM_GPIO_PINS(38);
0363 DECLARE_MSM_GPIO_PINS(39);
0364 DECLARE_MSM_GPIO_PINS(40);
0365 DECLARE_MSM_GPIO_PINS(41);
0366 DECLARE_MSM_GPIO_PINS(42);
0367 DECLARE_MSM_GPIO_PINS(43);
0368 DECLARE_MSM_GPIO_PINS(44);
0369 DECLARE_MSM_GPIO_PINS(45);
0370 DECLARE_MSM_GPIO_PINS(46);
0371 DECLARE_MSM_GPIO_PINS(47);
0372 DECLARE_MSM_GPIO_PINS(48);
0373 DECLARE_MSM_GPIO_PINS(49);
0374 DECLARE_MSM_GPIO_PINS(50);
0375 DECLARE_MSM_GPIO_PINS(51);
0376 DECLARE_MSM_GPIO_PINS(52);
0377 DECLARE_MSM_GPIO_PINS(53);
0378 DECLARE_MSM_GPIO_PINS(54);
0379 DECLARE_MSM_GPIO_PINS(55);
0380 DECLARE_MSM_GPIO_PINS(56);
0381 DECLARE_MSM_GPIO_PINS(57);
0382 DECLARE_MSM_GPIO_PINS(58);
0383 DECLARE_MSM_GPIO_PINS(59);
0384 DECLARE_MSM_GPIO_PINS(60);
0385 DECLARE_MSM_GPIO_PINS(61);
0386 DECLARE_MSM_GPIO_PINS(62);
0387 DECLARE_MSM_GPIO_PINS(63);
0388 DECLARE_MSM_GPIO_PINS(64);
0389 DECLARE_MSM_GPIO_PINS(65);
0390 DECLARE_MSM_GPIO_PINS(66);
0391 DECLARE_MSM_GPIO_PINS(67);
0392 DECLARE_MSM_GPIO_PINS(68);
0393 DECLARE_MSM_GPIO_PINS(69);
0394 DECLARE_MSM_GPIO_PINS(70);
0395 DECLARE_MSM_GPIO_PINS(71);
0396 DECLARE_MSM_GPIO_PINS(72);
0397 DECLARE_MSM_GPIO_PINS(73);
0398 DECLARE_MSM_GPIO_PINS(74);
0399 DECLARE_MSM_GPIO_PINS(75);
0400 DECLARE_MSM_GPIO_PINS(76);
0401 DECLARE_MSM_GPIO_PINS(77);
0402 DECLARE_MSM_GPIO_PINS(78);
0403 DECLARE_MSM_GPIO_PINS(79);
0404 DECLARE_MSM_GPIO_PINS(80);
0405 DECLARE_MSM_GPIO_PINS(81);
0406 DECLARE_MSM_GPIO_PINS(82);
0407 DECLARE_MSM_GPIO_PINS(83);
0408 DECLARE_MSM_GPIO_PINS(84);
0409 DECLARE_MSM_GPIO_PINS(85);
0410 DECLARE_MSM_GPIO_PINS(86);
0411 DECLARE_MSM_GPIO_PINS(87);
0412 DECLARE_MSM_GPIO_PINS(88);
0413 DECLARE_MSM_GPIO_PINS(89);
0414 DECLARE_MSM_GPIO_PINS(90);
0415 DECLARE_MSM_GPIO_PINS(91);
0416 DECLARE_MSM_GPIO_PINS(92);
0417 DECLARE_MSM_GPIO_PINS(93);
0418 DECLARE_MSM_GPIO_PINS(94);
0419 DECLARE_MSM_GPIO_PINS(95);
0420 DECLARE_MSM_GPIO_PINS(96);
0421 DECLARE_MSM_GPIO_PINS(97);
0422 DECLARE_MSM_GPIO_PINS(98);
0423 DECLARE_MSM_GPIO_PINS(99);
0424 DECLARE_MSM_GPIO_PINS(100);
0425 DECLARE_MSM_GPIO_PINS(101);
0426 DECLARE_MSM_GPIO_PINS(102);
0427 DECLARE_MSM_GPIO_PINS(103);
0428 DECLARE_MSM_GPIO_PINS(104);
0429 DECLARE_MSM_GPIO_PINS(105);
0430 DECLARE_MSM_GPIO_PINS(106);
0431 DECLARE_MSM_GPIO_PINS(107);
0432 DECLARE_MSM_GPIO_PINS(108);
0433 DECLARE_MSM_GPIO_PINS(109);
0434 DECLARE_MSM_GPIO_PINS(110);
0435 DECLARE_MSM_GPIO_PINS(111);
0436 DECLARE_MSM_GPIO_PINS(112);
0437 DECLARE_MSM_GPIO_PINS(113);
0438 DECLARE_MSM_GPIO_PINS(114);
0439 DECLARE_MSM_GPIO_PINS(115);
0440 DECLARE_MSM_GPIO_PINS(116);
0441 DECLARE_MSM_GPIO_PINS(117);
0442 DECLARE_MSM_GPIO_PINS(118);
0443 DECLARE_MSM_GPIO_PINS(119);
0444 DECLARE_MSM_GPIO_PINS(120);
0445 DECLARE_MSM_GPIO_PINS(121);
0446 DECLARE_MSM_GPIO_PINS(122);
0447 DECLARE_MSM_GPIO_PINS(123);
0448 DECLARE_MSM_GPIO_PINS(124);
0449 DECLARE_MSM_GPIO_PINS(125);
0450 DECLARE_MSM_GPIO_PINS(126);
0451 DECLARE_MSM_GPIO_PINS(127);
0452 DECLARE_MSM_GPIO_PINS(128);
0453 DECLARE_MSM_GPIO_PINS(129);
0454 DECLARE_MSM_GPIO_PINS(130);
0455 DECLARE_MSM_GPIO_PINS(131);
0456 DECLARE_MSM_GPIO_PINS(132);
0457 DECLARE_MSM_GPIO_PINS(133);
0458 DECLARE_MSM_GPIO_PINS(134);
0459 DECLARE_MSM_GPIO_PINS(135);
0460 DECLARE_MSM_GPIO_PINS(136);
0461 DECLARE_MSM_GPIO_PINS(137);
0462 DECLARE_MSM_GPIO_PINS(138);
0463 DECLARE_MSM_GPIO_PINS(139);
0464 DECLARE_MSM_GPIO_PINS(140);
0465 DECLARE_MSM_GPIO_PINS(141);
0466 DECLARE_MSM_GPIO_PINS(142);
0467 DECLARE_MSM_GPIO_PINS(143);
0468 DECLARE_MSM_GPIO_PINS(144);
0469 DECLARE_MSM_GPIO_PINS(145);
0470 DECLARE_MSM_GPIO_PINS(146);
0471 DECLARE_MSM_GPIO_PINS(147);
0472 DECLARE_MSM_GPIO_PINS(148);
0473 DECLARE_MSM_GPIO_PINS(149);
0474 DECLARE_MSM_GPIO_PINS(150);
0475 DECLARE_MSM_GPIO_PINS(151);
0476 DECLARE_MSM_GPIO_PINS(152);
0477 DECLARE_MSM_GPIO_PINS(153);
0478 DECLARE_MSM_GPIO_PINS(154);
0479 DECLARE_MSM_GPIO_PINS(155);
0480 DECLARE_MSM_GPIO_PINS(156);
0481 DECLARE_MSM_GPIO_PINS(157);
0482 DECLARE_MSM_GPIO_PINS(158);
0483 DECLARE_MSM_GPIO_PINS(159);
0484 DECLARE_MSM_GPIO_PINS(160);
0485 DECLARE_MSM_GPIO_PINS(161);
0486 DECLARE_MSM_GPIO_PINS(162);
0487 DECLARE_MSM_GPIO_PINS(163);
0488 DECLARE_MSM_GPIO_PINS(164);
0489 DECLARE_MSM_GPIO_PINS(165);
0490 DECLARE_MSM_GPIO_PINS(166);
0491 DECLARE_MSM_GPIO_PINS(167);
0492 DECLARE_MSM_GPIO_PINS(168);
0493 DECLARE_MSM_GPIO_PINS(169);
0494 DECLARE_MSM_GPIO_PINS(170);
0495 DECLARE_MSM_GPIO_PINS(171);
0496 DECLARE_MSM_GPIO_PINS(172);
0497 DECLARE_MSM_GPIO_PINS(173);
0498 DECLARE_MSM_GPIO_PINS(174);
0499 DECLARE_MSM_GPIO_PINS(175);
0500 DECLARE_MSM_GPIO_PINS(176);
0501 DECLARE_MSM_GPIO_PINS(177);
0502 DECLARE_MSM_GPIO_PINS(178);
0503 DECLARE_MSM_GPIO_PINS(179);
0504 DECLARE_MSM_GPIO_PINS(180);
0505 DECLARE_MSM_GPIO_PINS(181);
0506 DECLARE_MSM_GPIO_PINS(182);
0507 DECLARE_MSM_GPIO_PINS(183);
0508 DECLARE_MSM_GPIO_PINS(184);
0509 DECLARE_MSM_GPIO_PINS(185);
0510 DECLARE_MSM_GPIO_PINS(186);
0511 DECLARE_MSM_GPIO_PINS(187);
0512 DECLARE_MSM_GPIO_PINS(188);
0513 DECLARE_MSM_GPIO_PINS(189);
0514 DECLARE_MSM_GPIO_PINS(190);
0515 DECLARE_MSM_GPIO_PINS(191);
0516 DECLARE_MSM_GPIO_PINS(192);
0517 DECLARE_MSM_GPIO_PINS(193);
0518 DECLARE_MSM_GPIO_PINS(194);
0519 DECLARE_MSM_GPIO_PINS(195);
0520 DECLARE_MSM_GPIO_PINS(196);
0521 DECLARE_MSM_GPIO_PINS(197);
0522 DECLARE_MSM_GPIO_PINS(198);
0523 DECLARE_MSM_GPIO_PINS(199);
0524 DECLARE_MSM_GPIO_PINS(200);
0525 DECLARE_MSM_GPIO_PINS(201);
0526 DECLARE_MSM_GPIO_PINS(202);
0527 
0528 static const unsigned int ufs_reset_pins[] = { 203 };
0529 static const unsigned int sdc2_clk_pins[] = { 204 };
0530 static const unsigned int sdc2_cmd_pins[] = { 205 };
0531 static const unsigned int sdc2_data_pins[] = { 206 };
0532 
0533 enum sm8350_functions {
0534     msm_mux_atest_char,
0535     msm_mux_atest_usb,
0536     msm_mux_audio_ref,
0537     msm_mux_cam_mclk,
0538     msm_mux_cci_async,
0539     msm_mux_cci_i2c,
0540     msm_mux_cci_timer,
0541     msm_mux_cmu_rng,
0542     msm_mux_coex_uart1,
0543     msm_mux_coex_uart2,
0544     msm_mux_cri_trng,
0545     msm_mux_cri_trng0,
0546     msm_mux_cri_trng1,
0547     msm_mux_dbg_out,
0548     msm_mux_ddr_bist,
0549     msm_mux_ddr_pxi0,
0550     msm_mux_ddr_pxi1,
0551     msm_mux_ddr_pxi2,
0552     msm_mux_ddr_pxi3,
0553     msm_mux_dp_hot,
0554     msm_mux_dp_lcd,
0555     msm_mux_gcc_gp1,
0556     msm_mux_gcc_gp2,
0557     msm_mux_gcc_gp3,
0558     msm_mux_gpio,
0559     msm_mux_ibi_i3c,
0560     msm_mux_jitter_bist,
0561     msm_mux_lpass_slimbus,
0562     msm_mux_mdp_vsync,
0563     msm_mux_mdp_vsync0,
0564     msm_mux_mdp_vsync1,
0565     msm_mux_mdp_vsync2,
0566     msm_mux_mdp_vsync3,
0567     msm_mux_mi2s0_data0,
0568     msm_mux_mi2s0_data1,
0569     msm_mux_mi2s0_sck,
0570     msm_mux_mi2s0_ws,
0571     msm_mux_mi2s1_data0,
0572     msm_mux_mi2s1_data1,
0573     msm_mux_mi2s1_sck,
0574     msm_mux_mi2s1_ws,
0575     msm_mux_mi2s2_data0,
0576     msm_mux_mi2s2_data1,
0577     msm_mux_mi2s2_sck,
0578     msm_mux_mi2s2_ws,
0579     msm_mux_mss_grfc0,
0580     msm_mux_mss_grfc1,
0581     msm_mux_mss_grfc10,
0582     msm_mux_mss_grfc11,
0583     msm_mux_mss_grfc12,
0584     msm_mux_mss_grfc2,
0585     msm_mux_mss_grfc3,
0586     msm_mux_mss_grfc4,
0587     msm_mux_mss_grfc5,
0588     msm_mux_mss_grfc6,
0589     msm_mux_mss_grfc7,
0590     msm_mux_mss_grfc8,
0591     msm_mux_mss_grfc9,
0592     msm_mux_nav_gpio,
0593     msm_mux_pa_indicator,
0594     msm_mux_pcie0_clkreqn,
0595     msm_mux_pcie1_clkreqn,
0596     msm_mux_phase_flag,
0597     msm_mux_pll_bist,
0598     msm_mux_pll_clk,
0599     msm_mux_pri_mi2s,
0600     msm_mux_prng_rosc,
0601     msm_mux_qdss_cti,
0602     msm_mux_qdss_gpio,
0603     msm_mux_qlink0_enable,
0604     msm_mux_qlink0_request,
0605     msm_mux_qlink0_wmss,
0606     msm_mux_qlink1_enable,
0607     msm_mux_qlink1_request,
0608     msm_mux_qlink1_wmss,
0609     msm_mux_qlink2_enable,
0610     msm_mux_qlink2_request,
0611     msm_mux_qlink2_wmss,
0612     msm_mux_qspi0,
0613     msm_mux_qspi1,
0614     msm_mux_qspi2,
0615     msm_mux_qspi3,
0616     msm_mux_qspi_clk,
0617     msm_mux_qspi_cs,
0618     msm_mux_qup0,
0619     msm_mux_qup1,
0620     msm_mux_qup10,
0621     msm_mux_qup11,
0622     msm_mux_qup12,
0623     msm_mux_qup13,
0624     msm_mux_qup14,
0625     msm_mux_qup15,
0626     msm_mux_qup16,
0627     msm_mux_qup17,
0628     msm_mux_qup18,
0629     msm_mux_qup19,
0630     msm_mux_qup2,
0631     msm_mux_qup3,
0632     msm_mux_qup4,
0633     msm_mux_qup5,
0634     msm_mux_qup6,
0635     msm_mux_qup7,
0636     msm_mux_qup8,
0637     msm_mux_qup9,
0638     msm_mux_qup_l4,
0639     msm_mux_qup_l5,
0640     msm_mux_qup_l6,
0641     msm_mux_sd_write,
0642     msm_mux_sdc40,
0643     msm_mux_sdc41,
0644     msm_mux_sdc42,
0645     msm_mux_sdc43,
0646     msm_mux_sdc4_clk,
0647     msm_mux_sdc4_cmd,
0648     msm_mux_sec_mi2s,
0649     msm_mux_tb_trig,
0650     msm_mux_tgu_ch0,
0651     msm_mux_tgu_ch1,
0652     msm_mux_tgu_ch2,
0653     msm_mux_tgu_ch3,
0654     msm_mux_tsense_pwm1,
0655     msm_mux_tsense_pwm2,
0656     msm_mux_uim0_clk,
0657     msm_mux_uim0_data,
0658     msm_mux_uim0_present,
0659     msm_mux_uim0_reset,
0660     msm_mux_uim1_clk,
0661     msm_mux_uim1_data,
0662     msm_mux_uim1_present,
0663     msm_mux_uim1_reset,
0664     msm_mux_usb2phy_ac,
0665     msm_mux_usb_phy,
0666     msm_mux_vfr_0,
0667     msm_mux_vfr_1,
0668     msm_mux_vsense_trigger,
0669     msm_mux__,
0670 };
0671 
0672 static const char * const gpio_groups[] = {
0673     "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
0674     "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
0675     "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
0676     "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
0677     "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
0678     "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
0679     "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
0680     "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
0681     "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
0682     "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
0683     "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
0684     "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
0685     "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
0686     "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
0687     "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
0688     "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
0689     "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
0690     "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122",
0691     "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", "gpio128",
0692     "gpio129", "gpio130", "gpio131", "gpio132", "gpio133", "gpio134",
0693     "gpio135", "gpio136", "gpio137", "gpio138", "gpio139", "gpio140",
0694     "gpio141", "gpio142", "gpio143", "gpio144", "gpio145", "gpio146",
0695     "gpio147", "gpio148", "gpio149", "gpio150", "gpio151", "gpio152",
0696     "gpio153", "gpio154", "gpio155", "gpio156", "gpio157", "gpio158",
0697     "gpio159", "gpio160", "gpio161", "gpio162", "gpio163", "gpio164",
0698     "gpio165", "gpio166", "gpio167", "gpio168", "gpio169", "gpio170",
0699     "gpio171", "gpio172", "gpio173", "gpio174", "gpio175", "gpio176",
0700     "gpio177", "gpio178", "gpio179", "gpio180", "gpio181", "gpio182",
0701     "gpio183", "gpio184", "gpio185", "gpio186", "gpio187", "gpio188",
0702     "gpio189", "gpio190", "gpio191", "gpio192", "gpio193", "gpio194",
0703     "gpio195", "gpio196", "gpio197", "gpio198", "gpio199", "gpio200",
0704     "gpio201", "gpio202",
0705 };
0706 
0707 static const char * const atest_char_groups[] = {
0708     "gpio85", "gpio86", "gpio87", "gpio115", "gpio117",
0709 };
0710 
0711 static const char * const atest_usb_groups[] = {
0712     "gpio55", "gpio80", "gpio81", "gpio151", "gpio152",
0713     "gpio153", "gpio154", "gpio158", "gpio159", "gpio161",
0714 };
0715 
0716 static const char * const audio_ref_groups[] = {
0717     "gpio124",
0718 };
0719 
0720 static const char * const cam_mclk_groups[] = {
0721     "gpio100", "gpio101", "gpio102", "gpio103", "gpio104", "gpio105",
0722 };
0723 
0724 static const char * const cci_async_groups[] = {
0725     "gpio106", "gpio118", "gpio119",
0726 };
0727 
0728 static const char * const cci_i2c_groups[] = {
0729     "gpio107", "gpio108", "gpio109", "gpio110", "gpio111", "gpio112",
0730     "gpio113", "gpio114",
0731 };
0732 
0733 static const char * const cci_timer_groups[] = {
0734     "gpio115", "gpio116", "gpio117", "gpio118", "gpio119",
0735 };
0736 
0737 static const char * const cmu_rng_groups[] = {
0738     "gpio174", "gpio175", "gpio176", "gpio177",
0739 };
0740 
0741 static const char * const coex_uart1_groups[] = {
0742     "gpio151", "gpio152",
0743 };
0744 
0745 static const char * const coex_uart2_groups[] = {
0746     "gpio153", "gpio154",
0747 };
0748 
0749 static const char * const cri_trng_groups[] = {
0750     "gpio186",
0751 };
0752 
0753 static const char * const cri_trng0_groups[] = {
0754     "gpio183",
0755 };
0756 
0757 static const char * const cri_trng1_groups[] = {
0758     "gpio184",
0759 };
0760 
0761 static const char * const dbg_out_groups[] = {
0762     "gpio14",
0763 };
0764 
0765 static const char * const ddr_bist_groups[] = {
0766     "gpio36", "gpio37", "gpio40", "gpio41",
0767 };
0768 
0769 static const char * const ddr_pxi0_groups[] = {
0770     "gpio51", "gpio52",
0771 };
0772 
0773 static const char * const ddr_pxi1_groups[] = {
0774     "gpio48", "gpio49",
0775 };
0776 
0777 static const char * const ddr_pxi2_groups[] = {
0778     "gpio45", "gpio47",
0779 };
0780 
0781 static const char * const ddr_pxi3_groups[] = {
0782     "gpio43", "gpio44",
0783 };
0784 
0785 static const char * const dp_hot_groups[] = {
0786     "gpio87",
0787 };
0788 
0789 static const char * const dp_lcd_groups[] = {
0790     "gpio83",
0791 };
0792 
0793 static const char * const gcc_gp1_groups[] = {
0794     "gpio115", "gpio129",
0795 };
0796 
0797 static const char * const gcc_gp2_groups[] = {
0798     "gpio116", "gpio130",
0799 };
0800 
0801 static const char * const gcc_gp3_groups[] = {
0802     "gpio117", "gpio131",
0803 };
0804 
0805 static const char * const ibi_i3c_groups[] = {
0806     "gpio36", "gpio37", "gpio56", "gpio57", "gpio60", "gpio61",
0807 };
0808 
0809 static const char * const jitter_bist_groups[] = {
0810     "gpio80",
0811 };
0812 
0813 static const char * const lpass_slimbus_groups[] = {
0814     "gpio129", "gpio130",
0815 };
0816 
0817 static const char * const mdp_vsync_groups[] = {
0818     "gpio15", "gpio26", "gpio82", "gpio83", "gpio84",
0819 };
0820 
0821 static const char * const mdp_vsync0_groups[] = {
0822     "gpio86",
0823 };
0824 
0825 static const char * const mdp_vsync1_groups[] = {
0826     "gpio86",
0827 };
0828 
0829 static const char * const mdp_vsync2_groups[] = {
0830     "gpio87",
0831 };
0832 
0833 static const char * const mdp_vsync3_groups[] = {
0834     "gpio87",
0835 };
0836 
0837 static const char * const mi2s0_data0_groups[] = {
0838     "gpio126",
0839 };
0840 
0841 static const char * const mi2s0_data1_groups[] = {
0842     "gpio127",
0843 };
0844 
0845 static const char * const mi2s0_sck_groups[] = {
0846     "gpio125",
0847 };
0848 
0849 static const char * const mi2s0_ws_groups[] = {
0850     "gpio128",
0851 };
0852 
0853 static const char * const mi2s1_data0_groups[] = {
0854     "gpio130",
0855 };
0856 
0857 static const char * const mi2s1_data1_groups[] = {
0858     "gpio131",
0859 };
0860 
0861 static const char * const mi2s1_sck_groups[] = {
0862     "gpio129",
0863 };
0864 
0865 static const char * const mi2s1_ws_groups[] = {
0866     "gpio132",
0867 };
0868 
0869 static const char * const mi2s2_data0_groups[] = {
0870     "gpio121",
0871 };
0872 
0873 static const char * const mi2s2_data1_groups[] = {
0874     "gpio124",
0875 };
0876 
0877 static const char * const mi2s2_sck_groups[] = {
0878     "gpio120",
0879 };
0880 
0881 static const char * const mi2s2_ws_groups[] = {
0882     "gpio122",
0883 };
0884 
0885 static const char * const mss_grfc0_groups[] = {
0886     "gpio141", "gpio158",
0887 };
0888 
0889 static const char * const mss_grfc1_groups[] = {
0890     "gpio142",
0891 };
0892 
0893 static const char * const mss_grfc10_groups[] = {
0894     "gpio153",
0895 };
0896 
0897 static const char * const mss_grfc11_groups[] = {
0898     "gpio154",
0899 };
0900 
0901 static const char * const mss_grfc12_groups[] = {
0902     "gpio157",
0903 };
0904 
0905 static const char * const mss_grfc2_groups[] = {
0906     "gpio143",
0907 };
0908 
0909 static const char * const mss_grfc3_groups[] = {
0910     "gpio144",
0911 };
0912 
0913 static const char * const mss_grfc4_groups[] = {
0914     "gpio145",
0915 };
0916 
0917 static const char * const mss_grfc5_groups[] = {
0918     "gpio146",
0919 };
0920 
0921 static const char * const mss_grfc6_groups[] = {
0922     "gpio147",
0923 };
0924 
0925 static const char * const mss_grfc7_groups[] = {
0926     "gpio148",
0927 };
0928 
0929 static const char * const mss_grfc8_groups[] = {
0930     "gpio149",
0931 };
0932 
0933 static const char * const mss_grfc9_groups[] = {
0934     "gpio150",
0935 };
0936 
0937 static const char * const nav_gpio_groups[] = {
0938     "gpio155", "gpio156", "gpio157",
0939 };
0940 
0941 static const char * const pa_indicator_groups[] = {
0942     "gpio157",
0943 };
0944 
0945 static const char * const pcie0_clkreqn_groups[] = {
0946     "gpio95",
0947 };
0948 
0949 static const char * const pcie1_clkreqn_groups[] = {
0950     "gpio98",
0951 };
0952 
0953 static const char * const phase_flag_groups[] = {
0954     "gpio12", "gpio13", "gpio16", "gpio17", "gpio28", "gpio29", "gpio30",
0955     "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", "gpio72", "gpio73",
0956     "gpio74", "gpio75", "gpio76", "gpio77", "gpio78", "gpio79", "gpio103",
0957     "gpio104", "gpio105", "gpio106", "gpio107", "gpio108", "gpio109",
0958     "gpio110", "gpio111", "gpio112", "gpio113", "gpio114",
0959 };
0960 
0961 static const char * const pll_bist_groups[] = {
0962     "gpio81",
0963 };
0964 
0965 static const char * const pll_clk_groups[] = {
0966     "gpio81",
0967 };
0968 
0969 static const char * const pri_mi2s_groups[] = {
0970     "gpio123",
0971 };
0972 
0973 static const char * const prng_rosc_groups[] = {
0974     "gpio185",
0975 };
0976 
0977 static const char * const qdss_cti_groups[] = {
0978     "gpio14", "gpio27", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91", "gpio92",
0979 };
0980 
0981 static const char * const qdss_gpio_groups[] = {
0982     "gpio100", "gpio101", "gpio102", "gpio103", "gpio104", "gpio105", "gpio106", "gpio107",
0983     "gpio108", "gpio109", "gpio110", "gpio111", "gpio112", "gpio113", "gpio114", "gpio115",
0984     "gpio116", "gpio117", "gpio183", "gpio184", "gpio185", "gpio186", "gpio187", "gpio188",
0985     "gpio189", "gpio190", "gpio191", "gpio192", "gpio193", "gpio194", "gpio195", "gpio196",
0986     "gpio197", "gpio198", "gpio199", "gpio200",
0987 };
0988 
0989 static const char * const qlink0_enable_groups[] = {
0990     "gpio160",
0991 };
0992 
0993 static const char * const qlink0_request_groups[] = {
0994     "gpio159",
0995 };
0996 
0997 static const char * const qlink0_wmss_groups[] = {
0998     "gpio161",
0999 };
1000 
1001 static const char * const qlink1_enable_groups[] = {
1002     "gpio163",
1003 };
1004 
1005 static const char * const qlink1_request_groups[] = {
1006     "gpio162",
1007 };
1008 
1009 static const char * const qlink1_wmss_groups[] = {
1010     "gpio164",
1011 };
1012 
1013 static const char * const qlink2_enable_groups[] = {
1014     "gpio166",
1015 };
1016 
1017 static const char * const qlink2_request_groups[] = {
1018     "gpio165",
1019 };
1020 
1021 static const char * const qlink2_wmss_groups[] = {
1022     "gpio167",
1023 };
1024 
1025 static const char * const qspi0_groups[] = {
1026     "gpio44",
1027 };
1028 
1029 static const char * const qspi1_groups[] = {
1030     "gpio45",
1031 };
1032 
1033 static const char * const qspi2_groups[] = {
1034     "gpio48",
1035 };
1036 
1037 static const char * const qspi3_groups[] = {
1038     "gpio49",
1039 };
1040 
1041 static const char * const qspi_clk_groups[] = {
1042     "gpio50",
1043 };
1044 
1045 static const char * const qspi_cs_groups[] = {
1046     "gpio47", "gpio51",
1047 };
1048 
1049 static const char * const qup0_groups[] = {
1050     "gpio4", "gpio5", "gpio6", "gpio7",
1051 };
1052 
1053 static const char * const qup1_groups[] = {
1054     "gpio8", "gpio9", "gpio10", "gpio11",
1055 };
1056 
1057 static const char * const qup10_groups[] = {
1058     "gpio44", "gpio45", "gpio46", "gpio47",
1059 };
1060 
1061 static const char * const qup11_groups[] = {
1062     "gpio48", "gpio49", "gpio50", "gpio51",
1063 };
1064 
1065 static const char * const qup12_groups[] = {
1066     "gpio52", "gpio53", "gpio54", "gpio55",
1067 };
1068 
1069 static const char * const qup13_groups[] = {
1070     "gpio0", "gpio1", "gpio2", "gpio3",
1071 };
1072 
1073 static const char * const qup14_groups[] = {
1074     "gpio56", "gpio57", "gpio58", "gpio59",
1075 };
1076 
1077 static const char * const qup15_groups[] = {
1078     "gpio60", "gpio61", "gpio62", "gpio63",
1079 };
1080 
1081 static const char * const qup16_groups[] = {
1082     "gpio64", "gpio65", "gpio66", "gpio67",
1083 };
1084 
1085 static const char * const qup17_groups[] = {
1086     "gpio72", "gpio73", "gpio74", "gpio75",
1087 };
1088 
1089 static const char * const qup18_groups[] = {
1090     "gpio68", "gpio69", "gpio70", "gpio71",
1091 };
1092 
1093 static const char * const qup19_groups[] = {
1094     "gpio76", "gpio77", "gpio78", "gpio79",
1095 };
1096 
1097 static const char * const qup2_groups[] = {
1098     "gpio12", "gpio13", "gpio14", "gpio15",
1099 };
1100 
1101 static const char * const qup3_groups[] = {
1102     "gpio16", "gpio17", "gpio18", "gpio19",
1103 };
1104 
1105 static const char * const qup4_groups[] = {
1106     "gpio20", "gpio21", "gpio22", "gpio23",
1107 };
1108 
1109 static const char * const qup5_groups[] = {
1110     "gpio24", "gpio25", "gpio26", "gpio27",
1111 };
1112 
1113 static const char * const qup6_groups[] = {
1114     "gpio28", "gpio29", "gpio30", "gpio31",
1115 };
1116 
1117 static const char * const qup7_groups[] = {
1118     "gpio32", "gpio33", "gpio34", "gpio35",
1119 };
1120 
1121 static const char * const qup8_groups[] = {
1122     "gpio36", "gpio37", "gpio38", "gpio39",
1123 };
1124 
1125 static const char * const qup9_groups[] = {
1126     "gpio40", "gpio41", "gpio42", "gpio43",
1127 };
1128 
1129 static const char * const qup_l4_groups[] = {
1130     "gpio2", "gpio6", "gpio58", "gpio63",
1131 };
1132 
1133 static const char * const qup_l5_groups[] = {
1134     "gpio3", "gpio7", "gpio59", "gpio66",
1135 };
1136 
1137 static const char * const qup_l6_groups[] = {
1138     "gpio10", "gpio42", "gpio62", "gpio67",
1139 };
1140 
1141 static const char * const sd_write_groups[] = {
1142     "gpio93",
1143 };
1144 
1145 static const char * const sdc40_groups[] = {
1146     "gpio44",
1147 };
1148 
1149 static const char * const sdc41_groups[] = {
1150     "gpio45",
1151 };
1152 
1153 static const char * const sdc42_groups[] = {
1154     "gpio48",
1155 };
1156 
1157 static const char * const sdc43_groups[] = {
1158     "gpio49",
1159 };
1160 
1161 static const char * const sdc4_clk_groups[] = {
1162     "gpio50",
1163 };
1164 
1165 static const char * const sdc4_cmd_groups[] = {
1166     "gpio51",
1167 };
1168 
1169 static const char * const sec_mi2s_groups[] = {
1170     "gpio124",
1171 };
1172 
1173 static const char * const tb_trig_groups[] = {
1174     "gpio64", "gpio136",
1175 };
1176 
1177 static const char * const tgu_ch0_groups[] = {
1178     "gpio99",
1179 };
1180 
1181 static const char * const tgu_ch1_groups[] = {
1182     "gpio100",
1183 };
1184 
1185 static const char * const tgu_ch2_groups[] = {
1186     "gpio101",
1187 };
1188 
1189 static const char * const tgu_ch3_groups[] = {
1190     "gpio102",
1191 };
1192 
1193 static const char * const tsense_pwm1_groups[] = {
1194     "gpio88",
1195 };
1196 
1197 static const char * const tsense_pwm2_groups[] = {
1198     "gpio88",
1199 };
1200 
1201 static const char * const uim0_clk_groups[] = {
1202     "gpio138",
1203 };
1204 
1205 static const char * const uim0_data_groups[] = {
1206     "gpio137",
1207 };
1208 
1209 static const char * const uim0_present_groups[] = {
1210     "gpio140",
1211 };
1212 
1213 static const char * const uim0_reset_groups[] = {
1214     "gpio139",
1215 };
1216 
1217 static const char * const uim1_clk_groups[] = {
1218     "gpio134",
1219 };
1220 
1221 static const char * const uim1_data_groups[] = {
1222     "gpio133",
1223 };
1224 
1225 static const char * const uim1_present_groups[] = {
1226     "gpio136",
1227 };
1228 
1229 static const char * const uim1_reset_groups[] = {
1230     "gpio135",
1231 };
1232 
1233 static const char * const usb2phy_ac_groups[] = {
1234     "gpio39", "gpio80",
1235 };
1236 
1237 static const char * const usb_phy_groups[] = {
1238     "gpio81",
1239 };
1240 
1241 static const char * const vfr_0_groups[] = {
1242     "gpio84",
1243 };
1244 
1245 static const char * const vfr_1_groups[] = {
1246     "gpio90",
1247 };
1248 
1249 static const char * const vsense_trigger_groups[] = {
1250     "gpio78",
1251 };
1252 
1253 static const struct msm_function sm8350_functions[] = {
1254     FUNCTION(atest_char),
1255     FUNCTION(atest_usb),
1256     FUNCTION(audio_ref),
1257     FUNCTION(cam_mclk),
1258     FUNCTION(cci_async),
1259     FUNCTION(cci_i2c),
1260     FUNCTION(cci_timer),
1261     FUNCTION(cmu_rng),
1262     FUNCTION(coex_uart1),
1263     FUNCTION(coex_uart2),
1264     FUNCTION(cri_trng),
1265     FUNCTION(cri_trng0),
1266     FUNCTION(cri_trng1),
1267     FUNCTION(dbg_out),
1268     FUNCTION(ddr_bist),
1269     FUNCTION(ddr_pxi0),
1270     FUNCTION(ddr_pxi1),
1271     FUNCTION(ddr_pxi2),
1272     FUNCTION(ddr_pxi3),
1273     FUNCTION(dp_hot),
1274     FUNCTION(dp_lcd),
1275     FUNCTION(gcc_gp1),
1276     FUNCTION(gcc_gp2),
1277     FUNCTION(gcc_gp3),
1278     FUNCTION(gpio),
1279     FUNCTION(ibi_i3c),
1280     FUNCTION(jitter_bist),
1281     FUNCTION(lpass_slimbus),
1282     FUNCTION(mdp_vsync),
1283     FUNCTION(mdp_vsync0),
1284     FUNCTION(mdp_vsync1),
1285     FUNCTION(mdp_vsync2),
1286     FUNCTION(mdp_vsync3),
1287     FUNCTION(mi2s0_data0),
1288     FUNCTION(mi2s0_data1),
1289     FUNCTION(mi2s0_sck),
1290     FUNCTION(mi2s0_ws),
1291     FUNCTION(mi2s1_data0),
1292     FUNCTION(mi2s1_data1),
1293     FUNCTION(mi2s1_sck),
1294     FUNCTION(mi2s1_ws),
1295     FUNCTION(mi2s2_data0),
1296     FUNCTION(mi2s2_data1),
1297     FUNCTION(mi2s2_sck),
1298     FUNCTION(mi2s2_ws),
1299     FUNCTION(mss_grfc0),
1300     FUNCTION(mss_grfc1),
1301     FUNCTION(mss_grfc10),
1302     FUNCTION(mss_grfc11),
1303     FUNCTION(mss_grfc12),
1304     FUNCTION(mss_grfc2),
1305     FUNCTION(mss_grfc3),
1306     FUNCTION(mss_grfc4),
1307     FUNCTION(mss_grfc5),
1308     FUNCTION(mss_grfc6),
1309     FUNCTION(mss_grfc7),
1310     FUNCTION(mss_grfc8),
1311     FUNCTION(mss_grfc9),
1312     FUNCTION(nav_gpio),
1313     FUNCTION(pa_indicator),
1314     FUNCTION(pcie0_clkreqn),
1315     FUNCTION(pcie1_clkreqn),
1316     FUNCTION(phase_flag),
1317     FUNCTION(pll_bist),
1318     FUNCTION(pll_clk),
1319     FUNCTION(pri_mi2s),
1320     FUNCTION(prng_rosc),
1321     FUNCTION(qdss_cti),
1322     FUNCTION(qdss_gpio),
1323     FUNCTION(qlink0_enable),
1324     FUNCTION(qlink0_request),
1325     FUNCTION(qlink0_wmss),
1326     FUNCTION(qlink1_enable),
1327     FUNCTION(qlink1_request),
1328     FUNCTION(qlink1_wmss),
1329     FUNCTION(qlink2_enable),
1330     FUNCTION(qlink2_request),
1331     FUNCTION(qlink2_wmss),
1332     FUNCTION(qspi0),
1333     FUNCTION(qspi1),
1334     FUNCTION(qspi2),
1335     FUNCTION(qspi3),
1336     FUNCTION(qspi_clk),
1337     FUNCTION(qspi_cs),
1338     FUNCTION(qup0),
1339     FUNCTION(qup1),
1340     FUNCTION(qup10),
1341     FUNCTION(qup11),
1342     FUNCTION(qup12),
1343     FUNCTION(qup13),
1344     FUNCTION(qup14),
1345     FUNCTION(qup15),
1346     FUNCTION(qup16),
1347     FUNCTION(qup17),
1348     FUNCTION(qup18),
1349     FUNCTION(qup19),
1350     FUNCTION(qup2),
1351     FUNCTION(qup3),
1352     FUNCTION(qup4),
1353     FUNCTION(qup5),
1354     FUNCTION(qup6),
1355     FUNCTION(qup7),
1356     FUNCTION(qup8),
1357     FUNCTION(qup9),
1358     FUNCTION(qup_l4),
1359     FUNCTION(qup_l5),
1360     FUNCTION(qup_l6),
1361     FUNCTION(sd_write),
1362     FUNCTION(sdc40),
1363     FUNCTION(sdc41),
1364     FUNCTION(sdc42),
1365     FUNCTION(sdc43),
1366     FUNCTION(sdc4_clk),
1367     FUNCTION(sdc4_cmd),
1368     FUNCTION(sec_mi2s),
1369     FUNCTION(tb_trig),
1370     FUNCTION(tgu_ch0),
1371     FUNCTION(tgu_ch1),
1372     FUNCTION(tgu_ch2),
1373     FUNCTION(tgu_ch3),
1374     FUNCTION(tsense_pwm1),
1375     FUNCTION(tsense_pwm2),
1376     FUNCTION(uim0_clk),
1377     FUNCTION(uim0_data),
1378     FUNCTION(uim0_present),
1379     FUNCTION(uim0_reset),
1380     FUNCTION(uim1_clk),
1381     FUNCTION(uim1_data),
1382     FUNCTION(uim1_present),
1383     FUNCTION(uim1_reset),
1384     FUNCTION(usb2phy_ac),
1385     FUNCTION(usb_phy),
1386     FUNCTION(vfr_0),
1387     FUNCTION(vfr_1),
1388     FUNCTION(vsense_trigger),
1389 };
1390 
1391 /* Every pin is maintained as a single group, and missing or non-existing pin
1392  * would be maintained as dummy group to synchronize pin group index with
1393  * pin descriptor registered with pinctrl core.
1394  * Clients would not be able to request these dummy pin groups.
1395  */
1396 static const struct msm_pingroup sm8350_groups[] = {
1397     [0] = PINGROUP(0, qup13, _, _, _, _, _, _, _, _),
1398     [1] = PINGROUP(1, qup13, _, _, _, _, _, _, _, _),
1399     [2] = PINGROUP(2, qup13, qup_l4, _, _, _, _, _, _, _),
1400     [3] = PINGROUP(3, qup13, qup_l5, _, _, _, _, _, _, _),
1401     [4] = PINGROUP(4, qup0, _, _, _, _, _, _, _, _),
1402     [5] = PINGROUP(5, qup0, _, _, _, _, _, _, _, _),
1403     [6] = PINGROUP(6, qup0, qup_l4, _, _, _, _, _, _, _),
1404     [7] = PINGROUP(7, qup0, qup_l5, _, _, _, _, _, _, _),
1405     [8] = PINGROUP(8, qup1, _, _, _, _, _, _, _, _),
1406     [9] = PINGROUP(9, qup1, _, _, _, _, _, _, _, _),
1407     [10] = PINGROUP(10, qup1, qup_l6, _, _, _, _, _, _, _),
1408     [11] = PINGROUP(11, qup1, _, _, _, _, _, _, _, _),
1409     [12] = PINGROUP(12, qup2, phase_flag, _, _, _, _, _, _, _),
1410     [13] = PINGROUP(13, qup2, phase_flag, _, _, _, _, _, _, _),
1411     [14] = PINGROUP(14, qup2, qdss_cti, dbg_out, _, _, _, _, _, _),
1412     [15] = PINGROUP(15, qup2, mdp_vsync, _, _, _, _, _, _, _),
1413     [16] = PINGROUP(16, qup3, phase_flag, _, _, _, _, _, _, _),
1414     [17] = PINGROUP(17, qup3, phase_flag, _, _, _, _, _, _, _),
1415     [18] = PINGROUP(18, qup3, _, _, _, _, _, _, _, _),
1416     [19] = PINGROUP(19, qup3, _, _, _, _, _, _, _, _),
1417     [20] = PINGROUP(20, qup4, _, _, _, _, _, _, _, _),
1418     [21] = PINGROUP(21, qup4, _, _, _, _, _, _, _, _),
1419     [22] = PINGROUP(22, qup4, _, _, _, _, _, _, _, _),
1420     [23] = PINGROUP(23, qup4, _, _, _, _, _, _, _, _),
1421     [24] = PINGROUP(24, qup5, _, _, _, _, _, _, _, _),
1422     [25] = PINGROUP(25, qup5, _, _, _, _, _, _, _, _),
1423     [26] = PINGROUP(26, qup5, mdp_vsync, _, _, _, _, _, _, _),
1424     [27] = PINGROUP(27, qup5, qdss_cti, _, _, _, _, _, _, _),
1425     [28] = PINGROUP(28, qup6, phase_flag, _, _, _, _, _, _, _),
1426     [29] = PINGROUP(29, qup6, phase_flag, _, _, _, _, _, _, _),
1427     [30] = PINGROUP(30, qup6, phase_flag, _, _, _, _, _, _, _),
1428     [31] = PINGROUP(31, qup6, phase_flag, _, _, _, _, _, _, _),
1429     [32] = PINGROUP(32, qup7, phase_flag, _, _, _, _, _, _, _),
1430     [33] = PINGROUP(33, qup7, phase_flag, _, _, _, _, _, _, _),
1431     [34] = PINGROUP(34, qup7, phase_flag, _, _, _, _, _, _, _),
1432     [35] = PINGROUP(35, qup7, phase_flag, _, _, _, _, _, _, _),
1433     [36] = PINGROUP(36, qup8, ibi_i3c, ddr_bist, _, _, _, _, _, _),
1434     [37] = PINGROUP(37, qup8, ibi_i3c, ddr_bist, _, _, _, _, _, _),
1435     [38] = PINGROUP(38, qup8, _, _, _, _, _, _, _, _),
1436     [39] = PINGROUP(39, qup8, usb2phy_ac, _, _, _, _, _, _, _),
1437     [40] = PINGROUP(40, qup9, ddr_bist, _, _, _, _, _, _, _),
1438     [41] = PINGROUP(41, qup9, ddr_bist, _, _, _, _, _, _, _),
1439     [42] = PINGROUP(42, qup9, qup_l6, _, _, _, _, _, _, _),
1440     [43] = PINGROUP(43, qup9, ddr_pxi3, _, _, _, _, _, _, _),
1441     [44] = PINGROUP(44, qup10, qspi0, sdc40, ddr_pxi3, _, _, _, _, _),
1442     [45] = PINGROUP(45, qup10, qspi1, sdc41, ddr_pxi2, _, _, _, _, _),
1443     [46] = PINGROUP(46, qup10, _, _, _, _, _, _, _, _),
1444     [47] = PINGROUP(47, qup10, qspi_cs, ddr_pxi2, _, _, _, _, _, _),
1445     [48] = PINGROUP(48, qup11, qspi2, sdc42, ddr_pxi1, _, _, _, _, _),
1446     [49] = PINGROUP(49, qup11, qspi3, sdc43, ddr_pxi1, _, _, _, _, _),
1447     [50] = PINGROUP(50, qup11, qspi_clk, sdc4_clk, _, _, _, _, _, _),
1448     [51] = PINGROUP(51, qup11, qspi_cs, sdc4_cmd, ddr_pxi0, _, _, _, _, _),
1449     [52] = PINGROUP(52, qup12, ddr_pxi0, _, _, _, _, _, _, _),
1450     [53] = PINGROUP(53, qup12, _, _, _, _, _, _, _, _),
1451     [54] = PINGROUP(54, qup12, _, _, _, _, _, _, _, _),
1452     [55] = PINGROUP(55, qup12, atest_usb, _, _, _, _, _, _, _),
1453     [56] = PINGROUP(56, qup14, ibi_i3c, _, _, _, _, _, _, _),
1454     [57] = PINGROUP(57, qup14, ibi_i3c, _, _, _, _, _, _, _),
1455     [58] = PINGROUP(58, qup14, qup_l4, _, _, _, _, _, _, _),
1456     [59] = PINGROUP(59, qup14, qup_l5, _, _, _, _, _, _, _),
1457     [60] = PINGROUP(60, qup15, ibi_i3c, _, _, _, _, _, _, _),
1458     [61] = PINGROUP(61, qup15, ibi_i3c, _, _, _, _, _, _, _),
1459     [62] = PINGROUP(62, qup15, qup_l6, _, _, _, _, _, _, _),
1460     [63] = PINGROUP(63, qup15, qup_l4, _, _, _, _, _, _, _),
1461     [64] = PINGROUP(64, qup16, tb_trig, _, _, _, _, _, _, _),
1462     [65] = PINGROUP(65, qup16, _, _, _, _, _, _, _, _),
1463     [66] = PINGROUP(66, qup16, qup_l5, _, _, _, _, _, _, _),
1464     [67] = PINGROUP(67, qup16, qup_l6, _, _, _, _, _, _, _),
1465     [68] = PINGROUP(68, qup18, _, _, _, _, _, _, _, _),
1466     [69] = PINGROUP(69, qup18, _, _, _, _, _, _, _, _),
1467     [70] = PINGROUP(70, qup18, _, _, _, _, _, _, _, _),
1468     [71] = PINGROUP(71, qup18, _, _, _, _, _, _, _, _),
1469     [72] = PINGROUP(72, qup17, phase_flag, _, _, _, _, _, _, _),
1470     [73] = PINGROUP(73, qup17, phase_flag, _, _, _, _, _, _, _),
1471     [74] = PINGROUP(74, qup17, phase_flag, _, _, _, _, _, _, _),
1472     [75] = PINGROUP(75, qup17, phase_flag, _, _, _, _, _, _, _),
1473     [76] = PINGROUP(76, qup19, phase_flag, _, _, _, _, _, _, _),
1474     [77] = PINGROUP(77, qup19, phase_flag, _, _, _, _, _, _, _),
1475     [78] = PINGROUP(78, qup19, phase_flag, _, vsense_trigger, _, _, _, _, _),
1476     [79] = PINGROUP(79, qup19, phase_flag, _, _, _, _, _, _, _),
1477     [80] = PINGROUP(80, usb2phy_ac, jitter_bist, atest_usb, _, _, _, _, _, _),
1478     [81] = PINGROUP(81, usb_phy, pll_bist, pll_clk, atest_usb, _, _, _, _, _),
1479     [82] = PINGROUP(82, mdp_vsync, _, _, _, _, _, _, _, _),
1480     [83] = PINGROUP(83, mdp_vsync, dp_lcd, _, _, _, _, _, _, _),
1481     [84] = PINGROUP(84, mdp_vsync, vfr_0, _, _, _, _, _, _, _),
1482     [85] = PINGROUP(85, atest_char, _, _, _, _, _, _, _, _),
1483     [86] = PINGROUP(86, mdp_vsync0, mdp_vsync1, atest_char, _, _, _, _, _, _),
1484     [87] = PINGROUP(87, dp_hot, mdp_vsync2, mdp_vsync3, qdss_cti, atest_char, _, _, _, _),
1485     [88] = PINGROUP(88, qdss_cti, tsense_pwm1, tsense_pwm2, _, _, _, _, _, _),
1486     [89] = PINGROUP(89, qdss_cti, _, _, _, _, _, _, _, _),
1487     [90] = PINGROUP(90, vfr_1, qdss_cti, _, _, _, _, _, _, _),
1488     [91] = PINGROUP(91, qdss_cti, _, _, _, _, _, _, _, _),
1489     [92] = PINGROUP(92, qdss_cti, _, _, _, _, _, _, _, _),
1490     [93] = PINGROUP(93, sd_write, _, _, _, _, _, _, _, _),
1491     [94] = PINGROUP(94, _, _, _, _, _, _, _, _, _),
1492     [95] = PINGROUP(95, pcie0_clkreqn, _, _, _, _, _, _, _, _),
1493     [96] = PINGROUP(96, _, _, _, _, _, _, _, _, _),
1494     [97] = PINGROUP(97, _, _, _, _, _, _, _, _, _),
1495     [98] = PINGROUP(98, pcie1_clkreqn, _, _, _, _, _, _, _, _),
1496     [99] = PINGROUP(99, tgu_ch0, _, _, _, _, _, _, _, _),
1497     [100] = PINGROUP(100, cam_mclk, tgu_ch1, qdss_gpio, _, _, _, _, _, _),
1498     [101] = PINGROUP(101, cam_mclk, tgu_ch2, qdss_gpio, _, _, _, _, _, _),
1499     [102] = PINGROUP(102, cam_mclk, tgu_ch3, qdss_gpio, _, _, _, _, _, _),
1500     [103] = PINGROUP(103, cam_mclk, phase_flag, _, qdss_gpio, _, _, _, _, _),
1501     [104] = PINGROUP(104, cam_mclk, phase_flag, _, qdss_gpio, _, _, _, _, _),
1502     [105] = PINGROUP(105, cam_mclk, phase_flag, _, qdss_gpio, _, _, _, _, _),
1503     [106] = PINGROUP(106, cci_async, phase_flag, _, qdss_gpio, _, _, _, _, _),
1504     [107] = PINGROUP(107, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _),
1505     [108] = PINGROUP(108, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _),
1506     [109] = PINGROUP(109, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _),
1507     [110] = PINGROUP(110, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _),
1508     [111] = PINGROUP(111, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _),
1509     [112] = PINGROUP(112, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _),
1510     [113] = PINGROUP(113, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _),
1511     [114] = PINGROUP(114, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _),
1512     [115] = PINGROUP(115, cci_timer, gcc_gp1, qdss_gpio, atest_char, _, _, _, _, _),
1513     [116] = PINGROUP(116, cci_timer, gcc_gp2, qdss_gpio, _, _, _, _, _, _),
1514     [117] = PINGROUP(117, cci_timer, gcc_gp3, qdss_gpio, atest_char, _, _, _, _, _),
1515     [118] = PINGROUP(118, cci_timer, cci_async, _, _, _, _, _, _, _),
1516     [119] = PINGROUP(119, cci_timer, cci_async, _, _, _, _, _, _, _),
1517     [120] = PINGROUP(120, mi2s2_sck, _, _, _, _, _, _, _, _),
1518     [121] = PINGROUP(121, mi2s2_data0, _, _, _, _, _, _, _, _),
1519     [122] = PINGROUP(122, mi2s2_ws, _, _, _, _, _, _, _, _),
1520     [123] = PINGROUP(123, pri_mi2s, _, _, _, _, _, _, _, _),
1521     [124] = PINGROUP(124, sec_mi2s, audio_ref, mi2s2_data1, _, _, _, _, _, _),
1522     [125] = PINGROUP(125, mi2s0_sck, _, _, _, _, _, _, _, _),
1523     [126] = PINGROUP(126, mi2s0_data0, _, _, _, _, _, _, _, _),
1524     [127] = PINGROUP(127, mi2s0_data1, _, _, _, _, _, _, _, _),
1525     [128] = PINGROUP(128, mi2s0_ws, _, _, _, _, _, _, _, _),
1526     [129] = PINGROUP(129, lpass_slimbus, mi2s1_sck, gcc_gp1, _, _, _, _, _, _),
1527     [130] = PINGROUP(130, lpass_slimbus, mi2s1_data0, gcc_gp2, _, _, _, _, _, _),
1528     [131] = PINGROUP(131, mi2s1_data1, gcc_gp3, _, _, _, _, _, _, _),
1529     [132] = PINGROUP(132, mi2s1_ws, _, _, _, _, _, _, _, _),
1530     [133] = PINGROUP(133, uim1_data, _, _, _, _, _, _, _, _),
1531     [134] = PINGROUP(134, uim1_clk, _, _, _, _, _, _, _, _),
1532     [135] = PINGROUP(135, uim1_reset, _, _, _, _, _, _, _, _),
1533     [136] = PINGROUP(136, uim1_present, tb_trig, _, _, _, _, _, _, _),
1534     [137] = PINGROUP(137, uim0_data, _, _, _, _, _, _, _, _),
1535     [138] = PINGROUP(138, uim0_clk, _, _, _, _, _, _, _, _),
1536     [139] = PINGROUP(139, uim0_reset, _, _, _, _, _, _, _, _),
1537     [140] = PINGROUP(140, uim0_present, _, _, _, _, _, _, _, _),
1538     [141] = PINGROUP(141, _, mss_grfc0, _, _, _, _, _, _, _),
1539     [142] = PINGROUP(142, _, mss_grfc1, _, _, _, _, _, _, _),
1540     [143] = PINGROUP(143, _, mss_grfc2, _, _, _, _, _, _, _),
1541     [144] = PINGROUP(144, _, mss_grfc3, _, _, _, _, _, _, _),
1542     [145] = PINGROUP(145, _, mss_grfc4, _, _, _, _, _, _, _),
1543     [146] = PINGROUP(146, _, mss_grfc5, _, _, _, _, _, _, _),
1544     [147] = PINGROUP(147, _, mss_grfc6, _, _, _, _, _, _, _),
1545     [148] = PINGROUP(148, _, mss_grfc7, _, _, _, _, _, _, _),
1546     [149] = PINGROUP(149, _, mss_grfc8, _, _, _, _, _, _, _),
1547     [150] = PINGROUP(150, _, mss_grfc9, _, _, _, _, _, _, _),
1548     [151] = PINGROUP(151, coex_uart1, atest_usb, _, _, _, _, _, _, _),
1549     [152] = PINGROUP(152, coex_uart1, atest_usb, _, _, _, _, _, _, _),
1550     [153] = PINGROUP(153, coex_uart2, mss_grfc10, atest_usb, _, _, _, _, _, _),
1551     [154] = PINGROUP(154, coex_uart2, mss_grfc11, atest_usb, _, _, _, _, _, _),
1552     [155] = PINGROUP(155, nav_gpio, _, _, _, _, _, _, _, _),
1553     [156] = PINGROUP(156, nav_gpio, _, _, _, _, _, _, _, _),
1554     [157] = PINGROUP(157, mss_grfc12, pa_indicator, nav_gpio, _, _, _, _, _, _),
1555     [158] = PINGROUP(158, mss_grfc0, atest_usb, _, _, _, _, _, _, _),
1556     [159] = PINGROUP(159, qlink0_request, atest_usb, _, _, _, _, _, _, _),
1557     [160] = PINGROUP(160, qlink0_enable, _, _, _, _, _, _, _, _),
1558     [161] = PINGROUP(161, qlink0_wmss, atest_usb, _, _, _, _, _, _, _),
1559     [162] = PINGROUP(162, qlink1_request, _, _, _, _, _, _, _, _),
1560     [163] = PINGROUP(163, qlink1_enable, _, _, _, _, _, _, _, _),
1561     [164] = PINGROUP(164, qlink1_wmss, _, _, _, _, _, _, _, _),
1562     [165] = PINGROUP(165, qlink2_request, _, _, _, _, _, _, _, _),
1563     [166] = PINGROUP(166, qlink2_enable, _, _, _, _, _, _, _, _),
1564     [167] = PINGROUP(167, qlink2_wmss, _, _, _, _, _, _, _, _),
1565     [168] = PINGROUP(168, _, _, _, _, _, _, _, _, _),
1566     [169] = PINGROUP(169, _, _, _, _, _, _, _, _, _),
1567     [170] = PINGROUP(170, _, _, _, _, _, _, _, _, _),
1568     [171] = PINGROUP(171, _, _, _, _, _, _, _, _, _),
1569     [172] = PINGROUP(172, _, _, _, _, _, _, _, _, _),
1570     [173] = PINGROUP(173, _, _, _, _, _, _, _, _, _),
1571     [174] = PINGROUP(174, cmu_rng, _, _, _, _, _, _, _, _),
1572     [175] = PINGROUP(175, cmu_rng, _, _, _, _, _, _, _, _),
1573     [176] = PINGROUP(176, cmu_rng, _, _, _, _, _, _, _, _),
1574     [177] = PINGROUP(177, cmu_rng, _, _, _, _, _, _, _, _),
1575     [178] = PINGROUP(178, _, _, _, _, _, _, _, _, _),
1576     [179] = PINGROUP(179, _, _, _, _, _, _, _, _, _),
1577     [180] = PINGROUP(180, _, _, _, _, _, _, _, _, _),
1578     [181] = PINGROUP(181, _, _, _, _, _, _, _, _, _),
1579     [182] = PINGROUP(182, _, _, _, _, _, _, _, _, _),
1580     [183] = PINGROUP(183, cri_trng0, qdss_gpio, _, _, _, _, _, _, _),
1581     [184] = PINGROUP(184, cri_trng1, qdss_gpio, _, _, _, _, _, _, _),
1582     [185] = PINGROUP(185, prng_rosc, qdss_gpio, _, _, _, _, _, _, _),
1583     [186] = PINGROUP(186, cri_trng, qdss_gpio, _, _, _, _, _, _, _),
1584     [187] = PINGROUP(187, qdss_gpio, _, _, _, _, _, _, _, _),
1585     [188] = PINGROUP(188, qdss_gpio, _, _, _, _, _, _, _, _),
1586     [189] = PINGROUP(189, qdss_gpio, _, _, _, _, _, _, _, _),
1587     [190] = PINGROUP(190, qdss_gpio, _, _, _, _, _, _, _, _),
1588     [191] = PINGROUP(191, qdss_gpio, _, _, _, _, _, _, _, _),
1589     [192] = PINGROUP(192, qdss_gpio, _, _, _, _, _, _, _, _),
1590     [193] = PINGROUP(193, qdss_gpio, _, _, _, _, _, _, _, _),
1591     [194] = PINGROUP(194, qdss_gpio, _, _, _, _, _, _, _, _),
1592     [195] = PINGROUP(195, qdss_gpio, _, _, _, _, _, _, _, _),
1593     [196] = PINGROUP(196, qdss_gpio, _, _, _, _, _, _, _, _),
1594     [197] = PINGROUP(197, qdss_gpio, _, _, _, _, _, _, _, _),
1595     [198] = PINGROUP(198, qdss_gpio, _, _, _, _, _, _, _, _),
1596     [199] = PINGROUP(199, qdss_gpio, _, _, _, _, _, _, _, _),
1597     [200] = PINGROUP(200, qdss_gpio, _, _, _, _, _, _, _, _),
1598     [201] = PINGROUP(201, _, _, _, _, _, _, _, _, _),
1599     [202] = PINGROUP(202, _, _, _, _, _, _, _, _, _),
1600     [203] = UFS_RESET(ufs_reset, 0xd8000),
1601     [204] = SDC_PINGROUP(sdc2_clk, 0xcf000, 14, 6),
1602     [205] = SDC_PINGROUP(sdc2_cmd, 0xcf000, 11, 3),
1603     [206] = SDC_PINGROUP(sdc2_data, 0xcf000, 9, 0),
1604 };
1605 
1606 static const struct msm_gpio_wakeirq_map sm8350_pdc_map[] = {
1607     { 2, 117 }, { 7, 82 }, { 11, 83 }, { 14, 80 }, { 15, 146 },
1608     { 19, 121 }, { 23, 84 }, { 26, 86 }, { 27, 75 }, { 31, 85 },
1609     { 32, 97 }, { 34, 98 }, { 35, 131 }, { 36, 79 }, { 38, 99 },
1610     { 39, 92 }, { 40, 101 }, { 43, 137 }, { 44, 102 }, { 46, 96 },
1611     { 47, 93 }, { 50, 108 }, { 51, 127 }, { 55, 128 }, { 56, 81 },
1612     { 59, 112 }, { 60, 119 }, { 63, 73 }, { 67, 74 }, { 71, 134 },
1613     { 75, 103 }, { 79, 104 }, { 80, 126 }, { 81, 139 }, { 82, 140 },
1614     { 83, 141 }, { 84, 124 }, { 85, 109 }, { 86, 143 }, { 87, 138 },
1615     { 88, 122 }, { 89, 113 }, { 90, 114 }, { 91, 115 }, { 92, 76 },
1616     { 95, 147 }, { 96, 148 }, { 98, 149 }, { 99, 150 }, { 115, 125 },
1617     { 116, 106 }, { 117, 105 }, { 118, 116 }, { 119, 123 }, { 130, 145 },
1618     { 136, 72 }, { 140, 100 }, { 151, 110 }, { 153, 95 }, { 155, 107 },
1619     { 156, 94 }, { 157, 111 }, { 159, 118 }, { 162, 77 }, { 165, 78 },
1620     { 169, 70 }, { 172, 132 }, { 174, 87 }, { 175, 88 }, { 177, 89 },
1621     { 179, 120 }, { 180, 129 }, { 183, 90 }, { 185, 136 }, { 187, 142 },
1622     { 190, 144 }, { 198, 91 }, { 200, 133 }, { 202, 135 },
1623 };
1624 
1625 static const struct msm_pinctrl_soc_data sm8350_tlmm = {
1626     .pins = sm8350_pins,
1627     .npins = ARRAY_SIZE(sm8350_pins),
1628     .functions = sm8350_functions,
1629     .nfunctions = ARRAY_SIZE(sm8350_functions),
1630     .groups = sm8350_groups,
1631     .ngroups = ARRAY_SIZE(sm8350_groups),
1632     .ngpios = 204,
1633     .wakeirq_map = sm8350_pdc_map,
1634     .nwakeirq_map = ARRAY_SIZE(sm8350_pdc_map),
1635 };
1636 
1637 static int sm8350_tlmm_probe(struct platform_device *pdev)
1638 {
1639     return msm_pinctrl_probe(pdev, &sm8350_tlmm);
1640 }
1641 
1642 static const struct of_device_id sm8350_tlmm_of_match[] = {
1643     { .compatible = "qcom,sm8350-tlmm", },
1644     { },
1645 };
1646 
1647 static struct platform_driver sm8350_tlmm_driver = {
1648     .driver = {
1649         .name = "sm8350-tlmm",
1650         .of_match_table = sm8350_tlmm_of_match,
1651     },
1652     .probe = sm8350_tlmm_probe,
1653     .remove = msm_pinctrl_remove,
1654 };
1655 
1656 static int __init sm8350_tlmm_init(void)
1657 {
1658     return platform_driver_register(&sm8350_tlmm_driver);
1659 }
1660 arch_initcall(sm8350_tlmm_init);
1661 
1662 static void __exit sm8350_tlmm_exit(void)
1663 {
1664     platform_driver_unregister(&sm8350_tlmm_driver);
1665 }
1666 module_exit(sm8350_tlmm_exit);
1667 
1668 MODULE_DESCRIPTION("QTI SM8350 TLMM driver");
1669 MODULE_LICENSE("GPL v2");
1670 MODULE_DEVICE_TABLE(of, sm8350_tlmm_of_match);
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