0001
0002
0003
0004 #include <linux/module.h>
0005 #include <linux/of.h>
0006 #include <linux/platform_device.h>
0007 #include <linux/pinctrl/pinctrl.h>
0008
0009 #include "pinctrl-msm.h"
0010
0011 static const char * const sm8150_tiles[] = {
0012 "north",
0013 "south",
0014 "east",
0015 "west"
0016 };
0017
0018 enum {
0019 NORTH,
0020 SOUTH,
0021 EAST,
0022 WEST
0023 };
0024
0025 #define FUNCTION(fname) \
0026 [msm_mux_##fname] = { \
0027 .name = #fname, \
0028 .groups = fname##_groups, \
0029 .ngroups = ARRAY_SIZE(fname##_groups), \
0030 }
0031
0032 #define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
0033 { \
0034 .name = "gpio" #id, \
0035 .pins = gpio##id##_pins, \
0036 .npins = (unsigned int)ARRAY_SIZE(gpio##id##_pins), \
0037 .funcs = (int[]){ \
0038 msm_mux_gpio, \
0039 msm_mux_##f1, \
0040 msm_mux_##f2, \
0041 msm_mux_##f3, \
0042 msm_mux_##f4, \
0043 msm_mux_##f5, \
0044 msm_mux_##f6, \
0045 msm_mux_##f7, \
0046 msm_mux_##f8, \
0047 msm_mux_##f9 \
0048 }, \
0049 .nfuncs = 10, \
0050 .ctl_reg = 0x1000 * id, \
0051 .io_reg = 0x1000 * id + 0x4, \
0052 .intr_cfg_reg = 0x1000 * id + 0x8, \
0053 .intr_status_reg = 0x1000 * id + 0xc, \
0054 .intr_target_reg = 0x1000 * id + 0x8, \
0055 .tile = _tile, \
0056 .mux_bit = 2, \
0057 .pull_bit = 0, \
0058 .drv_bit = 6, \
0059 .oe_bit = 9, \
0060 .in_bit = 0, \
0061 .out_bit = 1, \
0062 .intr_enable_bit = 0, \
0063 .intr_status_bit = 0, \
0064 .intr_target_bit = 5, \
0065 .intr_target_kpss_val = 3, \
0066 .intr_raw_status_bit = 4, \
0067 .intr_polarity_bit = 1, \
0068 .intr_detection_bit = 2, \
0069 .intr_detection_width = 2, \
0070 }
0071
0072 #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \
0073 { \
0074 .name = #pg_name, \
0075 .pins = pg_name##_pins, \
0076 .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins), \
0077 .ctl_reg = ctl, \
0078 .io_reg = 0, \
0079 .intr_cfg_reg = 0, \
0080 .intr_status_reg = 0, \
0081 .intr_target_reg = 0, \
0082 .tile = NORTH, \
0083 .mux_bit = -1, \
0084 .pull_bit = pull, \
0085 .drv_bit = drv, \
0086 .oe_bit = -1, \
0087 .in_bit = -1, \
0088 .out_bit = -1, \
0089 .intr_enable_bit = -1, \
0090 .intr_status_bit = -1, \
0091 .intr_target_bit = -1, \
0092 .intr_raw_status_bit = -1, \
0093 .intr_polarity_bit = -1, \
0094 .intr_detection_bit = -1, \
0095 .intr_detection_width = -1, \
0096 }
0097
0098 #define UFS_RESET(pg_name, offset) \
0099 { \
0100 .name = #pg_name, \
0101 .pins = pg_name##_pins, \
0102 .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins), \
0103 .ctl_reg = offset, \
0104 .io_reg = offset + 0x4, \
0105 .intr_cfg_reg = 0, \
0106 .intr_status_reg = 0, \
0107 .intr_target_reg = 0, \
0108 .tile = SOUTH, \
0109 .mux_bit = -1, \
0110 .pull_bit = 3, \
0111 .drv_bit = 0, \
0112 .oe_bit = -1, \
0113 .in_bit = -1, \
0114 .out_bit = 0, \
0115 .intr_enable_bit = -1, \
0116 .intr_status_bit = -1, \
0117 .intr_target_bit = -1, \
0118 .intr_raw_status_bit = -1, \
0119 .intr_polarity_bit = -1, \
0120 .intr_detection_bit = -1, \
0121 .intr_detection_width = -1, \
0122 }
0123
0124 static const struct pinctrl_pin_desc sm8150_pins[] = {
0125 PINCTRL_PIN(0, "GPIO_0"),
0126 PINCTRL_PIN(1, "GPIO_1"),
0127 PINCTRL_PIN(2, "GPIO_2"),
0128 PINCTRL_PIN(3, "GPIO_3"),
0129 PINCTRL_PIN(4, "GPIO_4"),
0130 PINCTRL_PIN(5, "GPIO_5"),
0131 PINCTRL_PIN(6, "GPIO_6"),
0132 PINCTRL_PIN(7, "GPIO_7"),
0133 PINCTRL_PIN(8, "GPIO_8"),
0134 PINCTRL_PIN(9, "GPIO_9"),
0135 PINCTRL_PIN(10, "GPIO_10"),
0136 PINCTRL_PIN(11, "GPIO_11"),
0137 PINCTRL_PIN(12, "GPIO_12"),
0138 PINCTRL_PIN(13, "GPIO_13"),
0139 PINCTRL_PIN(14, "GPIO_14"),
0140 PINCTRL_PIN(15, "GPIO_15"),
0141 PINCTRL_PIN(16, "GPIO_16"),
0142 PINCTRL_PIN(17, "GPIO_17"),
0143 PINCTRL_PIN(18, "GPIO_18"),
0144 PINCTRL_PIN(19, "GPIO_19"),
0145 PINCTRL_PIN(20, "GPIO_20"),
0146 PINCTRL_PIN(21, "GPIO_21"),
0147 PINCTRL_PIN(22, "GPIO_22"),
0148 PINCTRL_PIN(23, "GPIO_23"),
0149 PINCTRL_PIN(24, "GPIO_24"),
0150 PINCTRL_PIN(25, "GPIO_25"),
0151 PINCTRL_PIN(26, "GPIO_26"),
0152 PINCTRL_PIN(27, "GPIO_27"),
0153 PINCTRL_PIN(28, "GPIO_28"),
0154 PINCTRL_PIN(29, "GPIO_29"),
0155 PINCTRL_PIN(30, "GPIO_30"),
0156 PINCTRL_PIN(31, "GPIO_31"),
0157 PINCTRL_PIN(32, "GPIO_32"),
0158 PINCTRL_PIN(33, "GPIO_33"),
0159 PINCTRL_PIN(34, "GPIO_34"),
0160 PINCTRL_PIN(35, "GPIO_35"),
0161 PINCTRL_PIN(36, "GPIO_36"),
0162 PINCTRL_PIN(37, "GPIO_37"),
0163 PINCTRL_PIN(38, "GPIO_38"),
0164 PINCTRL_PIN(39, "GPIO_39"),
0165 PINCTRL_PIN(40, "GPIO_40"),
0166 PINCTRL_PIN(41, "GPIO_41"),
0167 PINCTRL_PIN(42, "GPIO_42"),
0168 PINCTRL_PIN(43, "GPIO_43"),
0169 PINCTRL_PIN(44, "GPIO_44"),
0170 PINCTRL_PIN(45, "GPIO_45"),
0171 PINCTRL_PIN(46, "GPIO_46"),
0172 PINCTRL_PIN(47, "GPIO_47"),
0173 PINCTRL_PIN(48, "GPIO_48"),
0174 PINCTRL_PIN(49, "GPIO_49"),
0175 PINCTRL_PIN(50, "GPIO_50"),
0176 PINCTRL_PIN(51, "GPIO_51"),
0177 PINCTRL_PIN(52, "GPIO_52"),
0178 PINCTRL_PIN(53, "GPIO_53"),
0179 PINCTRL_PIN(54, "GPIO_54"),
0180 PINCTRL_PIN(55, "GPIO_55"),
0181 PINCTRL_PIN(56, "GPIO_56"),
0182 PINCTRL_PIN(57, "GPIO_57"),
0183 PINCTRL_PIN(58, "GPIO_58"),
0184 PINCTRL_PIN(59, "GPIO_59"),
0185 PINCTRL_PIN(60, "GPIO_60"),
0186 PINCTRL_PIN(61, "GPIO_61"),
0187 PINCTRL_PIN(62, "GPIO_62"),
0188 PINCTRL_PIN(63, "GPIO_63"),
0189 PINCTRL_PIN(64, "GPIO_64"),
0190 PINCTRL_PIN(65, "GPIO_65"),
0191 PINCTRL_PIN(66, "GPIO_66"),
0192 PINCTRL_PIN(67, "GPIO_67"),
0193 PINCTRL_PIN(68, "GPIO_68"),
0194 PINCTRL_PIN(69, "GPIO_69"),
0195 PINCTRL_PIN(70, "GPIO_70"),
0196 PINCTRL_PIN(71, "GPIO_71"),
0197 PINCTRL_PIN(72, "GPIO_72"),
0198 PINCTRL_PIN(73, "GPIO_73"),
0199 PINCTRL_PIN(74, "GPIO_74"),
0200 PINCTRL_PIN(75, "GPIO_75"),
0201 PINCTRL_PIN(76, "GPIO_76"),
0202 PINCTRL_PIN(77, "GPIO_77"),
0203 PINCTRL_PIN(78, "GPIO_78"),
0204 PINCTRL_PIN(79, "GPIO_79"),
0205 PINCTRL_PIN(80, "GPIO_80"),
0206 PINCTRL_PIN(81, "GPIO_81"),
0207 PINCTRL_PIN(82, "GPIO_82"),
0208 PINCTRL_PIN(83, "GPIO_83"),
0209 PINCTRL_PIN(84, "GPIO_84"),
0210 PINCTRL_PIN(85, "GPIO_85"),
0211 PINCTRL_PIN(86, "GPIO_86"),
0212 PINCTRL_PIN(87, "GPIO_87"),
0213 PINCTRL_PIN(88, "GPIO_88"),
0214 PINCTRL_PIN(89, "GPIO_89"),
0215 PINCTRL_PIN(90, "GPIO_90"),
0216 PINCTRL_PIN(91, "GPIO_91"),
0217 PINCTRL_PIN(92, "GPIO_92"),
0218 PINCTRL_PIN(93, "GPIO_93"),
0219 PINCTRL_PIN(94, "GPIO_94"),
0220 PINCTRL_PIN(95, "GPIO_95"),
0221 PINCTRL_PIN(96, "GPIO_96"),
0222 PINCTRL_PIN(97, "GPIO_97"),
0223 PINCTRL_PIN(98, "GPIO_98"),
0224 PINCTRL_PIN(99, "GPIO_99"),
0225 PINCTRL_PIN(100, "GPIO_100"),
0226 PINCTRL_PIN(101, "GPIO_101"),
0227 PINCTRL_PIN(102, "GPIO_102"),
0228 PINCTRL_PIN(103, "GPIO_103"),
0229 PINCTRL_PIN(104, "GPIO_104"),
0230 PINCTRL_PIN(105, "GPIO_105"),
0231 PINCTRL_PIN(106, "GPIO_106"),
0232 PINCTRL_PIN(107, "GPIO_107"),
0233 PINCTRL_PIN(108, "GPIO_108"),
0234 PINCTRL_PIN(109, "GPIO_109"),
0235 PINCTRL_PIN(110, "GPIO_110"),
0236 PINCTRL_PIN(111, "GPIO_111"),
0237 PINCTRL_PIN(112, "GPIO_112"),
0238 PINCTRL_PIN(113, "GPIO_113"),
0239 PINCTRL_PIN(114, "GPIO_114"),
0240 PINCTRL_PIN(115, "GPIO_115"),
0241 PINCTRL_PIN(116, "GPIO_116"),
0242 PINCTRL_PIN(117, "GPIO_117"),
0243 PINCTRL_PIN(118, "GPIO_118"),
0244 PINCTRL_PIN(119, "GPIO_119"),
0245 PINCTRL_PIN(120, "GPIO_120"),
0246 PINCTRL_PIN(121, "GPIO_121"),
0247 PINCTRL_PIN(122, "GPIO_122"),
0248 PINCTRL_PIN(123, "GPIO_123"),
0249 PINCTRL_PIN(124, "GPIO_124"),
0250 PINCTRL_PIN(125, "GPIO_125"),
0251 PINCTRL_PIN(126, "GPIO_126"),
0252 PINCTRL_PIN(127, "GPIO_127"),
0253 PINCTRL_PIN(128, "GPIO_128"),
0254 PINCTRL_PIN(129, "GPIO_129"),
0255 PINCTRL_PIN(130, "GPIO_130"),
0256 PINCTRL_PIN(131, "GPIO_131"),
0257 PINCTRL_PIN(132, "GPIO_132"),
0258 PINCTRL_PIN(133, "GPIO_133"),
0259 PINCTRL_PIN(134, "GPIO_134"),
0260 PINCTRL_PIN(135, "GPIO_135"),
0261 PINCTRL_PIN(136, "GPIO_136"),
0262 PINCTRL_PIN(137, "GPIO_137"),
0263 PINCTRL_PIN(138, "GPIO_138"),
0264 PINCTRL_PIN(139, "GPIO_139"),
0265 PINCTRL_PIN(140, "GPIO_140"),
0266 PINCTRL_PIN(141, "GPIO_141"),
0267 PINCTRL_PIN(142, "GPIO_142"),
0268 PINCTRL_PIN(143, "GPIO_143"),
0269 PINCTRL_PIN(144, "GPIO_144"),
0270 PINCTRL_PIN(145, "GPIO_145"),
0271 PINCTRL_PIN(146, "GPIO_146"),
0272 PINCTRL_PIN(147, "GPIO_147"),
0273 PINCTRL_PIN(148, "GPIO_148"),
0274 PINCTRL_PIN(149, "GPIO_149"),
0275 PINCTRL_PIN(150, "GPIO_150"),
0276 PINCTRL_PIN(151, "GPIO_151"),
0277 PINCTRL_PIN(152, "GPIO_152"),
0278 PINCTRL_PIN(153, "GPIO_153"),
0279 PINCTRL_PIN(154, "GPIO_154"),
0280 PINCTRL_PIN(155, "GPIO_155"),
0281 PINCTRL_PIN(156, "GPIO_156"),
0282 PINCTRL_PIN(157, "GPIO_157"),
0283 PINCTRL_PIN(158, "GPIO_158"),
0284 PINCTRL_PIN(159, "GPIO_159"),
0285 PINCTRL_PIN(160, "GPIO_160"),
0286 PINCTRL_PIN(161, "GPIO_161"),
0287 PINCTRL_PIN(162, "GPIO_162"),
0288 PINCTRL_PIN(163, "GPIO_163"),
0289 PINCTRL_PIN(164, "GPIO_164"),
0290 PINCTRL_PIN(165, "GPIO_165"),
0291 PINCTRL_PIN(166, "GPIO_166"),
0292 PINCTRL_PIN(167, "GPIO_167"),
0293 PINCTRL_PIN(168, "GPIO_168"),
0294 PINCTRL_PIN(169, "GPIO_169"),
0295 PINCTRL_PIN(170, "GPIO_170"),
0296 PINCTRL_PIN(171, "GPIO_171"),
0297 PINCTRL_PIN(172, "GPIO_172"),
0298 PINCTRL_PIN(173, "GPIO_173"),
0299 PINCTRL_PIN(174, "GPIO_174"),
0300 PINCTRL_PIN(175, "UFS_RESET"),
0301 PINCTRL_PIN(176, "SDC2_CLK"),
0302 PINCTRL_PIN(177, "SDC2_CMD"),
0303 PINCTRL_PIN(178, "SDC2_DATA"),
0304 };
0305
0306 #define DECLARE_MSM_GPIO_PINS(pin) \
0307 static const unsigned int gpio##pin##_pins[] = { pin }
0308 DECLARE_MSM_GPIO_PINS(0);
0309 DECLARE_MSM_GPIO_PINS(1);
0310 DECLARE_MSM_GPIO_PINS(2);
0311 DECLARE_MSM_GPIO_PINS(3);
0312 DECLARE_MSM_GPIO_PINS(4);
0313 DECLARE_MSM_GPIO_PINS(5);
0314 DECLARE_MSM_GPIO_PINS(6);
0315 DECLARE_MSM_GPIO_PINS(7);
0316 DECLARE_MSM_GPIO_PINS(8);
0317 DECLARE_MSM_GPIO_PINS(9);
0318 DECLARE_MSM_GPIO_PINS(10);
0319 DECLARE_MSM_GPIO_PINS(11);
0320 DECLARE_MSM_GPIO_PINS(12);
0321 DECLARE_MSM_GPIO_PINS(13);
0322 DECLARE_MSM_GPIO_PINS(14);
0323 DECLARE_MSM_GPIO_PINS(15);
0324 DECLARE_MSM_GPIO_PINS(16);
0325 DECLARE_MSM_GPIO_PINS(17);
0326 DECLARE_MSM_GPIO_PINS(18);
0327 DECLARE_MSM_GPIO_PINS(19);
0328 DECLARE_MSM_GPIO_PINS(20);
0329 DECLARE_MSM_GPIO_PINS(21);
0330 DECLARE_MSM_GPIO_PINS(22);
0331 DECLARE_MSM_GPIO_PINS(23);
0332 DECLARE_MSM_GPIO_PINS(24);
0333 DECLARE_MSM_GPIO_PINS(25);
0334 DECLARE_MSM_GPIO_PINS(26);
0335 DECLARE_MSM_GPIO_PINS(27);
0336 DECLARE_MSM_GPIO_PINS(28);
0337 DECLARE_MSM_GPIO_PINS(29);
0338 DECLARE_MSM_GPIO_PINS(30);
0339 DECLARE_MSM_GPIO_PINS(31);
0340 DECLARE_MSM_GPIO_PINS(32);
0341 DECLARE_MSM_GPIO_PINS(33);
0342 DECLARE_MSM_GPIO_PINS(34);
0343 DECLARE_MSM_GPIO_PINS(35);
0344 DECLARE_MSM_GPIO_PINS(36);
0345 DECLARE_MSM_GPIO_PINS(37);
0346 DECLARE_MSM_GPIO_PINS(38);
0347 DECLARE_MSM_GPIO_PINS(39);
0348 DECLARE_MSM_GPIO_PINS(40);
0349 DECLARE_MSM_GPIO_PINS(41);
0350 DECLARE_MSM_GPIO_PINS(42);
0351 DECLARE_MSM_GPIO_PINS(43);
0352 DECLARE_MSM_GPIO_PINS(44);
0353 DECLARE_MSM_GPIO_PINS(45);
0354 DECLARE_MSM_GPIO_PINS(46);
0355 DECLARE_MSM_GPIO_PINS(47);
0356 DECLARE_MSM_GPIO_PINS(48);
0357 DECLARE_MSM_GPIO_PINS(49);
0358 DECLARE_MSM_GPIO_PINS(50);
0359 DECLARE_MSM_GPIO_PINS(51);
0360 DECLARE_MSM_GPIO_PINS(52);
0361 DECLARE_MSM_GPIO_PINS(53);
0362 DECLARE_MSM_GPIO_PINS(54);
0363 DECLARE_MSM_GPIO_PINS(55);
0364 DECLARE_MSM_GPIO_PINS(56);
0365 DECLARE_MSM_GPIO_PINS(57);
0366 DECLARE_MSM_GPIO_PINS(58);
0367 DECLARE_MSM_GPIO_PINS(59);
0368 DECLARE_MSM_GPIO_PINS(60);
0369 DECLARE_MSM_GPIO_PINS(61);
0370 DECLARE_MSM_GPIO_PINS(62);
0371 DECLARE_MSM_GPIO_PINS(63);
0372 DECLARE_MSM_GPIO_PINS(64);
0373 DECLARE_MSM_GPIO_PINS(65);
0374 DECLARE_MSM_GPIO_PINS(66);
0375 DECLARE_MSM_GPIO_PINS(67);
0376 DECLARE_MSM_GPIO_PINS(68);
0377 DECLARE_MSM_GPIO_PINS(69);
0378 DECLARE_MSM_GPIO_PINS(70);
0379 DECLARE_MSM_GPIO_PINS(71);
0380 DECLARE_MSM_GPIO_PINS(72);
0381 DECLARE_MSM_GPIO_PINS(73);
0382 DECLARE_MSM_GPIO_PINS(74);
0383 DECLARE_MSM_GPIO_PINS(75);
0384 DECLARE_MSM_GPIO_PINS(76);
0385 DECLARE_MSM_GPIO_PINS(77);
0386 DECLARE_MSM_GPIO_PINS(78);
0387 DECLARE_MSM_GPIO_PINS(79);
0388 DECLARE_MSM_GPIO_PINS(80);
0389 DECLARE_MSM_GPIO_PINS(81);
0390 DECLARE_MSM_GPIO_PINS(82);
0391 DECLARE_MSM_GPIO_PINS(83);
0392 DECLARE_MSM_GPIO_PINS(84);
0393 DECLARE_MSM_GPIO_PINS(85);
0394 DECLARE_MSM_GPIO_PINS(86);
0395 DECLARE_MSM_GPIO_PINS(87);
0396 DECLARE_MSM_GPIO_PINS(88);
0397 DECLARE_MSM_GPIO_PINS(89);
0398 DECLARE_MSM_GPIO_PINS(90);
0399 DECLARE_MSM_GPIO_PINS(91);
0400 DECLARE_MSM_GPIO_PINS(92);
0401 DECLARE_MSM_GPIO_PINS(93);
0402 DECLARE_MSM_GPIO_PINS(94);
0403 DECLARE_MSM_GPIO_PINS(95);
0404 DECLARE_MSM_GPIO_PINS(96);
0405 DECLARE_MSM_GPIO_PINS(97);
0406 DECLARE_MSM_GPIO_PINS(98);
0407 DECLARE_MSM_GPIO_PINS(99);
0408 DECLARE_MSM_GPIO_PINS(100);
0409 DECLARE_MSM_GPIO_PINS(101);
0410 DECLARE_MSM_GPIO_PINS(102);
0411 DECLARE_MSM_GPIO_PINS(103);
0412 DECLARE_MSM_GPIO_PINS(104);
0413 DECLARE_MSM_GPIO_PINS(105);
0414 DECLARE_MSM_GPIO_PINS(106);
0415 DECLARE_MSM_GPIO_PINS(107);
0416 DECLARE_MSM_GPIO_PINS(108);
0417 DECLARE_MSM_GPIO_PINS(109);
0418 DECLARE_MSM_GPIO_PINS(110);
0419 DECLARE_MSM_GPIO_PINS(111);
0420 DECLARE_MSM_GPIO_PINS(112);
0421 DECLARE_MSM_GPIO_PINS(113);
0422 DECLARE_MSM_GPIO_PINS(114);
0423 DECLARE_MSM_GPIO_PINS(115);
0424 DECLARE_MSM_GPIO_PINS(116);
0425 DECLARE_MSM_GPIO_PINS(117);
0426 DECLARE_MSM_GPIO_PINS(118);
0427 DECLARE_MSM_GPIO_PINS(119);
0428 DECLARE_MSM_GPIO_PINS(120);
0429 DECLARE_MSM_GPIO_PINS(121);
0430 DECLARE_MSM_GPIO_PINS(122);
0431 DECLARE_MSM_GPIO_PINS(123);
0432 DECLARE_MSM_GPIO_PINS(124);
0433 DECLARE_MSM_GPIO_PINS(125);
0434 DECLARE_MSM_GPIO_PINS(126);
0435 DECLARE_MSM_GPIO_PINS(127);
0436 DECLARE_MSM_GPIO_PINS(128);
0437 DECLARE_MSM_GPIO_PINS(129);
0438 DECLARE_MSM_GPIO_PINS(130);
0439 DECLARE_MSM_GPIO_PINS(131);
0440 DECLARE_MSM_GPIO_PINS(132);
0441 DECLARE_MSM_GPIO_PINS(133);
0442 DECLARE_MSM_GPIO_PINS(134);
0443 DECLARE_MSM_GPIO_PINS(135);
0444 DECLARE_MSM_GPIO_PINS(136);
0445 DECLARE_MSM_GPIO_PINS(137);
0446 DECLARE_MSM_GPIO_PINS(138);
0447 DECLARE_MSM_GPIO_PINS(139);
0448 DECLARE_MSM_GPIO_PINS(140);
0449 DECLARE_MSM_GPIO_PINS(141);
0450 DECLARE_MSM_GPIO_PINS(142);
0451 DECLARE_MSM_GPIO_PINS(143);
0452 DECLARE_MSM_GPIO_PINS(144);
0453 DECLARE_MSM_GPIO_PINS(145);
0454 DECLARE_MSM_GPIO_PINS(146);
0455 DECLARE_MSM_GPIO_PINS(147);
0456 DECLARE_MSM_GPIO_PINS(148);
0457 DECLARE_MSM_GPIO_PINS(149);
0458 DECLARE_MSM_GPIO_PINS(150);
0459 DECLARE_MSM_GPIO_PINS(151);
0460 DECLARE_MSM_GPIO_PINS(152);
0461 DECLARE_MSM_GPIO_PINS(153);
0462 DECLARE_MSM_GPIO_PINS(154);
0463 DECLARE_MSM_GPIO_PINS(155);
0464 DECLARE_MSM_GPIO_PINS(156);
0465 DECLARE_MSM_GPIO_PINS(157);
0466 DECLARE_MSM_GPIO_PINS(158);
0467 DECLARE_MSM_GPIO_PINS(159);
0468 DECLARE_MSM_GPIO_PINS(160);
0469 DECLARE_MSM_GPIO_PINS(161);
0470 DECLARE_MSM_GPIO_PINS(162);
0471 DECLARE_MSM_GPIO_PINS(163);
0472 DECLARE_MSM_GPIO_PINS(164);
0473 DECLARE_MSM_GPIO_PINS(165);
0474 DECLARE_MSM_GPIO_PINS(166);
0475 DECLARE_MSM_GPIO_PINS(167);
0476 DECLARE_MSM_GPIO_PINS(168);
0477 DECLARE_MSM_GPIO_PINS(169);
0478 DECLARE_MSM_GPIO_PINS(170);
0479 DECLARE_MSM_GPIO_PINS(171);
0480 DECLARE_MSM_GPIO_PINS(172);
0481 DECLARE_MSM_GPIO_PINS(173);
0482 DECLARE_MSM_GPIO_PINS(174);
0483
0484 static const unsigned int ufs_reset_pins[] = { 175 };
0485 static const unsigned int sdc2_clk_pins[] = { 176 };
0486 static const unsigned int sdc2_cmd_pins[] = { 177 };
0487 static const unsigned int sdc2_data_pins[] = { 178 };
0488
0489 enum sm8150_functions {
0490 msm_mux_adsp_ext,
0491 msm_mux_agera_pll,
0492 msm_mux_aoss_cti,
0493 msm_mux_atest_char,
0494 msm_mux_atest_char0,
0495 msm_mux_atest_char1,
0496 msm_mux_atest_char2,
0497 msm_mux_atest_char3,
0498 msm_mux_atest_usb1,
0499 msm_mux_atest_usb2,
0500 msm_mux_atest_usb10,
0501 msm_mux_atest_usb11,
0502 msm_mux_atest_usb12,
0503 msm_mux_atest_usb13,
0504 msm_mux_atest_usb20,
0505 msm_mux_atest_usb21,
0506 msm_mux_atest_usb22,
0507 msm_mux_atest_usb23,
0508 msm_mux_audio_ref,
0509 msm_mux_btfm_slimbus,
0510 msm_mux_cam_mclk,
0511 msm_mux_cci_async,
0512 msm_mux_cci_i2c,
0513 msm_mux_cci_timer0,
0514 msm_mux_cci_timer1,
0515 msm_mux_cci_timer2,
0516 msm_mux_cci_timer3,
0517 msm_mux_cci_timer4,
0518 msm_mux_cri_trng,
0519 msm_mux_cri_trng0,
0520 msm_mux_cri_trng1,
0521 msm_mux_dbg_out,
0522 msm_mux_ddr_bist,
0523 msm_mux_ddr_pxi0,
0524 msm_mux_ddr_pxi1,
0525 msm_mux_ddr_pxi2,
0526 msm_mux_ddr_pxi3,
0527 msm_mux_edp_hot,
0528 msm_mux_edp_lcd,
0529 msm_mux_emac_phy,
0530 msm_mux_emac_pps,
0531 msm_mux_gcc_gp1,
0532 msm_mux_gcc_gp2,
0533 msm_mux_gcc_gp3,
0534 msm_mux_gpio,
0535 msm_mux_jitter_bist,
0536 msm_mux_hs1_mi2s,
0537 msm_mux_hs2_mi2s,
0538 msm_mux_hs3_mi2s,
0539 msm_mux_lpass_slimbus,
0540 msm_mux_mdp_vsync,
0541 msm_mux_mdp_vsync0,
0542 msm_mux_mdp_vsync1,
0543 msm_mux_mdp_vsync2,
0544 msm_mux_mdp_vsync3,
0545 msm_mux_mss_lte,
0546 msm_mux_m_voc,
0547 msm_mux_nav_pps,
0548 msm_mux_pa_indicator,
0549 msm_mux_pci_e0,
0550 msm_mux_pci_e1,
0551 msm_mux_phase_flag,
0552 msm_mux_pll_bist,
0553 msm_mux_pll_bypassnl,
0554 msm_mux_pll_reset,
0555 msm_mux_pri_mi2s,
0556 msm_mux_pri_mi2s_ws,
0557 msm_mux_prng_rosc,
0558 msm_mux_qdss,
0559 msm_mux_qdss_cti,
0560 msm_mux_qlink_enable,
0561 msm_mux_qlink_request,
0562 msm_mux_qspi0,
0563 msm_mux_qspi1,
0564 msm_mux_qspi2,
0565 msm_mux_qspi3,
0566 msm_mux_qspi_clk,
0567 msm_mux_qspi_cs,
0568 msm_mux_qua_mi2s,
0569 msm_mux_qup0,
0570 msm_mux_qup1,
0571 msm_mux_qup2,
0572 msm_mux_qup3,
0573 msm_mux_qup4,
0574 msm_mux_qup5,
0575 msm_mux_qup6,
0576 msm_mux_qup7,
0577 msm_mux_qup8,
0578 msm_mux_qup9,
0579 msm_mux_qup10,
0580 msm_mux_qup11,
0581 msm_mux_qup12,
0582 msm_mux_qup13,
0583 msm_mux_qup14,
0584 msm_mux_qup15,
0585 msm_mux_qup16,
0586 msm_mux_qup17,
0587 msm_mux_qup18,
0588 msm_mux_qup19,
0589 msm_mux_qup_l4,
0590 msm_mux_qup_l5,
0591 msm_mux_qup_l6,
0592 msm_mux_rgmii,
0593 msm_mux_sdc4,
0594 msm_mux_sd_write,
0595 msm_mux_sec_mi2s,
0596 msm_mux_spkr_i2s,
0597 msm_mux_sp_cmu,
0598 msm_mux_ter_mi2s,
0599 msm_mux_tgu_ch0,
0600 msm_mux_tgu_ch2,
0601 msm_mux_tgu_ch1,
0602 msm_mux_tgu_ch3,
0603 msm_mux_tsense_pwm1,
0604 msm_mux_tsense_pwm2,
0605 msm_mux_tsif1,
0606 msm_mux_tsif2,
0607 msm_mux_uim1,
0608 msm_mux_uim2,
0609 msm_mux_uim_batt,
0610 msm_mux_usb2phy_ac,
0611 msm_mux_usb_phy,
0612 msm_mux_vfr_1,
0613 msm_mux_vsense_trigger,
0614 msm_mux_wlan1_adc1,
0615 msm_mux_wlan1_adc0,
0616 msm_mux_wlan2_adc1,
0617 msm_mux_wlan2_adc0,
0618 msm_mux_wmss_reset,
0619 msm_mux__,
0620 };
0621
0622 static const char * const phase_flag_groups[] = {
0623 "gpio18", "gpio19", "gpio20", "gpio55", "gpio56",
0624 "gpio57", "gpio59", "gpio64", "gpio68", "gpio76",
0625 "gpio79", "gpio80", "gpio90", "gpio91", "gpio92",
0626 "gpio93", "gpio94", "gpio96", "gpio114", "gpio115",
0627 "gpio116", "gpio117", "gpio118", "gpio119", "gpio120",
0628 "gpio121", "gpio122", "gpio126", "gpio127", "gpio128",
0629 "gpio144", "gpio145",
0630 };
0631
0632 static const char * const emac_pps_groups[] = {
0633 "gpio81",
0634 };
0635
0636 static const char * const qup12_groups[] = {
0637 "gpio83", "gpio84", "gpio85", "gpio86",
0638 };
0639
0640 static const char * const qup16_groups[] = {
0641 "gpio83", "gpio84", "gpio85", "gpio86",
0642 };
0643
0644 static const char * const tsif1_groups[] = {
0645 "gpio88", "gpio89", "gpio90", "gpio91", "gpio97",
0646 };
0647
0648 static const char * const qup8_groups[] = {
0649 "gpio88", "gpio89", "gpio90", "gpio91",
0650 };
0651
0652 static const char * const qspi_cs_groups[] = {
0653 "gpio88", "gpio94",
0654 };
0655
0656 static const char * const tgu_ch3_groups[] = {
0657 "gpio88",
0658 };
0659
0660 static const char * const qspi0_groups[] = {
0661 "gpio89",
0662 };
0663
0664 static const char * const mdp_vsync0_groups[] = {
0665 "gpio89",
0666 };
0667
0668 static const char * const mdp_vsync1_groups[] = {
0669 "gpio89",
0670 };
0671
0672 static const char * const mdp_vsync2_groups[] = {
0673 "gpio89",
0674 };
0675
0676 static const char * const mdp_vsync3_groups[] = {
0677 "gpio89",
0678 };
0679
0680 static const char * const tgu_ch0_groups[] = {
0681 "gpio89",
0682 };
0683
0684 static const char * const qspi1_groups[] = {
0685 "gpio90",
0686 };
0687
0688 static const char * const sdc4_groups[] = {
0689 "gpio90", "gpio91", "gpio92", "gpio93", "gpio94", "gpio95",
0690 };
0691
0692 static const char * const tgu_ch1_groups[] = {
0693 "gpio90",
0694 };
0695
0696 static const char * const wlan1_adc1_groups[] = {
0697 "gpio90",
0698 };
0699
0700 static const char * const qspi2_groups[] = {
0701 "gpio91",
0702 };
0703
0704 static const char * const vfr_1_groups[] = {
0705 "gpio91",
0706 };
0707
0708 static const char * const tgu_ch2_groups[] = {
0709 "gpio91",
0710 };
0711
0712 static const char * const wlan1_adc0_groups[] = {
0713 "gpio91",
0714 };
0715
0716 static const char * const tsif2_groups[] = {
0717 "gpio92", "gpio93", "gpio94", "gpio95", "gpio96",
0718 };
0719
0720 static const char * const qup11_groups[] = {
0721 "gpio92", "gpio93", "gpio94", "gpio95",
0722 };
0723
0724 static const char * const qspi_clk_groups[] = {
0725 "gpio92",
0726 };
0727
0728 static const char * const wlan2_adc1_groups[] = {
0729 "gpio92",
0730 };
0731
0732 static const char * const qspi3_groups[] = {
0733 "gpio93",
0734 };
0735
0736 static const char * const wlan2_adc0_groups[] = {
0737 "gpio93",
0738 };
0739
0740 static const char * const sd_write_groups[] = {
0741 "gpio97",
0742 };
0743
0744 static const char * const qup7_groups[] = {
0745 "gpio98", "gpio99", "gpio100", "gpio101",
0746 };
0747
0748 static const char * const ddr_bist_groups[] = {
0749 "gpio98", "gpio99", "gpio145", "gpio146",
0750 };
0751
0752 static const char * const ddr_pxi3_groups[] = {
0753 "gpio98", "gpio101",
0754 };
0755
0756 static const char * const atest_usb13_groups[] = {
0757 "gpio99",
0758 };
0759
0760 static const char * const ddr_pxi1_groups[] = {
0761 "gpio99", "gpio100",
0762 };
0763
0764 static const char * const pll_bypassnl_groups[] = {
0765 "gpio100",
0766 };
0767
0768 static const char * const atest_usb12_groups[] = {
0769 "gpio100",
0770 };
0771
0772 static const char * const pll_reset_groups[] = {
0773 "gpio101",
0774 };
0775
0776 static const char * const pci_e1_groups[] = {
0777 "gpio102", "gpio103",
0778 };
0779
0780 static const char * const uim2_groups[] = {
0781 "gpio105", "gpio106", "gpio107", "gpio108",
0782 };
0783
0784 static const char * const uim1_groups[] = {
0785 "gpio109", "gpio110", "gpio111", "gpio112",
0786 };
0787
0788 static const char * const uim_batt_groups[] = {
0789 "gpio113",
0790 };
0791
0792 static const char * const usb2phy_ac_groups[] = {
0793 "gpio113", "gpio123",
0794 };
0795
0796 static const char * const aoss_cti_groups[] = {
0797 "gpio113",
0798 };
0799
0800 static const char * const qup1_groups[] = {
0801 "gpio114", "gpio115", "gpio116", "gpio117",
0802 };
0803
0804 static const char * const rgmii_groups[] = {
0805 "gpio4", "gpio5", "gpio6", "gpio7", "gpio59",
0806 "gpio114", "gpio115", "gpio116", "gpio117",
0807 "gpio118", "gpio119", "gpio120", "gpio121", "gpio122",
0808 };
0809
0810 static const char * const adsp_ext_groups[] = {
0811 "gpio115",
0812 };
0813
0814 static const char * const qup5_groups[] = {
0815 "gpio119", "gpio120", "gpio121", "gpio122",
0816 };
0817
0818 static const char * const atest_usb22_groups[] = {
0819 "gpio123",
0820 };
0821
0822 static const char * const emac_phy_groups[] = {
0823 "gpio124",
0824 };
0825
0826 static const char * const hs3_mi2s_groups[] = {
0827 "gpio125", "gpio165", "gpio166", "gpio167", "gpio168",
0828 };
0829
0830 static const char * const sec_mi2s_groups[] = {
0831 "gpio126", "gpio127", "gpio128", "gpio129", "gpio130",
0832 };
0833
0834 static const char * const qup2_groups[] = {
0835 "gpio126", "gpio127", "gpio128", "gpio129",
0836 };
0837
0838 static const char * const jitter_bist_groups[] = {
0839 "gpio129",
0840 };
0841
0842 static const char * const atest_usb21_groups[] = {
0843 "gpio129",
0844 };
0845
0846 static const char * const pll_bist_groups[] = {
0847 "gpio130",
0848 };
0849
0850 static const char * const atest_usb20_groups[] = {
0851 "gpio130",
0852 };
0853
0854 static const char * const atest_char0_groups[] = {
0855 "gpio130",
0856 };
0857
0858 static const char * const ter_mi2s_groups[] = {
0859 "gpio131", "gpio132", "gpio133", "gpio134", "gpio135",
0860 };
0861
0862 static const char * const gcc_gp1_groups[] = {
0863 "gpio131", "gpio136",
0864 };
0865
0866 static const char * const atest_char1_groups[] = {
0867 "gpio133",
0868 };
0869
0870 static const char * const atest_char2_groups[] = {
0871 "gpio134",
0872 };
0873
0874 static const char * const atest_char3_groups[] = {
0875 "gpio135",
0876 };
0877
0878 static const char * const qua_mi2s_groups[] = {
0879 "gpio136", "gpio137", "gpio138", "gpio139", "gpio140", "gpio141",
0880 "gpio142",
0881 };
0882
0883 static const char * const pri_mi2s_groups[] = {
0884 "gpio143", "gpio144", "gpio146", "gpio147",
0885 };
0886
0887 static const char * const qup3_groups[] = {
0888 "gpio144", "gpio145", "gpio146", "gpio147",
0889 };
0890
0891 static const char * const ddr_pxi0_groups[] = {
0892 "gpio144", "gpio145",
0893 };
0894
0895 static const char * const pri_mi2s_ws_groups[] = {
0896 "gpio145",
0897 };
0898
0899 static const char * const vsense_trigger_groups[] = {
0900 "gpio145",
0901 };
0902
0903 static const char * const atest_usb1_groups[] = {
0904 "gpio145",
0905 };
0906
0907 static const char * const atest_usb11_groups[] = {
0908 "gpio146",
0909 };
0910
0911 static const char * const ddr_pxi2_groups[] = {
0912 "gpio146", "gpio147",
0913 };
0914
0915 static const char * const dbg_out_groups[] = {
0916 "gpio147",
0917 };
0918
0919 static const char * const atest_usb10_groups[] = {
0920 "gpio147",
0921 };
0922
0923 static const char * const spkr_i2s_groups[] = {
0924 "gpio148", "gpio149", "gpio150", "gpio151", "gpio152",
0925 };
0926
0927 static const char * const audio_ref_groups[] = {
0928 "gpio148",
0929 };
0930
0931 static const char * const lpass_slimbus_groups[] = {
0932 "gpio149", "gpio150", "gpio151", "gpio152",
0933 };
0934
0935 static const char * const tsense_pwm1_groups[] = {
0936 "gpio150",
0937 };
0938
0939 static const char * const tsense_pwm2_groups[] = {
0940 "gpio150",
0941 };
0942
0943 static const char * const btfm_slimbus_groups[] = {
0944 "gpio153", "gpio154",
0945 };
0946
0947 static const char * const hs1_mi2s_groups[] = {
0948 "gpio155", "gpio156", "gpio157", "gpio158", "gpio159",
0949 };
0950
0951 static const char * const cri_trng0_groups[] = {
0952 "gpio159",
0953 };
0954
0955 static const char * const hs2_mi2s_groups[] = {
0956 "gpio160", "gpio161", "gpio162", "gpio163", "gpio164",
0957 };
0958
0959 static const char * const cri_trng1_groups[] = {
0960 "gpio160",
0961 };
0962
0963 static const char * const cri_trng_groups[] = {
0964 "gpio161",
0965 };
0966
0967 static const char * const sp_cmu_groups[] = {
0968 "gpio162",
0969 };
0970
0971 static const char * const prng_rosc_groups[] = {
0972 "gpio163",
0973 };
0974
0975 static const char * const qup0_groups[] = {
0976 "gpio0", "gpio1", "gpio2", "gpio3",
0977 };
0978
0979 static const char * const gpio_groups[] = {
0980 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
0981 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
0982 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
0983 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
0984 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
0985 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
0986 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
0987 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
0988 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
0989 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
0990 "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
0991 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
0992 "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
0993 "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
0994 "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
0995 "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
0996 "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
0997 "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122",
0998 "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", "gpio128",
0999 "gpio129", "gpio130", "gpio131", "gpio132", "gpio133", "gpio134",
1000 "gpio135", "gpio136", "gpio137", "gpio138", "gpio139", "gpio140",
1001 "gpio141", "gpio142", "gpio143", "gpio144", "gpio145", "gpio146",
1002 "gpio147", "gpio148", "gpio149", "gpio150", "gpio151", "gpio152",
1003 "gpio153", "gpio154", "gpio155", "gpio156", "gpio157", "gpio158",
1004 "gpio159", "gpio160", "gpio161", "gpio162", "gpio163", "gpio164",
1005 "gpio165", "gpio166", "gpio167", "gpio168", "gpio169", "gpio170",
1006 "gpio171", "gpio172", "gpio173", "gpio174",
1007 };
1008
1009 static const char * const qup6_groups[] = {
1010 "gpio4", "gpio5", "gpio6", "gpio7",
1011 };
1012
1013 static const char * const qup_l6_groups[] = {
1014 "gpio6", "gpio34", "gpio97", "gpio123",
1015 };
1016
1017 static const char * const qup_l5_groups[] = {
1018 "gpio7", "gpio33", "gpio82", "gpio96",
1019 };
1020
1021 static const char * const mdp_vsync_groups[] = {
1022 "gpio8", "gpio9", "gpio10", "gpio81", "gpio82",
1023 };
1024
1025 static const char * const edp_lcd_groups[] = {
1026 "gpio9",
1027 };
1028
1029 static const char * const qup10_groups[] = {
1030 "gpio9", "gpio10", "gpio11", "gpio12",
1031 };
1032
1033 static const char * const m_voc_groups[] = {
1034 "gpio10",
1035 };
1036
1037 static const char * const edp_hot_groups[] = {
1038 "gpio10",
1039 };
1040
1041 static const char * const cam_mclk_groups[] = {
1042 "gpio13", "gpio14", "gpio15", "gpio16",
1043 };
1044
1045 static const char * const qdss_groups[] = {
1046 "gpio13", "gpio14", "gpio15", "gpio16", "gpio17",
1047 "gpio18", "gpio19", "gpio20", "gpio21", "gpio22",
1048 "gpio23", "gpio24", "gpio25", "gpio26", "gpio27",
1049 "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
1050 "gpio33", "gpio39", "gpio40", "gpio41", "gpio42",
1051 "gpio47", "gpio48", "gpio83", "gpio117", "gpio118",
1052 "gpio119", "gpio120", "gpio121", "gpio132",
1053 "gpio133", "gpio134",
1054 };
1055
1056 static const char * const cci_i2c_groups[] = {
1057 "gpio17", "gpio18", "gpio19", "gpio20", "gpio31", "gpio32", "gpio33",
1058 "gpio34",
1059 };
1060
1061 static const char * const cci_timer0_groups[] = {
1062 "gpio21",
1063 };
1064
1065 static const char * const gcc_gp2_groups[] = {
1066 "gpio21", "gpio137",
1067 };
1068
1069 static const char * const cci_timer1_groups[] = {
1070 "gpio22",
1071 };
1072
1073 static const char * const gcc_gp3_groups[] = {
1074 "gpio22", "gpio138",
1075 };
1076
1077 static const char * const cci_timer2_groups[] = {
1078 "gpio23",
1079 };
1080
1081 static const char * const qup18_groups[] = {
1082 "gpio23", "gpio24", "gpio25", "gpio26",
1083 };
1084
1085 static const char * const cci_timer3_groups[] = {
1086 "gpio24",
1087 };
1088
1089 static const char * const cci_async_groups[] = {
1090 "gpio24", "gpio25", "gpio26",
1091 };
1092
1093 static const char * const cci_timer4_groups[] = {
1094 "gpio25",
1095 };
1096
1097 static const char * const qup15_groups[] = {
1098 "gpio27", "gpio28", "gpio29", "gpio30",
1099 };
1100
1101 static const char * const pci_e0_groups[] = {
1102 "gpio35", "gpio36",
1103 };
1104
1105 static const char * const qup_l4_groups[] = {
1106 "gpio37", "gpio59", "gpio81", "gpio95",
1107 };
1108
1109 static const char * const agera_pll_groups[] = {
1110 "gpio37",
1111 };
1112
1113 static const char * const usb_phy_groups[] = {
1114 "gpio38",
1115 };
1116
1117 static const char * const qup9_groups[] = {
1118 "gpio39", "gpio40", "gpio41", "gpio42",
1119 };
1120
1121 static const char * const qup13_groups[] = {
1122 "gpio43", "gpio44", "gpio45", "gpio46",
1123 };
1124
1125 static const char * const qdss_cti_groups[] = {
1126 "gpio45", "gpio46", "gpio49", "gpio50", "gpio56", "gpio57", "gpio58",
1127 "gpio58",
1128 };
1129
1130 static const char * const qup14_groups[] = {
1131 "gpio47", "gpio48", "gpio49", "gpio50",
1132 };
1133
1134 static const char * const qup4_groups[] = {
1135 "gpio51", "gpio52", "gpio53", "gpio54",
1136 };
1137
1138 static const char * const qup17_groups[] = {
1139 "gpio55", "gpio56", "gpio57", "gpio58",
1140 };
1141
1142 static const char * const qup19_groups[] = {
1143 "gpio55", "gpio56", "gpio57", "gpio58",
1144 };
1145
1146 static const char * const atest_char_groups[] = {
1147 "gpio59",
1148 };
1149
1150 static const char * const nav_pps_groups[] = {
1151 "gpio60", "gpio60", "gpio76", "gpio76", "gpio77", "gpio77", "gpio81",
1152 "gpio81", "gpio82", "gpio82",
1153 };
1154
1155 static const char * const atest_usb2_groups[] = {
1156 "gpio60",
1157 };
1158
1159 static const char * const qlink_request_groups[] = {
1160 "gpio61",
1161 };
1162
1163 static const char * const qlink_enable_groups[] = {
1164 "gpio62",
1165 };
1166
1167 static const char * const wmss_reset_groups[] = {
1168 "gpio63",
1169 };
1170
1171 static const char * const atest_usb23_groups[] = {
1172 "gpio63",
1173 };
1174
1175 static const char * const pa_indicator_groups[] = {
1176 "gpio68",
1177 };
1178
1179 static const char * const mss_lte_groups[] = {
1180 "gpio69", "gpio70",
1181 };
1182
1183 static const struct msm_function sm8150_functions[] = {
1184 FUNCTION(adsp_ext),
1185 FUNCTION(agera_pll),
1186 FUNCTION(aoss_cti),
1187 FUNCTION(ddr_pxi2),
1188 FUNCTION(atest_char),
1189 FUNCTION(atest_char0),
1190 FUNCTION(atest_char1),
1191 FUNCTION(atest_char2),
1192 FUNCTION(atest_char3),
1193 FUNCTION(audio_ref),
1194 FUNCTION(atest_usb1),
1195 FUNCTION(atest_usb2),
1196 FUNCTION(atest_usb10),
1197 FUNCTION(atest_usb11),
1198 FUNCTION(atest_usb12),
1199 FUNCTION(atest_usb13),
1200 FUNCTION(atest_usb20),
1201 FUNCTION(atest_usb21),
1202 FUNCTION(atest_usb22),
1203 FUNCTION(atest_usb23),
1204 FUNCTION(btfm_slimbus),
1205 FUNCTION(cam_mclk),
1206 FUNCTION(cci_async),
1207 FUNCTION(cci_i2c),
1208 FUNCTION(cci_timer0),
1209 FUNCTION(cci_timer1),
1210 FUNCTION(cci_timer2),
1211 FUNCTION(cci_timer3),
1212 FUNCTION(cci_timer4),
1213 FUNCTION(cri_trng),
1214 FUNCTION(cri_trng0),
1215 FUNCTION(cri_trng1),
1216 FUNCTION(dbg_out),
1217 FUNCTION(ddr_bist),
1218 FUNCTION(ddr_pxi0),
1219 FUNCTION(ddr_pxi1),
1220 FUNCTION(ddr_pxi3),
1221 FUNCTION(edp_hot),
1222 FUNCTION(edp_lcd),
1223 FUNCTION(emac_phy),
1224 FUNCTION(emac_pps),
1225 FUNCTION(gcc_gp1),
1226 FUNCTION(gcc_gp2),
1227 FUNCTION(gcc_gp3),
1228 FUNCTION(gpio),
1229 FUNCTION(hs1_mi2s),
1230 FUNCTION(hs2_mi2s),
1231 FUNCTION(hs3_mi2s),
1232 FUNCTION(jitter_bist),
1233 FUNCTION(lpass_slimbus),
1234 FUNCTION(mdp_vsync),
1235 FUNCTION(mdp_vsync0),
1236 FUNCTION(mdp_vsync1),
1237 FUNCTION(mdp_vsync2),
1238 FUNCTION(mdp_vsync3),
1239 FUNCTION(mss_lte),
1240 FUNCTION(m_voc),
1241 FUNCTION(nav_pps),
1242 FUNCTION(pa_indicator),
1243 FUNCTION(pci_e0),
1244 FUNCTION(phase_flag),
1245 FUNCTION(pll_bypassnl),
1246 FUNCTION(pll_bist),
1247 FUNCTION(pci_e1),
1248 FUNCTION(pll_reset),
1249 FUNCTION(pri_mi2s),
1250 FUNCTION(pri_mi2s_ws),
1251 FUNCTION(prng_rosc),
1252 FUNCTION(qdss),
1253 FUNCTION(qdss_cti),
1254 FUNCTION(qlink_request),
1255 FUNCTION(qlink_enable),
1256 FUNCTION(qspi0),
1257 FUNCTION(qspi1),
1258 FUNCTION(qspi2),
1259 FUNCTION(qspi3),
1260 FUNCTION(qspi_clk),
1261 FUNCTION(qspi_cs),
1262 FUNCTION(qua_mi2s),
1263 FUNCTION(qup0),
1264 FUNCTION(qup1),
1265 FUNCTION(qup2),
1266 FUNCTION(qup3),
1267 FUNCTION(qup4),
1268 FUNCTION(qup5),
1269 FUNCTION(qup6),
1270 FUNCTION(qup7),
1271 FUNCTION(qup8),
1272 FUNCTION(qup9),
1273 FUNCTION(qup10),
1274 FUNCTION(qup11),
1275 FUNCTION(qup12),
1276 FUNCTION(qup13),
1277 FUNCTION(qup14),
1278 FUNCTION(qup15),
1279 FUNCTION(qup16),
1280 FUNCTION(qup17),
1281 FUNCTION(qup18),
1282 FUNCTION(qup19),
1283 FUNCTION(qup_l4),
1284 FUNCTION(qup_l5),
1285 FUNCTION(qup_l6),
1286 FUNCTION(rgmii),
1287 FUNCTION(sdc4),
1288 FUNCTION(sd_write),
1289 FUNCTION(sec_mi2s),
1290 FUNCTION(spkr_i2s),
1291 FUNCTION(sp_cmu),
1292 FUNCTION(ter_mi2s),
1293 FUNCTION(tgu_ch0),
1294 FUNCTION(tgu_ch1),
1295 FUNCTION(tgu_ch2),
1296 FUNCTION(tgu_ch3),
1297 FUNCTION(tsense_pwm1),
1298 FUNCTION(tsense_pwm2),
1299 FUNCTION(tsif1),
1300 FUNCTION(tsif2),
1301 FUNCTION(uim1),
1302 FUNCTION(uim2),
1303 FUNCTION(uim_batt),
1304 FUNCTION(usb2phy_ac),
1305 FUNCTION(usb_phy),
1306 FUNCTION(vfr_1),
1307 FUNCTION(vsense_trigger),
1308 FUNCTION(wlan1_adc0),
1309 FUNCTION(wlan1_adc1),
1310 FUNCTION(wlan2_adc0),
1311 FUNCTION(wlan2_adc1),
1312 FUNCTION(wmss_reset),
1313 };
1314
1315
1316
1317
1318
1319
1320
1321 static const struct msm_pingroup sm8150_groups[] = {
1322 [0] = PINGROUP(0, SOUTH, qup0, _, _, _, _, _, _, _, _),
1323 [1] = PINGROUP(1, SOUTH, qup0, _, _, _, _, _, _, _, _),
1324 [2] = PINGROUP(2, SOUTH, qup0, _, _, _, _, _, _, _, _),
1325 [3] = PINGROUP(3, SOUTH, qup0, _, _, _, _, _, _, _, _),
1326 [4] = PINGROUP(4, SOUTH, qup6, rgmii, _, _, _, _, _, _, _),
1327 [5] = PINGROUP(5, SOUTH, qup6, rgmii, _, _, _, _, _, _, _),
1328 [6] = PINGROUP(6, SOUTH, qup6, rgmii, qup_l6, _, _, _, _, _, _),
1329 [7] = PINGROUP(7, SOUTH, qup6, rgmii, qup_l5, _, _, _, _, _, _),
1330 [8] = PINGROUP(8, NORTH, mdp_vsync, _, _, _, _, _, _, _, _),
1331 [9] = PINGROUP(9, NORTH, mdp_vsync, edp_lcd, qup10, _, _, _, _, _, _),
1332 [10] = PINGROUP(10, NORTH, mdp_vsync, m_voc, edp_hot, qup10, _, _, _, _, _),
1333 [11] = PINGROUP(11, NORTH, qup10, _, _, _, _, _, _, _, _),
1334 [12] = PINGROUP(12, NORTH, qup10, _, _, _, _, _, _, _, _),
1335 [13] = PINGROUP(13, NORTH, cam_mclk, qdss, _, _, _, _, _, _, _),
1336 [14] = PINGROUP(14, NORTH, cam_mclk, qdss, _, _, _, _, _, _, _),
1337 [15] = PINGROUP(15, NORTH, cam_mclk, qdss, _, _, _, _, _, _, _),
1338 [16] = PINGROUP(16, NORTH, cam_mclk, qdss, _, _, _, _, _, _, _),
1339 [17] = PINGROUP(17, NORTH, cci_i2c, qdss, _, _, _, _, _, _, _),
1340 [18] = PINGROUP(18, NORTH, cci_i2c, phase_flag, _, qdss, _, _, _, _, _),
1341 [19] = PINGROUP(19, NORTH, cci_i2c, phase_flag, _, qdss, _, _, _, _, _),
1342 [20] = PINGROUP(20, NORTH, cci_i2c, phase_flag, _, qdss, _, _, _, _, _),
1343 [21] = PINGROUP(21, EAST, cci_timer0, gcc_gp2, qdss, _, _, _, _, _, _),
1344 [22] = PINGROUP(22, EAST, cci_timer1, gcc_gp3, qdss, _, _, _, _, _, _),
1345 [23] = PINGROUP(23, EAST, cci_timer2, qup18, qdss, _, _, _, _, _, _),
1346 [24] = PINGROUP(24, EAST, cci_timer3, cci_async, qup18, qdss, _, _, _, _, _),
1347 [25] = PINGROUP(25, EAST, cci_timer4, cci_async, qup18, qdss, _, _, _, _, _),
1348 [26] = PINGROUP(26, EAST, cci_async, qup18, qdss, _, _, _, _, _, _),
1349 [27] = PINGROUP(27, EAST, qup15, _, qdss, _, _, _, _, _, _),
1350 [28] = PINGROUP(28, EAST, qup15, qdss, _, _, _, _, _, _, _),
1351 [29] = PINGROUP(29, EAST, qup15, qdss, _, _, _, _, _, _, _),
1352 [30] = PINGROUP(30, EAST, qup15, qdss, _, _, _, _, _, _, _),
1353 [31] = PINGROUP(31, NORTH, cci_i2c, qdss, _, _, _, _, _, _, _),
1354 [32] = PINGROUP(32, NORTH, cci_i2c, qdss, _, _, _, _, _, _, _),
1355 [33] = PINGROUP(33, NORTH, cci_i2c, qup_l5, qdss, _, _, _, _, _, _),
1356 [34] = PINGROUP(34, NORTH, cci_i2c, qup_l6, _, _, _, _, _, _, _),
1357 [35] = PINGROUP(35, NORTH, pci_e0, _, _, _, _, _, _, _, _),
1358 [36] = PINGROUP(36, NORTH, pci_e0, _, _, _, _, _, _, _, _),
1359 [37] = PINGROUP(37, NORTH, qup_l4, agera_pll, _, _, _, _, _, _, _),
1360 [38] = PINGROUP(38, SOUTH, usb_phy, _, _, _, _, _, _, _, _),
1361 [39] = PINGROUP(39, NORTH, qup9, qdss, _, _, _, _, _, _, _),
1362 [40] = PINGROUP(40, NORTH, qup9, qdss, _, _, _, _, _, _, _),
1363 [41] = PINGROUP(41, NORTH, qup9, qdss, _, _, _, _, _, _, _),
1364 [42] = PINGROUP(42, NORTH, qup9, qdss, _, _, _, _, _, _, _),
1365 [43] = PINGROUP(43, EAST, qup13, _, _, _, _, _, _, _, _),
1366 [44] = PINGROUP(44, EAST, qup13, _, _, _, _, _, _, _, _),
1367 [45] = PINGROUP(45, EAST, qup13, qdss_cti, _, _, _, _, _, _, _),
1368 [46] = PINGROUP(46, EAST, qup13, qdss_cti, _, _, _, _, _, _, _),
1369 [47] = PINGROUP(47, EAST, qup14, qdss, _, _, _, _, _, _, _),
1370 [48] = PINGROUP(48, EAST, qup14, qdss, _, _, _, _, _, _, _),
1371 [49] = PINGROUP(49, EAST, qup14, _, qdss_cti, _, _, _, _, _, _),
1372 [50] = PINGROUP(50, EAST, qup14, qdss_cti, _, _, _, _, _, _, _),
1373 [51] = PINGROUP(51, SOUTH, qup4, _, _, _, _, _, _, _, _),
1374 [52] = PINGROUP(52, SOUTH, qup4, _, _, _, _, _, _, _, _),
1375 [53] = PINGROUP(53, SOUTH, qup4, _, _, _, _, _, _, _, _),
1376 [54] = PINGROUP(54, SOUTH, qup4, _, _, _, _, _, _, _, _),
1377 [55] = PINGROUP(55, SOUTH, qup17, qup19, phase_flag, _, _, _, _, _, _),
1378 [56] = PINGROUP(56, SOUTH, qup17, qup19, qdss_cti, phase_flag, _, _, _, _, _),
1379 [57] = PINGROUP(57, SOUTH, qup17, qup19, qdss_cti, phase_flag, _, _, _, _, _),
1380 [58] = PINGROUP(58, SOUTH, qup17, qup19, qdss_cti, phase_flag, _, _, _, _, _),
1381 [59] = PINGROUP(59, SOUTH, rgmii, qup_l4, phase_flag, _, atest_char, _, _, _, _),
1382 [60] = PINGROUP(60, SOUTH, _, nav_pps, nav_pps, atest_usb2, _, _, _, _, _),
1383 [61] = PINGROUP(61, SOUTH, qlink_request, _, _, _, _, _, _, _, _),
1384 [62] = PINGROUP(62, SOUTH, qlink_enable, _, _, _, _, _, _, _, _),
1385 [63] = PINGROUP(63, SOUTH, wmss_reset, atest_usb23, _, _, _, _, _, _, _),
1386 [64] = PINGROUP(64, SOUTH, _, phase_flag, _, _, _, _, _, _, _),
1387 [65] = PINGROUP(65, SOUTH, _, _, _, _, _, _, _, _, _),
1388 [66] = PINGROUP(66, SOUTH, _, _, _, _, _, _, _, _, _),
1389 [67] = PINGROUP(67, SOUTH, _, _, _, _, _, _, _, _, _),
1390 [68] = PINGROUP(68, SOUTH, _, pa_indicator, phase_flag, _, _, _, _, _, _),
1391 [69] = PINGROUP(69, SOUTH, mss_lte, _, _, _, _, _, _, _, _),
1392 [70] = PINGROUP(70, SOUTH, mss_lte, _, _, _, _, _, _, _, _),
1393 [71] = PINGROUP(71, SOUTH, _, _, _, _, _, _, _, _, _),
1394 [72] = PINGROUP(72, SOUTH, _, _, _, _, _, _, _, _, _),
1395 [73] = PINGROUP(73, SOUTH, _, _, _, _, _, _, _, _, _),
1396 [74] = PINGROUP(74, SOUTH, _, _, _, _, _, _, _, _, _),
1397 [75] = PINGROUP(75, SOUTH, _, _, _, _, _, _, _, _, _),
1398 [76] = PINGROUP(76, SOUTH, _, _, _, nav_pps, nav_pps, phase_flag, _, _, _),
1399 [77] = PINGROUP(77, SOUTH, _, _, _, nav_pps, nav_pps, _, _, _, _),
1400 [78] = PINGROUP(78, SOUTH, _, _, _, _, _, _, _, _, _),
1401 [79] = PINGROUP(79, SOUTH, _, _, phase_flag, _, _, _, _, _, _),
1402 [80] = PINGROUP(80, SOUTH, _, _, phase_flag, _, _, _, _, _, _),
1403 [81] = PINGROUP(81, SOUTH, _, _, _, nav_pps, nav_pps, qup_l4, mdp_vsync, emac_pps, _),
1404 [82] = PINGROUP(82, SOUTH, _, _, _, nav_pps, nav_pps, qup_l5, mdp_vsync, _, _),
1405 [83] = PINGROUP(83, NORTH, qup12, qup16, _, qdss, _, _, _, _, _),
1406 [84] = PINGROUP(84, NORTH, qup12, qup16, _, _, _, _, _, _, _),
1407 [85] = PINGROUP(85, NORTH, qup12, qup16, _, _, _, _, _, _, _),
1408 [86] = PINGROUP(86, NORTH, qup12, qup16, _, _, _, _, _, _, _),
1409 [87] = PINGROUP(87, EAST, _, _, _, _, _, _, _, _, _),
1410 [88] = PINGROUP(88, NORTH, tsif1, qup8, qspi_cs, tgu_ch3, _, _, _, _, _),
1411 [89] = PINGROUP(89, NORTH, tsif1, qup8, qspi0, mdp_vsync0, mdp_vsync1, mdp_vsync2, mdp_vsync3, tgu_ch0, _),
1412 [90] = PINGROUP(90, NORTH, tsif1, qup8, qspi1, sdc4, phase_flag, tgu_ch1, _, _, wlan1_adc1),
1413 [91] = PINGROUP(91, NORTH, tsif1, qup8, qspi2, sdc4, vfr_1, phase_flag, tgu_ch2, _, _),
1414 [92] = PINGROUP(92, NORTH, tsif2, qup11, qspi_clk, sdc4, phase_flag, _, wlan2_adc1, _, _),
1415 [93] = PINGROUP(93, NORTH, tsif2, qup11, qspi3, sdc4, phase_flag, _, wlan2_adc0, _, _),
1416 [94] = PINGROUP(94, NORTH, tsif2, qup11, qspi_cs, sdc4, phase_flag, _, _, _, _),
1417 [95] = PINGROUP(95, NORTH, tsif2, qup11, sdc4, qup_l4, _, _, _, _, _),
1418 [96] = PINGROUP(96, NORTH, tsif2, qup_l5, phase_flag, _, _, _, _, _, _),
1419 [97] = PINGROUP(97, NORTH, sd_write, tsif1, qup_l6, _, _, _, _, _, _),
1420 [98] = PINGROUP(98, SOUTH, qup7, ddr_bist, ddr_pxi3, _, _, _, _, _, _),
1421 [99] = PINGROUP(99, SOUTH, qup7, ddr_bist, atest_usb13, ddr_pxi1, _, _, _, _, _),
1422 [100] = PINGROUP(100, SOUTH, qup7, pll_bypassnl, atest_usb12, ddr_pxi1, _, _, _, _, _),
1423 [101] = PINGROUP(101, SOUTH, qup7, pll_reset, ddr_pxi3, _, _, _, _, _, _),
1424 [102] = PINGROUP(102, NORTH, pci_e1, _, _, _, _, _, _, _, _),
1425 [103] = PINGROUP(103, NORTH, pci_e1, _, _, _, _, _, _, _, _),
1426 [104] = PINGROUP(104, NORTH, _, _, _, _, _, _, _, _, _),
1427 [105] = PINGROUP(105, WEST, uim2, _, _, _, _, _, _, _, _),
1428 [106] = PINGROUP(106, WEST, uim2, _, _, _, _, _, _, _, _),
1429 [107] = PINGROUP(107, WEST, uim2, _, _, _, _, _, _, _, _),
1430 [108] = PINGROUP(108, WEST, uim2, _, _, _, _, _, _, _, _),
1431 [109] = PINGROUP(109, WEST, uim1, _, _, _, _, _, _, _, _),
1432 [110] = PINGROUP(110, WEST, uim1, _, _, _, _, _, _, _, _),
1433 [111] = PINGROUP(111, WEST, uim1, _, _, _, _, _, _, _, _),
1434 [112] = PINGROUP(112, WEST, uim1, _, _, _, _, _, _, _, _),
1435 [113] = PINGROUP(113, WEST, uim_batt, usb2phy_ac, aoss_cti, _, _, _, _, _, _),
1436 [114] = PINGROUP(114, SOUTH, qup1, rgmii, phase_flag, _, _, _, _, _, _),
1437 [115] = PINGROUP(115, SOUTH, qup1, rgmii, phase_flag, adsp_ext, _, _, _, _, _),
1438 [116] = PINGROUP(116, SOUTH, qup1, rgmii, phase_flag, _, _, _, _, _, _),
1439 [117] = PINGROUP(117, SOUTH, qup1, rgmii, phase_flag, _, qdss, _, _, _, _),
1440 [118] = PINGROUP(118, SOUTH, rgmii, phase_flag, _, qdss, _, _, _, _, _),
1441 [119] = PINGROUP(119, SOUTH, qup5, rgmii, phase_flag, _, qdss, _, _, _, _),
1442 [120] = PINGROUP(120, SOUTH, qup5, rgmii, phase_flag, _, qdss, _, _, _, _),
1443 [121] = PINGROUP(121, SOUTH, qup5, rgmii, phase_flag, _, qdss, _, _, _, _),
1444 [122] = PINGROUP(122, SOUTH, qup5, rgmii, phase_flag, _, _, _, _, _, _),
1445 [123] = PINGROUP(123, SOUTH, usb2phy_ac, qup_l6, atest_usb22, _, _, _, _, _, _),
1446 [124] = PINGROUP(124, SOUTH, emac_phy, _, _, _, _, _, _, _, _),
1447 [125] = PINGROUP(125, WEST, hs3_mi2s, _, _, _, _, _, _, _, _),
1448 [126] = PINGROUP(126, SOUTH, sec_mi2s, qup2, phase_flag, _, _, _, _, _, _),
1449 [127] = PINGROUP(127, SOUTH, sec_mi2s, qup2, phase_flag, _, _, _, _, _, _),
1450 [128] = PINGROUP(128, SOUTH, sec_mi2s, qup2, phase_flag, _, _, _, _, _, _),
1451 [129] = PINGROUP(129, SOUTH, sec_mi2s, qup2, jitter_bist, atest_usb21, _, _, _, _, _),
1452 [130] = PINGROUP(130, SOUTH, sec_mi2s, pll_bist, atest_usb20, atest_char0, _, _, _, _, _),
1453 [131] = PINGROUP(131, SOUTH, ter_mi2s, gcc_gp1, _, _, _, _, _, _, _),
1454 [132] = PINGROUP(132, SOUTH, ter_mi2s, _, qdss, _, _, _, _, _, _),
1455 [133] = PINGROUP(133, SOUTH, ter_mi2s, qdss, atest_char1, _, _, _, _, _, _),
1456 [134] = PINGROUP(134, SOUTH, ter_mi2s, qdss, atest_char2, _, _, _, _, _, _),
1457 [135] = PINGROUP(135, SOUTH, ter_mi2s, atest_char3, _, _, _, _, _, _, _),
1458 [136] = PINGROUP(136, SOUTH, qua_mi2s, gcc_gp1, _, _, _, _, _, _, _),
1459 [137] = PINGROUP(137, SOUTH, qua_mi2s, gcc_gp2, _, _, _, _, _, _, _),
1460 [138] = PINGROUP(138, SOUTH, qua_mi2s, gcc_gp3, _, _, _, _, _, _, _),
1461 [139] = PINGROUP(139, SOUTH, qua_mi2s, _, _, _, _, _, _, _, _),
1462 [140] = PINGROUP(140, SOUTH, qua_mi2s, _, _, _, _, _, _, _, _),
1463 [141] = PINGROUP(141, SOUTH, qua_mi2s, _, _, _, _, _, _, _, _),
1464 [142] = PINGROUP(142, SOUTH, qua_mi2s, _, _, _, _, _, _, _, _),
1465 [143] = PINGROUP(143, SOUTH, pri_mi2s, _, _, _, _, _, _, _, _),
1466 [144] = PINGROUP(144, SOUTH, pri_mi2s, qup3, phase_flag, _, ddr_pxi0, _, _, _, _),
1467 [145] = PINGROUP(145, SOUTH, pri_mi2s_ws, qup3, phase_flag, ddr_bist, _, vsense_trigger, atest_usb1, ddr_pxi0, _),
1468 [146] = PINGROUP(146, SOUTH, pri_mi2s, qup3, ddr_bist, atest_usb11, ddr_pxi2, _, _, _, _),
1469 [147] = PINGROUP(147, SOUTH, pri_mi2s, qup3, dbg_out, atest_usb10, ddr_pxi2, _, _, _, _),
1470 [148] = PINGROUP(148, SOUTH, spkr_i2s, audio_ref, _, _, _, _, _, _, _),
1471 [149] = PINGROUP(149, SOUTH, lpass_slimbus, spkr_i2s, _, _, _, _, _, _, _),
1472 [150] = PINGROUP(150, SOUTH, lpass_slimbus, spkr_i2s, tsense_pwm1, tsense_pwm2, _, _, _, _, _),
1473 [151] = PINGROUP(151, SOUTH, lpass_slimbus, spkr_i2s, _, _, _, _, _, _, _),
1474 [152] = PINGROUP(152, SOUTH, lpass_slimbus, spkr_i2s, _, _, _, _, _, _, _),
1475 [153] = PINGROUP(153, SOUTH, btfm_slimbus, _, _, _, _, _, _, _, _),
1476 [154] = PINGROUP(154, SOUTH, btfm_slimbus, _, _, _, _, _, _, _, _),
1477 [155] = PINGROUP(155, WEST, hs1_mi2s, _, _, _, _, _, _, _, _),
1478 [156] = PINGROUP(156, WEST, hs1_mi2s, _, _, _, _, _, _, _, _),
1479 [157] = PINGROUP(157, WEST, hs1_mi2s, _, _, _, _, _, _, _, _),
1480 [158] = PINGROUP(158, WEST, hs1_mi2s, _, _, _, _, _, _, _, _),
1481 [159] = PINGROUP(159, WEST, hs1_mi2s, cri_trng0, _, _, _, _, _, _, _),
1482 [160] = PINGROUP(160, WEST, hs2_mi2s, cri_trng1, _, _, _, _, _, _, _),
1483 [161] = PINGROUP(161, WEST, hs2_mi2s, cri_trng, _, _, _, _, _, _, _),
1484 [162] = PINGROUP(162, WEST, hs2_mi2s, sp_cmu, _, _, _, _, _, _, _),
1485 [163] = PINGROUP(163, WEST, hs2_mi2s, prng_rosc, _, _, _, _, _, _, _),
1486 [164] = PINGROUP(164, WEST, hs2_mi2s, _, _, _, _, _, _, _, _),
1487 [165] = PINGROUP(165, WEST, hs3_mi2s, _, _, _, _, _, _, _, _),
1488 [166] = PINGROUP(166, WEST, hs3_mi2s, _, _, _, _, _, _, _, _),
1489 [167] = PINGROUP(167, WEST, hs3_mi2s, _, _, _, _, _, _, _, _),
1490 [168] = PINGROUP(168, WEST, hs3_mi2s, _, _, _, _, _, _, _, _),
1491 [169] = PINGROUP(169, NORTH, _, _, _, _, _, _, _, _, _),
1492 [170] = PINGROUP(170, NORTH, _, _, _, _, _, _, _, _, _),
1493 [171] = PINGROUP(171, NORTH, _, _, _, _, _, _, _, _, _),
1494 [172] = PINGROUP(172, NORTH, _, _, _, _, _, _, _, _, _),
1495 [173] = PINGROUP(173, NORTH, _, _, _, _, _, _, _, _, _),
1496 [174] = PINGROUP(174, NORTH, _, _, _, _, _, _, _, _, _),
1497 [175] = UFS_RESET(ufs_reset, 0xB6000),
1498 [176] = SDC_QDSD_PINGROUP(sdc2_clk, 0xB2000, 14, 6),
1499 [177] = SDC_QDSD_PINGROUP(sdc2_cmd, 0xB2000, 11, 3),
1500 [178] = SDC_QDSD_PINGROUP(sdc2_data, 0xB2000, 9, 0),
1501 };
1502
1503 static const struct msm_gpio_wakeirq_map sm8150_pdc_map[] = {
1504 { 3, 31 }, { 5, 32 }, { 8, 33 }, { 9, 34 }, { 10, 100 },
1505 { 12, 104 }, { 24, 37 }, { 26, 38 }, { 27, 41 }, { 28, 42 },
1506 { 30, 39 }, { 36, 43 }, { 37, 44 }, { 38, 30 }, { 39, 118 },
1507 { 39, 125 }, { 41, 47 }, { 42, 48 }, { 46, 50 }, { 47, 49 },
1508 { 48, 51 }, { 49, 53 }, { 50, 52 }, { 51, 116 }, { 51, 123 },
1509 { 53, 54 }, { 54, 55 }, { 55, 56 }, { 56, 57 }, { 58, 58 },
1510 { 60, 60 }, { 61, 61 }, { 68, 62 }, { 70, 63 }, { 76, 71 },
1511 { 77, 66 }, { 81, 64 }, { 83, 65 }, { 86, 67 }, { 87, 84 },
1512 { 88, 117 }, { 88, 124 }, { 90, 69 }, { 91, 70 }, { 93, 75 },
1513 { 95, 72 }, { 96, 73 }, { 97, 74 }, { 101, 40 }, { 103, 77 },
1514 { 104, 78 }, { 108, 79 }, { 112, 80 }, { 113, 81 }, { 114, 82 },
1515 { 117, 85 }, { 118, 101 }, { 119, 87 }, { 120, 88 }, { 121, 89 },
1516 { 122, 90 }, { 123, 91 }, { 124, 92 }, { 125, 93 }, { 129, 94 },
1517 { 132, 105 }, { 133, 83 }, { 134, 36 }, { 136, 97 }, { 142, 103 },
1518 { 144, 115 }, { 144, 122 }, { 147, 102 }, { 150, 107 },
1519 { 152, 108 }, { 153, 109 }
1520 };
1521
1522 static const struct msm_pinctrl_soc_data sm8150_pinctrl = {
1523 .pins = sm8150_pins,
1524 .npins = ARRAY_SIZE(sm8150_pins),
1525 .functions = sm8150_functions,
1526 .nfunctions = ARRAY_SIZE(sm8150_functions),
1527 .groups = sm8150_groups,
1528 .ngroups = ARRAY_SIZE(sm8150_groups),
1529 .ngpios = 176,
1530 .tiles = sm8150_tiles,
1531 .ntiles = ARRAY_SIZE(sm8150_tiles),
1532 .wakeirq_map = sm8150_pdc_map,
1533 .nwakeirq_map = ARRAY_SIZE(sm8150_pdc_map),
1534 .wakeirq_dual_edge_errata = true,
1535 };
1536
1537 static int sm8150_pinctrl_probe(struct platform_device *pdev)
1538 {
1539 return msm_pinctrl_probe(pdev, &sm8150_pinctrl);
1540 }
1541
1542 static const struct of_device_id sm8150_pinctrl_of_match[] = {
1543 { .compatible = "qcom,sm8150-pinctrl", },
1544 { },
1545 };
1546
1547 static struct platform_driver sm8150_pinctrl_driver = {
1548 .driver = {
1549 .name = "sm8150-pinctrl",
1550 .of_match_table = sm8150_pinctrl_of_match,
1551 },
1552 .probe = sm8150_pinctrl_probe,
1553 .remove = msm_pinctrl_remove,
1554 };
1555
1556 static int __init sm8150_pinctrl_init(void)
1557 {
1558 return platform_driver_register(&sm8150_pinctrl_driver);
1559 }
1560 arch_initcall(sm8150_pinctrl_init);
1561
1562 static void __exit sm8150_pinctrl_exit(void)
1563 {
1564 platform_driver_unregister(&sm8150_pinctrl_driver);
1565 }
1566 module_exit(sm8150_pinctrl_exit);
1567
1568 MODULE_DESCRIPTION("QTI sm8150 pinctrl driver");
1569 MODULE_LICENSE("GPL v2");
1570 MODULE_DEVICE_TABLE(of, sm8150_pinctrl_of_match);
