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OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (c) 2021, The Linux Foundation. All rights reserved.
0004  * Copyright (c) 2021, Konrad Dybcio <konrad.dybcio@somainline.org>
0005  */
0006 
0007 #include <linux/module.h>
0008 #include <linux/of.h>
0009 #include <linux/platform_device.h>
0010 #include <linux/pinctrl/pinctrl.h>
0011 
0012 #include "pinctrl-msm.h"
0013 
0014 #define FUNCTION(fname)                         \
0015     [msm_mux_##fname] = {                       \
0016         .name = #fname,             \
0017         .groups = fname##_groups,               \
0018         .ngroups = ARRAY_SIZE(fname##_groups),  \
0019     }
0020 
0021 #define REG_SIZE 0x1000
0022 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9)    \
0023     {                           \
0024         .name = "gpio" #id,         \
0025         .pins = gpio##id##_pins,        \
0026         .npins = (unsigned int)ARRAY_SIZE(gpio##id##_pins), \
0027         .funcs = (int[]){           \
0028             msm_mux_gpio, /* gpio mode */   \
0029             msm_mux_##f1,           \
0030             msm_mux_##f2,           \
0031             msm_mux_##f3,           \
0032             msm_mux_##f4,           \
0033             msm_mux_##f5,           \
0034             msm_mux_##f6,           \
0035             msm_mux_##f7,           \
0036             msm_mux_##f8,           \
0037             msm_mux_##f9            \
0038         },                      \
0039         .nfuncs = 10,               \
0040         .ctl_reg = REG_SIZE * id,           \
0041         .io_reg = 0x4 + REG_SIZE * id,      \
0042         .intr_cfg_reg = 0x8 + REG_SIZE * id,        \
0043         .intr_status_reg = 0xc + REG_SIZE * id, \
0044         .intr_target_reg = 0x8 + REG_SIZE * id, \
0045         .mux_bit = 2,           \
0046         .pull_bit = 0,          \
0047         .drv_bit = 6,           \
0048         .oe_bit = 9,            \
0049         .in_bit = 0,            \
0050         .out_bit = 1,           \
0051         .intr_enable_bit = 0,       \
0052         .intr_status_bit = 0,       \
0053         .intr_target_bit = 5,       \
0054         .intr_target_kpss_val = 3,  \
0055         .intr_raw_status_bit = 4,   \
0056         .intr_polarity_bit = 1,     \
0057         .intr_detection_bit = 2,    \
0058         .intr_detection_width = 2,  \
0059     }
0060 
0061 #define SDC_PINGROUP(pg_name, ctl, pull, drv)   \
0062     {                           \
0063         .name = #pg_name,           \
0064         .pins = pg_name##_pins,         \
0065         .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins),  \
0066         .ctl_reg = ctl,             \
0067         .io_reg = 0,                \
0068         .intr_cfg_reg = 0,          \
0069         .intr_status_reg = 0,           \
0070         .intr_target_reg = 0,           \
0071         .mux_bit = -1,              \
0072         .pull_bit = pull,           \
0073         .drv_bit = drv,             \
0074         .oe_bit = -1,               \
0075         .in_bit = -1,               \
0076         .out_bit = -1,              \
0077         .intr_enable_bit = -1,          \
0078         .intr_status_bit = -1,          \
0079         .intr_target_bit = -1,          \
0080         .intr_raw_status_bit = -1,      \
0081         .intr_polarity_bit = -1,        \
0082         .intr_detection_bit = -1,       \
0083         .intr_detection_width = -1,     \
0084     }
0085 
0086 #define UFS_RESET(pg_name, offset)              \
0087     {                           \
0088         .name = #pg_name,           \
0089         .pins = pg_name##_pins,         \
0090         .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins),  \
0091         .ctl_reg = offset,          \
0092         .io_reg = offset + 0x4,         \
0093         .intr_cfg_reg = 0,          \
0094         .intr_status_reg = 0,           \
0095         .intr_target_reg = 0,           \
0096         .mux_bit = -1,              \
0097         .pull_bit = 3,              \
0098         .drv_bit = 0,               \
0099         .oe_bit = -1,               \
0100         .in_bit = -1,               \
0101         .out_bit = 0,               \
0102         .intr_enable_bit = -1,          \
0103         .intr_status_bit = -1,          \
0104         .intr_target_bit = -1,          \
0105         .intr_raw_status_bit = -1,      \
0106         .intr_polarity_bit = -1,        \
0107         .intr_detection_bit = -1,       \
0108         .intr_detection_width = -1,     \
0109     }
0110 static const struct pinctrl_pin_desc sm6350_pins[] = {
0111     PINCTRL_PIN(0, "GPIO_0"),
0112     PINCTRL_PIN(1, "GPIO_1"),
0113     PINCTRL_PIN(2, "GPIO_2"),
0114     PINCTRL_PIN(3, "GPIO_3"),
0115     PINCTRL_PIN(4, "GPIO_4"),
0116     PINCTRL_PIN(5, "GPIO_5"),
0117     PINCTRL_PIN(6, "GPIO_6"),
0118     PINCTRL_PIN(7, "GPIO_7"),
0119     PINCTRL_PIN(8, "GPIO_8"),
0120     PINCTRL_PIN(9, "GPIO_9"),
0121     PINCTRL_PIN(10, "GPIO_10"),
0122     PINCTRL_PIN(11, "GPIO_11"),
0123     PINCTRL_PIN(12, "GPIO_12"),
0124     PINCTRL_PIN(13, "GPIO_13"),
0125     PINCTRL_PIN(14, "GPIO_14"),
0126     PINCTRL_PIN(15, "GPIO_15"),
0127     PINCTRL_PIN(16, "GPIO_16"),
0128     PINCTRL_PIN(17, "GPIO_17"),
0129     PINCTRL_PIN(18, "GPIO_18"),
0130     PINCTRL_PIN(19, "GPIO_19"),
0131     PINCTRL_PIN(20, "GPIO_20"),
0132     PINCTRL_PIN(21, "GPIO_21"),
0133     PINCTRL_PIN(22, "GPIO_22"),
0134     PINCTRL_PIN(23, "GPIO_23"),
0135     PINCTRL_PIN(24, "GPIO_24"),
0136     PINCTRL_PIN(25, "GPIO_25"),
0137     PINCTRL_PIN(26, "GPIO_26"),
0138     PINCTRL_PIN(27, "GPIO_27"),
0139     PINCTRL_PIN(28, "GPIO_28"),
0140     PINCTRL_PIN(29, "GPIO_29"),
0141     PINCTRL_PIN(30, "GPIO_30"),
0142     PINCTRL_PIN(31, "GPIO_31"),
0143     PINCTRL_PIN(32, "GPIO_32"),
0144     PINCTRL_PIN(33, "GPIO_33"),
0145     PINCTRL_PIN(34, "GPIO_34"),
0146     PINCTRL_PIN(35, "GPIO_35"),
0147     PINCTRL_PIN(36, "GPIO_36"),
0148     PINCTRL_PIN(37, "GPIO_37"),
0149     PINCTRL_PIN(38, "GPIO_38"),
0150     PINCTRL_PIN(39, "GPIO_39"),
0151     PINCTRL_PIN(40, "GPIO_40"),
0152     PINCTRL_PIN(41, "GPIO_41"),
0153     PINCTRL_PIN(42, "GPIO_42"),
0154     PINCTRL_PIN(43, "GPIO_43"),
0155     PINCTRL_PIN(44, "GPIO_44"),
0156     PINCTRL_PIN(45, "GPIO_45"),
0157     PINCTRL_PIN(46, "GPIO_46"),
0158     PINCTRL_PIN(47, "GPIO_47"),
0159     PINCTRL_PIN(48, "GPIO_48"),
0160     PINCTRL_PIN(49, "GPIO_49"),
0161     PINCTRL_PIN(50, "GPIO_50"),
0162     PINCTRL_PIN(51, "GPIO_51"),
0163     PINCTRL_PIN(52, "GPIO_52"),
0164     PINCTRL_PIN(53, "GPIO_53"),
0165     PINCTRL_PIN(54, "GPIO_54"),
0166     PINCTRL_PIN(55, "GPIO_55"),
0167     PINCTRL_PIN(56, "GPIO_56"),
0168     PINCTRL_PIN(57, "GPIO_57"),
0169     PINCTRL_PIN(58, "GPIO_58"),
0170     PINCTRL_PIN(59, "GPIO_59"),
0171     PINCTRL_PIN(60, "GPIO_60"),
0172     PINCTRL_PIN(61, "GPIO_61"),
0173     PINCTRL_PIN(62, "GPIO_62"),
0174     PINCTRL_PIN(63, "GPIO_63"),
0175     PINCTRL_PIN(64, "GPIO_64"),
0176     PINCTRL_PIN(65, "GPIO_65"),
0177     PINCTRL_PIN(66, "GPIO_66"),
0178     PINCTRL_PIN(67, "GPIO_67"),
0179     PINCTRL_PIN(68, "GPIO_68"),
0180     PINCTRL_PIN(69, "GPIO_69"),
0181     PINCTRL_PIN(70, "GPIO_70"),
0182     PINCTRL_PIN(71, "GPIO_71"),
0183     PINCTRL_PIN(72, "GPIO_72"),
0184     PINCTRL_PIN(73, "GPIO_73"),
0185     PINCTRL_PIN(74, "GPIO_74"),
0186     PINCTRL_PIN(75, "GPIO_75"),
0187     PINCTRL_PIN(76, "GPIO_76"),
0188     PINCTRL_PIN(77, "GPIO_77"),
0189     PINCTRL_PIN(78, "GPIO_78"),
0190     PINCTRL_PIN(79, "GPIO_79"),
0191     PINCTRL_PIN(80, "GPIO_80"),
0192     PINCTRL_PIN(81, "GPIO_81"),
0193     PINCTRL_PIN(82, "GPIO_82"),
0194     PINCTRL_PIN(83, "GPIO_83"),
0195     PINCTRL_PIN(84, "GPIO_84"),
0196     PINCTRL_PIN(85, "GPIO_85"),
0197     PINCTRL_PIN(86, "GPIO_86"),
0198     PINCTRL_PIN(87, "GPIO_87"),
0199     PINCTRL_PIN(88, "GPIO_88"),
0200     PINCTRL_PIN(89, "GPIO_89"),
0201     PINCTRL_PIN(90, "GPIO_90"),
0202     PINCTRL_PIN(91, "GPIO_91"),
0203     PINCTRL_PIN(92, "GPIO_92"),
0204     PINCTRL_PIN(93, "GPIO_93"),
0205     PINCTRL_PIN(94, "GPIO_94"),
0206     PINCTRL_PIN(95, "GPIO_95"),
0207     PINCTRL_PIN(96, "GPIO_96"),
0208     PINCTRL_PIN(97, "GPIO_97"),
0209     PINCTRL_PIN(98, "GPIO_98"),
0210     PINCTRL_PIN(99, "GPIO_99"),
0211     PINCTRL_PIN(100, "GPIO_100"),
0212     PINCTRL_PIN(101, "GPIO_101"),
0213     PINCTRL_PIN(102, "GPIO_102"),
0214     PINCTRL_PIN(103, "GPIO_103"),
0215     PINCTRL_PIN(104, "GPIO_104"),
0216     PINCTRL_PIN(105, "GPIO_105"),
0217     PINCTRL_PIN(106, "GPIO_106"),
0218     PINCTRL_PIN(107, "GPIO_107"),
0219     PINCTRL_PIN(108, "GPIO_108"),
0220     PINCTRL_PIN(109, "GPIO_109"),
0221     PINCTRL_PIN(110, "GPIO_110"),
0222     PINCTRL_PIN(111, "GPIO_111"),
0223     PINCTRL_PIN(112, "GPIO_112"),
0224     PINCTRL_PIN(113, "GPIO_113"),
0225     PINCTRL_PIN(114, "GPIO_114"),
0226     PINCTRL_PIN(115, "GPIO_115"),
0227     PINCTRL_PIN(116, "GPIO_116"),
0228     PINCTRL_PIN(117, "GPIO_117"),
0229     PINCTRL_PIN(118, "GPIO_118"),
0230     PINCTRL_PIN(119, "GPIO_119"),
0231     PINCTRL_PIN(120, "GPIO_120"),
0232     PINCTRL_PIN(121, "GPIO_121"),
0233     PINCTRL_PIN(122, "GPIO_122"),
0234     PINCTRL_PIN(123, "GPIO_123"),
0235     PINCTRL_PIN(124, "GPIO_124"),
0236     PINCTRL_PIN(125, "GPIO_125"),
0237     PINCTRL_PIN(126, "GPIO_126"),
0238     PINCTRL_PIN(127, "GPIO_127"),
0239     PINCTRL_PIN(128, "GPIO_128"),
0240     PINCTRL_PIN(129, "GPIO_129"),
0241     PINCTRL_PIN(130, "GPIO_130"),
0242     PINCTRL_PIN(131, "GPIO_131"),
0243     PINCTRL_PIN(132, "GPIO_132"),
0244     PINCTRL_PIN(133, "GPIO_133"),
0245     PINCTRL_PIN(134, "GPIO_134"),
0246     PINCTRL_PIN(135, "GPIO_135"),
0247     PINCTRL_PIN(136, "GPIO_136"),
0248     PINCTRL_PIN(137, "GPIO_137"),
0249     PINCTRL_PIN(138, "GPIO_138"),
0250     PINCTRL_PIN(139, "GPIO_139"),
0251     PINCTRL_PIN(140, "GPIO_140"),
0252     PINCTRL_PIN(141, "GPIO_141"),
0253     PINCTRL_PIN(142, "GPIO_142"),
0254     PINCTRL_PIN(143, "GPIO_143"),
0255     PINCTRL_PIN(144, "GPIO_144"),
0256     PINCTRL_PIN(145, "GPIO_145"),
0257     PINCTRL_PIN(146, "GPIO_146"),
0258     PINCTRL_PIN(147, "GPIO_147"),
0259     PINCTRL_PIN(148, "GPIO_148"),
0260     PINCTRL_PIN(149, "GPIO_149"),
0261     PINCTRL_PIN(150, "GPIO_150"),
0262     PINCTRL_PIN(151, "GPIO_151"),
0263     PINCTRL_PIN(152, "GPIO_152"),
0264     PINCTRL_PIN(153, "GPIO_153"),
0265     PINCTRL_PIN(154, "GPIO_154"),
0266     PINCTRL_PIN(155, "GPIO_155"),
0267     PINCTRL_PIN(156, "UFS_RESET"),
0268     PINCTRL_PIN(157, "SDC1_RCLK"),
0269     PINCTRL_PIN(158, "SDC1_CLK"),
0270     PINCTRL_PIN(159, "SDC1_CMD"),
0271     PINCTRL_PIN(160, "SDC1_DATA"),
0272     PINCTRL_PIN(161, "SDC2_CLK"),
0273     PINCTRL_PIN(162, "SDC2_CMD"),
0274     PINCTRL_PIN(163, "SDC2_DATA"),
0275 };
0276 
0277 #define DECLARE_MSM_GPIO_PINS(pin) \
0278     static const unsigned int gpio##pin##_pins[] = { pin }
0279 DECLARE_MSM_GPIO_PINS(0);
0280 DECLARE_MSM_GPIO_PINS(1);
0281 DECLARE_MSM_GPIO_PINS(2);
0282 DECLARE_MSM_GPIO_PINS(3);
0283 DECLARE_MSM_GPIO_PINS(4);
0284 DECLARE_MSM_GPIO_PINS(5);
0285 DECLARE_MSM_GPIO_PINS(6);
0286 DECLARE_MSM_GPIO_PINS(7);
0287 DECLARE_MSM_GPIO_PINS(8);
0288 DECLARE_MSM_GPIO_PINS(9);
0289 DECLARE_MSM_GPIO_PINS(10);
0290 DECLARE_MSM_GPIO_PINS(11);
0291 DECLARE_MSM_GPIO_PINS(12);
0292 DECLARE_MSM_GPIO_PINS(13);
0293 DECLARE_MSM_GPIO_PINS(14);
0294 DECLARE_MSM_GPIO_PINS(15);
0295 DECLARE_MSM_GPIO_PINS(16);
0296 DECLARE_MSM_GPIO_PINS(17);
0297 DECLARE_MSM_GPIO_PINS(18);
0298 DECLARE_MSM_GPIO_PINS(19);
0299 DECLARE_MSM_GPIO_PINS(20);
0300 DECLARE_MSM_GPIO_PINS(21);
0301 DECLARE_MSM_GPIO_PINS(22);
0302 DECLARE_MSM_GPIO_PINS(23);
0303 DECLARE_MSM_GPIO_PINS(24);
0304 DECLARE_MSM_GPIO_PINS(25);
0305 DECLARE_MSM_GPIO_PINS(26);
0306 DECLARE_MSM_GPIO_PINS(27);
0307 DECLARE_MSM_GPIO_PINS(28);
0308 DECLARE_MSM_GPIO_PINS(29);
0309 DECLARE_MSM_GPIO_PINS(30);
0310 DECLARE_MSM_GPIO_PINS(31);
0311 DECLARE_MSM_GPIO_PINS(32);
0312 DECLARE_MSM_GPIO_PINS(33);
0313 DECLARE_MSM_GPIO_PINS(34);
0314 DECLARE_MSM_GPIO_PINS(35);
0315 DECLARE_MSM_GPIO_PINS(36);
0316 DECLARE_MSM_GPIO_PINS(37);
0317 DECLARE_MSM_GPIO_PINS(38);
0318 DECLARE_MSM_GPIO_PINS(39);
0319 DECLARE_MSM_GPIO_PINS(40);
0320 DECLARE_MSM_GPIO_PINS(41);
0321 DECLARE_MSM_GPIO_PINS(42);
0322 DECLARE_MSM_GPIO_PINS(43);
0323 DECLARE_MSM_GPIO_PINS(44);
0324 DECLARE_MSM_GPIO_PINS(45);
0325 DECLARE_MSM_GPIO_PINS(46);
0326 DECLARE_MSM_GPIO_PINS(47);
0327 DECLARE_MSM_GPIO_PINS(48);
0328 DECLARE_MSM_GPIO_PINS(49);
0329 DECLARE_MSM_GPIO_PINS(50);
0330 DECLARE_MSM_GPIO_PINS(51);
0331 DECLARE_MSM_GPIO_PINS(52);
0332 DECLARE_MSM_GPIO_PINS(53);
0333 DECLARE_MSM_GPIO_PINS(54);
0334 DECLARE_MSM_GPIO_PINS(55);
0335 DECLARE_MSM_GPIO_PINS(56);
0336 DECLARE_MSM_GPIO_PINS(57);
0337 DECLARE_MSM_GPIO_PINS(58);
0338 DECLARE_MSM_GPIO_PINS(59);
0339 DECLARE_MSM_GPIO_PINS(60);
0340 DECLARE_MSM_GPIO_PINS(61);
0341 DECLARE_MSM_GPIO_PINS(62);
0342 DECLARE_MSM_GPIO_PINS(63);
0343 DECLARE_MSM_GPIO_PINS(64);
0344 DECLARE_MSM_GPIO_PINS(65);
0345 DECLARE_MSM_GPIO_PINS(66);
0346 DECLARE_MSM_GPIO_PINS(67);
0347 DECLARE_MSM_GPIO_PINS(68);
0348 DECLARE_MSM_GPIO_PINS(69);
0349 DECLARE_MSM_GPIO_PINS(70);
0350 DECLARE_MSM_GPIO_PINS(71);
0351 DECLARE_MSM_GPIO_PINS(72);
0352 DECLARE_MSM_GPIO_PINS(73);
0353 DECLARE_MSM_GPIO_PINS(74);
0354 DECLARE_MSM_GPIO_PINS(75);
0355 DECLARE_MSM_GPIO_PINS(76);
0356 DECLARE_MSM_GPIO_PINS(77);
0357 DECLARE_MSM_GPIO_PINS(78);
0358 DECLARE_MSM_GPIO_PINS(79);
0359 DECLARE_MSM_GPIO_PINS(80);
0360 DECLARE_MSM_GPIO_PINS(81);
0361 DECLARE_MSM_GPIO_PINS(82);
0362 DECLARE_MSM_GPIO_PINS(83);
0363 DECLARE_MSM_GPIO_PINS(84);
0364 DECLARE_MSM_GPIO_PINS(85);
0365 DECLARE_MSM_GPIO_PINS(86);
0366 DECLARE_MSM_GPIO_PINS(87);
0367 DECLARE_MSM_GPIO_PINS(88);
0368 DECLARE_MSM_GPIO_PINS(89);
0369 DECLARE_MSM_GPIO_PINS(90);
0370 DECLARE_MSM_GPIO_PINS(91);
0371 DECLARE_MSM_GPIO_PINS(92);
0372 DECLARE_MSM_GPIO_PINS(93);
0373 DECLARE_MSM_GPIO_PINS(94);
0374 DECLARE_MSM_GPIO_PINS(95);
0375 DECLARE_MSM_GPIO_PINS(96);
0376 DECLARE_MSM_GPIO_PINS(97);
0377 DECLARE_MSM_GPIO_PINS(98);
0378 DECLARE_MSM_GPIO_PINS(99);
0379 DECLARE_MSM_GPIO_PINS(100);
0380 DECLARE_MSM_GPIO_PINS(101);
0381 DECLARE_MSM_GPIO_PINS(102);
0382 DECLARE_MSM_GPIO_PINS(103);
0383 DECLARE_MSM_GPIO_PINS(104);
0384 DECLARE_MSM_GPIO_PINS(105);
0385 DECLARE_MSM_GPIO_PINS(106);
0386 DECLARE_MSM_GPIO_PINS(107);
0387 DECLARE_MSM_GPIO_PINS(108);
0388 DECLARE_MSM_GPIO_PINS(109);
0389 DECLARE_MSM_GPIO_PINS(110);
0390 DECLARE_MSM_GPIO_PINS(111);
0391 DECLARE_MSM_GPIO_PINS(112);
0392 DECLARE_MSM_GPIO_PINS(113);
0393 DECLARE_MSM_GPIO_PINS(114);
0394 DECLARE_MSM_GPIO_PINS(115);
0395 DECLARE_MSM_GPIO_PINS(116);
0396 DECLARE_MSM_GPIO_PINS(117);
0397 DECLARE_MSM_GPIO_PINS(118);
0398 DECLARE_MSM_GPIO_PINS(119);
0399 DECLARE_MSM_GPIO_PINS(120);
0400 DECLARE_MSM_GPIO_PINS(121);
0401 DECLARE_MSM_GPIO_PINS(122);
0402 DECLARE_MSM_GPIO_PINS(123);
0403 DECLARE_MSM_GPIO_PINS(124);
0404 DECLARE_MSM_GPIO_PINS(125);
0405 DECLARE_MSM_GPIO_PINS(126);
0406 DECLARE_MSM_GPIO_PINS(127);
0407 DECLARE_MSM_GPIO_PINS(128);
0408 DECLARE_MSM_GPIO_PINS(129);
0409 DECLARE_MSM_GPIO_PINS(130);
0410 DECLARE_MSM_GPIO_PINS(131);
0411 DECLARE_MSM_GPIO_PINS(132);
0412 DECLARE_MSM_GPIO_PINS(133);
0413 DECLARE_MSM_GPIO_PINS(134);
0414 DECLARE_MSM_GPIO_PINS(135);
0415 DECLARE_MSM_GPIO_PINS(136);
0416 DECLARE_MSM_GPIO_PINS(137);
0417 DECLARE_MSM_GPIO_PINS(138);
0418 DECLARE_MSM_GPIO_PINS(139);
0419 DECLARE_MSM_GPIO_PINS(140);
0420 DECLARE_MSM_GPIO_PINS(141);
0421 DECLARE_MSM_GPIO_PINS(142);
0422 DECLARE_MSM_GPIO_PINS(143);
0423 DECLARE_MSM_GPIO_PINS(144);
0424 DECLARE_MSM_GPIO_PINS(145);
0425 DECLARE_MSM_GPIO_PINS(146);
0426 DECLARE_MSM_GPIO_PINS(147);
0427 DECLARE_MSM_GPIO_PINS(148);
0428 DECLARE_MSM_GPIO_PINS(149);
0429 DECLARE_MSM_GPIO_PINS(150);
0430 DECLARE_MSM_GPIO_PINS(151);
0431 DECLARE_MSM_GPIO_PINS(152);
0432 DECLARE_MSM_GPIO_PINS(153);
0433 DECLARE_MSM_GPIO_PINS(154);
0434 DECLARE_MSM_GPIO_PINS(155);
0435 
0436 static const unsigned int ufs_reset_pins[] = { 156 };
0437 static const unsigned int sdc1_rclk_pins[] = { 157 };
0438 static const unsigned int sdc1_clk_pins[] = { 158 };
0439 static const unsigned int sdc1_cmd_pins[] = { 159 };
0440 static const unsigned int sdc1_data_pins[] = { 160 };
0441 static const unsigned int sdc2_clk_pins[] = { 161 };
0442 static const unsigned int sdc2_cmd_pins[] = { 162 };
0443 static const unsigned int sdc2_data_pins[] = { 163 };
0444 
0445 enum sm6350_functions {
0446     msm_mux_adsp_ext,
0447     msm_mux_agera_pll,
0448     msm_mux_atest_char,
0449     msm_mux_atest_char0,
0450     msm_mux_atest_char1,
0451     msm_mux_atest_char2,
0452     msm_mux_atest_char3,
0453     msm_mux_atest_tsens,
0454     msm_mux_atest_tsens2,
0455     msm_mux_atest_usb,
0456     msm_mux_audio_ref,
0457     msm_mux_btfm_slimbus,
0458     msm_mux_cam_mclk0,
0459     msm_mux_cam_mclk1,
0460     msm_mux_cam_mclk2,
0461     msm_mux_cam_mclk3,
0462     msm_mux_cam_mclk4,
0463     msm_mux_cci_async,
0464     msm_mux_cci_i2c,
0465     msm_mux_cci_timer0,
0466     msm_mux_cci_timer1,
0467     msm_mux_cci_timer2,
0468     msm_mux_cci_timer3,
0469     msm_mux_cci_timer4,
0470     msm_mux_cri_trng,
0471     msm_mux_dbg_out,
0472     msm_mux_ddr_bist,
0473     msm_mux_ddr_pxi0,
0474     msm_mux_ddr_pxi1,
0475     msm_mux_ddr_pxi2,
0476     msm_mux_ddr_pxi3,
0477     msm_mux_dp_hot,
0478     msm_mux_edp_lcd,
0479     msm_mux_gcc_gp1,
0480     msm_mux_gcc_gp2,
0481     msm_mux_gcc_gp3,
0482     msm_mux_gp_pdm0,
0483     msm_mux_gp_pdm1,
0484     msm_mux_gp_pdm2,
0485     msm_mux_gpio,
0486     msm_mux_gps_tx,
0487     msm_mux_ibi_i3c,
0488     msm_mux_jitter_bist,
0489     msm_mux_ldo_en,
0490     msm_mux_ldo_update,
0491     msm_mux_lpass_ext,
0492     msm_mux_m_voc,
0493     msm_mux_mclk,
0494     msm_mux_mdp_vsync,
0495     msm_mux_mdp_vsync0,
0496     msm_mux_mdp_vsync1,
0497     msm_mux_mdp_vsync2,
0498     msm_mux_mdp_vsync3,
0499     msm_mux_mi2s_0,
0500     msm_mux_mi2s_1,
0501     msm_mux_mi2s_2,
0502     msm_mux_mss_lte,
0503     msm_mux_nav_gpio,
0504     msm_mux_nav_pps,
0505     msm_mux_pa_indicator,
0506     msm_mux_pcie0_clk,
0507     msm_mux_phase_flag,
0508     msm_mux_pll_bist,
0509     msm_mux_pll_bypassnl,
0510     msm_mux_pll_reset,
0511     msm_mux_prng_rosc,
0512     msm_mux_qdss_cti,
0513     msm_mux_qdss_gpio,
0514     msm_mux_qdss_gpio0,
0515     msm_mux_qdss_gpio1,
0516     msm_mux_qdss_gpio10,
0517     msm_mux_qdss_gpio11,
0518     msm_mux_qdss_gpio12,
0519     msm_mux_qdss_gpio13,
0520     msm_mux_qdss_gpio14,
0521     msm_mux_qdss_gpio15,
0522     msm_mux_qdss_gpio2,
0523     msm_mux_qdss_gpio3,
0524     msm_mux_qdss_gpio4,
0525     msm_mux_qdss_gpio5,
0526     msm_mux_qdss_gpio6,
0527     msm_mux_qdss_gpio7,
0528     msm_mux_qdss_gpio8,
0529     msm_mux_qdss_gpio9,
0530     msm_mux_qlink0_enable,
0531     msm_mux_qlink0_request,
0532     msm_mux_qlink0_wmss,
0533     msm_mux_qlink1_enable,
0534     msm_mux_qlink1_request,
0535     msm_mux_qlink1_wmss,
0536     msm_mux_qup00,
0537     msm_mux_qup01,
0538     msm_mux_qup02,
0539     msm_mux_qup10,
0540     msm_mux_qup11,
0541     msm_mux_qup12,
0542     msm_mux_qup13_f1,
0543     msm_mux_qup13_f2,
0544     msm_mux_qup14,
0545     msm_mux_rffe0_clk,
0546     msm_mux_rffe0_data,
0547     msm_mux_rffe1_clk,
0548     msm_mux_rffe1_data,
0549     msm_mux_rffe2_clk,
0550     msm_mux_rffe2_data,
0551     msm_mux_rffe3_clk,
0552     msm_mux_rffe3_data,
0553     msm_mux_rffe4_clk,
0554     msm_mux_rffe4_data,
0555     msm_mux_sd_write,
0556     msm_mux_sdc1_tb,
0557     msm_mux_sdc2_tb,
0558     msm_mux_sp_cmu,
0559     msm_mux_tgu_ch0,
0560     msm_mux_tgu_ch1,
0561     msm_mux_tgu_ch2,
0562     msm_mux_tgu_ch3,
0563     msm_mux_tsense_pwm1,
0564     msm_mux_tsense_pwm2,
0565     msm_mux_uim1_clk,
0566     msm_mux_uim1_data,
0567     msm_mux_uim1_present,
0568     msm_mux_uim1_reset,
0569     msm_mux_uim2_clk,
0570     msm_mux_uim2_data,
0571     msm_mux_uim2_present,
0572     msm_mux_uim2_reset,
0573     msm_mux_usb_phy,
0574     msm_mux_vfr_1,
0575     msm_mux_vsense_trigger,
0576     msm_mux_wlan1_adc0,
0577     msm_mux_wlan1_adc1,
0578     msm_mux_wlan2_adc0,
0579     msm_mux_wlan2_adc1,
0580     msm_mux__,
0581 };
0582 
0583 static const char * const ibi_i3c_groups[] = {
0584     "gpio0", "gpio1",
0585 };
0586 static const char * const gpio_groups[] = {
0587     "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
0588     "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
0589     "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
0590     "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
0591     "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
0592     "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
0593     "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
0594     "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
0595     "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
0596     "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
0597     "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
0598     "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
0599     "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
0600     "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
0601     "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
0602     "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
0603     "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
0604     "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122",
0605     "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", "gpio128",
0606     "gpio129", "gpio130", "gpio131", "gpio132", "gpio133", "gpio134",
0607     "gpio135", "gpio136", "gpio137", "gpio138", "gpio139", "gpio140",
0608     "gpio141", "gpio142", "gpio143", "gpio144", "gpio145", "gpio146",
0609     "gpio147", "gpio148", "gpio149", "gpio150", "gpio151", "gpio152",
0610     "gpio153", "gpio154", "gpio155",
0611 };
0612 static const char * const cri_trng_groups[] = {
0613     "gpio0", "gpio1", "gpio2",
0614 };
0615 static const char * const qup00_groups[] = {
0616     "gpio0", "gpio1", "gpio2", "gpio3",
0617 };
0618 static const char * const cci_i2c_groups[] = {
0619     "gpio2", "gpio3", "gpio39", "gpio40", "gpio41", "gpio42", "gpio43",
0620     "gpio44",
0621 };
0622 static const char * const qdss_cti_groups[] = {
0623     "gpio2", "gpio3", "gpio6", "gpio7", "gpio61", "gpio62", "gpio86",
0624     "gpio87",
0625 };
0626 static const char * const sp_cmu_groups[] = {
0627     "gpio3",
0628 };
0629 static const char * const dbg_out_groups[] = {
0630     "gpio3",
0631 };
0632 static const char * const qup14_groups[] = {
0633     "gpio4", "gpio4", "gpio5", "gpio5",
0634 };
0635 static const char * const sdc1_tb_groups[] = {
0636     "gpio4",
0637 };
0638 static const char * const sdc2_tb_groups[] = {
0639     "gpio5",
0640 };
0641 static const char * const mdp_vsync_groups[] = {
0642     "gpio6", "gpio23", "gpio24", "gpio27", "gpio28",
0643 };
0644 static const char * const gp_pdm1_groups[] = {
0645     "gpio8", "gpio52",
0646 };
0647 static const char * const qdss_gpio_groups[] = {
0648     "gpio8", "gpio9", "gpio63", "gpio64",
0649 };
0650 static const char * const m_voc_groups[] = {
0651     "gpio12",
0652 };
0653 static const char * const dp_hot_groups[] = {
0654     "gpio12", "gpio118",
0655 };
0656 static const char * const phase_flag_groups[] = {
0657     "gpio12", "gpio17", "gpio18", "gpio34", "gpio35",
0658     "gpio36", "gpio37", "gpio38", "gpio39", "gpio40",
0659     "gpio41", "gpio42", "gpio43", "gpio44", "gpio45",
0660     "gpio46", "gpio47", "gpio48", "gpio49", "gpio50",
0661     "gpio51", "gpio52", "gpio53", "gpio56", "gpio57",
0662     "gpio60", "gpio61", "gpio62", "gpio63", "gpio64",
0663     "gpio67", "gpio68",
0664 };
0665 static const char * const qup10_groups[] = {
0666     "gpio13", "gpio14", "gpio15", "gpio16", "gpio17",
0667 };
0668 static const char * const pll_bypassnl_groups[] = {
0669     "gpio13",
0670 };
0671 static const char * const pll_reset_groups[] = {
0672     "gpio14",
0673 };
0674 static const char * const qup12_groups[] = {
0675     "gpio19", "gpio19", "gpio20", "gpio20",
0676 };
0677 static const char * const ddr_bist_groups[] = {
0678     "gpio19", "gpio20", "gpio21", "gpio22",
0679 };
0680 static const char * const gcc_gp2_groups[] = {
0681     "gpio21",
0682 };
0683 static const char * const gcc_gp3_groups[] = {
0684     "gpio22",
0685 };
0686 static const char * const edp_lcd_groups[] = {
0687     "gpio23",
0688 };
0689 static const char * const qup13_f1_groups[] = {
0690     "gpio25", "gpio26",
0691 };
0692 static const char * const qup13_f2_groups[] = {
0693     "gpio25", "gpio26",
0694 };
0695 static const char * const qup11_groups[] = {
0696     "gpio27", "gpio27", "gpio28", "gpio28",
0697 };
0698 static const char * const pll_bist_groups[] = {
0699     "gpio27",
0700 };
0701 static const char * const qdss_gpio14_groups[] = {
0702     "gpio27", "gpio36",
0703 };
0704 static const char * const qdss_gpio15_groups[] = {
0705     "gpio28", "gpio37",
0706 };
0707 static const char * const cam_mclk0_groups[] = {
0708     "gpio29",
0709 };
0710 static const char * const cam_mclk1_groups[] = {
0711     "gpio30",
0712 };
0713 static const char * const cam_mclk2_groups[] = {
0714     "gpio31",
0715 };
0716 static const char * const cam_mclk3_groups[] = {
0717     "gpio32",
0718 };
0719 static const char * const cam_mclk4_groups[] = {
0720     "gpio33",
0721 };
0722 static const char * const cci_timer0_groups[] = {
0723     "gpio34",
0724 };
0725 static const char * const qdss_gpio12_groups[] = {
0726     "gpio34", "gpio52",
0727 };
0728 static const char * const cci_timer1_groups[] = {
0729     "gpio35",
0730 };
0731 static const char * const cci_async_groups[] = {
0732     "gpio35", "gpio36", "gpio48", "gpio52", "gpio53",
0733 };
0734 static const char * const qdss_gpio13_groups[] = {
0735     "gpio35", "gpio53",
0736 };
0737 static const char * const cci_timer2_groups[] = {
0738     "gpio36",
0739 };
0740 static const char * const cci_timer3_groups[] = {
0741     "gpio37",
0742 };
0743 static const char * const gp_pdm0_groups[] = {
0744     "gpio37", "gpio68",
0745 };
0746 static const char * const cci_timer4_groups[] = {
0747     "gpio38",
0748 };
0749 static const char * const qdss_gpio2_groups[] = {
0750     "gpio38", "gpio41",
0751 };
0752 static const char * const qdss_gpio0_groups[] = {
0753     "gpio39", "gpio65",
0754 };
0755 static const char * const qdss_gpio1_groups[] = {
0756     "gpio40", "gpio66",
0757 };
0758 static const char * const qdss_gpio3_groups[] = {
0759     "gpio42", "gpio47",
0760 };
0761 static const char * const qdss_gpio4_groups[] = {
0762     "gpio43", "gpio88",
0763 };
0764 static const char * const qdss_gpio5_groups[] = {
0765     "gpio44", "gpio89",
0766 };
0767 static const char * const qup02_groups[] = {
0768     "gpio45", "gpio46", "gpio48", "gpio56", "gpio57",
0769 };
0770 static const char * const qdss_gpio6_groups[] = {
0771     "gpio45", "gpio90",
0772 };
0773 static const char * const qdss_gpio7_groups[] = {
0774     "gpio46", "gpio91",
0775 };
0776 static const char * const mdp_vsync0_groups[] = {
0777     "gpio47",
0778 };
0779 static const char * const mdp_vsync1_groups[] = {
0780     "gpio48",
0781 };
0782 static const char * const gcc_gp1_groups[] = {
0783     "gpio48", "gpio58",
0784 };
0785 static const char * const qdss_gpio8_groups[] = {
0786     "gpio48", "gpio92",
0787 };
0788 static const char * const vfr_1_groups[] = {
0789     "gpio49",
0790 };
0791 static const char * const qdss_gpio9_groups[] = {
0792     "gpio49", "gpio93",
0793 };
0794 static const char * const qdss_gpio10_groups[] = {
0795     "gpio50", "gpio56",
0796 };
0797 static const char * const qdss_gpio11_groups[] = {
0798     "gpio51", "gpio57",
0799 };
0800 static const char * const mdp_vsync2_groups[] = {
0801     "gpio56",
0802 };
0803 static const char * const mdp_vsync3_groups[] = {
0804     "gpio57",
0805 };
0806 static const char * const gp_pdm2_groups[] = {
0807     "gpio57",
0808 };
0809 static const char * const audio_ref_groups[] = {
0810     "gpio60",
0811 };
0812 static const char * const lpass_ext_groups[] = {
0813     "gpio60", "gpio93",
0814 };
0815 static const char * const mi2s_2_groups[] = {
0816     "gpio60", "gpio72", "gpio73", "gpio74",
0817 };
0818 static const char * const qup01_groups[] = {
0819     "gpio61", "gpio62", "gpio63", "gpio64",
0820 };
0821 static const char * const tgu_ch0_groups[] = {
0822     "gpio61",
0823 };
0824 static const char * const tgu_ch1_groups[] = {
0825     "gpio62",
0826 };
0827 static const char * const tgu_ch2_groups[] = {
0828     "gpio63",
0829 };
0830 static const char * const tgu_ch3_groups[] = {
0831     "gpio64",
0832 };
0833 static const char * const mss_lte_groups[] = {
0834     "gpio65", "gpio66",
0835 };
0836 static const char * const btfm_slimbus_groups[] = {
0837     "gpio67", "gpio68", "gpio86", "gpio87",
0838 };
0839 static const char * const mi2s_1_groups[] = {
0840     "gpio67", "gpio68", "gpio86", "gpio87",
0841 };
0842 static const char * const uim2_data_groups[] = {
0843     "gpio75",
0844 };
0845 static const char * const uim2_clk_groups[] = {
0846     "gpio76",
0847 };
0848 static const char * const uim2_reset_groups[] = {
0849     "gpio77",
0850 };
0851 static const char * const uim2_present_groups[] = {
0852     "gpio78",
0853 };
0854 static const char * const uim1_data_groups[] = {
0855     "gpio79",
0856 };
0857 static const char * const uim1_clk_groups[] = {
0858     "gpio80",
0859 };
0860 static const char * const uim1_reset_groups[] = {
0861     "gpio81",
0862 };
0863 static const char * const uim1_present_groups[] = {
0864     "gpio82",
0865 };
0866 static const char * const atest_usb_groups[] = {
0867     "gpio83", "gpio84", "gpio85", "gpio86",
0868     "gpio87", "gpio88", "gpio89", "gpio90",
0869     "gpio91", "gpio92",
0870 };
0871 static const char * const sd_write_groups[] = {
0872     "gpio85",
0873 };
0874 static const char * const ddr_pxi0_groups[] = {
0875     "gpio86", "gpio90",
0876 };
0877 static const char * const adsp_ext_groups[] = {
0878     "gpio87",
0879 };
0880 static const char * const ddr_pxi1_groups[] = {
0881     "gpio87", "gpio91",
0882 };
0883 static const char * const mi2s_0_groups[] = {
0884     "gpio88", "gpio89", "gpio90", "gpio91",
0885 };
0886 static const char * const ddr_pxi2_groups[] = {
0887     "gpio88", "gpio92",
0888 };
0889 static const char * const tsense_pwm1_groups[] = {
0890     "gpio88",
0891 };
0892 static const char * const tsense_pwm2_groups[] = {
0893     "gpio88",
0894 };
0895 static const char * const agera_pll_groups[] = {
0896     "gpio89",
0897 };
0898 static const char * const vsense_trigger_groups[] = {
0899     "gpio89",
0900 };
0901 static const char * const ddr_pxi3_groups[] = {
0902     "gpio89", "gpio93",
0903 };
0904 static const char * const jitter_bist_groups[] = {
0905     "gpio90",
0906 };
0907 static const char * const wlan1_adc0_groups[] = {
0908     "gpio90",
0909 };
0910 static const char * const wlan2_adc0_groups[] = {
0911     "gpio91",
0912 };
0913 static const char * const atest_tsens_groups[] = {
0914     "gpio92",
0915 };
0916 static const char * const wlan1_adc1_groups[] = {
0917     "gpio92",
0918 };
0919 static const char * const mclk_groups[] = {
0920     "gpio93",
0921 };
0922 static const char * const atest_tsens2_groups[] = {
0923     "gpio93",
0924 };
0925 static const char * const wlan2_adc1_groups[] = {
0926     "gpio93",
0927 };
0928 static const char * const ldo_en_groups[] = {
0929     "gpio95",
0930 };
0931 static const char * const atest_char_groups[] = {
0932     "gpio95",
0933 };
0934 static const char * const ldo_update_groups[] = {
0935     "gpio96",
0936 };
0937 static const char * const atest_char0_groups[] = {
0938     "gpio96",
0939 };
0940 static const char * const prng_rosc_groups[] = {
0941     "gpio97",
0942 };
0943 static const char * const atest_char1_groups[] = {
0944     "gpio97",
0945 };
0946 static const char * const atest_char2_groups[] = {
0947     "gpio98",
0948 };
0949 static const char * const atest_char3_groups[] = {
0950     "gpio99",
0951 };
0952 static const char * const nav_gpio_groups[] = {
0953     "gpio101", "gpio102",
0954 };
0955 static const char * const nav_pps_groups[] = {
0956     "gpio101", "gpio101", "gpio102", "gpio102",
0957 };
0958 static const char * const gps_tx_groups[] = {
0959     "gpio101", "gpio102", "gpio107", "gpio108",
0960 };
0961 static const char * const qlink0_wmss_groups[] = {
0962     "gpio103",
0963 };
0964 static const char * const qlink0_request_groups[] = {
0965     "gpio104",
0966 };
0967 static const char * const qlink0_enable_groups[] = {
0968     "gpio105",
0969 };
0970 static const char * const qlink1_wmss_groups[] = {
0971     "gpio106",
0972 };
0973 static const char * const qlink1_request_groups[] = {
0974     "gpio107",
0975 };
0976 static const char * const qlink1_enable_groups[] = {
0977     "gpio108",
0978 };
0979 static const char * const rffe0_data_groups[] = {
0980     "gpio109",
0981 };
0982 static const char * const rffe0_clk_groups[] = {
0983     "gpio110",
0984 };
0985 static const char * const rffe1_data_groups[] = {
0986     "gpio111",
0987 };
0988 static const char * const rffe1_clk_groups[] = {
0989     "gpio112",
0990 };
0991 static const char * const rffe2_data_groups[] = {
0992     "gpio113",
0993 };
0994 static const char * const rffe2_clk_groups[] = {
0995     "gpio114",
0996 };
0997 static const char * const rffe3_data_groups[] = {
0998     "gpio115",
0999 };
1000 static const char * const rffe3_clk_groups[] = {
1001     "gpio116",
1002 };
1003 static const char * const rffe4_data_groups[] = {
1004     "gpio117",
1005 };
1006 static const char * const rffe4_clk_groups[] = {
1007     "gpio118",
1008 };
1009 static const char * const pa_indicator_groups[] = {
1010     "gpio118",
1011 };
1012 static const char * const pcie0_clk_groups[] = {
1013     "gpio122",
1014 };
1015 static const char * const usb_phy_groups[] = {
1016     "gpio124",
1017 };
1018 
1019 static const struct msm_function sm6350_functions[] = {
1020     FUNCTION(adsp_ext),
1021     FUNCTION(agera_pll),
1022     FUNCTION(atest_char),
1023     FUNCTION(atest_char0),
1024     FUNCTION(atest_char1),
1025     FUNCTION(atest_char2),
1026     FUNCTION(atest_char3),
1027     FUNCTION(atest_tsens),
1028     FUNCTION(atest_tsens2),
1029     FUNCTION(atest_usb),
1030     FUNCTION(audio_ref),
1031     FUNCTION(btfm_slimbus),
1032     FUNCTION(cam_mclk0),
1033     FUNCTION(cam_mclk1),
1034     FUNCTION(cam_mclk2),
1035     FUNCTION(cam_mclk3),
1036     FUNCTION(cam_mclk4),
1037     FUNCTION(cci_async),
1038     FUNCTION(cci_i2c),
1039     FUNCTION(cci_timer0),
1040     FUNCTION(cci_timer1),
1041     FUNCTION(cci_timer2),
1042     FUNCTION(cci_timer3),
1043     FUNCTION(cci_timer4),
1044     FUNCTION(cri_trng),
1045     FUNCTION(dbg_out),
1046     FUNCTION(ddr_bist),
1047     FUNCTION(ddr_pxi0),
1048     FUNCTION(ddr_pxi1),
1049     FUNCTION(ddr_pxi2),
1050     FUNCTION(ddr_pxi3),
1051     FUNCTION(dp_hot),
1052     FUNCTION(edp_lcd),
1053     FUNCTION(gcc_gp1),
1054     FUNCTION(gcc_gp2),
1055     FUNCTION(gcc_gp3),
1056     FUNCTION(gp_pdm0),
1057     FUNCTION(gp_pdm1),
1058     FUNCTION(gp_pdm2),
1059     FUNCTION(gpio),
1060     FUNCTION(gps_tx),
1061     FUNCTION(ibi_i3c),
1062     FUNCTION(jitter_bist),
1063     FUNCTION(ldo_en),
1064     FUNCTION(ldo_update),
1065     FUNCTION(lpass_ext),
1066     FUNCTION(m_voc),
1067     FUNCTION(mclk),
1068     FUNCTION(mdp_vsync),
1069     FUNCTION(mdp_vsync0),
1070     FUNCTION(mdp_vsync1),
1071     FUNCTION(mdp_vsync2),
1072     FUNCTION(mdp_vsync3),
1073     FUNCTION(mi2s_0),
1074     FUNCTION(mi2s_1),
1075     FUNCTION(mi2s_2),
1076     FUNCTION(mss_lte),
1077     FUNCTION(nav_gpio),
1078     FUNCTION(nav_pps),
1079     FUNCTION(pa_indicator),
1080     FUNCTION(pcie0_clk),
1081     FUNCTION(phase_flag),
1082     FUNCTION(pll_bist),
1083     FUNCTION(pll_bypassnl),
1084     FUNCTION(pll_reset),
1085     FUNCTION(prng_rosc),
1086     FUNCTION(qdss_cti),
1087     FUNCTION(qdss_gpio),
1088     FUNCTION(qdss_gpio0),
1089     FUNCTION(qdss_gpio1),
1090     FUNCTION(qdss_gpio10),
1091     FUNCTION(qdss_gpio11),
1092     FUNCTION(qdss_gpio12),
1093     FUNCTION(qdss_gpio13),
1094     FUNCTION(qdss_gpio14),
1095     FUNCTION(qdss_gpio15),
1096     FUNCTION(qdss_gpio2),
1097     FUNCTION(qdss_gpio3),
1098     FUNCTION(qdss_gpio4),
1099     FUNCTION(qdss_gpio5),
1100     FUNCTION(qdss_gpio6),
1101     FUNCTION(qdss_gpio7),
1102     FUNCTION(qdss_gpio8),
1103     FUNCTION(qdss_gpio9),
1104     FUNCTION(qlink0_enable),
1105     FUNCTION(qlink0_request),
1106     FUNCTION(qlink0_wmss),
1107     FUNCTION(qlink1_enable),
1108     FUNCTION(qlink1_request),
1109     FUNCTION(qlink1_wmss),
1110     FUNCTION(qup00),
1111     FUNCTION(qup01),
1112     FUNCTION(qup02),
1113     FUNCTION(qup10),
1114     FUNCTION(qup11),
1115     FUNCTION(qup12),
1116     FUNCTION(qup13_f1),
1117     FUNCTION(qup13_f2),
1118     FUNCTION(qup14),
1119     FUNCTION(rffe0_clk),
1120     FUNCTION(rffe0_data),
1121     FUNCTION(rffe1_clk),
1122     FUNCTION(rffe1_data),
1123     FUNCTION(rffe2_clk),
1124     FUNCTION(rffe2_data),
1125     FUNCTION(rffe3_clk),
1126     FUNCTION(rffe3_data),
1127     FUNCTION(rffe4_clk),
1128     FUNCTION(rffe4_data),
1129     FUNCTION(sd_write),
1130     FUNCTION(sdc1_tb),
1131     FUNCTION(sdc2_tb),
1132     FUNCTION(sp_cmu),
1133     FUNCTION(tgu_ch0),
1134     FUNCTION(tgu_ch1),
1135     FUNCTION(tgu_ch2),
1136     FUNCTION(tgu_ch3),
1137     FUNCTION(tsense_pwm1),
1138     FUNCTION(tsense_pwm2),
1139     FUNCTION(uim1_clk),
1140     FUNCTION(uim1_data),
1141     FUNCTION(uim1_present),
1142     FUNCTION(uim1_reset),
1143     FUNCTION(uim2_clk),
1144     FUNCTION(uim2_data),
1145     FUNCTION(uim2_present),
1146     FUNCTION(uim2_reset),
1147     FUNCTION(usb_phy),
1148     FUNCTION(vfr_1),
1149     FUNCTION(vsense_trigger),
1150     FUNCTION(wlan1_adc0),
1151     FUNCTION(wlan1_adc1),
1152     FUNCTION(wlan2_adc0),
1153     FUNCTION(wlan2_adc1),
1154 };
1155 
1156 /*
1157  * Every pin is maintained as a single group, and missing or non-existing pin
1158  * would be maintained as dummy group to synchronize pin group index with
1159  * pin descriptor registered with pinctrl core.
1160  * Clients would not be able to request these dummy pin groups.
1161  */
1162 static const struct msm_pingroup sm6350_groups[] = {
1163     [0] = PINGROUP(0, ibi_i3c, qup00, cri_trng, _, _, _, _, _, _),
1164     [1] = PINGROUP(1, ibi_i3c, qup00, cri_trng, _, _, _, _, _, _),
1165     [2] = PINGROUP(2, qup00, cci_i2c, cri_trng, qdss_cti, _, _, _, _, _),
1166     [3] = PINGROUP(3, qup00, cci_i2c, sp_cmu, dbg_out, qdss_cti, _, _, _, _),
1167     [4] = PINGROUP(4, qup14, qup14, sdc1_tb, _, _, _, _, _, _),
1168     [5] = PINGROUP(5, qup14, qup14, sdc2_tb, _, _, _, _, _, _),
1169     [6] = PINGROUP(6, mdp_vsync, qdss_cti, _, _, _, _, _, _, _),
1170     [7] = PINGROUP(7, qdss_cti, _, _, _, _, _, _, _, _),
1171     [8] = PINGROUP(8, gp_pdm1, qdss_gpio, _, _, _, _, _, _, _),
1172     [9] = PINGROUP(9, qdss_gpio, _, _, _, _, _, _, _, _),
1173     [10] = PINGROUP(10, _, _, _, _, _, _, _, _, _),
1174     [11] = PINGROUP(11, _, _, _, _, _, _, _, _, _),
1175     [12] = PINGROUP(12, m_voc, dp_hot, _, phase_flag, _, _, _, _, _),
1176     [13] = PINGROUP(13, qup10, pll_bypassnl, _, _, _, _, _, _, _),
1177     [14] = PINGROUP(14, qup10, pll_reset, _, _, _, _, _, _, _),
1178     [15] = PINGROUP(15, qup10, _, _, _, _, _, _, _, _),
1179     [16] = PINGROUP(16, qup10, _, _, _, _, _, _, _, _),
1180     [17] = PINGROUP(17, _, phase_flag, qup10, _, _, _, _, _, _),
1181     [18] = PINGROUP(18, _, phase_flag, _, _, _, _, _, _, _),
1182     [19] = PINGROUP(19, qup12, qup12, ddr_bist, _, _, _, _, _, _),
1183     [20] = PINGROUP(20, qup12, qup12, ddr_bist, _, _, _, _, _, _),
1184     [21] = PINGROUP(21, gcc_gp2, ddr_bist, _, _, _, _, _, _, _),
1185     [22] = PINGROUP(22, gcc_gp3, ddr_bist, _, _, _, _, _, _, _),
1186     [23] = PINGROUP(23, mdp_vsync, edp_lcd, _, _, _, _, _, _, _),
1187     [24] = PINGROUP(24, mdp_vsync, _, _, _, _, _, _, _, _),
1188     [25] = PINGROUP(25, qup13_f1, qup13_f2, _, _, _, _, _, _, _),
1189     [26] = PINGROUP(26, qup13_f1, qup13_f2, _, _, _, _, _, _, _),
1190     [27] = PINGROUP(27, qup11, qup11, mdp_vsync, pll_bist, _, qdss_gpio14, _, _, _),
1191     [28] = PINGROUP(28, qup11, qup11, mdp_vsync, _, qdss_gpio15, _, _, _, _),
1192     [29] = PINGROUP(29, cam_mclk0, _, _, _, _, _, _, _, _),
1193     [30] = PINGROUP(30, cam_mclk1, _, _, _, _, _, _, _, _),
1194     [31] = PINGROUP(31, cam_mclk2, _, _, _, _, _, _, _, _),
1195     [32] = PINGROUP(32, cam_mclk3, _, _, _, _, _, _, _, _),
1196     [33] = PINGROUP(33, cam_mclk4, _, _, _, _, _, _, _, _),
1197     [34] = PINGROUP(34, cci_timer0, _, phase_flag, qdss_gpio12, _, _, _, _, _),
1198     [35] = PINGROUP(35, cci_timer1, cci_async, _, phase_flag, qdss_gpio13, _, _, _, _),
1199     [36] = PINGROUP(36, cci_timer2, cci_async, _, phase_flag, qdss_gpio14, _, _, _, _),
1200     [37] = PINGROUP(37, cci_timer3, gp_pdm0, _, phase_flag, qdss_gpio15, _, _, _, _),
1201     [38] = PINGROUP(38, cci_timer4, _, phase_flag, qdss_gpio2, _, _, _, _, _),
1202     [39] = PINGROUP(39, cci_i2c, _, phase_flag, qdss_gpio0, _, _, _, _, _),
1203     [40] = PINGROUP(40, cci_i2c, _, phase_flag, qdss_gpio1, _, _, _, _, _),
1204     [41] = PINGROUP(41, cci_i2c, _, phase_flag, qdss_gpio2, _, _, _, _, _),
1205     [42] = PINGROUP(42, cci_i2c, _, phase_flag, qdss_gpio3, _, _, _, _, _),
1206     [43] = PINGROUP(43, cci_i2c, _, phase_flag, qdss_gpio4, _, _, _, _, _),
1207     [44] = PINGROUP(44, cci_i2c, _, phase_flag, qdss_gpio5, _, _, _, _, _),
1208     [45] = PINGROUP(45, qup02, _, phase_flag, qdss_gpio6, _, _, _, _, _),
1209     [46] = PINGROUP(46, qup02, _, phase_flag, qdss_gpio7, _, _, _, _, _),
1210     [47] = PINGROUP(47, mdp_vsync0, _, phase_flag, qdss_gpio3, _, _, _, _, _),
1211     [48] = PINGROUP(48, cci_async, mdp_vsync1, gcc_gp1, _, phase_flag, qdss_gpio8, qup02, _, _),
1212     [49] = PINGROUP(49, vfr_1, _, phase_flag, qdss_gpio9, _, _, _, _, _),
1213     [50] = PINGROUP(50, _, phase_flag, qdss_gpio10, _, _, _, _, _, _),
1214     [51] = PINGROUP(51, _, phase_flag, qdss_gpio11, _, _, _, _, _, _),
1215     [52] = PINGROUP(52, cci_async, gp_pdm1, _, phase_flag, qdss_gpio12, _, _, _, _),
1216     [53] = PINGROUP(53, cci_async, _, phase_flag, qdss_gpio13, _, _, _, _, _),
1217     [54] = PINGROUP(54, _, _, _, _, _, _, _, _, _),
1218     [55] = PINGROUP(55, _, _, _, _, _, _, _, _, _),
1219     [56] = PINGROUP(56, qup02, mdp_vsync2, _, phase_flag, qdss_gpio10, _, _, _, _),
1220     [57] = PINGROUP(57, qup02, mdp_vsync3, gp_pdm2, _, phase_flag, qdss_gpio11, _, _, _),
1221     [58] = PINGROUP(58, gcc_gp1, _, _, _, _, _, _, _, _),
1222     [59] = PINGROUP(59, _, _, _, _, _, _, _, _, _),
1223     [60] = PINGROUP(60, audio_ref, lpass_ext, mi2s_2, _, phase_flag, _, _, _, _),
1224     [61] = PINGROUP(61, qup01, tgu_ch0, _, phase_flag, qdss_cti, _, _, _, _),
1225     [62] = PINGROUP(62, qup01, tgu_ch1, _, phase_flag, qdss_cti, _, _, _, _),
1226     [63] = PINGROUP(63, qup01, tgu_ch2, _, phase_flag, qdss_gpio, _, _, _, _),
1227     [64] = PINGROUP(64, qup01, tgu_ch3, _, phase_flag, qdss_gpio, _, _, _, _),
1228     [65] = PINGROUP(65, mss_lte, _, qdss_gpio0, _, _, _, _, _, _),
1229     [66] = PINGROUP(66, mss_lte, _, qdss_gpio1, _, _, _, _, _, _),
1230     [67] = PINGROUP(67, btfm_slimbus, mi2s_1, _, phase_flag, _, _, _, _, _),
1231     [68] = PINGROUP(68, btfm_slimbus, mi2s_1, gp_pdm0, _, phase_flag, _, _, _, _),
1232     [69] = PINGROUP(69, _, _, _, _, _, _, _, _, _),
1233     [70] = PINGROUP(70, _, _, _, _, _, _, _, _, _),
1234     [71] = PINGROUP(71, _, _, _, _, _, _, _, _, _),
1235     [72] = PINGROUP(72, mi2s_2, _, _, _, _, _, _, _, _),
1236     [73] = PINGROUP(73, mi2s_2, _, _, _, _, _, _, _, _),
1237     [74] = PINGROUP(74, mi2s_2, _, _, _, _, _, _, _, _),
1238     [75] = PINGROUP(75, uim2_data, _, _, _, _, _, _, _, _),
1239     [76] = PINGROUP(76, uim2_clk, _, _, _, _, _, _, _, _),
1240     [77] = PINGROUP(77, uim2_reset, _, _, _, _, _, _, _, _),
1241     [78] = PINGROUP(78, uim2_present, _, _, _, _, _, _, _, _),
1242     [79] = PINGROUP(79, uim1_data, _, _, _, _, _, _, _, _),
1243     [80] = PINGROUP(80, uim1_clk, _, _, _, _, _, _, _, _),
1244     [81] = PINGROUP(81, uim1_reset, _, _, _, _, _, _, _, _),
1245     [82] = PINGROUP(82, uim1_present, _, _, _, _, _, _, _, _),
1246     [83] = PINGROUP(83, atest_usb, _, _, _, _, _, _, _, _),
1247     [84] = PINGROUP(84, _, atest_usb, _, _, _, _, _, _, _),
1248     [85] = PINGROUP(85, sd_write, _, atest_usb, _, _, _, _, _, _),
1249     [86] = PINGROUP(86, btfm_slimbus, mi2s_1, _, qdss_cti, atest_usb, ddr_pxi0, _, _, _),
1250     [87] = PINGROUP(87, btfm_slimbus, mi2s_1, adsp_ext, _, qdss_cti, atest_usb, ddr_pxi1, _, _),
1251     [88] = PINGROUP(88, mi2s_0, _, qdss_gpio4, _, atest_usb, ddr_pxi2,
1252             tsense_pwm1, tsense_pwm2, _),
1253     [89] = PINGROUP(89, mi2s_0, agera_pll, _, qdss_gpio5, _,
1254             vsense_trigger, atest_usb, ddr_pxi3, _),
1255     [90] = PINGROUP(90, mi2s_0, jitter_bist, _, qdss_gpio6, _,
1256             wlan1_adc0, atest_usb, ddr_pxi0, _),
1257     [91] = PINGROUP(91, mi2s_0, _, qdss_gpio7, _, wlan2_adc0,
1258             atest_usb, ddr_pxi1, _, _),
1259     [92] = PINGROUP(92, _, qdss_gpio8, atest_tsens, wlan1_adc1,
1260             atest_usb, ddr_pxi2, _, _, _),
1261     [93] = PINGROUP(93, mclk, lpass_ext, _, qdss_gpio9, atest_tsens2,
1262             wlan2_adc1, ddr_pxi3, _, _),
1263     [94] = PINGROUP(94, _, _, _, _, _, _, _, _, _),
1264     [95] = PINGROUP(95, ldo_en, _, atest_char, _, _, _, _, _, _),
1265     [96] = PINGROUP(96, ldo_update, _, atest_char0, _, _, _, _, _, _),
1266     [97] = PINGROUP(97, prng_rosc, _, atest_char1, _, _, _, _, _, _),
1267     [98] = PINGROUP(98, _, atest_char2, _, _, _, _, _, _, _),
1268     [99] = PINGROUP(99, _, atest_char3, _, _, _, _, _, _, _),
1269     [100] = PINGROUP(100, _, _, _, _, _, _, _, _, _),
1270     [101] = PINGROUP(101, nav_gpio, nav_pps, nav_pps, gps_tx, _, _, _, _, _),
1271     [102] = PINGROUP(102, nav_gpio, nav_pps, nav_pps, gps_tx, _, _, _, _, _),
1272     [103] = PINGROUP(103, qlink0_wmss, _, _, _, _, _, _, _, _),
1273     [104] = PINGROUP(104, qlink0_request, _, _, _, _, _, _, _, _),
1274     [105] = PINGROUP(105, qlink0_enable, _, _, _, _, _, _, _, _),
1275     [106] = PINGROUP(106, qlink1_wmss, _, _, _, _, _, _, _, _),
1276     [107] = PINGROUP(107, qlink1_request, gps_tx, _, _, _, _, _, _, _),
1277     [108] = PINGROUP(108, qlink1_enable, gps_tx, _, _, _, _, _, _, _),
1278     [109] = PINGROUP(109, rffe0_data, _, _, _, _, _, _, _, _),
1279     [110] = PINGROUP(110, rffe0_clk, _, _, _, _, _, _, _, _),
1280     [111] = PINGROUP(111, rffe1_data, _, _, _, _, _, _, _, _),
1281     [112] = PINGROUP(112, rffe1_clk, _, _, _, _, _, _, _, _),
1282     [113] = PINGROUP(113, rffe2_data, _, _, _, _, _, _, _, _),
1283     [114] = PINGROUP(114, rffe2_clk, _, _, _, _, _, _, _, _),
1284     [115] = PINGROUP(115, rffe3_data, _, _, _, _, _, _, _, _),
1285     [116] = PINGROUP(116, rffe3_clk, _, _, _, _, _, _, _, _),
1286     [117] = PINGROUP(117, rffe4_data, _, _, _, _, _, _, _, _),
1287     [118] = PINGROUP(118, rffe4_clk, _, pa_indicator, dp_hot, _, _, _, _, _),
1288     [119] = PINGROUP(119, _, _, _, _, _, _, _, _, _),
1289     [120] = PINGROUP(120, _, _, _, _, _, _, _, _, _),
1290     [121] = PINGROUP(121, _, _, _, _, _, _, _, _, _),
1291     [122] = PINGROUP(122, pcie0_clk, _, _, _, _, _, _, _, _),
1292     [123] = PINGROUP(123, _, _, _, _, _, _, _, _, _),
1293     [124] = PINGROUP(124, usb_phy, _, _, _, _, _, _, _, _),
1294     [125] = PINGROUP(125, _, _, _, _, _, _, _, _, _),
1295     [126] = PINGROUP(126, _, _, _, _, _, _, _, _, _),
1296     [127] = PINGROUP(127, _, _, _, _, _, _, _, _, _),
1297     [128] = PINGROUP(128, _, _, _, _, _, _, _, _, _),
1298     [129] = PINGROUP(129, _, _, _, _, _, _, _, _, _),
1299     [130] = PINGROUP(130, _, _, _, _, _, _, _, _, _),
1300     [131] = PINGROUP(131, _, _, _, _, _, _, _, _, _),
1301     [132] = PINGROUP(132, _, _, _, _, _, _, _, _, _),
1302     [133] = PINGROUP(133, _, _, _, _, _, _, _, _, _),
1303     [134] = PINGROUP(134, _, _, _, _, _, _, _, _, _),
1304     [135] = PINGROUP(135, _, _, _, _, _, _, _, _, _),
1305     [136] = PINGROUP(136, _, _, _, _, _, _, _, _, _),
1306     [137] = PINGROUP(137, _, _, _, _, _, _, _, _, _),
1307     [138] = PINGROUP(138, _, _, _, _, _, _, _, _, _),
1308     [139] = PINGROUP(139, _, _, _, _, _, _, _, _, _),
1309     [140] = PINGROUP(140, _, _, _, _, _, _, _, _, _),
1310     [141] = PINGROUP(141, _, _, _, _, _, _, _, _, _),
1311     [142] = PINGROUP(142, _, _, _, _, _, _, _, _, _),
1312     [143] = PINGROUP(143, _, _, _, _, _, _, _, _, _),
1313     [144] = PINGROUP(144, _, _, _, _, _, _, _, _, _),
1314     [145] = PINGROUP(145, _, _, _, _, _, _, _, _, _),
1315     [146] = PINGROUP(146, _, _, _, _, _, _, _, _, _),
1316     [147] = PINGROUP(147, _, _, _, _, _, _, _, _, _),
1317     [148] = PINGROUP(148, _, _, _, _, _, _, _, _, _),
1318     [149] = PINGROUP(149, _, _, _, _, _, _, _, _, _),
1319     [150] = PINGROUP(150, _, _, _, _, _, _, _, _, _),
1320     [151] = PINGROUP(151, _, _, _, _, _, _, _, _, _),
1321     [152] = PINGROUP(152, _, _, _, _, _, _, _, _, _),
1322     [153] = PINGROUP(153, _, _, _, _, _, _, _, _, _),
1323     [154] = PINGROUP(154, _, _, _, _, _, _, _, _, _),
1324     [155] = PINGROUP(155, _, _, _, _, _, _, _, _, _),
1325     [156] = UFS_RESET(ufs_reset, 0xae000),
1326     [157] = SDC_PINGROUP(sdc1_rclk, 0xa1000, 15, 0),
1327     [158] = SDC_PINGROUP(sdc1_clk, 0xa0000, 13, 6),
1328     [159] = SDC_PINGROUP(sdc1_cmd, 0xa0000, 11, 3),
1329     [160] = SDC_PINGROUP(sdc1_data, 0xa0000, 9, 0),
1330     [161] = SDC_PINGROUP(sdc2_clk, 0xa2000, 14, 6),
1331     [162] = SDC_PINGROUP(sdc2_cmd, 0xa2000, 11, 3),
1332     [163] = SDC_PINGROUP(sdc2_data, 0xa2000, 9, 0),
1333 };
1334 
1335 static const struct msm_gpio_wakeirq_map sm6350_pdc_map[] = {
1336     { 3, 126 }, { 4, 151 }, { 7, 58 }, { 8, 113 }, { 9, 66 }, { 11, 106 },
1337     { 12, 59 }, { 13, 112 }, { 16, 73 }, { 17, 74 }, { 18, 75 }, { 19, 76 },
1338     { 21, 130 }, { 22, 96 }, { 23, 146 }, { 24, 114 }, { 25, 83 },
1339     { 27, 84 }, { 28, 85 }, { 34, 147 }, { 35, 92 }, { 36, 93 }, { 37, 94 },
1340     { 38, 68 }, { 48, 100 }, { 50, 57 }, { 51, 81 }, { 52, 80 }, { 53, 69 },
1341     { 54, 71 }, { 55, 70 }, { 57, 152 }, { 58, 115 }, { 59, 116 }, { 60, 117 },
1342     { 61, 118 }, { 62, 119 }, { 64, 121 }, { 66, 127 }, { 67, 128 },
1343     { 69, 60 }, { 73, 78 }, { 78, 135 }, { 82, 138 }, { 83, 140 },
1344     { 84, 141 }, { 85, 98 }, { 87, 88 }, { 88, 107 }, { 89, 109 },
1345     { 90, 110 }, { 91, 111 }, { 92, 149 }, { 93, 101 }, { 94, 61 },
1346     { 95, 65 }, { 96, 95 }, { 97, 72 }, { 98, 145 }, { 99, 150 },
1347     { 100, 108 }, { 104, 129 }, { 107, 131 }, { 110, 132 }, { 112, 133 },
1348     { 114, 134 }, { 116, 136 }, { 118, 137 }, { 122, 97 }, { 123, 99 },
1349     { 124, 148 }, { 125, 82 }, { 128, 144 }, { 129, 86 }, { 131, 87 },
1350     { 133, 142 }, { 134, 143 }, { 136, 102 }, { 137, 91 }, { 138, 77 },
1351     { 139, 79 }, { 140, 90 }, { 142, 103 }, { 144, 105 }, { 147, 104 },
1352     { 153, 120 }, { 155, 67 }
1353 };
1354 
1355 static const struct msm_pinctrl_soc_data sm6350_tlmm = {
1356     .pins = sm6350_pins,
1357     .npins = ARRAY_SIZE(sm6350_pins),
1358     .functions = sm6350_functions,
1359     .nfunctions = ARRAY_SIZE(sm6350_functions),
1360     .groups = sm6350_groups,
1361     .ngroups = ARRAY_SIZE(sm6350_groups),
1362     .ngpios = 157,
1363     .wakeirq_map = sm6350_pdc_map,
1364     .nwakeirq_map = ARRAY_SIZE(sm6350_pdc_map),
1365     .wakeirq_dual_edge_errata = true,
1366 };
1367 
1368 static int sm6350_tlmm_probe(struct platform_device *pdev)
1369 {
1370     return msm_pinctrl_probe(pdev, &sm6350_tlmm);
1371 }
1372 
1373 static const struct of_device_id sm6350_tlmm_of_match[] = {
1374     { .compatible = "qcom,sm6350-tlmm" },
1375     { },
1376 };
1377 
1378 static struct platform_driver sm6350_tlmm_driver = {
1379     .driver = {
1380         .name = "sm6350-tlmm",
1381         .of_match_table = sm6350_tlmm_of_match,
1382     },
1383     .probe = sm6350_tlmm_probe,
1384     .remove = msm_pinctrl_remove,
1385 };
1386 
1387 static int __init sm6350_tlmm_init(void)
1388 {
1389     return platform_driver_register(&sm6350_tlmm_driver);
1390 }
1391 arch_initcall(sm6350_tlmm_init);
1392 
1393 static void __exit sm6350_tlmm_exit(void)
1394 {
1395     platform_driver_unregister(&sm6350_tlmm_driver);
1396 }
1397 module_exit(sm6350_tlmm_exit);
1398 
1399 MODULE_DESCRIPTION("QTI SM6350 TLMM driver");
1400 MODULE_LICENSE("GPL v2");
1401 MODULE_DEVICE_TABLE(of, sm6350_tlmm_of_match);
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