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OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 
0003 #include <linux/module.h>
0004 #include <linux/of.h>
0005 #include <linux/platform_device.h>
0006 #include <linux/pinctrl/pinctrl.h>
0007 
0008 #include "pinctrl-msm.h"
0009 
0010 static const char * const sm6125_tiles[] = {
0011     "south",
0012     "east",
0013     "west"
0014 };
0015 
0016 enum {
0017     SOUTH,
0018     EAST,
0019     WEST
0020 };
0021 
0022 #define FUNCTION(fname)                 \
0023     [msm_mux_##fname] = {               \
0024         .name = #fname,             \
0025         .groups = fname##_groups,       \
0026         .ngroups = ARRAY_SIZE(fname##_groups),  \
0027     }
0028 
0029 #define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
0030     {                       \
0031         .name = "gpio" #id,         \
0032         .pins = gpio##id##_pins,        \
0033         .npins = (unsigned int)ARRAY_SIZE(gpio##id##_pins), \
0034         .funcs = (int[]){           \
0035             msm_mux_gpio, /* gpio mode */   \
0036             msm_mux_##f1,           \
0037             msm_mux_##f2,           \
0038             msm_mux_##f3,           \
0039             msm_mux_##f4,           \
0040             msm_mux_##f5,           \
0041             msm_mux_##f6,           \
0042             msm_mux_##f7,           \
0043             msm_mux_##f8,           \
0044             msm_mux_##f9            \
0045         },                  \
0046         .nfuncs = 10,               \
0047         .ctl_reg = 0x1000 * id,     \
0048         .io_reg = 0x4 + 0x1000 * id,        \
0049         .intr_cfg_reg = 0x8 + 0x1000 * id,  \
0050         .intr_status_reg = 0xc + 0x1000 * id,   \
0051         .intr_target_reg = 0x8 + 0x1000 * id,   \
0052         .tile = _tile,          \
0053         .mux_bit = 2,           \
0054         .pull_bit = 0,          \
0055         .drv_bit = 6,           \
0056         .oe_bit = 9,            \
0057         .in_bit = 0,            \
0058         .out_bit = 1,           \
0059         .intr_enable_bit = 0,       \
0060         .intr_status_bit = 0,       \
0061         .intr_target_bit = 5,       \
0062         .intr_target_kpss_val = 3,  \
0063         .intr_raw_status_bit = 4,   \
0064         .intr_polarity_bit = 1,     \
0065         .intr_detection_bit = 2,    \
0066         .intr_detection_width = 2,  \
0067     }
0068 
0069 #define SDC_QDSD_PINGROUP(pg_name, _tile, ctl, pull, drv)   \
0070     {                       \
0071         .name = #pg_name,           \
0072         .pins = pg_name##_pins,         \
0073         .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins),  \
0074         .ctl_reg = ctl,             \
0075         .io_reg = 0,                \
0076         .intr_cfg_reg = 0,          \
0077         .intr_status_reg = 0,           \
0078         .intr_target_reg = 0,           \
0079         .tile = _tile,              \
0080         .mux_bit = -1,              \
0081         .pull_bit = pull,           \
0082         .drv_bit = drv,             \
0083         .oe_bit = -1,               \
0084         .in_bit = -1,               \
0085         .out_bit = -1,              \
0086         .intr_enable_bit = -1,          \
0087         .intr_status_bit = -1,          \
0088         .intr_target_bit = -1,          \
0089         .intr_raw_status_bit = -1,      \
0090         .intr_polarity_bit = -1,        \
0091         .intr_detection_bit = -1,       \
0092         .intr_detection_width = -1,     \
0093     }
0094 
0095 #define UFS_RESET(pg_name, offset)              \
0096     {                       \
0097         .name = #pg_name,           \
0098         .pins = pg_name##_pins,         \
0099         .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins),  \
0100         .ctl_reg = offset,          \
0101         .io_reg = offset + 0x4,         \
0102         .intr_cfg_reg = 0,          \
0103         .intr_status_reg = 0,           \
0104         .intr_target_reg = 0,           \
0105         .tile = WEST,               \
0106         .mux_bit = -1,              \
0107         .pull_bit = 3,              \
0108         .drv_bit = 0,               \
0109         .oe_bit = -1,               \
0110         .in_bit = -1,               \
0111         .out_bit = 0,               \
0112         .intr_enable_bit = -1,          \
0113         .intr_status_bit = -1,          \
0114         .intr_target_bit = -1,          \
0115         .intr_raw_status_bit = -1,      \
0116         .intr_polarity_bit = -1,        \
0117         .intr_detection_bit = -1,       \
0118         .intr_detection_width = -1,     \
0119     }
0120 static const struct pinctrl_pin_desc sm6125_pins[] = {
0121     PINCTRL_PIN(0, "GPIO_0"),
0122     PINCTRL_PIN(1, "GPIO_1"),
0123     PINCTRL_PIN(2, "GPIO_2"),
0124     PINCTRL_PIN(3, "GPIO_3"),
0125     PINCTRL_PIN(4, "GPIO_4"),
0126     PINCTRL_PIN(5, "GPIO_5"),
0127     PINCTRL_PIN(6, "GPIO_6"),
0128     PINCTRL_PIN(7, "GPIO_7"),
0129     PINCTRL_PIN(8, "GPIO_8"),
0130     PINCTRL_PIN(9, "GPIO_9"),
0131     PINCTRL_PIN(10, "GPIO_10"),
0132     PINCTRL_PIN(11, "GPIO_11"),
0133     PINCTRL_PIN(12, "GPIO_12"),
0134     PINCTRL_PIN(13, "GPIO_13"),
0135     PINCTRL_PIN(14, "GPIO_14"),
0136     PINCTRL_PIN(15, "GPIO_15"),
0137     PINCTRL_PIN(16, "GPIO_16"),
0138     PINCTRL_PIN(17, "GPIO_17"),
0139     PINCTRL_PIN(18, "GPIO_18"),
0140     PINCTRL_PIN(19, "GPIO_19"),
0141     PINCTRL_PIN(20, "GPIO_20"),
0142     PINCTRL_PIN(21, "GPIO_21"),
0143     PINCTRL_PIN(22, "GPIO_22"),
0144     PINCTRL_PIN(23, "GPIO_23"),
0145     PINCTRL_PIN(24, "GPIO_24"),
0146     PINCTRL_PIN(25, "GPIO_25"),
0147     PINCTRL_PIN(26, "GPIO_26"),
0148     PINCTRL_PIN(27, "GPIO_27"),
0149     PINCTRL_PIN(28, "GPIO_28"),
0150     PINCTRL_PIN(29, "GPIO_29"),
0151     PINCTRL_PIN(30, "GPIO_30"),
0152     PINCTRL_PIN(31, "GPIO_31"),
0153     PINCTRL_PIN(32, "GPIO_32"),
0154     PINCTRL_PIN(33, "GPIO_33"),
0155     PINCTRL_PIN(34, "GPIO_34"),
0156     PINCTRL_PIN(35, "GPIO_35"),
0157     PINCTRL_PIN(36, "GPIO_36"),
0158     PINCTRL_PIN(37, "GPIO_37"),
0159     PINCTRL_PIN(38, "GPIO_38"),
0160     PINCTRL_PIN(39, "GPIO_39"),
0161     PINCTRL_PIN(40, "GPIO_40"),
0162     PINCTRL_PIN(41, "GPIO_41"),
0163     PINCTRL_PIN(42, "GPIO_42"),
0164     PINCTRL_PIN(43, "GPIO_43"),
0165     PINCTRL_PIN(44, "GPIO_44"),
0166     PINCTRL_PIN(45, "GPIO_45"),
0167     PINCTRL_PIN(46, "GPIO_46"),
0168     PINCTRL_PIN(47, "GPIO_47"),
0169     PINCTRL_PIN(48, "GPIO_48"),
0170     PINCTRL_PIN(49, "GPIO_49"),
0171     PINCTRL_PIN(50, "GPIO_50"),
0172     PINCTRL_PIN(51, "GPIO_51"),
0173     PINCTRL_PIN(52, "GPIO_52"),
0174     PINCTRL_PIN(53, "GPIO_53"),
0175     PINCTRL_PIN(54, "GPIO_54"),
0176     PINCTRL_PIN(55, "GPIO_55"),
0177     PINCTRL_PIN(56, "GPIO_56"),
0178     PINCTRL_PIN(57, "GPIO_57"),
0179     PINCTRL_PIN(58, "GPIO_58"),
0180     PINCTRL_PIN(59, "GPIO_59"),
0181     PINCTRL_PIN(60, "GPIO_60"),
0182     PINCTRL_PIN(61, "GPIO_61"),
0183     PINCTRL_PIN(62, "GPIO_62"),
0184     PINCTRL_PIN(63, "GPIO_63"),
0185     PINCTRL_PIN(64, "GPIO_64"),
0186     PINCTRL_PIN(65, "GPIO_65"),
0187     PINCTRL_PIN(66, "GPIO_66"),
0188     PINCTRL_PIN(67, "GPIO_67"),
0189     PINCTRL_PIN(68, "GPIO_68"),
0190     PINCTRL_PIN(69, "GPIO_69"),
0191     PINCTRL_PIN(70, "GPIO_70"),
0192     PINCTRL_PIN(71, "GPIO_71"),
0193     PINCTRL_PIN(72, "GPIO_72"),
0194     PINCTRL_PIN(73, "GPIO_73"),
0195     PINCTRL_PIN(74, "GPIO_74"),
0196     PINCTRL_PIN(75, "GPIO_75"),
0197     PINCTRL_PIN(76, "GPIO_76"),
0198     PINCTRL_PIN(77, "GPIO_77"),
0199     PINCTRL_PIN(78, "GPIO_78"),
0200     PINCTRL_PIN(79, "GPIO_79"),
0201     PINCTRL_PIN(80, "GPIO_80"),
0202     PINCTRL_PIN(81, "GPIO_81"),
0203     PINCTRL_PIN(82, "GPIO_82"),
0204     PINCTRL_PIN(83, "GPIO_83"),
0205     PINCTRL_PIN(84, "GPIO_84"),
0206     PINCTRL_PIN(85, "GPIO_85"),
0207     PINCTRL_PIN(86, "GPIO_86"),
0208     PINCTRL_PIN(87, "GPIO_87"),
0209     PINCTRL_PIN(88, "GPIO_88"),
0210     PINCTRL_PIN(89, "GPIO_89"),
0211     PINCTRL_PIN(90, "GPIO_90"),
0212     PINCTRL_PIN(91, "GPIO_91"),
0213     PINCTRL_PIN(92, "GPIO_92"),
0214     PINCTRL_PIN(93, "GPIO_93"),
0215     PINCTRL_PIN(94, "GPIO_94"),
0216     PINCTRL_PIN(95, "GPIO_95"),
0217     PINCTRL_PIN(96, "GPIO_96"),
0218     PINCTRL_PIN(97, "GPIO_97"),
0219     PINCTRL_PIN(98, "GPIO_98"),
0220     PINCTRL_PIN(99, "GPIO_99"),
0221     PINCTRL_PIN(100, "GPIO_100"),
0222     PINCTRL_PIN(101, "GPIO_101"),
0223     PINCTRL_PIN(102, "GPIO_102"),
0224     PINCTRL_PIN(103, "GPIO_103"),
0225     PINCTRL_PIN(104, "GPIO_104"),
0226     PINCTRL_PIN(105, "GPIO_105"),
0227     PINCTRL_PIN(106, "GPIO_106"),
0228     PINCTRL_PIN(107, "GPIO_107"),
0229     PINCTRL_PIN(108, "GPIO_108"),
0230     PINCTRL_PIN(109, "GPIO_109"),
0231     PINCTRL_PIN(110, "GPIO_110"),
0232     PINCTRL_PIN(111, "GPIO_111"),
0233     PINCTRL_PIN(112, "GPIO_112"),
0234     PINCTRL_PIN(113, "GPIO_113"),
0235     PINCTRL_PIN(114, "GPIO_114"),
0236     PINCTRL_PIN(115, "GPIO_115"),
0237     PINCTRL_PIN(116, "GPIO_116"),
0238     PINCTRL_PIN(117, "GPIO_117"),
0239     PINCTRL_PIN(118, "GPIO_118"),
0240     PINCTRL_PIN(119, "GPIO_119"),
0241     PINCTRL_PIN(120, "GPIO_120"),
0242     PINCTRL_PIN(121, "GPIO_121"),
0243     PINCTRL_PIN(122, "GPIO_122"),
0244     PINCTRL_PIN(123, "GPIO_123"),
0245     PINCTRL_PIN(124, "GPIO_124"),
0246     PINCTRL_PIN(125, "GPIO_125"),
0247     PINCTRL_PIN(126, "GPIO_126"),
0248     PINCTRL_PIN(127, "GPIO_127"),
0249     PINCTRL_PIN(128, "GPIO_128"),
0250     PINCTRL_PIN(129, "GPIO_129"),
0251     PINCTRL_PIN(130, "GPIO_130"),
0252     PINCTRL_PIN(131, "GPIO_131"),
0253     PINCTRL_PIN(132, "GPIO_132"),
0254     PINCTRL_PIN(133, "UFS_RESET"),
0255     PINCTRL_PIN(134, "SDC1_RCLK"),
0256     PINCTRL_PIN(135, "SDC1_CLK"),
0257     PINCTRL_PIN(136, "SDC1_CMD"),
0258     PINCTRL_PIN(137, "SDC1_DATA"),
0259     PINCTRL_PIN(138, "SDC2_CLK"),
0260     PINCTRL_PIN(139, "SDC2_CMD"),
0261     PINCTRL_PIN(140, "SDC2_DATA"),
0262 };
0263 
0264 #define DECLARE_MSM_GPIO_PINS(pin) \
0265     static const unsigned int gpio##pin##_pins[] = { pin }
0266 DECLARE_MSM_GPIO_PINS(0);
0267 DECLARE_MSM_GPIO_PINS(1);
0268 DECLARE_MSM_GPIO_PINS(2);
0269 DECLARE_MSM_GPIO_PINS(3);
0270 DECLARE_MSM_GPIO_PINS(4);
0271 DECLARE_MSM_GPIO_PINS(5);
0272 DECLARE_MSM_GPIO_PINS(6);
0273 DECLARE_MSM_GPIO_PINS(7);
0274 DECLARE_MSM_GPIO_PINS(8);
0275 DECLARE_MSM_GPIO_PINS(9);
0276 DECLARE_MSM_GPIO_PINS(10);
0277 DECLARE_MSM_GPIO_PINS(11);
0278 DECLARE_MSM_GPIO_PINS(12);
0279 DECLARE_MSM_GPIO_PINS(13);
0280 DECLARE_MSM_GPIO_PINS(14);
0281 DECLARE_MSM_GPIO_PINS(15);
0282 DECLARE_MSM_GPIO_PINS(16);
0283 DECLARE_MSM_GPIO_PINS(17);
0284 DECLARE_MSM_GPIO_PINS(18);
0285 DECLARE_MSM_GPIO_PINS(19);
0286 DECLARE_MSM_GPIO_PINS(20);
0287 DECLARE_MSM_GPIO_PINS(21);
0288 DECLARE_MSM_GPIO_PINS(22);
0289 DECLARE_MSM_GPIO_PINS(23);
0290 DECLARE_MSM_GPIO_PINS(24);
0291 DECLARE_MSM_GPIO_PINS(25);
0292 DECLARE_MSM_GPIO_PINS(26);
0293 DECLARE_MSM_GPIO_PINS(27);
0294 DECLARE_MSM_GPIO_PINS(28);
0295 DECLARE_MSM_GPIO_PINS(29);
0296 DECLARE_MSM_GPIO_PINS(30);
0297 DECLARE_MSM_GPIO_PINS(31);
0298 DECLARE_MSM_GPIO_PINS(32);
0299 DECLARE_MSM_GPIO_PINS(33);
0300 DECLARE_MSM_GPIO_PINS(34);
0301 DECLARE_MSM_GPIO_PINS(35);
0302 DECLARE_MSM_GPIO_PINS(36);
0303 DECLARE_MSM_GPIO_PINS(37);
0304 DECLARE_MSM_GPIO_PINS(38);
0305 DECLARE_MSM_GPIO_PINS(39);
0306 DECLARE_MSM_GPIO_PINS(40);
0307 DECLARE_MSM_GPIO_PINS(41);
0308 DECLARE_MSM_GPIO_PINS(42);
0309 DECLARE_MSM_GPIO_PINS(43);
0310 DECLARE_MSM_GPIO_PINS(44);
0311 DECLARE_MSM_GPIO_PINS(45);
0312 DECLARE_MSM_GPIO_PINS(46);
0313 DECLARE_MSM_GPIO_PINS(47);
0314 DECLARE_MSM_GPIO_PINS(48);
0315 DECLARE_MSM_GPIO_PINS(49);
0316 DECLARE_MSM_GPIO_PINS(50);
0317 DECLARE_MSM_GPIO_PINS(51);
0318 DECLARE_MSM_GPIO_PINS(52);
0319 DECLARE_MSM_GPIO_PINS(53);
0320 DECLARE_MSM_GPIO_PINS(54);
0321 DECLARE_MSM_GPIO_PINS(55);
0322 DECLARE_MSM_GPIO_PINS(56);
0323 DECLARE_MSM_GPIO_PINS(57);
0324 DECLARE_MSM_GPIO_PINS(58);
0325 DECLARE_MSM_GPIO_PINS(59);
0326 DECLARE_MSM_GPIO_PINS(60);
0327 DECLARE_MSM_GPIO_PINS(61);
0328 DECLARE_MSM_GPIO_PINS(62);
0329 DECLARE_MSM_GPIO_PINS(63);
0330 DECLARE_MSM_GPIO_PINS(64);
0331 DECLARE_MSM_GPIO_PINS(65);
0332 DECLARE_MSM_GPIO_PINS(66);
0333 DECLARE_MSM_GPIO_PINS(67);
0334 DECLARE_MSM_GPIO_PINS(68);
0335 DECLARE_MSM_GPIO_PINS(69);
0336 DECLARE_MSM_GPIO_PINS(70);
0337 DECLARE_MSM_GPIO_PINS(71);
0338 DECLARE_MSM_GPIO_PINS(72);
0339 DECLARE_MSM_GPIO_PINS(73);
0340 DECLARE_MSM_GPIO_PINS(74);
0341 DECLARE_MSM_GPIO_PINS(75);
0342 DECLARE_MSM_GPIO_PINS(76);
0343 DECLARE_MSM_GPIO_PINS(77);
0344 DECLARE_MSM_GPIO_PINS(78);
0345 DECLARE_MSM_GPIO_PINS(79);
0346 DECLARE_MSM_GPIO_PINS(80);
0347 DECLARE_MSM_GPIO_PINS(81);
0348 DECLARE_MSM_GPIO_PINS(82);
0349 DECLARE_MSM_GPIO_PINS(83);
0350 DECLARE_MSM_GPIO_PINS(84);
0351 DECLARE_MSM_GPIO_PINS(85);
0352 DECLARE_MSM_GPIO_PINS(86);
0353 DECLARE_MSM_GPIO_PINS(87);
0354 DECLARE_MSM_GPIO_PINS(88);
0355 DECLARE_MSM_GPIO_PINS(89);
0356 DECLARE_MSM_GPIO_PINS(90);
0357 DECLARE_MSM_GPIO_PINS(91);
0358 DECLARE_MSM_GPIO_PINS(92);
0359 DECLARE_MSM_GPIO_PINS(93);
0360 DECLARE_MSM_GPIO_PINS(94);
0361 DECLARE_MSM_GPIO_PINS(95);
0362 DECLARE_MSM_GPIO_PINS(96);
0363 DECLARE_MSM_GPIO_PINS(97);
0364 DECLARE_MSM_GPIO_PINS(98);
0365 DECLARE_MSM_GPIO_PINS(99);
0366 DECLARE_MSM_GPIO_PINS(100);
0367 DECLARE_MSM_GPIO_PINS(101);
0368 DECLARE_MSM_GPIO_PINS(102);
0369 DECLARE_MSM_GPIO_PINS(103);
0370 DECLARE_MSM_GPIO_PINS(104);
0371 DECLARE_MSM_GPIO_PINS(105);
0372 DECLARE_MSM_GPIO_PINS(106);
0373 DECLARE_MSM_GPIO_PINS(107);
0374 DECLARE_MSM_GPIO_PINS(108);
0375 DECLARE_MSM_GPIO_PINS(109);
0376 DECLARE_MSM_GPIO_PINS(110);
0377 DECLARE_MSM_GPIO_PINS(111);
0378 DECLARE_MSM_GPIO_PINS(112);
0379 DECLARE_MSM_GPIO_PINS(113);
0380 DECLARE_MSM_GPIO_PINS(114);
0381 DECLARE_MSM_GPIO_PINS(115);
0382 DECLARE_MSM_GPIO_PINS(116);
0383 DECLARE_MSM_GPIO_PINS(117);
0384 DECLARE_MSM_GPIO_PINS(118);
0385 DECLARE_MSM_GPIO_PINS(119);
0386 DECLARE_MSM_GPIO_PINS(120);
0387 DECLARE_MSM_GPIO_PINS(121);
0388 DECLARE_MSM_GPIO_PINS(122);
0389 DECLARE_MSM_GPIO_PINS(123);
0390 DECLARE_MSM_GPIO_PINS(124);
0391 DECLARE_MSM_GPIO_PINS(125);
0392 DECLARE_MSM_GPIO_PINS(126);
0393 DECLARE_MSM_GPIO_PINS(127);
0394 DECLARE_MSM_GPIO_PINS(128);
0395 DECLARE_MSM_GPIO_PINS(129);
0396 DECLARE_MSM_GPIO_PINS(130);
0397 DECLARE_MSM_GPIO_PINS(131);
0398 DECLARE_MSM_GPIO_PINS(132);
0399 
0400 static const unsigned int ufs_reset_pins[] = { 133 };
0401 static const unsigned int sdc1_rclk_pins[] = { 134 };
0402 static const unsigned int sdc1_clk_pins[] = { 135 };
0403 static const unsigned int sdc1_cmd_pins[] = { 136 };
0404 static const unsigned int sdc1_data_pins[] = { 137 };
0405 static const unsigned int sdc2_clk_pins[] = { 138 };
0406 static const unsigned int sdc2_cmd_pins[] = { 139 };
0407 static const unsigned int sdc2_data_pins[] = { 140 };
0408 
0409 
0410 enum sm6125_functions {
0411     msm_mux_qup00,
0412     msm_mux_gpio,
0413     msm_mux_qdss,
0414     msm_mux_qup01,
0415     msm_mux_qup02,
0416     msm_mux_ddr_pxi0,
0417     msm_mux_ddr_bist,
0418     msm_mux_atest_tsens2,
0419     msm_mux_vsense_trigger,
0420     msm_mux_atest_usb1,
0421     msm_mux_gp_pdm1,
0422     msm_mux_phase_flag,
0423     msm_mux_dbg_out,
0424     msm_mux_qup14,
0425     msm_mux_atest_usb11,
0426     msm_mux_ddr_pxi2,
0427     msm_mux_atest_usb10,
0428     msm_mux_jitter_bist,
0429     msm_mux_ddr_pxi3,
0430     msm_mux_pll_bypassnl,
0431     msm_mux_pll_bist,
0432     msm_mux_qup03,
0433     msm_mux_pll_reset,
0434     msm_mux_agera_pll,
0435     msm_mux_qdss_cti,
0436     msm_mux_qup04,
0437     msm_mux_wlan2_adc1,
0438     msm_mux_wlan2_adc0,
0439     msm_mux_wsa_clk,
0440     msm_mux_qup13,
0441     msm_mux_ter_mi2s,
0442     msm_mux_wsa_data,
0443     msm_mux_qup10,
0444     msm_mux_gcc_gp3,
0445     msm_mux_qup12,
0446     msm_mux_sd_write,
0447     msm_mux_qup11,
0448     msm_mux_cam_mclk,
0449     msm_mux_atest_tsens,
0450     msm_mux_cci_i2c,
0451     msm_mux_cci_timer2,
0452     msm_mux_cci_timer1,
0453     msm_mux_gcc_gp2,
0454     msm_mux_cci_async,
0455     msm_mux_cci_timer4,
0456     msm_mux_cci_timer0,
0457     msm_mux_gcc_gp1,
0458     msm_mux_cci_timer3,
0459     msm_mux_wlan1_adc1,
0460     msm_mux_wlan1_adc0,
0461     msm_mux_qlink_request,
0462     msm_mux_qlink_enable,
0463     msm_mux_pa_indicator,
0464     msm_mux_nav_pps,
0465     msm_mux_gps_tx,
0466     msm_mux_gp_pdm0,
0467     msm_mux_atest_usb13,
0468     msm_mux_ddr_pxi1,
0469     msm_mux_atest_usb12,
0470     msm_mux_cri_trng0,
0471     msm_mux_cri_trng,
0472     msm_mux_cri_trng1,
0473     msm_mux_gp_pdm2,
0474     msm_mux_sp_cmu,
0475     msm_mux_atest_usb2,
0476     msm_mux_atest_usb23,
0477     msm_mux_uim2_data,
0478     msm_mux_uim2_clk,
0479     msm_mux_uim2_reset,
0480     msm_mux_atest_usb22,
0481     msm_mux_uim2_present,
0482     msm_mux_atest_usb21,
0483     msm_mux_uim1_data,
0484     msm_mux_atest_usb20,
0485     msm_mux_uim1_clk,
0486     msm_mux_uim1_reset,
0487     msm_mux_uim1_present,
0488     msm_mux_mdp_vsync,
0489     msm_mux_copy_gp,
0490     msm_mux_tsense_pwm,
0491     msm_mux_mpm_pwr,
0492     msm_mux_tgu_ch3,
0493     msm_mux_mdp_vsync0,
0494     msm_mux_mdp_vsync1,
0495     msm_mux_mdp_vsync2,
0496     msm_mux_mdp_vsync3,
0497     msm_mux_mdp_vsync4,
0498     msm_mux_mdp_vsync5,
0499     msm_mux_tgu_ch0,
0500     msm_mux_tgu_ch1,
0501     msm_mux_atest_char1,
0502     msm_mux_vfr_1,
0503     msm_mux_tgu_ch2,
0504     msm_mux_atest_char0,
0505     msm_mux_atest_char2,
0506     msm_mux_atest_char3,
0507     msm_mux_ldo_en,
0508     msm_mux_ldo_update,
0509     msm_mux_prng_rosc,
0510     msm_mux_dp_hot,
0511     msm_mux_debug_hot,
0512     msm_mux_copy_phase,
0513     msm_mux_usb_phy,
0514     msm_mux_atest_char,
0515     msm_mux_unused1,
0516     msm_mux_qua_mi2s,
0517     msm_mux_mss_lte,
0518     msm_mux_swr_tx,
0519     msm_mux_aud_sb,
0520     msm_mux_unused2,
0521     msm_mux_swr_rx,
0522     msm_mux_edp_hot,
0523     msm_mux_audio_ref,
0524     msm_mux_pri_mi2s,
0525     msm_mux_pri_mi2s_ws,
0526     msm_mux_adsp_ext,
0527     msm_mux_edp_lcd,
0528     msm_mux_mclk2,
0529     msm_mux_m_voc,
0530     msm_mux_mclk1,
0531     msm_mux_qca_sb,
0532     msm_mux_qui_mi2s,
0533     msm_mux_dmic0_clk,
0534     msm_mux_sec_mi2s,
0535     msm_mux_dmic0_data,
0536     msm_mux_dmic1_clk,
0537     msm_mux_dmic1_data,
0538     msm_mux__,
0539 };
0540 
0541 static const char * const qup00_groups[] = {
0542     "gpio0", "gpio1", "gpio2", "gpio3",
0543 };
0544 static const char * const gpio_groups[] = {
0545     "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
0546     "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
0547     "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
0548     "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
0549     "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
0550     "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
0551     "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
0552     "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
0553     "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
0554     "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
0555     "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
0556     "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
0557     "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
0558     "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
0559     "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
0560     "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
0561     "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
0562     "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122",
0563     "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", "gpio128",
0564     "gpio129", "gpio130", "gpio131", "gpio132",
0565 };
0566 static const char * const qdss_groups[] = {
0567     "gpio0", "gpio1", "gpio2", "gpio3", "gpio20", "gpio21", "gpio34", "gpio35",
0568     "gpio36", "gpio42", "gpio41", "gpio43", "gpio44", "gpio45", "gpio46",
0569     "gpio47", "gpio48", "gpio49", "gpio80", "gpio81", "gpio82", "gpio83",
0570     "gpio84", "gpio85", "gpio86", "gpio91", "gpio92", "gpio94", "gpio96",
0571     "gpio100", "gpio102", "gpio114", "gpio115", "gpio116", "gpio117", "gpio118",
0572 };
0573 static const char * const qup01_groups[] = {
0574     "gpio4", "gpio5",
0575 };
0576 static const char * const qup02_groups[] = {
0577     "gpio6", "gpio7", "gpio8", "gpio9",
0578 };
0579 static const char * const ddr_pxi0_groups[] = {
0580     "gpio6", "gpio7",
0581 };
0582 static const char * const ddr_bist_groups[] = {
0583     "gpio7", "gpio8", "gpio9", "gpio10",
0584 };
0585 static const char * const atest_tsens2_groups[] = {
0586     "gpio7",
0587 };
0588 static const char * const vsense_trigger_groups[] = {
0589     "gpio7",
0590 };
0591 static const char * const atest_usb1_groups[] = {
0592     "gpio7",
0593 };
0594 static const char * const gp_pdm1_groups[] = {
0595     "gpio8", "gpio65",
0596 };
0597 static const char * const phase_flag_groups[] = {
0598     "gpio8", "gpio9", "gpio23", "gpio24", "gpio25", "gpio26", "gpio28",
0599     "gpio29", "gpio30", "gpio53", "gpio54", "gpio55", "gpio56", "gpio57",
0600     "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio80", "gpio81",
0601     "gpio82", "gpio83", "gpio84", "gpio88", "gpio89", "gpio91", "gpio93",
0602     "gpio98", "gpio129", "gpio130", "gpio131",
0603 };
0604 static const char * const dbg_out_groups[] = {
0605     "gpio9",
0606 };
0607 static const char * const qup14_groups[] = {
0608     "gpio10", "gpio11", "gpio12", "gpio13",
0609 };
0610 static const char * const atest_usb11_groups[] = {
0611     "gpio10",
0612 };
0613 static const char * const ddr_pxi2_groups[] = {
0614     "gpio10", "gpio11",
0615 };
0616 static const char * const atest_usb10_groups[] = {
0617     "gpio11",
0618 };
0619 static const char * const jitter_bist_groups[] = {
0620     "gpio12", "gpio31",
0621 };
0622 static const char * const ddr_pxi3_groups[] = {
0623     "gpio12", "gpio13",
0624 };
0625 static const char * const pll_bypassnl_groups[] = {
0626     "gpio13",
0627 };
0628 static const char * const pll_bist_groups[] = {
0629     "gpio13", "gpio32",
0630 };
0631 static const char * const qup03_groups[] = {
0632     "gpio14", "gpio15",
0633 };
0634 static const char * const pll_reset_groups[] = {
0635     "gpio14",
0636 };
0637 static const char * const agera_pll_groups[] = {
0638     "gpio14", "gpio33",
0639 };
0640 static const char * const qdss_cti_groups[] = {
0641     "gpio14", "gpio15", "gpio95", "gpio101", "gpio106", "gpio107",
0642     "gpio110", "gpio111",
0643 };
0644 static const char * const qup04_groups[] = {
0645     "gpio16", "gpio17",
0646 };
0647 static const char * const wlan2_adc1_groups[] = {
0648     "gpio16",
0649 };
0650 static const char * const wlan2_adc0_groups[] = {
0651     "gpio17",
0652 };
0653 static const char * const wsa_clk_groups[] = {
0654     "gpio18",
0655 };
0656 static const char * const qup13_groups[] = {
0657     "gpio18", "gpio19", "gpio20", "gpio21",
0658 };
0659 static const char * const ter_mi2s_groups[] = {
0660     "gpio18", "gpio19", "gpio20", "gpio21",
0661 };
0662 static const char * const wsa_data_groups[] = {
0663     "gpio19",
0664 };
0665 static const char * const qup10_groups[] = {
0666     "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27",
0667 };
0668 static const char * const gcc_gp3_groups[] = {
0669     "gpio22", "gpio58",
0670 };
0671 static const char * const qup12_groups[] = {
0672     "gpio28", "gpio29",
0673 };
0674 static const char * const sd_write_groups[] = {
0675     "gpio29",
0676 };
0677 static const char * const qup11_groups[] = {
0678     "gpio30", "gpio31", "gpio32", "gpio33",
0679 };
0680 static const char * const cam_mclk_groups[] = {
0681     "gpio34", "gpio35", "gpio36", "gpio44",
0682 };
0683 static const char * const atest_tsens_groups[] = {
0684     "gpio34",
0685 };
0686 static const char * const cci_i2c_groups[] = {
0687     "gpio37", "gpio38", "gpio39", "gpio40",
0688 };
0689 static const char * const cci_timer2_groups[] = {
0690     "gpio42",
0691 };
0692 static const char * const cci_timer1_groups[] = {
0693     "gpio43",
0694 };
0695 static const char * const gcc_gp2_groups[] = {
0696     "gpio43", "gpio44",
0697 };
0698 static const char * const cci_async_groups[] = {
0699     "gpio44", "gpio47", "gpio48",
0700 };
0701 static const char * const cci_timer4_groups[] = {
0702     "gpio44",
0703 };
0704 static const char * const cci_timer0_groups[] = {
0705     "gpio45",
0706 };
0707 static const char * const gcc_gp1_groups[] = {
0708     "gpio45", "gpio46",
0709 };
0710 static const char * const cci_timer3_groups[] = {
0711     "gpio46",
0712 };
0713 static const char * const wlan1_adc1_groups[] = {
0714     "gpio47",
0715 };
0716 static const char * const wlan1_adc0_groups[] = {
0717     "gpio48",
0718 };
0719 static const char * const qlink_request_groups[] = {
0720     "gpio50",
0721 };
0722 static const char * const qlink_enable_groups[] = {
0723     "gpio51",
0724 };
0725 static const char * const pa_indicator_groups[] = {
0726     "gpio52",
0727 };
0728 static const char * const nav_pps_groups[] = {
0729     "gpio52", "gpio55", "gpio56", "gpio58",
0730     "gpio59",
0731 };
0732 static const char * const gps_tx_groups[] = {
0733     "gpio52", "gpio53", "gpio55", "gpio56", "gpio58", "gpio59",
0734 };
0735 static const char * const gp_pdm0_groups[] = {
0736     "gpio53", "gpio94",
0737 };
0738 static const char * const atest_usb13_groups[] = {
0739     "gpio53",
0740 };
0741 static const char * const ddr_pxi1_groups[] = {
0742     "gpio53", "gpio54",
0743 };
0744 static const char * const atest_usb12_groups[] = {
0745     "gpio54",
0746 };
0747 static const char * const cri_trng0_groups[] = {
0748     "gpio59",
0749 };
0750 static const char * const cri_trng_groups[] = {
0751     "gpio60",
0752 };
0753 static const char * const cri_trng1_groups[] = {
0754     "gpio61",
0755 };
0756 static const char * const gp_pdm2_groups[] = {
0757     "gpio62", "gpio78",
0758 };
0759 static const char * const sp_cmu_groups[] = {
0760     "gpio63",
0761 };
0762 static const char * const atest_usb2_groups[] = {
0763     "gpio66",
0764 };
0765 static const char * const atest_usb23_groups[] = {
0766     "gpio67",
0767 };
0768 static const char * const uim2_data_groups[] = {
0769     "gpio72",
0770 };
0771 static const char * const uim2_clk_groups[] = {
0772     "gpio73",
0773 };
0774 static const char * const uim2_reset_groups[] = {
0775     "gpio74",
0776 };
0777 static const char * const atest_usb22_groups[] = {
0778     "gpio74",
0779 };
0780 static const char * const uim2_present_groups[] = {
0781     "gpio75",
0782 };
0783 static const char * const atest_usb21_groups[] = {
0784     "gpio75",
0785 };
0786 static const char * const uim1_data_groups[] = {
0787     "gpio76",
0788 };
0789 static const char * const atest_usb20_groups[] = {
0790     "gpio76",
0791 };
0792 static const char * const uim1_clk_groups[] = {
0793     "gpio77",
0794 };
0795 static const char * const uim1_reset_groups[] = {
0796     "gpio78",
0797 };
0798 static const char * const uim1_present_groups[] = {
0799     "gpio79",
0800 };
0801 static const char * const mdp_vsync_groups[] = {
0802     "gpio80", "gpio81", "gpio82", "gpio89", "gpio96", "gpio97",
0803 };
0804 static const char * const copy_gp_groups[] = {
0805     "gpio85",
0806 };
0807 static const char * const tsense_pwm_groups[] = {
0808     "gpio87",
0809 };
0810 static const char * const mpm_pwr_groups[] = {
0811     "gpio88",
0812 };
0813 static const char * const tgu_ch3_groups[] = {
0814     "gpio88",
0815 };
0816 static const char * const mdp_vsync0_groups[] = {
0817     "gpio89",
0818 };
0819 static const char * const mdp_vsync1_groups[] = {
0820     "gpio89",
0821 };
0822 static const char * const mdp_vsync2_groups[] = {
0823     "gpio89",
0824 };
0825 static const char * const mdp_vsync3_groups[] = {
0826     "gpio89",
0827 };
0828 static const char * const mdp_vsync4_groups[] = {
0829     "gpio89",
0830 };
0831 static const char * const mdp_vsync5_groups[] = {
0832     "gpio89",
0833 };
0834 static const char * const tgu_ch0_groups[] = {
0835     "gpio89",
0836 };
0837 static const char * const tgu_ch1_groups[] = {
0838     "gpio90",
0839 };
0840 static const char * const atest_char1_groups[] = {
0841     "gpio90",
0842 };
0843 static const char * const vfr_1_groups[] = {
0844     "gpio91",
0845 };
0846 static const char * const tgu_ch2_groups[] = {
0847     "gpio91",
0848 };
0849 static const char * const atest_char0_groups[] = {
0850     "gpio92",
0851 };
0852 static const char * const atest_char2_groups[] = {
0853     "gpio93",
0854 };
0855 static const char * const atest_char3_groups[] = {
0856     "gpio94",
0857 };
0858 static const char * const ldo_en_groups[] = {
0859     "gpio96",
0860 };
0861 static const char * const ldo_update_groups[] = {
0862     "gpio97",
0863 };
0864 static const char * const prng_rosc_groups[] = {
0865     "gpio98", "gpio100",
0866 };
0867 static const char * const dp_hot_groups[] = {
0868     "gpio100",
0869 };
0870 static const char * const debug_hot_groups[] = {
0871     "gpio101",
0872 };
0873 static const char * const copy_phase_groups[] = {
0874     "gpio101",
0875 };
0876 static const char * const usb_phy_groups[] = {
0877     "gpio102",
0878 };
0879 static const char * const atest_char_groups[] = {
0880     "gpio102",
0881 };
0882 static const char * const unused1_groups[] = {
0883     "gpio104",
0884 };
0885 static const char * const qua_mi2s_groups[] = {
0886     "gpio104", "gpio106", "gpio107", "gpio108", "gpio110", "gpio111",
0887 };
0888 static const char * const mss_lte_groups[] = {
0889     "gpio105", "gpio109",
0890 };
0891 static const char * const swr_tx_groups[] = {
0892     "gpio106", "gpio107", "gpio108", "gpio109",
0893 };
0894 static const char * const aud_sb_groups[] = {
0895     "gpio106", "gpio107", "gpio108", "gpio109",
0896 };
0897 static const char * const unused2_groups[] = {
0898     "gpio109",
0899 };
0900 static const char * const swr_rx_groups[] = {
0901     "gpio110", "gpio111", "gpio112",
0902 };
0903 static const char * const edp_hot_groups[] = {
0904     "gpio111",
0905 };
0906 static const char * const audio_ref_groups[] = {
0907     "gpio112",
0908 };
0909 static const char * const pri_mi2s_groups[] = {
0910     "gpio113", "gpio115", "gpio116",
0911 };
0912 static const char * const pri_mi2s_ws_groups[] = {
0913     "gpio114",
0914 };
0915 static const char * const adsp_ext_groups[] = {
0916     "gpio116",
0917 };
0918 static const char * const edp_lcd_groups[] = {
0919     "gpio117",
0920 };
0921 static const char * const mclk2_groups[] = {
0922     "gpio118",
0923 };
0924 static const char * const m_voc_groups[] = {
0925     "gpio118",
0926 };
0927 static const char * const mclk1_groups[] = {
0928     "gpio119",
0929 };
0930 static const char * const qca_sb_groups[] = {
0931     "gpio121", "gpio122",
0932 };
0933 static const char * const qui_mi2s_groups[] = {
0934     "gpio121", "gpio122", "gpio123", "gpio124",
0935 };
0936 static const char * const dmic0_clk_groups[] = {
0937     "gpio125",
0938 };
0939 static const char * const sec_mi2s_groups[] = {
0940     "gpio125", "gpio126", "gpio127", "gpio128",
0941 };
0942 static const char * const dmic0_data_groups[] = {
0943     "gpio126",
0944 };
0945 static const char * const dmic1_clk_groups[] = {
0946     "gpio127",
0947 };
0948 static const char * const dmic1_data_groups[] = {
0949     "gpio128",
0950 };
0951 
0952 static const struct msm_function sm6125_functions[] = {
0953     FUNCTION(qup00),
0954     FUNCTION(gpio),
0955     FUNCTION(qdss),
0956     FUNCTION(qup01),
0957     FUNCTION(qup02),
0958     FUNCTION(ddr_pxi0),
0959     FUNCTION(ddr_bist),
0960     FUNCTION(atest_tsens2),
0961     FUNCTION(vsense_trigger),
0962     FUNCTION(atest_usb1),
0963     FUNCTION(gp_pdm1),
0964     FUNCTION(phase_flag),
0965     FUNCTION(dbg_out),
0966     FUNCTION(qup14),
0967     FUNCTION(atest_usb11),
0968     FUNCTION(ddr_pxi2),
0969     FUNCTION(atest_usb10),
0970     FUNCTION(jitter_bist),
0971     FUNCTION(ddr_pxi3),
0972     FUNCTION(pll_bypassnl),
0973     FUNCTION(pll_bist),
0974     FUNCTION(qup03),
0975     FUNCTION(pll_reset),
0976     FUNCTION(agera_pll),
0977     FUNCTION(qdss_cti),
0978     FUNCTION(qup04),
0979     FUNCTION(wlan2_adc1),
0980     FUNCTION(wlan2_adc0),
0981     FUNCTION(wsa_clk),
0982     FUNCTION(qup13),
0983     FUNCTION(ter_mi2s),
0984     FUNCTION(wsa_data),
0985     FUNCTION(qup10),
0986     FUNCTION(gcc_gp3),
0987     FUNCTION(qup12),
0988     FUNCTION(sd_write),
0989     FUNCTION(qup11),
0990     FUNCTION(cam_mclk),
0991     FUNCTION(atest_tsens),
0992     FUNCTION(cci_i2c),
0993     FUNCTION(cci_timer2),
0994     FUNCTION(cci_timer1),
0995     FUNCTION(gcc_gp2),
0996     FUNCTION(cci_async),
0997     FUNCTION(cci_timer4),
0998     FUNCTION(cci_timer0),
0999     FUNCTION(gcc_gp1),
1000     FUNCTION(cci_timer3),
1001     FUNCTION(wlan1_adc1),
1002     FUNCTION(wlan1_adc0),
1003     FUNCTION(qlink_request),
1004     FUNCTION(qlink_enable),
1005     FUNCTION(pa_indicator),
1006     FUNCTION(nav_pps),
1007     FUNCTION(gps_tx),
1008     FUNCTION(gp_pdm0),
1009     FUNCTION(atest_usb13),
1010     FUNCTION(ddr_pxi1),
1011     FUNCTION(atest_usb12),
1012     FUNCTION(cri_trng0),
1013     FUNCTION(cri_trng),
1014     FUNCTION(cri_trng1),
1015     FUNCTION(gp_pdm2),
1016     FUNCTION(sp_cmu),
1017     FUNCTION(atest_usb2),
1018     FUNCTION(atest_usb23),
1019     FUNCTION(uim2_data),
1020     FUNCTION(uim2_clk),
1021     FUNCTION(uim2_reset),
1022     FUNCTION(atest_usb22),
1023     FUNCTION(uim2_present),
1024     FUNCTION(atest_usb21),
1025     FUNCTION(uim1_data),
1026     FUNCTION(atest_usb20),
1027     FUNCTION(uim1_clk),
1028     FUNCTION(uim1_reset),
1029     FUNCTION(uim1_present),
1030     FUNCTION(mdp_vsync),
1031     FUNCTION(copy_gp),
1032     FUNCTION(tsense_pwm),
1033     FUNCTION(mpm_pwr),
1034     FUNCTION(tgu_ch3),
1035     FUNCTION(mdp_vsync0),
1036     FUNCTION(mdp_vsync1),
1037     FUNCTION(mdp_vsync2),
1038     FUNCTION(mdp_vsync3),
1039     FUNCTION(mdp_vsync4),
1040     FUNCTION(mdp_vsync5),
1041     FUNCTION(tgu_ch0),
1042     FUNCTION(tgu_ch1),
1043     FUNCTION(atest_char1),
1044     FUNCTION(vfr_1),
1045     FUNCTION(tgu_ch2),
1046     FUNCTION(atest_char0),
1047     FUNCTION(atest_char2),
1048     FUNCTION(atest_char3),
1049     FUNCTION(ldo_en),
1050     FUNCTION(ldo_update),
1051     FUNCTION(prng_rosc),
1052     FUNCTION(dp_hot),
1053     FUNCTION(debug_hot),
1054     FUNCTION(copy_phase),
1055     FUNCTION(usb_phy),
1056     FUNCTION(atest_char),
1057     FUNCTION(unused1),
1058     FUNCTION(qua_mi2s),
1059     FUNCTION(mss_lte),
1060     FUNCTION(swr_tx),
1061     FUNCTION(aud_sb),
1062     FUNCTION(unused2),
1063     FUNCTION(swr_rx),
1064     FUNCTION(edp_hot),
1065     FUNCTION(audio_ref),
1066     FUNCTION(pri_mi2s),
1067     FUNCTION(pri_mi2s_ws),
1068     FUNCTION(adsp_ext),
1069     FUNCTION(edp_lcd),
1070     FUNCTION(mclk2),
1071     FUNCTION(m_voc),
1072     FUNCTION(mclk1),
1073     FUNCTION(qca_sb),
1074     FUNCTION(qui_mi2s),
1075     FUNCTION(dmic0_clk),
1076     FUNCTION(sec_mi2s),
1077     FUNCTION(dmic0_data),
1078     FUNCTION(dmic1_clk),
1079     FUNCTION(dmic1_data),
1080 };
1081 
1082  /*
1083  * Every pin is maintained as a single group, and missing or non-existing pin
1084  * would be maintained as dummy group to synchronize pin group index with
1085  * pin descriptor registered with pinctrl core.
1086  * Clients would not be able to request these dummy pin groups.
1087  */
1088 static const struct msm_pingroup sm6125_groups[] = {
1089     [0] = PINGROUP(0, WEST, qup00, _, qdss, _, _, _, _, _, _),
1090     [1] = PINGROUP(1, WEST, qup00, _, qdss, _, _, _, _, _, _),
1091     [2] = PINGROUP(2, WEST, qup00, _, qdss, _, _, _, _, _, _),
1092     [3] = PINGROUP(3, WEST, qup00, _, qdss, _, _, _, _, _, _),
1093     [4] = PINGROUP(4, WEST, qup01, _, _, _, _, _, _, _, _),
1094     [5] = PINGROUP(5, WEST, qup01, _, _, _, _, _, _, _, _),
1095     [6] = PINGROUP(6, WEST, qup02, ddr_pxi0, _, _, _, _, _, _, _),
1096     [7] = PINGROUP(7, WEST, qup02, ddr_bist, atest_tsens2, vsense_trigger, atest_usb1, ddr_pxi0, _, _, _),
1097     [8] = PINGROUP(8, WEST, qup02, gp_pdm1, ddr_bist, _, phase_flag, _, _, _, _),
1098     [9] = PINGROUP(9, WEST, qup02, ddr_bist, dbg_out, phase_flag, _, _, _, _, _),
1099     [10] = PINGROUP(10, EAST, qup14, ddr_bist, atest_usb11, ddr_pxi2, _, _, _, _, _),
1100     [11] = PINGROUP(11, EAST, qup14, atest_usb10, ddr_pxi2, _, _, _, _, _, _),
1101     [12] = PINGROUP(12, EAST, qup14, jitter_bist, ddr_pxi3, _, _, _, _, _, _),
1102     [13] = PINGROUP(13, EAST, qup14, pll_bypassnl, pll_bist, _, ddr_pxi3, _, _, _, _),
1103     [14] = PINGROUP(14, WEST, qup03, qup03, pll_reset, agera_pll, _, qdss_cti, _, _, _),
1104     [15] = PINGROUP(15, WEST, qup03, qup03, qdss_cti, _, _, _, _, _, _),
1105     [16] = PINGROUP(16, WEST, qup04, qup04, _, wlan2_adc1, _, _, _, _, _),
1106     [17] = PINGROUP(17, WEST, qup04, qup04, _, wlan2_adc0, _, _, _, _, _),
1107     [18] = PINGROUP(18, EAST, wsa_clk, qup13, ter_mi2s, _, _, _, _, _, _),
1108     [19] = PINGROUP(19, EAST, wsa_data, qup13, ter_mi2s, _, _, _, _, _, _),
1109     [20] = PINGROUP(20, EAST, qup13, ter_mi2s, qdss, _, _, _, _, _, _),
1110     [21] = PINGROUP(21, EAST, qup13, ter_mi2s, _, qdss, _, _, _, _, _),
1111     [22] = PINGROUP(22, WEST, qup10, gcc_gp3, _, _, _, _, _, _, _),
1112     [23] = PINGROUP(23, WEST, qup10, _, phase_flag, _, _, _, _, _, _),
1113     [24] = PINGROUP(24, WEST, qup10, _, phase_flag, _, _, _, _, _, _),
1114     [25] = PINGROUP(25, WEST, qup10, _, phase_flag, _, _, _, _, _, _),
1115     [26] = PINGROUP(26, WEST, qup10, _, phase_flag, _, _, _, _, _, _),
1116     [27] = PINGROUP(27, WEST, qup10, _, _, _, _, _, _, _, _),
1117     [28] = PINGROUP(28, WEST, qup12, _, phase_flag, _, _, _, _, _, _),
1118     [29] = PINGROUP(29, WEST, qup12, sd_write, _, phase_flag, _, _, _, _, _),
1119     [30] = PINGROUP(30, WEST, qup11, _, phase_flag, _, _, _, _, _, _),
1120     [31] = PINGROUP(31, WEST, qup11, jitter_bist, _, _, _, _, _, _, _),
1121     [32] = PINGROUP(32, WEST, qup11, pll_bist, _, _, _, _, _, _, _),
1122     [33] = PINGROUP(33, WEST, qup11, agera_pll, _, _, _, _, _, _, _),
1123     [34] = PINGROUP(34, SOUTH, cam_mclk, _, qdss, atest_tsens, _, _, _, _, _),
1124     [35] = PINGROUP(35, SOUTH, cam_mclk, _, qdss, _, _, _, _, _, _),
1125     [36] = PINGROUP(36, SOUTH, cam_mclk, _, qdss, _, _, _, _, _, _),
1126     [37] = PINGROUP(37, SOUTH, cci_i2c, _, _, _, _, _, _, _, _),
1127     [38] = PINGROUP(38, EAST, cci_i2c, _, _, _, _, _, _, _, _),
1128     [39] = PINGROUP(39, EAST, cci_i2c, _, _, _, _, _, _, _, _),
1129     [40] = PINGROUP(40, EAST, cci_i2c, _, _, _, _, _, _, _, _),
1130     [41] = PINGROUP(41, EAST, _, qdss, _, _, _, _, _, _, _),
1131     [42] = PINGROUP(42, EAST, cci_timer2, _, qdss, _, _, _, _, _, _),
1132     [43] = PINGROUP(43, EAST, cci_timer1, _, gcc_gp2, _, qdss, _, _, _, _),
1133     [44] = PINGROUP(44, SOUTH, cci_async, cci_timer4, _, gcc_gp2, _, qdss, cam_mclk, _, _),
1134     [45] = PINGROUP(45, SOUTH, cci_timer0, _, gcc_gp1, qdss, _, _, _, _, _),
1135     [46] = PINGROUP(46, SOUTH, cci_timer3, _, gcc_gp1, _, qdss, _, _, _, _),
1136     [47] = PINGROUP(47, SOUTH, cci_async, _, qdss, wlan1_adc1, _, _, _, _, _),
1137     [48] = PINGROUP(48, SOUTH, cci_async, _, qdss, wlan1_adc0, _, _, _, _, _),
1138     [49] = PINGROUP(49, SOUTH, qdss, _, _, _, _, _, _, _, _),
1139     [50] = PINGROUP(50, SOUTH, qlink_request, _, _, _, _, _, _, _, _),
1140     [51] = PINGROUP(51, SOUTH, qlink_enable, _, _, _, _, _, _, _, _),
1141     [52] = PINGROUP(52, SOUTH, pa_indicator, nav_pps, nav_pps, gps_tx, _, _, _, _, _),
1142     [53] = PINGROUP(53, SOUTH, _, gps_tx, gp_pdm0, _, phase_flag, atest_usb13, ddr_pxi1, _, _),
1143     [54] = PINGROUP(54, SOUTH, _, _, phase_flag, atest_usb12, ddr_pxi1, _, _, _, _),
1144     [55] = PINGROUP(55, SOUTH, _, nav_pps, nav_pps, gps_tx, _, phase_flag, _, _, _),
1145     [56] = PINGROUP(56, SOUTH, _, nav_pps, gps_tx, nav_pps, phase_flag, _, _, _, _),
1146     [57] = PINGROUP(57, SOUTH, _, phase_flag, _, _, _, _, _, _, _),
1147     [58] = PINGROUP(58, SOUTH, _, nav_pps, nav_pps, gps_tx, gcc_gp3, _, phase_flag, _, _),
1148     [59] = PINGROUP(59, SOUTH, _, nav_pps, nav_pps, gps_tx, cri_trng0, _, phase_flag, _, _),
1149     [60] = PINGROUP(60, SOUTH, _, cri_trng, _, phase_flag, _, _, _, _, _),
1150     [61] = PINGROUP(61, SOUTH, _, cri_trng1, _, phase_flag, _, _, _, _, _),
1151     [62] = PINGROUP(62, SOUTH, _, _, gp_pdm2, _, phase_flag, _, _, _, _),
1152     [63] = PINGROUP(63, SOUTH, _, sp_cmu, _, _, _, _, _, _, _),
1153     [64] = PINGROUP(64, SOUTH, _, _, _, _, _, _, _, _, _),
1154     [65] = PINGROUP(65, SOUTH, _, gp_pdm1, _, _, _, _, _, _, _),
1155     [66] = PINGROUP(66, SOUTH, _, _, atest_usb2, _, _, _, _, _, _),
1156     [67] = PINGROUP(67, SOUTH, _, _, atest_usb23, _, _, _, _, _, _),
1157     [68] = PINGROUP(68, SOUTH, _, _, _, _, _, _, _, _, _),
1158     [69] = PINGROUP(69, SOUTH, _, _, _, _, _, _, _, _, _),
1159     [70] = PINGROUP(70, SOUTH, _, _, _, _, _, _, _, _, _),
1160     [71] = PINGROUP(71, SOUTH, _, _, _, _, _, _, _, _, _),
1161     [72] = PINGROUP(72, SOUTH, uim2_data, _, _, _, _, _, _, _, _),
1162     [73] = PINGROUP(73, SOUTH, uim2_clk, _, _, _, _, _, _, _, _),
1163     [74] = PINGROUP(74, SOUTH, uim2_reset, _, atest_usb22, _, _, _, _, _, _),
1164     [75] = PINGROUP(75, SOUTH, uim2_present, _, atest_usb21, _, _, _, _, _, _),
1165     [76] = PINGROUP(76, SOUTH, uim1_data, _, atest_usb20, _, _, _, _, _, _),
1166     [77] = PINGROUP(77, SOUTH, uim1_clk, _, _, _, _, _, _, _, _),
1167     [78] = PINGROUP(78, SOUTH, uim1_reset, gp_pdm2, _, _, _, _, _, _, _),
1168     [79] = PINGROUP(79, SOUTH, uim1_present, _, _, _, _, _, _, _, _),
1169     [80] = PINGROUP(80, SOUTH, mdp_vsync, _, phase_flag, qdss, _, _, _, _, _),
1170     [81] = PINGROUP(81, SOUTH, mdp_vsync, _, phase_flag, qdss, _, _, _, _, _),
1171     [82] = PINGROUP(82, SOUTH, mdp_vsync, _, phase_flag, qdss, _, _, _, _, _),
1172     [83] = PINGROUP(83, SOUTH, _, phase_flag, qdss, _, _, _, _, _, _),
1173     [84] = PINGROUP(84, SOUTH, _, phase_flag, qdss, _, _, _, _, _, _),
1174     [85] = PINGROUP(85, SOUTH, copy_gp, _, qdss, _, _, _, _, _, _),
1175     [86] = PINGROUP(86, SOUTH, _, qdss, _, _, _, _, _, _, _),
1176     [87] = PINGROUP(87, WEST, tsense_pwm, _, _, _, _, _, _, _, _),
1177     [88] = PINGROUP(88, WEST, mpm_pwr, tgu_ch3, _, phase_flag, _, _, _, _, _),
1178     [89] = PINGROUP(89, WEST, mdp_vsync, mdp_vsync0, mdp_vsync1, mdp_vsync2, mdp_vsync3, mdp_vsync4, mdp_vsync5, tgu_ch0, _),
1179     [90] = PINGROUP(90, WEST, tgu_ch1, atest_char1, _, _, _, _, _, _, _),
1180     [91] = PINGROUP(91, WEST, vfr_1, tgu_ch2, _, phase_flag, qdss, _, _, _, _),
1181     [92] = PINGROUP(92, WEST, qdss, atest_char0, _, _, _, _, _, _, _),
1182     [93] = PINGROUP(93, WEST, _, phase_flag, atest_char2, _, _, _, _, _, _),
1183     [94] = PINGROUP(94, SOUTH, gp_pdm0, _, qdss, atest_char3, _, _, _, _, _),
1184     [95] = PINGROUP(95, SOUTH, qdss_cti, _, _, _, _, _, _, _, _),
1185     [96] = PINGROUP(96, SOUTH, mdp_vsync, ldo_en, qdss, _, _, _, _, _, _),
1186     [97] = PINGROUP(97, SOUTH, mdp_vsync, ldo_update, _, _, _, _, _, _, _),
1187     [98] = PINGROUP(98, SOUTH, _, phase_flag, prng_rosc, _, _, _, _, _, _),
1188     [99] = PINGROUP(99, SOUTH, _, _, _, _, _, _, _, _, _),
1189     [100] = PINGROUP(100, SOUTH, dp_hot, prng_rosc, qdss, _, _, _, _, _, _),
1190     [101] = PINGROUP(101, SOUTH, debug_hot, copy_phase, qdss_cti, _, _, _, _, _, _),
1191     [102] = PINGROUP(102, SOUTH, usb_phy, _, qdss, atest_char, _, _, _, _, _),
1192     [103] = PINGROUP(103, SOUTH, _, _, _, _, _, _, _, _, _),
1193     [104] = PINGROUP(104, EAST, unused1, _, qua_mi2s, _, _, _, _, _, _),
1194     [105] = PINGROUP(105, EAST, mss_lte, _, _, _, _, _, _, _, _),
1195     [106] = PINGROUP(106, EAST, swr_tx, aud_sb, qua_mi2s, _, qdss_cti, _, _, _, _),
1196     [107] = PINGROUP(107, EAST, swr_tx, aud_sb, qua_mi2s, _, qdss_cti, _, _, _, _),
1197     [108] = PINGROUP(108, EAST, swr_tx, aud_sb, qua_mi2s, _, _, _, _, _, _),
1198     [109] = PINGROUP(109, EAST, swr_tx, aud_sb, unused2, _, mss_lte, _, _, _, _),
1199     [110] = PINGROUP(110, EAST, swr_rx, qua_mi2s, _, qdss_cti, _, _, _, _, _),
1200     [111] = PINGROUP(111, EAST, swr_rx, qua_mi2s, edp_hot, _, qdss_cti, _, _, _, _),
1201     [112] = PINGROUP(112, EAST, swr_rx, audio_ref, _, _, _, _, _, _, _),
1202     [113] = PINGROUP(113, EAST, pri_mi2s, _, _, _, _, _, _, _, _),
1203     [114] = PINGROUP(114, EAST, pri_mi2s_ws, qdss, _, _, _, _, _, _, _),
1204     [115] = PINGROUP(115, EAST, pri_mi2s, qdss, _, _, _, _, _, _, _),
1205     [116] = PINGROUP(116, EAST, pri_mi2s, adsp_ext, qdss, _, _, _, _, _, _),
1206     [117] = PINGROUP(117, SOUTH, edp_lcd, qdss, _, _, _, _, _, _, _),
1207     [118] = PINGROUP(118, SOUTH, mclk2, m_voc, qdss, _, _, _, _, _, _),
1208     [119] = PINGROUP(119, SOUTH, mclk1, _, _, _, _, _, _, _, _),
1209     [120] = PINGROUP(120, SOUTH, _, _, _, _, _, _, _, _, _),
1210     [121] = PINGROUP(121, EAST, qca_sb, qui_mi2s, _, _, _, _, _, _, _),
1211     [122] = PINGROUP(122, EAST, qca_sb, qui_mi2s, _, _, _, _, _, _, _),
1212     [123] = PINGROUP(123, EAST, qui_mi2s, _, _, _, _, _, _, _, _),
1213     [124] = PINGROUP(124, EAST, qui_mi2s, _, _, _, _, _, _, _, _),
1214     [125] = PINGROUP(125, EAST, dmic0_clk, sec_mi2s, _, _, _, _, _, _, _),
1215     [126] = PINGROUP(126, EAST, dmic0_data, sec_mi2s, _, _, _, _, _, _, _),
1216     [127] = PINGROUP(127, EAST, dmic1_clk, sec_mi2s, _, _, _, _, _, _, _),
1217     [128] = PINGROUP(128, EAST, dmic1_data, sec_mi2s, _, _, _, _, _, _, _),
1218     [129] = PINGROUP(129, SOUTH, _, phase_flag, _, _, _, _, _, _, _),
1219     [130] = PINGROUP(130, SOUTH, phase_flag, _, _, _, _, _, _, _, _),
1220     [131] = PINGROUP(131, SOUTH, phase_flag, _, _, _, _, _, _, _, _),
1221     [132] = PINGROUP(132, SOUTH, _, _, _, _, _, _, _, _, _),
1222     [133] = UFS_RESET(ufs_reset, 0x190000),
1223     [134] = SDC_QDSD_PINGROUP(sdc1_rclk, WEST, 0x18d000, 15, 0),
1224     [135] = SDC_QDSD_PINGROUP(sdc1_clk, WEST, 0x18d000, 13, 6),
1225     [136] = SDC_QDSD_PINGROUP(sdc1_cmd, WEST, 0x18d000, 11, 3),
1226     [137] = SDC_QDSD_PINGROUP(sdc1_data, WEST, 0x18d000, 9, 0),
1227     [138] = SDC_QDSD_PINGROUP(sdc2_clk, SOUTH, 0x58b000, 14, 6),
1228     [139] = SDC_QDSD_PINGROUP(sdc2_cmd, SOUTH, 0x58b000, 11, 3),
1229     [140] = SDC_QDSD_PINGROUP(sdc2_data, SOUTH, 0x58b000, 9, 0),
1230 };
1231 
1232 static const struct msm_pinctrl_soc_data sm6125_tlmm = {
1233     .pins = sm6125_pins,
1234     .npins = ARRAY_SIZE(sm6125_pins),
1235     .functions = sm6125_functions,
1236     .nfunctions = ARRAY_SIZE(sm6125_functions),
1237     .groups = sm6125_groups,
1238     .ngroups = ARRAY_SIZE(sm6125_groups),
1239     .ngpios = 134,
1240     .tiles = sm6125_tiles,
1241     .ntiles = ARRAY_SIZE(sm6125_tiles),
1242 };
1243 
1244 static int sm6125_tlmm_probe(struct platform_device *pdev)
1245 {
1246     return msm_pinctrl_probe(pdev, &sm6125_tlmm);
1247 }
1248 
1249 static const struct of_device_id sm6125_tlmm_of_match[] = {
1250     { .compatible = "qcom,sm6125-tlmm", },
1251     { },
1252 };
1253 
1254 static struct platform_driver sm6125_tlmm_driver = {
1255     .driver = {
1256         .name = "sm6125-tlmm",
1257         .of_match_table = sm6125_tlmm_of_match,
1258     },
1259     .probe = sm6125_tlmm_probe,
1260     .remove = msm_pinctrl_remove,
1261 };
1262 
1263 static int __init sm6125_tlmm_init(void)
1264 {
1265     return platform_driver_register(&sm6125_tlmm_driver);
1266 }
1267 arch_initcall(sm6125_tlmm_init);
1268 
1269 static void __exit sm6125_tlmm_exit(void)
1270 {
1271     platform_driver_unregister(&sm6125_tlmm_driver);
1272 }
1273 module_exit(sm6125_tlmm_exit);
1274 
1275 MODULE_DESCRIPTION("QTI sm6125 TLMM driver");
1276 MODULE_LICENSE("GPL v2");
1277 MODULE_DEVICE_TABLE(of, sm6125_tlmm_of_match);
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