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0006 #include <linux/module.h>
0007 #include <linux/of.h>
0008 #include <linux/platform_device.h>
0009 #include <linux/pinctrl/pinctrl.h>
0010
0011 #include "pinctrl-msm.h"
0012
0013 #define FUNCTION(fname) \
0014 [msm_mux_##fname] = { \
0015 .name = #fname, \
0016 .groups = fname##_groups, \
0017 .ngroups = ARRAY_SIZE(fname##_groups), \
0018 }
0019
0020 #define REG_SIZE 0x1000
0021
0022 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
0023 { \
0024 .name = "gpio" #id, \
0025 .pins = gpio##id##_pins, \
0026 .npins = (unsigned int)ARRAY_SIZE(gpio##id##_pins), \
0027 .funcs = (int[]){ \
0028 msm_mux_gpio, \
0029 msm_mux_##f1, \
0030 msm_mux_##f2, \
0031 msm_mux_##f3, \
0032 msm_mux_##f4, \
0033 msm_mux_##f5, \
0034 msm_mux_##f6, \
0035 msm_mux_##f7, \
0036 msm_mux_##f8, \
0037 msm_mux_##f9 \
0038 }, \
0039 .nfuncs = 10, \
0040 .ctl_reg = REG_SIZE * id, \
0041 .io_reg = 0x4 + REG_SIZE * id, \
0042 .intr_cfg_reg = 0x8 + REG_SIZE * id, \
0043 .intr_status_reg = 0xc + REG_SIZE * id, \
0044 .intr_target_reg = 0x8 + REG_SIZE * id, \
0045 .mux_bit = 2, \
0046 .pull_bit = 0, \
0047 .drv_bit = 6, \
0048 .oe_bit = 9, \
0049 .in_bit = 0, \
0050 .out_bit = 1, \
0051 .intr_enable_bit = 0, \
0052 .intr_status_bit = 0, \
0053 .intr_target_bit = 5, \
0054 .intr_target_kpss_val = 3, \
0055 .intr_raw_status_bit = 4, \
0056 .intr_polarity_bit = 1, \
0057 .intr_detection_bit = 2, \
0058 .intr_detection_width = 2, \
0059 }
0060
0061 #define SDC_PINGROUP(pg_name, ctl, pull, drv) \
0062 { \
0063 .name = #pg_name, \
0064 .pins = pg_name##_pins, \
0065 .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins), \
0066 .ctl_reg = ctl, \
0067 .io_reg = 0, \
0068 .intr_cfg_reg = 0, \
0069 .intr_status_reg = 0, \
0070 .intr_target_reg = 0, \
0071 .mux_bit = -1, \
0072 .pull_bit = pull, \
0073 .drv_bit = drv, \
0074 .oe_bit = -1, \
0075 .in_bit = -1, \
0076 .out_bit = -1, \
0077 .intr_enable_bit = -1, \
0078 .intr_status_bit = -1, \
0079 .intr_target_bit = -1, \
0080 .intr_raw_status_bit = -1, \
0081 .intr_polarity_bit = -1, \
0082 .intr_detection_bit = -1, \
0083 .intr_detection_width = -1, \
0084 }
0085
0086 static const struct pinctrl_pin_desc sdx55_pins[] = {
0087 PINCTRL_PIN(0, "GPIO_0"),
0088 PINCTRL_PIN(1, "GPIO_1"),
0089 PINCTRL_PIN(2, "GPIO_2"),
0090 PINCTRL_PIN(3, "GPIO_3"),
0091 PINCTRL_PIN(4, "GPIO_4"),
0092 PINCTRL_PIN(5, "GPIO_5"),
0093 PINCTRL_PIN(6, "GPIO_6"),
0094 PINCTRL_PIN(7, "GPIO_7"),
0095 PINCTRL_PIN(8, "GPIO_8"),
0096 PINCTRL_PIN(9, "GPIO_9"),
0097 PINCTRL_PIN(10, "GPIO_10"),
0098 PINCTRL_PIN(11, "GPIO_11"),
0099 PINCTRL_PIN(12, "GPIO_12"),
0100 PINCTRL_PIN(13, "GPIO_13"),
0101 PINCTRL_PIN(14, "GPIO_14"),
0102 PINCTRL_PIN(15, "GPIO_15"),
0103 PINCTRL_PIN(16, "GPIO_16"),
0104 PINCTRL_PIN(17, "GPIO_17"),
0105 PINCTRL_PIN(18, "GPIO_18"),
0106 PINCTRL_PIN(19, "GPIO_19"),
0107 PINCTRL_PIN(20, "GPIO_20"),
0108 PINCTRL_PIN(21, "GPIO_21"),
0109 PINCTRL_PIN(22, "GPIO_22"),
0110 PINCTRL_PIN(23, "GPIO_23"),
0111 PINCTRL_PIN(24, "GPIO_24"),
0112 PINCTRL_PIN(25, "GPIO_25"),
0113 PINCTRL_PIN(26, "GPIO_26"),
0114 PINCTRL_PIN(27, "GPIO_27"),
0115 PINCTRL_PIN(28, "GPIO_28"),
0116 PINCTRL_PIN(29, "GPIO_29"),
0117 PINCTRL_PIN(30, "GPIO_30"),
0118 PINCTRL_PIN(31, "GPIO_31"),
0119 PINCTRL_PIN(32, "GPIO_32"),
0120 PINCTRL_PIN(33, "GPIO_33"),
0121 PINCTRL_PIN(34, "GPIO_34"),
0122 PINCTRL_PIN(35, "GPIO_35"),
0123 PINCTRL_PIN(36, "GPIO_36"),
0124 PINCTRL_PIN(37, "GPIO_37"),
0125 PINCTRL_PIN(38, "GPIO_38"),
0126 PINCTRL_PIN(39, "GPIO_39"),
0127 PINCTRL_PIN(40, "GPIO_40"),
0128 PINCTRL_PIN(41, "GPIO_41"),
0129 PINCTRL_PIN(42, "GPIO_42"),
0130 PINCTRL_PIN(43, "GPIO_43"),
0131 PINCTRL_PIN(44, "GPIO_44"),
0132 PINCTRL_PIN(45, "GPIO_45"),
0133 PINCTRL_PIN(46, "GPIO_46"),
0134 PINCTRL_PIN(47, "GPIO_47"),
0135 PINCTRL_PIN(48, "GPIO_48"),
0136 PINCTRL_PIN(49, "GPIO_49"),
0137 PINCTRL_PIN(50, "GPIO_50"),
0138 PINCTRL_PIN(51, "GPIO_51"),
0139 PINCTRL_PIN(52, "GPIO_52"),
0140 PINCTRL_PIN(53, "GPIO_53"),
0141 PINCTRL_PIN(54, "GPIO_54"),
0142 PINCTRL_PIN(55, "GPIO_55"),
0143 PINCTRL_PIN(56, "GPIO_56"),
0144 PINCTRL_PIN(57, "GPIO_57"),
0145 PINCTRL_PIN(58, "GPIO_58"),
0146 PINCTRL_PIN(59, "GPIO_59"),
0147 PINCTRL_PIN(60, "GPIO_60"),
0148 PINCTRL_PIN(61, "GPIO_61"),
0149 PINCTRL_PIN(62, "GPIO_62"),
0150 PINCTRL_PIN(63, "GPIO_63"),
0151 PINCTRL_PIN(64, "GPIO_64"),
0152 PINCTRL_PIN(65, "GPIO_65"),
0153 PINCTRL_PIN(66, "GPIO_66"),
0154 PINCTRL_PIN(67, "GPIO_67"),
0155 PINCTRL_PIN(68, "GPIO_68"),
0156 PINCTRL_PIN(69, "GPIO_69"),
0157 PINCTRL_PIN(70, "GPIO_70"),
0158 PINCTRL_PIN(71, "GPIO_71"),
0159 PINCTRL_PIN(72, "GPIO_72"),
0160 PINCTRL_PIN(73, "GPIO_73"),
0161 PINCTRL_PIN(74, "GPIO_74"),
0162 PINCTRL_PIN(75, "GPIO_75"),
0163 PINCTRL_PIN(76, "GPIO_76"),
0164 PINCTRL_PIN(77, "GPIO_77"),
0165 PINCTRL_PIN(78, "GPIO_78"),
0166 PINCTRL_PIN(79, "GPIO_79"),
0167 PINCTRL_PIN(80, "GPIO_80"),
0168 PINCTRL_PIN(81, "GPIO_81"),
0169 PINCTRL_PIN(82, "GPIO_82"),
0170 PINCTRL_PIN(83, "GPIO_83"),
0171 PINCTRL_PIN(84, "GPIO_84"),
0172 PINCTRL_PIN(85, "GPIO_85"),
0173 PINCTRL_PIN(86, "GPIO_86"),
0174 PINCTRL_PIN(87, "GPIO_87"),
0175 PINCTRL_PIN(88, "GPIO_88"),
0176 PINCTRL_PIN(89, "GPIO_89"),
0177 PINCTRL_PIN(90, "GPIO_90"),
0178 PINCTRL_PIN(91, "GPIO_91"),
0179 PINCTRL_PIN(92, "GPIO_92"),
0180 PINCTRL_PIN(93, "GPIO_93"),
0181 PINCTRL_PIN(94, "GPIO_94"),
0182 PINCTRL_PIN(95, "GPIO_95"),
0183 PINCTRL_PIN(96, "GPIO_96"),
0184 PINCTRL_PIN(97, "GPIO_97"),
0185 PINCTRL_PIN(98, "GPIO_98"),
0186 PINCTRL_PIN(99, "GPIO_99"),
0187 PINCTRL_PIN(100, "GPIO_100"),
0188 PINCTRL_PIN(101, "GPIO_101"),
0189 PINCTRL_PIN(102, "GPIO_102"),
0190 PINCTRL_PIN(103, "GPIO_103"),
0191 PINCTRL_PIN(104, "GPIO_104"),
0192 PINCTRL_PIN(105, "GPIO_105"),
0193 PINCTRL_PIN(106, "GPIO_106"),
0194 PINCTRL_PIN(107, "GPIO_107"),
0195 PINCTRL_PIN(108, "SDC1_RCLK"),
0196 PINCTRL_PIN(109, "SDC1_CLK"),
0197 PINCTRL_PIN(110, "SDC1_CMD"),
0198 PINCTRL_PIN(111, "SDC1_DATA"),
0199 };
0200
0201 #define DECLARE_MSM_GPIO_PINS(pin) \
0202 static const unsigned int gpio##pin##_pins[] = { pin }
0203 DECLARE_MSM_GPIO_PINS(0);
0204 DECLARE_MSM_GPIO_PINS(1);
0205 DECLARE_MSM_GPIO_PINS(2);
0206 DECLARE_MSM_GPIO_PINS(3);
0207 DECLARE_MSM_GPIO_PINS(4);
0208 DECLARE_MSM_GPIO_PINS(5);
0209 DECLARE_MSM_GPIO_PINS(6);
0210 DECLARE_MSM_GPIO_PINS(7);
0211 DECLARE_MSM_GPIO_PINS(8);
0212 DECLARE_MSM_GPIO_PINS(9);
0213 DECLARE_MSM_GPIO_PINS(10);
0214 DECLARE_MSM_GPIO_PINS(11);
0215 DECLARE_MSM_GPIO_PINS(12);
0216 DECLARE_MSM_GPIO_PINS(13);
0217 DECLARE_MSM_GPIO_PINS(14);
0218 DECLARE_MSM_GPIO_PINS(15);
0219 DECLARE_MSM_GPIO_PINS(16);
0220 DECLARE_MSM_GPIO_PINS(17);
0221 DECLARE_MSM_GPIO_PINS(18);
0222 DECLARE_MSM_GPIO_PINS(19);
0223 DECLARE_MSM_GPIO_PINS(20);
0224 DECLARE_MSM_GPIO_PINS(21);
0225 DECLARE_MSM_GPIO_PINS(22);
0226 DECLARE_MSM_GPIO_PINS(23);
0227 DECLARE_MSM_GPIO_PINS(24);
0228 DECLARE_MSM_GPIO_PINS(25);
0229 DECLARE_MSM_GPIO_PINS(26);
0230 DECLARE_MSM_GPIO_PINS(27);
0231 DECLARE_MSM_GPIO_PINS(28);
0232 DECLARE_MSM_GPIO_PINS(29);
0233 DECLARE_MSM_GPIO_PINS(30);
0234 DECLARE_MSM_GPIO_PINS(31);
0235 DECLARE_MSM_GPIO_PINS(32);
0236 DECLARE_MSM_GPIO_PINS(33);
0237 DECLARE_MSM_GPIO_PINS(34);
0238 DECLARE_MSM_GPIO_PINS(35);
0239 DECLARE_MSM_GPIO_PINS(36);
0240 DECLARE_MSM_GPIO_PINS(37);
0241 DECLARE_MSM_GPIO_PINS(38);
0242 DECLARE_MSM_GPIO_PINS(39);
0243 DECLARE_MSM_GPIO_PINS(40);
0244 DECLARE_MSM_GPIO_PINS(41);
0245 DECLARE_MSM_GPIO_PINS(42);
0246 DECLARE_MSM_GPIO_PINS(43);
0247 DECLARE_MSM_GPIO_PINS(44);
0248 DECLARE_MSM_GPIO_PINS(45);
0249 DECLARE_MSM_GPIO_PINS(46);
0250 DECLARE_MSM_GPIO_PINS(47);
0251 DECLARE_MSM_GPIO_PINS(48);
0252 DECLARE_MSM_GPIO_PINS(49);
0253 DECLARE_MSM_GPIO_PINS(50);
0254 DECLARE_MSM_GPIO_PINS(51);
0255 DECLARE_MSM_GPIO_PINS(52);
0256 DECLARE_MSM_GPIO_PINS(53);
0257 DECLARE_MSM_GPIO_PINS(54);
0258 DECLARE_MSM_GPIO_PINS(55);
0259 DECLARE_MSM_GPIO_PINS(56);
0260 DECLARE_MSM_GPIO_PINS(57);
0261 DECLARE_MSM_GPIO_PINS(58);
0262 DECLARE_MSM_GPIO_PINS(59);
0263 DECLARE_MSM_GPIO_PINS(60);
0264 DECLARE_MSM_GPIO_PINS(61);
0265 DECLARE_MSM_GPIO_PINS(62);
0266 DECLARE_MSM_GPIO_PINS(63);
0267 DECLARE_MSM_GPIO_PINS(64);
0268 DECLARE_MSM_GPIO_PINS(65);
0269 DECLARE_MSM_GPIO_PINS(66);
0270 DECLARE_MSM_GPIO_PINS(67);
0271 DECLARE_MSM_GPIO_PINS(68);
0272 DECLARE_MSM_GPIO_PINS(69);
0273 DECLARE_MSM_GPIO_PINS(70);
0274 DECLARE_MSM_GPIO_PINS(71);
0275 DECLARE_MSM_GPIO_PINS(72);
0276 DECLARE_MSM_GPIO_PINS(73);
0277 DECLARE_MSM_GPIO_PINS(74);
0278 DECLARE_MSM_GPIO_PINS(75);
0279 DECLARE_MSM_GPIO_PINS(76);
0280 DECLARE_MSM_GPIO_PINS(77);
0281 DECLARE_MSM_GPIO_PINS(78);
0282 DECLARE_MSM_GPIO_PINS(79);
0283 DECLARE_MSM_GPIO_PINS(80);
0284 DECLARE_MSM_GPIO_PINS(81);
0285 DECLARE_MSM_GPIO_PINS(82);
0286 DECLARE_MSM_GPIO_PINS(83);
0287 DECLARE_MSM_GPIO_PINS(84);
0288 DECLARE_MSM_GPIO_PINS(85);
0289 DECLARE_MSM_GPIO_PINS(86);
0290 DECLARE_MSM_GPIO_PINS(87);
0291 DECLARE_MSM_GPIO_PINS(88);
0292 DECLARE_MSM_GPIO_PINS(89);
0293 DECLARE_MSM_GPIO_PINS(90);
0294 DECLARE_MSM_GPIO_PINS(91);
0295 DECLARE_MSM_GPIO_PINS(92);
0296 DECLARE_MSM_GPIO_PINS(93);
0297 DECLARE_MSM_GPIO_PINS(94);
0298 DECLARE_MSM_GPIO_PINS(95);
0299 DECLARE_MSM_GPIO_PINS(96);
0300 DECLARE_MSM_GPIO_PINS(97);
0301 DECLARE_MSM_GPIO_PINS(98);
0302 DECLARE_MSM_GPIO_PINS(99);
0303 DECLARE_MSM_GPIO_PINS(100);
0304 DECLARE_MSM_GPIO_PINS(101);
0305 DECLARE_MSM_GPIO_PINS(102);
0306 DECLARE_MSM_GPIO_PINS(103);
0307 DECLARE_MSM_GPIO_PINS(104);
0308 DECLARE_MSM_GPIO_PINS(105);
0309 DECLARE_MSM_GPIO_PINS(106);
0310 DECLARE_MSM_GPIO_PINS(107);
0311
0312 static const unsigned int sdc1_rclk_pins[] = { 108 };
0313 static const unsigned int sdc1_clk_pins[] = { 109 };
0314 static const unsigned int sdc1_cmd_pins[] = { 110 };
0315 static const unsigned int sdc1_data_pins[] = { 111 };
0316
0317 enum sdx55_functions {
0318 msm_mux_adsp_ext,
0319 msm_mux_atest,
0320 msm_mux_audio_ref,
0321 msm_mux_bimc_dte0,
0322 msm_mux_bimc_dte1,
0323 msm_mux_blsp_i2c1,
0324 msm_mux_blsp_i2c2,
0325 msm_mux_blsp_i2c3,
0326 msm_mux_blsp_i2c4,
0327 msm_mux_blsp_spi1,
0328 msm_mux_blsp_spi2,
0329 msm_mux_blsp_spi3,
0330 msm_mux_blsp_spi4,
0331 msm_mux_blsp_uart1,
0332 msm_mux_blsp_uart2,
0333 msm_mux_blsp_uart3,
0334 msm_mux_blsp_uart4,
0335 msm_mux_char_exec,
0336 msm_mux_coex_uart,
0337 msm_mux_coex_uart2,
0338 msm_mux_cri_trng,
0339 msm_mux_cri_trng0,
0340 msm_mux_cri_trng1,
0341 msm_mux_dbg_out,
0342 msm_mux_ddr_bist,
0343 msm_mux_ddr_pxi0,
0344 msm_mux_ebi0_wrcdc,
0345 msm_mux_ebi2_a,
0346 msm_mux_ebi2_lcd,
0347 msm_mux_emac_gcc0,
0348 msm_mux_emac_gcc1,
0349 msm_mux_emac_pps0,
0350 msm_mux_emac_pps1,
0351 msm_mux_ext_dbg,
0352 msm_mux_gcc_gp1,
0353 msm_mux_gcc_gp2,
0354 msm_mux_gcc_gp3,
0355 msm_mux_gcc_plltest,
0356 msm_mux_gpio,
0357 msm_mux_i2s_mclk,
0358 msm_mux_jitter_bist,
0359 msm_mux_ldo_en,
0360 msm_mux_ldo_update,
0361 msm_mux_mgpi_clk,
0362 msm_mux_m_voc,
0363 msm_mux_native_char,
0364 msm_mux_native_char0,
0365 msm_mux_native_char1,
0366 msm_mux_native_char2,
0367 msm_mux_native_char3,
0368 msm_mux_native_tsens,
0369 msm_mux_native_tsense,
0370 msm_mux_nav_gpio,
0371 msm_mux_pa_indicator,
0372 msm_mux_pcie_clkreq,
0373 msm_mux_pci_e,
0374 msm_mux_pll_bist,
0375 msm_mux_pll_ref,
0376 msm_mux_pll_test,
0377 msm_mux_pri_mi2s,
0378 msm_mux_prng_rosc,
0379 msm_mux_qdss_cti,
0380 msm_mux_qdss_gpio,
0381 msm_mux_qdss_stm,
0382 msm_mux_qlink0_en,
0383 msm_mux_qlink0_req,
0384 msm_mux_qlink0_wmss,
0385 msm_mux_qlink1_en,
0386 msm_mux_qlink1_req,
0387 msm_mux_qlink1_wmss,
0388 msm_mux_spmi_coex,
0389 msm_mux_sec_mi2s,
0390 msm_mux_spmi_vgi,
0391 msm_mux_tgu_ch0,
0392 msm_mux_uim1_clk,
0393 msm_mux_uim1_data,
0394 msm_mux_uim1_present,
0395 msm_mux_uim1_reset,
0396 msm_mux_uim2_clk,
0397 msm_mux_uim2_data,
0398 msm_mux_uim2_present,
0399 msm_mux_uim2_reset,
0400 msm_mux_usb2phy_ac,
0401 msm_mux_vsense_trigger,
0402 msm_mux__,
0403 };
0404
0405 static const char * const gpio_groups[] = {
0406 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
0407 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
0408 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
0409 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
0410 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
0411 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
0412 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
0413 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
0414 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
0415 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
0416 "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
0417 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
0418 "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
0419 "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
0420 "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
0421 "gpio105", "gpio106", "gpio107",
0422 };
0423
0424 static const char * const qdss_stm_groups[] = {
0425 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", "gpio12", "gpio13",
0426 "gpio14", "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", "gpio22",
0427 "gpio23", "gpio44", "gpio45", "gpio52", "gpio53", "gpio56", "gpio57", "gpio61", "gpio62",
0428 "gpio63", "gpio64", "gpio65", "gpio66",
0429 };
0430
0431 static const char * const ddr_pxi0_groups[] = {
0432 "gpio45", "gpio46",
0433 };
0434
0435 static const char * const m_voc_groups[] = {
0436 "gpio46", "gpio48", "gpio49", "gpio59", "gpio60",
0437 };
0438
0439 static const char * const ddr_bist_groups[] = {
0440 "gpio46", "gpio47", "gpio48", "gpio49",
0441 };
0442
0443 static const char * const blsp_spi1_groups[] = {
0444 "gpio52", "gpio62", "gpio71", "gpio80", "gpio81", "gpio82", "gpio83",
0445 };
0446
0447 static const char * const pci_e_groups[] = {
0448 "gpio53",
0449 };
0450
0451 static const char * const tgu_ch0_groups[] = {
0452 "gpio55",
0453 };
0454
0455 static const char * const pcie_clkreq_groups[] = {
0456 "gpio56",
0457 };
0458
0459 static const char * const mgpi_clk_groups[] = {
0460 "gpio61", "gpio71",
0461 };
0462
0463 static const char * const i2s_mclk_groups[] = {
0464 "gpio62",
0465 };
0466
0467 static const char * const audio_ref_groups[] = {
0468 "gpio62",
0469 };
0470
0471 static const char * const ldo_update_groups[] = {
0472 "gpio62",
0473 };
0474
0475 static const char * const atest_groups[] = {
0476 "gpio63", "gpio64", "gpio65", "gpio66", "gpio67",
0477 };
0478
0479 static const char * const uim1_data_groups[] = {
0480 "gpio67",
0481 };
0482
0483 static const char * const uim1_present_groups[] = {
0484 "gpio68",
0485 };
0486
0487 static const char * const uim1_reset_groups[] = {
0488 "gpio69",
0489 };
0490
0491 static const char * const uim1_clk_groups[] = {
0492 "gpio70",
0493 };
0494
0495 static const char * const qlink1_en_groups[] = {
0496 "gpio72",
0497 };
0498
0499 static const char * const qlink1_req_groups[] = {
0500 "gpio73",
0501 };
0502
0503 static const char * const qlink1_wmss_groups[] = {
0504 "gpio74",
0505 };
0506
0507 static const char * const coex_uart2_groups[] = {
0508 "gpio75", "gpio76",
0509 };
0510
0511 static const char * const spmi_vgi_groups[] = {
0512 "gpio78", "gpio79",
0513 };
0514
0515 static const char * const gcc_plltest_groups[] = {
0516 "gpio81", "gpio82",
0517 };
0518
0519 static const char * const usb2phy_ac_groups[] = {
0520 "gpio93",
0521 };
0522
0523 static const char * const emac_pps1_groups[] = {
0524 "gpio95",
0525 };
0526
0527 static const char * const emac_pps0_groups[] = {
0528 "gpio106",
0529 };
0530
0531 static const char * const uim2_data_groups[] = {
0532 "gpio0",
0533 };
0534
0535 static const char * const ebi0_wrcdc_groups[] = {
0536 "gpio0", "gpio2",
0537 };
0538
0539 static const char * const uim2_present_groups[] = {
0540 "gpio1",
0541 };
0542
0543 static const char * const blsp_uart1_groups[] = {
0544 "gpio0", "gpio1", "gpio2", "gpio3", "gpio20", "gpio21", "gpio22",
0545 "gpio23",
0546 };
0547
0548 static const char * const uim2_reset_groups[] = {
0549 "gpio2",
0550 };
0551
0552 static const char * const blsp_i2c1_groups[] = {
0553 "gpio2", "gpio3", "gpio82", "gpio83",
0554 };
0555
0556 static const char * const uim2_clk_groups[] = {
0557 "gpio3",
0558 };
0559
0560 static const char * const blsp_spi2_groups[] = {
0561 "gpio4", "gpio5", "gpio6", "gpio7", "gpio52", "gpio62", "gpio71",
0562 };
0563
0564 static const char * const blsp_uart2_groups[] = {
0565 "gpio4", "gpio5", "gpio6", "gpio7", "gpio63", "gpio64", "gpio65",
0566 "gpio66",
0567 };
0568
0569 static const char * const blsp_i2c2_groups[] = {
0570 "gpio6", "gpio7", "gpio65", "gpio66",
0571 };
0572
0573 static const char * const char_exec_groups[] = {
0574 "gpio6", "gpio7",
0575 };
0576
0577 static const char * const pri_mi2s_groups[] = {
0578 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
0579 "gpio15",
0580 };
0581
0582 static const char * const blsp_spi3_groups[] = {
0583 "gpio8", "gpio9", "gpio10", "gpio11", "gpio52", "gpio62", "gpio71",
0584 };
0585
0586 static const char * const blsp_uart3_groups[] = {
0587 "gpio8", "gpio9", "gpio10", "gpio11",
0588 };
0589
0590 static const char * const ext_dbg_groups[] = {
0591 "gpio8", "gpio9", "gpio10", "gpio11",
0592 };
0593
0594 static const char * const ldo_en_groups[] = {
0595 "gpio8",
0596 };
0597
0598 static const char * const blsp_i2c3_groups[] = {
0599 "gpio10", "gpio11",
0600 };
0601
0602 static const char * const gcc_gp3_groups[] = {
0603 "gpio11",
0604 };
0605
0606 static const char * const emac_gcc1_groups[] = {
0607 "gpio14",
0608 };
0609
0610 static const char * const bimc_dte0_groups[] = {
0611 "gpio14", "gpio59",
0612 };
0613
0614 static const char * const native_tsens_groups[] = {
0615 "gpio14",
0616 };
0617
0618 static const char * const vsense_trigger_groups[] = {
0619 "gpio14",
0620 };
0621
0622 static const char * const emac_gcc0_groups[] = {
0623 "gpio15",
0624 };
0625
0626 static const char * const bimc_dte1_groups[] = {
0627 "gpio15", "gpio61",
0628 };
0629
0630 static const char * const sec_mi2s_groups[] = {
0631 "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", "gpio22",
0632 "gpio23",
0633 };
0634
0635 static const char * const blsp_spi4_groups[] = {
0636 "gpio16", "gpio17", "gpio18", "gpio19", "gpio52", "gpio62", "gpio71",
0637 };
0638
0639 static const char * const blsp_uart4_groups[] = {
0640 "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", "gpio22",
0641 "gpio23",
0642 };
0643
0644 static const char * const qdss_cti_groups[] = {
0645 "gpio16", "gpio16", "gpio17", "gpio17", "gpio22", "gpio22", "gpio23",
0646 "gpio23", "gpio54", "gpio54", "gpio55", "gpio55", "gpio59", "gpio60",
0647 "gpio94", "gpio94", "gpio95", "gpio95",
0648 };
0649
0650 static const char * const blsp_i2c4_groups[] = {
0651 "gpio18", "gpio19", "gpio78", "gpio79",
0652 };
0653
0654 static const char * const gcc_gp1_groups[] = {
0655 "gpio18",
0656 };
0657
0658 static const char * const jitter_bist_groups[] = {
0659 "gpio19",
0660 };
0661
0662 static const char * const gcc_gp2_groups[] = {
0663 "gpio19",
0664 };
0665
0666 static const char * const ebi2_a_groups[] = {
0667 "gpio20",
0668 };
0669
0670 static const char * const ebi2_lcd_groups[] = {
0671 "gpio21", "gpio22", "gpio23",
0672 };
0673
0674 static const char * const pll_bist_groups[] = {
0675 "gpio22",
0676 };
0677
0678 static const char * const adsp_ext_groups[] = {
0679 "gpio24", "gpio25",
0680 };
0681
0682 static const char * const native_char_groups[] = {
0683 "gpio26",
0684 };
0685
0686 static const char * const qlink0_wmss_groups[] = {
0687 "gpio28",
0688 };
0689
0690 static const char * const native_char3_groups[] = {
0691 "gpio28",
0692 };
0693
0694 static const char * const native_char2_groups[] = {
0695 "gpio29",
0696 };
0697
0698 static const char * const native_tsense_groups[] = {
0699 "gpio29",
0700 };
0701
0702 static const char * const nav_gpio_groups[] = {
0703 "gpio31", "gpio32", "gpio76",
0704 };
0705
0706 static const char * const pll_ref_groups[] = {
0707 "gpio32",
0708 };
0709
0710 static const char * const pa_indicator_groups[] = {
0711 "gpio33",
0712 };
0713
0714 static const char * const native_char0_groups[] = {
0715 "gpio33",
0716 };
0717
0718 static const char * const qlink0_en_groups[] = {
0719 "gpio34",
0720 };
0721
0722 static const char * const qlink0_req_groups[] = {
0723 "gpio35",
0724 };
0725
0726 static const char * const pll_test_groups[] = {
0727 "gpio35",
0728 };
0729
0730 static const char * const cri_trng_groups[] = {
0731 "gpio36",
0732 };
0733
0734 static const char * const dbg_out_groups[] = {
0735 "gpio36",
0736 };
0737
0738 static const char * const prng_rosc_groups[] = {
0739 "gpio38",
0740 };
0741
0742 static const char * const cri_trng0_groups[] = {
0743 "gpio40",
0744 };
0745
0746 static const char * const cri_trng1_groups[] = {
0747 "gpio41",
0748 };
0749
0750 static const char * const qdss_gpio_groups[] = {
0751 "gpio4", "gpio5", "gpio6", "gpio7",
0752 "gpio12", "gpio13", "gpio14", "gpio15", "gpio16", "gpio17", "gpio18", "gpio19",
0753 "gpio42", "gpio61", "gpio63", "gpio64", "gpio65", "gpio66",
0754 };
0755
0756 static const char * const native_char1_groups[] = {
0757 "gpio42",
0758 };
0759
0760 static const char * const coex_uart_groups[] = {
0761 "gpio44", "gpio45",
0762 };
0763
0764 static const char * const spmi_coex_groups[] = {
0765 "gpio44", "gpio45",
0766 };
0767
0768 static const struct msm_function sdx55_functions[] = {
0769 FUNCTION(adsp_ext),
0770 FUNCTION(atest),
0771 FUNCTION(audio_ref),
0772 FUNCTION(bimc_dte0),
0773 FUNCTION(bimc_dte1),
0774 FUNCTION(blsp_i2c1),
0775 FUNCTION(blsp_i2c2),
0776 FUNCTION(blsp_i2c3),
0777 FUNCTION(blsp_i2c4),
0778 FUNCTION(blsp_spi1),
0779 FUNCTION(blsp_spi2),
0780 FUNCTION(blsp_spi3),
0781 FUNCTION(blsp_spi4),
0782 FUNCTION(blsp_uart1),
0783 FUNCTION(blsp_uart2),
0784 FUNCTION(blsp_uart3),
0785 FUNCTION(blsp_uart4),
0786 FUNCTION(char_exec),
0787 FUNCTION(coex_uart),
0788 FUNCTION(coex_uart2),
0789 FUNCTION(cri_trng),
0790 FUNCTION(cri_trng0),
0791 FUNCTION(cri_trng1),
0792 FUNCTION(dbg_out),
0793 FUNCTION(ddr_bist),
0794 FUNCTION(ddr_pxi0),
0795 FUNCTION(ebi0_wrcdc),
0796 FUNCTION(ebi2_a),
0797 FUNCTION(ebi2_lcd),
0798 FUNCTION(emac_gcc0),
0799 FUNCTION(emac_gcc1),
0800 FUNCTION(emac_pps0),
0801 FUNCTION(emac_pps1),
0802 FUNCTION(ext_dbg),
0803 FUNCTION(gcc_gp1),
0804 FUNCTION(gcc_gp2),
0805 FUNCTION(gcc_gp3),
0806 FUNCTION(gcc_plltest),
0807 FUNCTION(gpio),
0808 FUNCTION(i2s_mclk),
0809 FUNCTION(jitter_bist),
0810 FUNCTION(ldo_en),
0811 FUNCTION(ldo_update),
0812 FUNCTION(mgpi_clk),
0813 FUNCTION(m_voc),
0814 FUNCTION(native_char),
0815 FUNCTION(native_char0),
0816 FUNCTION(native_char1),
0817 FUNCTION(native_char2),
0818 FUNCTION(native_char3),
0819 FUNCTION(native_tsens),
0820 FUNCTION(native_tsense),
0821 FUNCTION(nav_gpio),
0822 FUNCTION(pa_indicator),
0823 FUNCTION(pcie_clkreq),
0824 FUNCTION(pci_e),
0825 FUNCTION(pll_bist),
0826 FUNCTION(pll_ref),
0827 FUNCTION(pll_test),
0828 FUNCTION(pri_mi2s),
0829 FUNCTION(prng_rosc),
0830 FUNCTION(qdss_cti),
0831 FUNCTION(qdss_gpio),
0832 FUNCTION(qdss_stm),
0833 FUNCTION(qlink0_en),
0834 FUNCTION(qlink0_req),
0835 FUNCTION(qlink0_wmss),
0836 FUNCTION(qlink1_en),
0837 FUNCTION(qlink1_req),
0838 FUNCTION(qlink1_wmss),
0839 FUNCTION(spmi_coex),
0840 FUNCTION(sec_mi2s),
0841 FUNCTION(spmi_vgi),
0842 FUNCTION(tgu_ch0),
0843 FUNCTION(uim1_clk),
0844 FUNCTION(uim1_data),
0845 FUNCTION(uim1_present),
0846 FUNCTION(uim1_reset),
0847 FUNCTION(uim2_clk),
0848 FUNCTION(uim2_data),
0849 FUNCTION(uim2_present),
0850 FUNCTION(uim2_reset),
0851 FUNCTION(usb2phy_ac),
0852 FUNCTION(vsense_trigger),
0853 };
0854
0855
0856
0857
0858
0859
0860 static const struct msm_pingroup sdx55_groups[] = {
0861 [0] = PINGROUP(0, uim2_data, blsp_uart1, qdss_stm, ebi0_wrcdc, _, _, _, _, _),
0862 [1] = PINGROUP(1, uim2_present, blsp_uart1, qdss_stm, _, _, _, _, _, _),
0863 [2] = PINGROUP(2, uim2_reset, blsp_uart1, blsp_i2c1, qdss_stm, ebi0_wrcdc, _, _, _, _),
0864 [3] = PINGROUP(3, uim2_clk, blsp_uart1, blsp_i2c1, qdss_stm, _, _, _, _, _),
0865 [4] = PINGROUP(4, blsp_spi2, blsp_uart2, _, qdss_stm, qdss_gpio, _, _, _, _),
0866 [5] = PINGROUP(5, blsp_spi2, blsp_uart2, _, qdss_stm, qdss_gpio, _, _, _, _),
0867 [6] = PINGROUP(6, blsp_spi2, blsp_uart2, blsp_i2c2, char_exec, _, qdss_stm, qdss_gpio, _, _),
0868 [7] = PINGROUP(7, blsp_spi2, blsp_uart2, blsp_i2c2, char_exec, _, qdss_stm, qdss_gpio, _, _),
0869 [8] = PINGROUP(8, pri_mi2s, blsp_spi3, blsp_uart3, ext_dbg, ldo_en, _, _, _, _),
0870 [9] = PINGROUP(9, pri_mi2s, blsp_spi3, blsp_uart3, ext_dbg, _, _, _, _, _),
0871 [10] = PINGROUP(10, pri_mi2s, blsp_spi3, blsp_uart3, blsp_i2c3, ext_dbg, _, _, _, _),
0872 [11] = PINGROUP(11, pri_mi2s, blsp_spi3, blsp_uart3, blsp_i2c3, ext_dbg, gcc_gp3, _, _, _),
0873 [12] = PINGROUP(12, pri_mi2s, _, qdss_stm, qdss_gpio, _, _, _, _, _),
0874 [13] = PINGROUP(13, pri_mi2s, _, qdss_stm, qdss_gpio, _, _, _, _, _),
0875 [14] = PINGROUP(14, pri_mi2s, emac_gcc1, _, _, qdss_stm, qdss_gpio, bimc_dte0, native_tsens, vsense_trigger),
0876 [15] = PINGROUP(15, pri_mi2s, emac_gcc0, _, _, qdss_stm, qdss_gpio, bimc_dte1, _, _),
0877 [16] = PINGROUP(16, sec_mi2s, blsp_spi4, blsp_uart4, qdss_cti, qdss_cti, _, _, qdss_stm, qdss_gpio),
0878 [17] = PINGROUP(17, sec_mi2s, blsp_spi4, blsp_uart4, qdss_cti, qdss_cti, _, qdss_stm, qdss_gpio, _),
0879 [18] = PINGROUP(18, sec_mi2s, blsp_spi4, blsp_uart4, blsp_i2c4, gcc_gp1, qdss_stm, qdss_gpio, _, _),
0880 [19] = PINGROUP(19, sec_mi2s, blsp_spi4, blsp_uart4, blsp_i2c4, jitter_bist, gcc_gp2, _, qdss_stm, qdss_gpio),
0881 [20] = PINGROUP(20, sec_mi2s, ebi2_a, blsp_uart1, blsp_uart4, qdss_stm, _, _, _, _),
0882 [21] = PINGROUP(21, sec_mi2s, ebi2_lcd, blsp_uart1, blsp_uart4, _, qdss_stm, _, _, _),
0883 [22] = PINGROUP(22, sec_mi2s, ebi2_lcd, blsp_uart1, qdss_cti, qdss_cti, blsp_uart4, pll_bist, _, qdss_stm),
0884 [23] = PINGROUP(23, sec_mi2s, ebi2_lcd, qdss_cti, qdss_cti, blsp_uart1, blsp_uart4, qdss_stm, _, _),
0885 [24] = PINGROUP(24, adsp_ext, _, _, _, _, _, _, _, _),
0886 [25] = PINGROUP(25, adsp_ext, _, _, _, _, _, _, _, _),
0887 [26] = PINGROUP(26, _, _, _, native_char, _, _, _, _, _),
0888 [27] = PINGROUP(27, _, _, _, _, _, _, _, _, _),
0889 [28] = PINGROUP(28, qlink0_wmss, _, native_char3, _, _, _, _, _, _),
0890 [29] = PINGROUP(29, _, _, _, native_char2, native_tsense, _, _, _, _),
0891 [30] = PINGROUP(30, _, _, _, _, _, _, _, _, _),
0892 [31] = PINGROUP(31, nav_gpio, _, _, _, _, _, _, _, _),
0893 [32] = PINGROUP(32, nav_gpio, pll_ref, _, _, _, _, _, _, _),
0894 [33] = PINGROUP(33, _, pa_indicator, native_char0, _, _, _, _, _, _),
0895 [34] = PINGROUP(34, qlink0_en, _, _, _, _, _, _, _, _),
0896 [35] = PINGROUP(35, qlink0_req, pll_test, _, _, _, _, _, _, _),
0897 [36] = PINGROUP(36, _, _, cri_trng, dbg_out, _, _, _, _, _),
0898 [37] = PINGROUP(37, _, _, _, _, _, _, _, _, _),
0899 [38] = PINGROUP(38, _, _, prng_rosc, _, _, _, _, _, _),
0900 [39] = PINGROUP(39, _, _, _, _, _, _, _, _, _),
0901 [40] = PINGROUP(40, _, _, cri_trng0, _, _, _, _, _, _),
0902 [41] = PINGROUP(41, _, _, cri_trng1, _, _, _, _, _, _),
0903 [42] = PINGROUP(42, _, qdss_gpio, native_char1, _, _, _, _, _, _),
0904 [43] = PINGROUP(43, _, _, _, _, _, _, _, _, _),
0905 [44] = PINGROUP(44, coex_uart, spmi_coex, _, qdss_stm, _, _, _, _, _),
0906 [45] = PINGROUP(45, coex_uart, spmi_coex, qdss_stm, ddr_pxi0, _, _, _, _, _),
0907 [46] = PINGROUP(46, m_voc, ddr_bist, ddr_pxi0, _, _, _, _, _, _),
0908 [47] = PINGROUP(47, ddr_bist, _, _, _, _, _, _, _, _),
0909 [48] = PINGROUP(48, m_voc, ddr_bist, _, _, _, _, _, _, _),
0910 [49] = PINGROUP(49, m_voc, ddr_bist, _, _, _, _, _, _, _),
0911 [50] = PINGROUP(50, _, _, _, _, _, _, _, _, _),
0912 [51] = PINGROUP(51, _, _, _, _, _, _, _, _, _),
0913 [52] = PINGROUP(52, blsp_spi2, blsp_spi1, blsp_spi3, blsp_spi4, _, _, qdss_stm, _, _),
0914 [53] = PINGROUP(53, pci_e, _, _, qdss_stm, _, _, _, _, _),
0915 [54] = PINGROUP(54, qdss_cti, qdss_cti, _, _, _, _, _, _, _),
0916 [55] = PINGROUP(55, qdss_cti, qdss_cti, tgu_ch0, _, _, _, _, _, _),
0917 [56] = PINGROUP(56, pcie_clkreq, _, qdss_stm, _, _, _, _, _, _),
0918 [57] = PINGROUP(57, _, qdss_stm, _, _, _, _, _, _, _),
0919 [58] = PINGROUP(58, _, _, _, _, _, _, _, _, _),
0920 [59] = PINGROUP(59, qdss_cti, m_voc, bimc_dte0, _, _, _, _, _, _),
0921 [60] = PINGROUP(60, qdss_cti, _, m_voc, _, _, _, _, _, _),
0922 [61] = PINGROUP(61, mgpi_clk, qdss_stm, qdss_gpio, bimc_dte1, _, _, _, _, _),
0923 [62] = PINGROUP(62, i2s_mclk, audio_ref, blsp_spi1, blsp_spi2, blsp_spi3, blsp_spi4, ldo_update, qdss_stm, _),
0924 [63] = PINGROUP(63, blsp_uart2, _, qdss_stm, qdss_gpio, atest, _, _, _, _),
0925 [64] = PINGROUP(64, blsp_uart2, qdss_stm, qdss_gpio, atest, _, _, _, _, _),
0926 [65] = PINGROUP(65, blsp_uart2, blsp_i2c2, _, qdss_stm, qdss_gpio, atest, _, _, _),
0927 [66] = PINGROUP(66, blsp_uart2, blsp_i2c2, qdss_stm, qdss_gpio, atest, _, _, _, _),
0928 [67] = PINGROUP(67, uim1_data, atest, _, _, _, _, _, _, _),
0929 [68] = PINGROUP(68, uim1_present, _, _, _, _, _, _, _, _),
0930 [69] = PINGROUP(69, uim1_reset, _, _, _, _, _, _, _, _),
0931 [70] = PINGROUP(70, uim1_clk, _, _, _, _, _, _, _, _),
0932 [71] = PINGROUP(71, mgpi_clk, blsp_spi1, blsp_spi2, blsp_spi3, blsp_spi4, _, _, _, _),
0933 [72] = PINGROUP(72, qlink1_en, _, _, _, _, _, _, _, _),
0934 [73] = PINGROUP(73, qlink1_req, _, _, _, _, _, _, _, _),
0935 [74] = PINGROUP(74, qlink1_wmss, _, _, _, _, _, _, _, _),
0936 [75] = PINGROUP(75, coex_uart2, _, _, _, _, _, _, _, _),
0937 [76] = PINGROUP(76, coex_uart2, nav_gpio, _, _, _, _, _, _, _),
0938 [77] = PINGROUP(77, _, _, _, _, _, _, _, _, _),
0939 [78] = PINGROUP(78, spmi_vgi, blsp_i2c4, _, _, _, _, _, _, _),
0940 [79] = PINGROUP(79, spmi_vgi, blsp_i2c4, _, _, _, _, _, _, _),
0941 [80] = PINGROUP(80, _, blsp_spi1, _, _, _, _, _, _, _),
0942 [81] = PINGROUP(81, _, blsp_spi1, _, gcc_plltest, _, _, _, _, _),
0943 [82] = PINGROUP(82, _, blsp_spi1, _, blsp_i2c1, gcc_plltest, _, _, _, _),
0944 [83] = PINGROUP(83, _, blsp_spi1, _, blsp_i2c1, _, _, _, _, _),
0945 [84] = PINGROUP(84, _, _, _, _, _, _, _, _, _),
0946 [85] = PINGROUP(85, _, _, _, _, _, _, _, _, _),
0947 [86] = PINGROUP(86, _, _, _, _, _, _, _, _, _),
0948 [87] = PINGROUP(87, _, _, _, _, _, _, _, _, _),
0949 [88] = PINGROUP(88, _, _, _, _, _, _, _, _, _),
0950 [89] = PINGROUP(89, _, _, _, _, _, _, _, _, _),
0951 [90] = PINGROUP(90, _, _, _, _, _, _, _, _, _),
0952 [91] = PINGROUP(91, _, _, _, _, _, _, _, _, _),
0953 [92] = PINGROUP(92, _, _, _, _, _, _, _, _, _),
0954 [93] = PINGROUP(93, _, _, usb2phy_ac, _, _, _, _, _, _),
0955 [94] = PINGROUP(94, qdss_cti, qdss_cti, _, _, _, _, _, _, _),
0956 [95] = PINGROUP(95, qdss_cti, qdss_cti, emac_pps1, _, _, _, _, _, _),
0957 [96] = PINGROUP(96, _, _, _, _, _, _, _, _, _),
0958 [97] = PINGROUP(97, _, _, _, _, _, _, _, _, _),
0959 [98] = PINGROUP(98, _, _, _, _, _, _, _, _, _),
0960 [99] = PINGROUP(99, _, _, _, _, _, _, _, _, _),
0961 [100] = PINGROUP(100, _, _, _, _, _, _, _, _, _),
0962 [101] = PINGROUP(101, _, _, _, _, _, _, _, _, _),
0963 [102] = PINGROUP(102, _, _, _, _, _, _, _, _, _),
0964 [103] = PINGROUP(103, _, _, _, _, _, _, _, _, _),
0965 [104] = PINGROUP(104, _, _, _, _, _, _, _, _, _),
0966 [105] = PINGROUP(105, _, _, _, _, _, _, _, _, _),
0967 [106] = PINGROUP(106, emac_pps0, _, _, _, _, _, _, _, _),
0968 [107] = PINGROUP(107, _, _, _, _, _, _, _, _, _),
0969 [109] = SDC_PINGROUP(sdc1_rclk, 0x9a000, 15, 0),
0970 [110] = SDC_PINGROUP(sdc1_clk, 0x9a000, 13, 6),
0971 [111] = SDC_PINGROUP(sdc1_cmd, 0x9a000, 11, 3),
0972 [112] = SDC_PINGROUP(sdc1_data, 0x9a000, 9, 0),
0973 };
0974
0975 static const struct msm_pinctrl_soc_data sdx55_pinctrl = {
0976 .pins = sdx55_pins,
0977 .npins = ARRAY_SIZE(sdx55_pins),
0978 .functions = sdx55_functions,
0979 .nfunctions = ARRAY_SIZE(sdx55_functions),
0980 .groups = sdx55_groups,
0981 .ngroups = ARRAY_SIZE(sdx55_groups),
0982 .ngpios = 108,
0983 };
0984
0985 static int sdx55_pinctrl_probe(struct platform_device *pdev)
0986 {
0987 return msm_pinctrl_probe(pdev, &sdx55_pinctrl);
0988 }
0989
0990 static const struct of_device_id sdx55_pinctrl_of_match[] = {
0991 { .compatible = "qcom,sdx55-pinctrl", },
0992 { },
0993 };
0994
0995 static struct platform_driver sdx55_pinctrl_driver = {
0996 .driver = {
0997 .name = "sdx55-pinctrl",
0998 .of_match_table = sdx55_pinctrl_of_match,
0999 },
1000 .probe = sdx55_pinctrl_probe,
1001 .remove = msm_pinctrl_remove,
1002 };
1003
1004 static int __init sdx55_pinctrl_init(void)
1005 {
1006 return platform_driver_register(&sdx55_pinctrl_driver);
1007 }
1008 arch_initcall(sdx55_pinctrl_init);
1009
1010 static void __exit sdx55_pinctrl_exit(void)
1011 {
1012 platform_driver_unregister(&sdx55_pinctrl_driver);
1013 }
1014 module_exit(sdx55_pinctrl_exit);
1015
1016 MODULE_DESCRIPTION("QTI sdx55 pinctrl driver");
1017 MODULE_LICENSE("GPL v2");
1018 MODULE_DEVICE_TABLE(of, sdx55_pinctrl_of_match);
