Back to home page

OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright (c) 2016, The Linux Foundation. All rights reserved.
0004  * Copyright (c) 2018, Craig Tatlor.
0005  */
0006 
0007 #include <linux/module.h>
0008 #include <linux/of.h>
0009 #include <linux/platform_device.h>
0010 #include <linux/pinctrl/pinctrl.h>
0011 
0012 #include "pinctrl-msm.h"
0013 
0014 static const char * const sdm660_tiles[] = {
0015     "north",
0016     "center",
0017     "south"
0018 };
0019 
0020 enum {
0021     NORTH,
0022     CENTER,
0023     SOUTH
0024 };
0025 
0026 #define REG_SIZE 0x1000
0027 
0028 #define FUNCTION(fname)                 \
0029     [msm_mux_##fname] = {                       \
0030         .name = #fname,             \
0031         .groups = fname##_groups,               \
0032         .ngroups = ARRAY_SIZE(fname##_groups),  \
0033     }
0034 
0035 
0036 #define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
0037     {                           \
0038         .name = "gpio" #id,         \
0039         .pins = gpio##id##_pins,        \
0040         .npins = (unsigned)ARRAY_SIZE(gpio##id##_pins), \
0041         .funcs = (int[]){           \
0042             msm_mux_gpio, /* gpio mode */   \
0043             msm_mux_##f1,           \
0044             msm_mux_##f2,           \
0045             msm_mux_##f3,           \
0046             msm_mux_##f4,           \
0047             msm_mux_##f5,           \
0048             msm_mux_##f6,           \
0049             msm_mux_##f7,           \
0050             msm_mux_##f8,           \
0051             msm_mux_##f9            \
0052         },                      \
0053         .nfuncs = 10,               \
0054         .ctl_reg = REG_SIZE * id,       \
0055         .io_reg = 0x4 + REG_SIZE * id,      \
0056         .intr_cfg_reg = 0x8 + REG_SIZE * id,    \
0057         .intr_status_reg = 0xc + REG_SIZE * id, \
0058         .intr_target_reg = 0x8 + REG_SIZE * id, \
0059         .tile = _tile,          \
0060         .mux_bit = 2,           \
0061         .pull_bit = 0,          \
0062         .drv_bit = 6,           \
0063         .oe_bit = 9,            \
0064         .in_bit = 0,            \
0065         .out_bit = 1,           \
0066         .intr_enable_bit = 0,       \
0067         .intr_status_bit = 0,       \
0068         .intr_target_bit = 5,       \
0069         .intr_target_kpss_val = 3,  \
0070         .intr_raw_status_bit = 4,   \
0071         .intr_polarity_bit = 1,     \
0072         .intr_detection_bit = 2,    \
0073         .intr_detection_width = 2,  \
0074     }
0075 
0076 #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv)  \
0077     {                           \
0078         .name = #pg_name,           \
0079         .pins = pg_name##_pins,         \
0080         .npins = (unsigned)ARRAY_SIZE(pg_name##_pins),  \
0081         .ctl_reg = ctl,             \
0082         .io_reg = 0,                \
0083         .intr_cfg_reg = 0,          \
0084         .intr_status_reg = 0,           \
0085         .intr_target_reg = 0,           \
0086         .tile = NORTH,              \
0087         .mux_bit = -1,              \
0088         .pull_bit = pull,           \
0089         .drv_bit = drv,             \
0090         .oe_bit = -1,               \
0091         .in_bit = -1,               \
0092         .out_bit = -1,              \
0093         .intr_enable_bit = -1,          \
0094         .intr_status_bit = -1,          \
0095         .intr_target_bit = -1,          \
0096         .intr_raw_status_bit = -1,      \
0097         .intr_polarity_bit = -1,        \
0098         .intr_detection_bit = -1,       \
0099         .intr_detection_width = -1,     \
0100     }
0101 
0102 static const struct pinctrl_pin_desc sdm660_pins[] = {
0103     PINCTRL_PIN(0, "GPIO_0"),
0104     PINCTRL_PIN(1, "GPIO_1"),
0105     PINCTRL_PIN(2, "GPIO_2"),
0106     PINCTRL_PIN(3, "GPIO_3"),
0107     PINCTRL_PIN(4, "GPIO_4"),
0108     PINCTRL_PIN(5, "GPIO_5"),
0109     PINCTRL_PIN(6, "GPIO_6"),
0110     PINCTRL_PIN(7, "GPIO_7"),
0111     PINCTRL_PIN(8, "GPIO_8"),
0112     PINCTRL_PIN(9, "GPIO_9"),
0113     PINCTRL_PIN(10, "GPIO_10"),
0114     PINCTRL_PIN(11, "GPIO_11"),
0115     PINCTRL_PIN(12, "GPIO_12"),
0116     PINCTRL_PIN(13, "GPIO_13"),
0117     PINCTRL_PIN(14, "GPIO_14"),
0118     PINCTRL_PIN(15, "GPIO_15"),
0119     PINCTRL_PIN(16, "GPIO_16"),
0120     PINCTRL_PIN(17, "GPIO_17"),
0121     PINCTRL_PIN(18, "GPIO_18"),
0122     PINCTRL_PIN(19, "GPIO_19"),
0123     PINCTRL_PIN(20, "GPIO_20"),
0124     PINCTRL_PIN(21, "GPIO_21"),
0125     PINCTRL_PIN(22, "GPIO_22"),
0126     PINCTRL_PIN(23, "GPIO_23"),
0127     PINCTRL_PIN(24, "GPIO_24"),
0128     PINCTRL_PIN(25, "GPIO_25"),
0129     PINCTRL_PIN(26, "GPIO_26"),
0130     PINCTRL_PIN(27, "GPIO_27"),
0131     PINCTRL_PIN(28, "GPIO_28"),
0132     PINCTRL_PIN(29, "GPIO_29"),
0133     PINCTRL_PIN(30, "GPIO_30"),
0134     PINCTRL_PIN(31, "GPIO_31"),
0135     PINCTRL_PIN(32, "GPIO_32"),
0136     PINCTRL_PIN(33, "GPIO_33"),
0137     PINCTRL_PIN(34, "GPIO_34"),
0138     PINCTRL_PIN(35, "GPIO_35"),
0139     PINCTRL_PIN(36, "GPIO_36"),
0140     PINCTRL_PIN(37, "GPIO_37"),
0141     PINCTRL_PIN(38, "GPIO_38"),
0142     PINCTRL_PIN(39, "GPIO_39"),
0143     PINCTRL_PIN(40, "GPIO_40"),
0144     PINCTRL_PIN(41, "GPIO_41"),
0145     PINCTRL_PIN(42, "GPIO_42"),
0146     PINCTRL_PIN(43, "GPIO_43"),
0147     PINCTRL_PIN(44, "GPIO_44"),
0148     PINCTRL_PIN(45, "GPIO_45"),
0149     PINCTRL_PIN(46, "GPIO_46"),
0150     PINCTRL_PIN(47, "GPIO_47"),
0151     PINCTRL_PIN(48, "GPIO_48"),
0152     PINCTRL_PIN(49, "GPIO_49"),
0153     PINCTRL_PIN(50, "GPIO_50"),
0154     PINCTRL_PIN(51, "GPIO_51"),
0155     PINCTRL_PIN(52, "GPIO_52"),
0156     PINCTRL_PIN(53, "GPIO_53"),
0157     PINCTRL_PIN(54, "GPIO_54"),
0158     PINCTRL_PIN(55, "GPIO_55"),
0159     PINCTRL_PIN(56, "GPIO_56"),
0160     PINCTRL_PIN(57, "GPIO_57"),
0161     PINCTRL_PIN(58, "GPIO_58"),
0162     PINCTRL_PIN(59, "GPIO_59"),
0163     PINCTRL_PIN(60, "GPIO_60"),
0164     PINCTRL_PIN(61, "GPIO_61"),
0165     PINCTRL_PIN(62, "GPIO_62"),
0166     PINCTRL_PIN(63, "GPIO_63"),
0167     PINCTRL_PIN(64, "GPIO_64"),
0168     PINCTRL_PIN(65, "GPIO_65"),
0169     PINCTRL_PIN(66, "GPIO_66"),
0170     PINCTRL_PIN(67, "GPIO_67"),
0171     PINCTRL_PIN(68, "GPIO_68"),
0172     PINCTRL_PIN(69, "GPIO_69"),
0173     PINCTRL_PIN(70, "GPIO_70"),
0174     PINCTRL_PIN(71, "GPIO_71"),
0175     PINCTRL_PIN(72, "GPIO_72"),
0176     PINCTRL_PIN(73, "GPIO_73"),
0177     PINCTRL_PIN(74, "GPIO_74"),
0178     PINCTRL_PIN(75, "GPIO_75"),
0179     PINCTRL_PIN(76, "GPIO_76"),
0180     PINCTRL_PIN(77, "GPIO_77"),
0181     PINCTRL_PIN(78, "GPIO_78"),
0182     PINCTRL_PIN(79, "GPIO_79"),
0183     PINCTRL_PIN(80, "GPIO_80"),
0184     PINCTRL_PIN(81, "GPIO_81"),
0185     PINCTRL_PIN(82, "GPIO_82"),
0186     PINCTRL_PIN(83, "GPIO_83"),
0187     PINCTRL_PIN(84, "GPIO_84"),
0188     PINCTRL_PIN(85, "GPIO_85"),
0189     PINCTRL_PIN(86, "GPIO_86"),
0190     PINCTRL_PIN(87, "GPIO_87"),
0191     PINCTRL_PIN(88, "GPIO_88"),
0192     PINCTRL_PIN(89, "GPIO_89"),
0193     PINCTRL_PIN(90, "GPIO_90"),
0194     PINCTRL_PIN(91, "GPIO_91"),
0195     PINCTRL_PIN(92, "GPIO_92"),
0196     PINCTRL_PIN(93, "GPIO_93"),
0197     PINCTRL_PIN(94, "GPIO_94"),
0198     PINCTRL_PIN(95, "GPIO_95"),
0199     PINCTRL_PIN(96, "GPIO_96"),
0200     PINCTRL_PIN(97, "GPIO_97"),
0201     PINCTRL_PIN(98, "GPIO_98"),
0202     PINCTRL_PIN(99, "GPIO_99"),
0203     PINCTRL_PIN(100, "GPIO_100"),
0204     PINCTRL_PIN(101, "GPIO_101"),
0205     PINCTRL_PIN(102, "GPIO_102"),
0206     PINCTRL_PIN(103, "GPIO_103"),
0207     PINCTRL_PIN(104, "GPIO_104"),
0208     PINCTRL_PIN(105, "GPIO_105"),
0209     PINCTRL_PIN(106, "GPIO_106"),
0210     PINCTRL_PIN(107, "GPIO_107"),
0211     PINCTRL_PIN(108, "GPIO_108"),
0212     PINCTRL_PIN(109, "GPIO_109"),
0213     PINCTRL_PIN(110, "GPIO_110"),
0214     PINCTRL_PIN(111, "GPIO_111"),
0215     PINCTRL_PIN(112, "GPIO_112"),
0216     PINCTRL_PIN(113, "GPIO_113"),
0217     PINCTRL_PIN(114, "SDC1_CLK"),
0218     PINCTRL_PIN(115, "SDC1_CMD"),
0219     PINCTRL_PIN(116, "SDC1_DATA"),
0220     PINCTRL_PIN(117, "SDC2_CLK"),
0221     PINCTRL_PIN(118, "SDC2_CMD"),
0222     PINCTRL_PIN(119, "SDC2_DATA"),
0223     PINCTRL_PIN(120, "SDC1_RCLK"),
0224 };
0225 
0226 #define DECLARE_MSM_GPIO_PINS(pin) \
0227     static const unsigned int gpio##pin##_pins[] = { pin }
0228 DECLARE_MSM_GPIO_PINS(0);
0229 DECLARE_MSM_GPIO_PINS(1);
0230 DECLARE_MSM_GPIO_PINS(2);
0231 DECLARE_MSM_GPIO_PINS(3);
0232 DECLARE_MSM_GPIO_PINS(4);
0233 DECLARE_MSM_GPIO_PINS(5);
0234 DECLARE_MSM_GPIO_PINS(6);
0235 DECLARE_MSM_GPIO_PINS(7);
0236 DECLARE_MSM_GPIO_PINS(8);
0237 DECLARE_MSM_GPIO_PINS(9);
0238 DECLARE_MSM_GPIO_PINS(10);
0239 DECLARE_MSM_GPIO_PINS(11);
0240 DECLARE_MSM_GPIO_PINS(12);
0241 DECLARE_MSM_GPIO_PINS(13);
0242 DECLARE_MSM_GPIO_PINS(14);
0243 DECLARE_MSM_GPIO_PINS(15);
0244 DECLARE_MSM_GPIO_PINS(16);
0245 DECLARE_MSM_GPIO_PINS(17);
0246 DECLARE_MSM_GPIO_PINS(18);
0247 DECLARE_MSM_GPIO_PINS(19);
0248 DECLARE_MSM_GPIO_PINS(20);
0249 DECLARE_MSM_GPIO_PINS(21);
0250 DECLARE_MSM_GPIO_PINS(22);
0251 DECLARE_MSM_GPIO_PINS(23);
0252 DECLARE_MSM_GPIO_PINS(24);
0253 DECLARE_MSM_GPIO_PINS(25);
0254 DECLARE_MSM_GPIO_PINS(26);
0255 DECLARE_MSM_GPIO_PINS(27);
0256 DECLARE_MSM_GPIO_PINS(28);
0257 DECLARE_MSM_GPIO_PINS(29);
0258 DECLARE_MSM_GPIO_PINS(30);
0259 DECLARE_MSM_GPIO_PINS(31);
0260 DECLARE_MSM_GPIO_PINS(32);
0261 DECLARE_MSM_GPIO_PINS(33);
0262 DECLARE_MSM_GPIO_PINS(34);
0263 DECLARE_MSM_GPIO_PINS(35);
0264 DECLARE_MSM_GPIO_PINS(36);
0265 DECLARE_MSM_GPIO_PINS(37);
0266 DECLARE_MSM_GPIO_PINS(38);
0267 DECLARE_MSM_GPIO_PINS(39);
0268 DECLARE_MSM_GPIO_PINS(40);
0269 DECLARE_MSM_GPIO_PINS(41);
0270 DECLARE_MSM_GPIO_PINS(42);
0271 DECLARE_MSM_GPIO_PINS(43);
0272 DECLARE_MSM_GPIO_PINS(44);
0273 DECLARE_MSM_GPIO_PINS(45);
0274 DECLARE_MSM_GPIO_PINS(46);
0275 DECLARE_MSM_GPIO_PINS(47);
0276 DECLARE_MSM_GPIO_PINS(48);
0277 DECLARE_MSM_GPIO_PINS(49);
0278 DECLARE_MSM_GPIO_PINS(50);
0279 DECLARE_MSM_GPIO_PINS(51);
0280 DECLARE_MSM_GPIO_PINS(52);
0281 DECLARE_MSM_GPIO_PINS(53);
0282 DECLARE_MSM_GPIO_PINS(54);
0283 DECLARE_MSM_GPIO_PINS(55);
0284 DECLARE_MSM_GPIO_PINS(56);
0285 DECLARE_MSM_GPIO_PINS(57);
0286 DECLARE_MSM_GPIO_PINS(58);
0287 DECLARE_MSM_GPIO_PINS(59);
0288 DECLARE_MSM_GPIO_PINS(60);
0289 DECLARE_MSM_GPIO_PINS(61);
0290 DECLARE_MSM_GPIO_PINS(62);
0291 DECLARE_MSM_GPIO_PINS(63);
0292 DECLARE_MSM_GPIO_PINS(64);
0293 DECLARE_MSM_GPIO_PINS(65);
0294 DECLARE_MSM_GPIO_PINS(66);
0295 DECLARE_MSM_GPIO_PINS(67);
0296 DECLARE_MSM_GPIO_PINS(68);
0297 DECLARE_MSM_GPIO_PINS(69);
0298 DECLARE_MSM_GPIO_PINS(70);
0299 DECLARE_MSM_GPIO_PINS(71);
0300 DECLARE_MSM_GPIO_PINS(72);
0301 DECLARE_MSM_GPIO_PINS(73);
0302 DECLARE_MSM_GPIO_PINS(74);
0303 DECLARE_MSM_GPIO_PINS(75);
0304 DECLARE_MSM_GPIO_PINS(76);
0305 DECLARE_MSM_GPIO_PINS(77);
0306 DECLARE_MSM_GPIO_PINS(78);
0307 DECLARE_MSM_GPIO_PINS(79);
0308 DECLARE_MSM_GPIO_PINS(80);
0309 DECLARE_MSM_GPIO_PINS(81);
0310 DECLARE_MSM_GPIO_PINS(82);
0311 DECLARE_MSM_GPIO_PINS(83);
0312 DECLARE_MSM_GPIO_PINS(84);
0313 DECLARE_MSM_GPIO_PINS(85);
0314 DECLARE_MSM_GPIO_PINS(86);
0315 DECLARE_MSM_GPIO_PINS(87);
0316 DECLARE_MSM_GPIO_PINS(88);
0317 DECLARE_MSM_GPIO_PINS(89);
0318 DECLARE_MSM_GPIO_PINS(90);
0319 DECLARE_MSM_GPIO_PINS(91);
0320 DECLARE_MSM_GPIO_PINS(92);
0321 DECLARE_MSM_GPIO_PINS(93);
0322 DECLARE_MSM_GPIO_PINS(94);
0323 DECLARE_MSM_GPIO_PINS(95);
0324 DECLARE_MSM_GPIO_PINS(96);
0325 DECLARE_MSM_GPIO_PINS(97);
0326 DECLARE_MSM_GPIO_PINS(98);
0327 DECLARE_MSM_GPIO_PINS(99);
0328 DECLARE_MSM_GPIO_PINS(100);
0329 DECLARE_MSM_GPIO_PINS(101);
0330 DECLARE_MSM_GPIO_PINS(102);
0331 DECLARE_MSM_GPIO_PINS(103);
0332 DECLARE_MSM_GPIO_PINS(104);
0333 DECLARE_MSM_GPIO_PINS(105);
0334 DECLARE_MSM_GPIO_PINS(106);
0335 DECLARE_MSM_GPIO_PINS(107);
0336 DECLARE_MSM_GPIO_PINS(108);
0337 DECLARE_MSM_GPIO_PINS(109);
0338 DECLARE_MSM_GPIO_PINS(110);
0339 DECLARE_MSM_GPIO_PINS(111);
0340 DECLARE_MSM_GPIO_PINS(112);
0341 DECLARE_MSM_GPIO_PINS(113);
0342 
0343 static const unsigned int sdc1_clk_pins[] = { 114 };
0344 static const unsigned int sdc1_cmd_pins[] = { 115 };
0345 static const unsigned int sdc1_data_pins[] = { 116 };
0346 static const unsigned int sdc1_rclk_pins[] = { 120 };
0347 static const unsigned int sdc2_clk_pins[] = { 117 };
0348 static const unsigned int sdc2_cmd_pins[] = { 118 };
0349 static const unsigned int sdc2_data_pins[] = { 119 };
0350 
0351 enum sdm660_functions {
0352     msm_mux_adsp_ext,
0353     msm_mux_agera_pll,
0354     msm_mux_atest_char,
0355     msm_mux_atest_char0,
0356     msm_mux_atest_char1,
0357     msm_mux_atest_char2,
0358     msm_mux_atest_char3,
0359     msm_mux_atest_gpsadc0,
0360     msm_mux_atest_gpsadc1,
0361     msm_mux_atest_tsens,
0362     msm_mux_atest_tsens2,
0363     msm_mux_atest_usb1,
0364     msm_mux_atest_usb10,
0365     msm_mux_atest_usb11,
0366     msm_mux_atest_usb12,
0367     msm_mux_atest_usb13,
0368     msm_mux_atest_usb2,
0369     msm_mux_atest_usb20,
0370     msm_mux_atest_usb21,
0371     msm_mux_atest_usb22,
0372     msm_mux_atest_usb23,
0373     msm_mux_audio_ref,
0374     msm_mux_bimc_dte0,
0375     msm_mux_bimc_dte1,
0376     msm_mux_blsp_i2c1,
0377     msm_mux_blsp_i2c2,
0378     msm_mux_blsp_i2c3,
0379     msm_mux_blsp_i2c4,
0380     msm_mux_blsp_i2c5,
0381     msm_mux_blsp_i2c6,
0382     msm_mux_blsp_i2c7,
0383     msm_mux_blsp_i2c8_a,
0384     msm_mux_blsp_i2c8_b,
0385     msm_mux_blsp_spi1,
0386     msm_mux_blsp_spi2,
0387     msm_mux_blsp_spi3,
0388     msm_mux_blsp_spi3_cs1,
0389     msm_mux_blsp_spi3_cs2,
0390     msm_mux_blsp_spi4,
0391     msm_mux_blsp_spi5,
0392     msm_mux_blsp_spi6,
0393     msm_mux_blsp_spi7,
0394     msm_mux_blsp_spi8_a,
0395     msm_mux_blsp_spi8_b,
0396     msm_mux_blsp_spi8_cs1,
0397     msm_mux_blsp_spi8_cs2,
0398     msm_mux_blsp_uart1,
0399     msm_mux_blsp_uart2,
0400     msm_mux_blsp_uart5,
0401     msm_mux_blsp_uart6_a,
0402     msm_mux_blsp_uart6_b,
0403     msm_mux_blsp_uim1,
0404     msm_mux_blsp_uim2,
0405     msm_mux_blsp_uim5,
0406     msm_mux_blsp_uim6,
0407     msm_mux_cam_mclk,
0408     msm_mux_cci_async,
0409     msm_mux_cci_i2c,
0410     msm_mux_cri_trng,
0411     msm_mux_cri_trng0,
0412     msm_mux_cri_trng1,
0413     msm_mux_dbg_out,
0414     msm_mux_ddr_bist,
0415     msm_mux_gcc_gp1,
0416     msm_mux_gcc_gp2,
0417     msm_mux_gcc_gp3,
0418     msm_mux_gpio,
0419     msm_mux_gps_tx_a,
0420     msm_mux_gps_tx_b,
0421     msm_mux_gps_tx_c,
0422     msm_mux_isense_dbg,
0423     msm_mux_jitter_bist,
0424     msm_mux_ldo_en,
0425     msm_mux_ldo_update,
0426     msm_mux_m_voc,
0427     msm_mux_mdp_vsync,
0428     msm_mux_mdss_vsync0,
0429     msm_mux_mdss_vsync1,
0430     msm_mux_mdss_vsync2,
0431     msm_mux_mdss_vsync3,
0432     msm_mux_mss_lte,
0433     msm_mux_nav_pps_a,
0434     msm_mux_nav_pps_b,
0435     msm_mux_nav_pps_c,
0436     msm_mux_pa_indicator,
0437     msm_mux_phase_flag0,
0438     msm_mux_phase_flag1,
0439     msm_mux_phase_flag2,
0440     msm_mux_phase_flag3,
0441     msm_mux_phase_flag4,
0442     msm_mux_phase_flag5,
0443     msm_mux_phase_flag6,
0444     msm_mux_phase_flag7,
0445     msm_mux_phase_flag8,
0446     msm_mux_phase_flag9,
0447     msm_mux_phase_flag10,
0448     msm_mux_phase_flag11,
0449     msm_mux_phase_flag12,
0450     msm_mux_phase_flag13,
0451     msm_mux_phase_flag14,
0452     msm_mux_phase_flag15,
0453     msm_mux_phase_flag16,
0454     msm_mux_phase_flag17,
0455     msm_mux_phase_flag18,
0456     msm_mux_phase_flag19,
0457     msm_mux_phase_flag20,
0458     msm_mux_phase_flag21,
0459     msm_mux_phase_flag22,
0460     msm_mux_phase_flag23,
0461     msm_mux_phase_flag24,
0462     msm_mux_phase_flag25,
0463     msm_mux_phase_flag26,
0464     msm_mux_phase_flag27,
0465     msm_mux_phase_flag28,
0466     msm_mux_phase_flag29,
0467     msm_mux_phase_flag30,
0468     msm_mux_phase_flag31,
0469     msm_mux_pll_bypassnl,
0470     msm_mux_pll_reset,
0471     msm_mux_pri_mi2s,
0472     msm_mux_pri_mi2s_ws,
0473     msm_mux_prng_rosc,
0474     msm_mux_pwr_crypto,
0475     msm_mux_pwr_modem,
0476     msm_mux_pwr_nav,
0477     msm_mux_qdss_cti0_a,
0478     msm_mux_qdss_cti0_b,
0479     msm_mux_qdss_cti1_a,
0480     msm_mux_qdss_cti1_b,
0481     msm_mux_qdss_gpio,
0482     msm_mux_qdss_gpio0,
0483     msm_mux_qdss_gpio1,
0484     msm_mux_qdss_gpio10,
0485     msm_mux_qdss_gpio11,
0486     msm_mux_qdss_gpio12,
0487     msm_mux_qdss_gpio13,
0488     msm_mux_qdss_gpio14,
0489     msm_mux_qdss_gpio15,
0490     msm_mux_qdss_gpio2,
0491     msm_mux_qdss_gpio3,
0492     msm_mux_qdss_gpio4,
0493     msm_mux_qdss_gpio5,
0494     msm_mux_qdss_gpio6,
0495     msm_mux_qdss_gpio7,
0496     msm_mux_qdss_gpio8,
0497     msm_mux_qdss_gpio9,
0498     msm_mux_qlink_enable,
0499     msm_mux_qlink_request,
0500     msm_mux_qspi_clk,
0501     msm_mux_qspi_cs,
0502     msm_mux_qspi_data0,
0503     msm_mux_qspi_data1,
0504     msm_mux_qspi_data2,
0505     msm_mux_qspi_data3,
0506     msm_mux_qspi_resetn,
0507     msm_mux_sec_mi2s,
0508     msm_mux_sndwire_clk,
0509     msm_mux_sndwire_data,
0510     msm_mux_sp_cmu,
0511     msm_mux_ssc_irq,
0512     msm_mux_tgu_ch0,
0513     msm_mux_tgu_ch1,
0514     msm_mux_tsense_pwm1,
0515     msm_mux_tsense_pwm2,
0516     msm_mux_uim1_clk,
0517     msm_mux_uim1_data,
0518     msm_mux_uim1_present,
0519     msm_mux_uim1_reset,
0520     msm_mux_uim2_clk,
0521     msm_mux_uim2_data,
0522     msm_mux_uim2_present,
0523     msm_mux_uim2_reset,
0524     msm_mux_uim_batt,
0525     msm_mux_vfr_1,
0526     msm_mux_vsense_clkout,
0527     msm_mux_vsense_data0,
0528     msm_mux_vsense_data1,
0529     msm_mux_vsense_mode,
0530     msm_mux_wlan1_adc0,
0531     msm_mux_wlan1_adc1,
0532     msm_mux_wlan2_adc0,
0533     msm_mux_wlan2_adc1,
0534     msm_mux__,
0535 };
0536 
0537 static const char * const gpio_groups[] = {
0538     "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
0539     "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
0540     "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
0541     "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
0542     "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
0543     "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
0544     "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
0545     "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
0546     "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
0547     "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
0548     "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
0549     "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
0550     "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
0551     "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
0552     "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
0553     "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
0554     "gpio111", "gpio112", "gpio113",
0555 };
0556 
0557 static const char * const adsp_ext_groups[] = {
0558     "gpio65",
0559 };
0560 static const char * const agera_pll_groups[] = {
0561     "gpio34", "gpio36",
0562 };
0563 static const char * const atest_char0_groups[] = {
0564     "gpio62",
0565 };
0566 static const char * const atest_char1_groups[] = {
0567     "gpio61",
0568 };
0569 static const char * const atest_char2_groups[] = {
0570     "gpio60",
0571 };
0572 static const char * const atest_char3_groups[] = {
0573     "gpio59",
0574 };
0575 static const char * const atest_char_groups[] = {
0576     "gpio58",
0577 };
0578 static const char * const atest_gpsadc0_groups[] = {
0579     "gpio1",
0580 };
0581 static const char * const atest_gpsadc1_groups[] = {
0582     "gpio0",
0583 };
0584 static const char * const atest_tsens2_groups[] = {
0585     "gpio3",
0586 };
0587 static const char * const atest_tsens_groups[] = {
0588     "gpio36",
0589 };
0590 static const char * const atest_usb10_groups[] = {
0591     "gpio11",
0592 };
0593 static const char * const atest_usb11_groups[] = {
0594     "gpio10",
0595 };
0596 static const char * const atest_usb12_groups[] = {
0597     "gpio9",
0598 };
0599 static const char * const atest_usb13_groups[] = {
0600     "gpio8",
0601 };
0602 static const char * const atest_usb1_groups[] = {
0603     "gpio3",
0604 };
0605 static const char * const atest_usb20_groups[] = {
0606     "gpio56",
0607 };
0608 static const char * const atest_usb21_groups[] = {
0609     "gpio36",
0610 };
0611 static const char * const atest_usb22_groups[] = {
0612     "gpio57",
0613 };
0614 static const char * const atest_usb23_groups[] = {
0615     "gpio37",
0616 };
0617 static const char * const atest_usb2_groups[] = {
0618     "gpio35",
0619 };
0620 static const char * const audio_ref_groups[] = {
0621     "gpio62",
0622 };
0623 static const char * const bimc_dte0_groups[] = {
0624     "gpio9", "gpio11",
0625 };
0626 static const char * const bimc_dte1_groups[] = {
0627     "gpio8", "gpio10",
0628 };
0629 static const char * const blsp_i2c1_groups[] = {
0630     "gpio2", "gpio3",
0631 };
0632 static const char * const blsp_i2c2_groups[] = {
0633     "gpio6", "gpio7",
0634 };
0635 static const char * const blsp_i2c3_groups[] = {
0636     "gpio10", "gpio11",
0637 };
0638 static const char * const blsp_i2c4_groups[] = {
0639     "gpio14", "gpio15",
0640 };
0641 static const char * const blsp_i2c5_groups[] = {
0642     "gpio18", "gpio19",
0643 };
0644 static const char * const blsp_i2c6_groups[] = {
0645     "gpio22", "gpio23",
0646 };
0647 static const char * const blsp_i2c7_groups[] = {
0648     "gpio26", "gpio27",
0649 };
0650 static const char * const blsp_i2c8_a_groups[] = {
0651     "gpio30", "gpio31",
0652 };
0653 static const char * const blsp_i2c8_b_groups[] = {
0654     "gpio44", "gpio52",
0655 };
0656 static const char * const blsp_spi1_groups[] = {
0657     "gpio0", "gpio1", "gpio2", "gpio3", "gpio46",
0658 };
0659 static const char * const blsp_spi2_groups[] = {
0660     "gpio4", "gpio5", "gpio6", "gpio7",
0661 };
0662 static const char * const blsp_spi3_cs1_groups[] = {
0663     "gpio30",
0664 };
0665 static const char * const blsp_spi3_cs2_groups[] = {
0666     "gpio65",
0667 };
0668 static const char * const blsp_spi3_groups[] = {
0669     "gpio8", "gpio9", "gpio10", "gpio11",
0670 };
0671 static const char * const blsp_spi4_groups[] = {
0672     "gpio12", "gpio13", "gpio14", "gpio15",
0673 };
0674 static const char * const blsp_spi5_groups[] = {
0675     "gpio16", "gpio17", "gpio18", "gpio19",
0676 };
0677 static const char * const blsp_spi6_groups[] = {
0678     "gpio49", "gpio52", "gpio22", "gpio23",
0679 };
0680 static const char * const blsp_spi7_groups[] = {
0681     "gpio24", "gpio25", "gpio26", "gpio27",
0682 };
0683 static const char * const blsp_spi8_a_groups[] = {
0684     "gpio28", "gpio29", "gpio30", "gpio31",
0685 };
0686 static const char * const blsp_spi8_b_groups[] = {
0687     "gpio40", "gpio41", "gpio44", "gpio52",
0688 };
0689 static const char * const blsp_spi8_cs1_groups[] = {
0690     "gpio64",
0691 };
0692 static const char * const blsp_spi8_cs2_groups[] = {
0693     "gpio76",
0694 };
0695 static const char * const blsp_uart1_groups[] = {
0696     "gpio0", "gpio1", "gpio2", "gpio3",
0697 };
0698 static const char * const blsp_uart2_groups[] = {
0699     "gpio4", "gpio5", "gpio6", "gpio7",
0700 };
0701 static const char * const blsp_uart5_groups[] = {
0702     "gpio16", "gpio17", "gpio18", "gpio19",
0703 };
0704 static const char * const blsp_uart6_a_groups[] = {
0705     "gpio24", "gpio25", "gpio26", "gpio27",
0706 };
0707 static const char * const blsp_uart6_b_groups[] = {
0708     "gpio28", "gpio29", "gpio30", "gpio31",
0709 };
0710 static const char * const blsp_uim1_groups[] = {
0711     "gpio0", "gpio1",
0712 };
0713 static const char * const blsp_uim2_groups[] = {
0714     "gpio4", "gpio5",
0715 };
0716 static const char * const blsp_uim5_groups[] = {
0717     "gpio16", "gpio17",
0718 };
0719 static const char * const blsp_uim6_groups[] = {
0720     "gpio20", "gpio21",
0721 };
0722 static const char * const cam_mclk_groups[] = {
0723     "gpio32", "gpio33", "gpio34", "gpio35",
0724 };
0725 static const char * const cci_async_groups[] = {
0726     "gpio45",
0727 };
0728 static const char * const cci_i2c_groups[] = {
0729     "gpio36", "gpio37", "gpio38", "gpio39",
0730 };
0731 static const char * const cri_trng0_groups[] = {
0732     "gpio60",
0733 };
0734 static const char * const cri_trng1_groups[] = {
0735     "gpio61",
0736 };
0737 static const char * const cri_trng_groups[] = {
0738     "gpio62",
0739 };
0740 static const char * const dbg_out_groups[] = {
0741     "gpio11",
0742 };
0743 static const char * const ddr_bist_groups[] = {
0744     "gpio3", "gpio8", "gpio9", "gpio10",
0745 };
0746 static const char * const gcc_gp1_groups[] = {
0747     "gpio57", "gpio78",
0748 };
0749 static const char * const gcc_gp2_groups[] = {
0750     "gpio58", "gpio81",
0751 };
0752 static const char * const gcc_gp3_groups[] = {
0753     "gpio59", "gpio82",
0754 };
0755 static const char * const gps_tx_a_groups[] = {
0756     "gpio65",
0757 };
0758 static const char * const gps_tx_b_groups[] = {
0759     "gpio98",
0760 };
0761 static const char * const gps_tx_c_groups[] = {
0762     "gpio80",
0763 };
0764 static const char * const isense_dbg_groups[] = {
0765     "gpio68",
0766 };
0767 static const char * const jitter_bist_groups[] = {
0768     "gpio35",
0769 };
0770 static const char * const ldo_en_groups[] = {
0771     "gpio97",
0772 };
0773 static const char * const ldo_update_groups[] = {
0774     "gpio98",
0775 };
0776 static const char * const m_voc_groups[] = {
0777     "gpio28",
0778 };
0779 static const char * const mdp_vsync_groups[] = {
0780     "gpio59", "gpio74",
0781 };
0782 static const char * const mdss_vsync0_groups[] = {
0783     "gpio42",
0784 };
0785 static const char * const mdss_vsync1_groups[] = {
0786     "gpio42",
0787 };
0788 static const char * const mdss_vsync2_groups[] = {
0789     "gpio42",
0790 };
0791 static const char * const mdss_vsync3_groups[] = {
0792     "gpio42",
0793 };
0794 static const char * const mss_lte_groups[] = {
0795     "gpio81", "gpio82",
0796 };
0797 static const char * const nav_pps_a_groups[] = {
0798     "gpio65",
0799 };
0800 static const char * const nav_pps_b_groups[] = {
0801     "gpio98",
0802 };
0803 static const char * const nav_pps_c_groups[] = {
0804     "gpio80",
0805 };
0806 static const char * const pa_indicator_groups[] = {
0807     "gpio92",
0808 };
0809 static const char * const phase_flag0_groups[] = {
0810     "gpio68",
0811 };
0812 static const char * const phase_flag1_groups[] = {
0813     "gpio48",
0814 };
0815 static const char * const phase_flag2_groups[] = {
0816     "gpio49",
0817 };
0818 static const char * const phase_flag3_groups[] = {
0819     "gpio4",
0820 };
0821 static const char * const phase_flag4_groups[] = {
0822     "gpio57",
0823 };
0824 static const char * const phase_flag5_groups[] = {
0825     "gpio17",
0826 };
0827 static const char * const phase_flag6_groups[] = {
0828     "gpio53",
0829 };
0830 static const char * const phase_flag7_groups[] = {
0831     "gpio69",
0832 };
0833 static const char * const phase_flag8_groups[] = {
0834     "gpio70",
0835 };
0836 static const char * const phase_flag9_groups[] = {
0837     "gpio50",
0838 };
0839 static const char * const phase_flag10_groups[] = {
0840     "gpio56",
0841 };
0842 static const char * const phase_flag11_groups[] = {
0843     "gpio21",
0844 };
0845 static const char * const phase_flag12_groups[] = {
0846     "gpio22",
0847 };
0848 static const char * const phase_flag13_groups[] = {
0849     "gpio23",
0850 };
0851 static const char * const phase_flag14_groups[] = {
0852     "gpio5",
0853 };
0854 static const char * const phase_flag15_groups[] = {
0855     "gpio51",
0856 };
0857 static const char * const phase_flag16_groups[] = {
0858     "gpio52",
0859 };
0860 static const char * const phase_flag17_groups[] = {
0861     "gpio24",
0862 };
0863 static const char * const phase_flag18_groups[] = {
0864     "gpio25",
0865 };
0866 static const char * const phase_flag19_groups[] = {
0867     "gpio26",
0868 };
0869 static const char * const phase_flag20_groups[] = {
0870     "gpio27",
0871 };
0872 static const char * const phase_flag21_groups[] = {
0873     "gpio28",
0874 };
0875 static const char * const phase_flag22_groups[] = {
0876     "gpio29",
0877 };
0878 static const char * const phase_flag23_groups[] = {
0879     "gpio30",
0880 };
0881 static const char * const phase_flag24_groups[] = {
0882     "gpio31",
0883 };
0884 static const char * const phase_flag25_groups[] = {
0885     "gpio55",
0886 };
0887 static const char * const phase_flag26_groups[] = {
0888     "gpio12",
0889 };
0890 static const char * const phase_flag27_groups[] = {
0891     "gpio13",
0892 };
0893 static const char * const phase_flag28_groups[] = {
0894     "gpio14",
0895 };
0896 static const char * const phase_flag29_groups[] = {
0897     "gpio54",
0898 };
0899 static const char * const phase_flag30_groups[] = {
0900     "gpio47",
0901 };
0902 static const char * const phase_flag31_groups[] = {
0903     "gpio6",
0904 };
0905 static const char * const pll_bypassnl_groups[] = {
0906     "gpio36",
0907 };
0908 static const char * const pll_reset_groups[] = {
0909     "gpio37",
0910 };
0911 static const char * const pri_mi2s_groups[] = {
0912     "gpio12", "gpio14", "gpio15", "gpio61",
0913 };
0914 static const char * const pri_mi2s_ws_groups[] = {
0915     "gpio13",
0916 };
0917 static const char * const prng_rosc_groups[] = {
0918     "gpio102",
0919 };
0920 static const char * const pwr_crypto_groups[] = {
0921     "gpio33",
0922 };
0923 static const char * const pwr_modem_groups[] = {
0924     "gpio31",
0925 };
0926 static const char * const pwr_nav_groups[] = {
0927     "gpio32",
0928 };
0929 static const char * const qdss_cti0_a_groups[] = {
0930     "gpio49", "gpio50",
0931 };
0932 static const char * const qdss_cti0_b_groups[] = {
0933     "gpio13", "gpio21",
0934 };
0935 static const char * const qdss_cti1_a_groups[] = {
0936     "gpio53", "gpio55",
0937 };
0938 static const char * const qdss_cti1_b_groups[] = {
0939     "gpio12", "gpio66",
0940 };
0941 static const char * const qdss_gpio0_groups[] = {
0942     "gpio32", "gpio67",
0943 };
0944 static const char * const qdss_gpio10_groups[] = {
0945     "gpio43", "gpio77",
0946 };
0947 static const char * const qdss_gpio11_groups[] = {
0948     "gpio44", "gpio79",
0949 };
0950 static const char * const qdss_gpio12_groups[] = {
0951     "gpio45", "gpio80",
0952 };
0953 static const char * const qdss_gpio13_groups[] = {
0954     "gpio46", "gpio78",
0955 };
0956 static const char * const qdss_gpio14_groups[] = {
0957     "gpio47", "gpio72",
0958 };
0959 static const char * const qdss_gpio15_groups[] = {
0960     "gpio48", "gpio73",
0961 };
0962 static const char * const qdss_gpio1_groups[] = {
0963     "gpio33", "gpio63",
0964 };
0965 static const char * const qdss_gpio2_groups[] = {
0966     "gpio34", "gpio64",
0967 };
0968 static const char * const qdss_gpio3_groups[] = {
0969     "gpio35", "gpio56",
0970 };
0971 static const char * const qdss_gpio4_groups[] = {
0972     "gpio0", "gpio36",
0973 };
0974 static const char * const qdss_gpio5_groups[] = {
0975     "gpio1", "gpio37",
0976 };
0977 static const char * const qdss_gpio6_groups[] = {
0978     "gpio38", "gpio70",
0979 };
0980 static const char * const qdss_gpio7_groups[] = {
0981     "gpio39", "gpio71",
0982 };
0983 static const char * const qdss_gpio8_groups[] = {
0984     "gpio51", "gpio75",
0985 };
0986 static const char * const qdss_gpio9_groups[] = {
0987     "gpio42", "gpio76",
0988 };
0989 static const char * const qdss_gpio_groups[] = {
0990     "gpio31", "gpio52", "gpio68", "gpio69",
0991 };
0992 static const char * const qlink_enable_groups[] = {
0993     "gpio100",
0994 };
0995 static const char * const qlink_request_groups[] = {
0996     "gpio99",
0997 };
0998 static const char * const qspi_clk_groups[] = {
0999     "gpio47",
1000 };
1001 static const char * const qspi_cs_groups[] = {
1002     "gpio43", "gpio50",
1003 };
1004 static const char * const qspi_data0_groups[] = {
1005     "gpio33",
1006 };
1007 static const char * const qspi_data1_groups[] = {
1008     "gpio34",
1009 };
1010 static const char * const qspi_data2_groups[] = {
1011     "gpio35",
1012 };
1013 static const char * const qspi_data3_groups[] = {
1014     "gpio51",
1015 };
1016 static const char * const qspi_resetn_groups[] = {
1017     "gpio48",
1018 };
1019 static const char * const sec_mi2s_groups[] = {
1020     "gpio24", "gpio25", "gpio26", "gpio27", "gpio62",
1021 };
1022 static const char * const sndwire_clk_groups[] = {
1023     "gpio24",
1024 };
1025 static const char * const sndwire_data_groups[] = {
1026     "gpio25",
1027 };
1028 static const char * const sp_cmu_groups[] = {
1029     "gpio64",
1030 };
1031 static const char * const ssc_irq_groups[] = {
1032     "gpio67", "gpio68", "gpio69", "gpio70", "gpio71", "gpio72", "gpio74",
1033     "gpio75", "gpio76",
1034 };
1035 static const char * const tgu_ch0_groups[] = {
1036     "gpio0",
1037 };
1038 static const char * const tgu_ch1_groups[] = {
1039     "gpio1",
1040 };
1041 static const char * const tsense_pwm1_groups[] = {
1042     "gpio71",
1043 };
1044 static const char * const tsense_pwm2_groups[] = {
1045     "gpio71",
1046 };
1047 static const char * const uim1_clk_groups[] = {
1048     "gpio88",
1049 };
1050 static const char * const uim1_data_groups[] = {
1051     "gpio87",
1052 };
1053 static const char * const uim1_present_groups[] = {
1054     "gpio90",
1055 };
1056 static const char * const uim1_reset_groups[] = {
1057     "gpio89",
1058 };
1059 static const char * const uim2_clk_groups[] = {
1060     "gpio84",
1061 };
1062 static const char * const uim2_data_groups[] = {
1063     "gpio83",
1064 };
1065 static const char * const uim2_present_groups[] = {
1066     "gpio86",
1067 };
1068 static const char * const uim2_reset_groups[] = {
1069     "gpio85",
1070 };
1071 static const char * const uim_batt_groups[] = {
1072     "gpio91",
1073 };
1074 static const char * const vfr_1_groups[] = {
1075     "gpio27",
1076 };
1077 static const char * const vsense_clkout_groups[] = {
1078     "gpio24",
1079 };
1080 static const char * const vsense_data0_groups[] = {
1081     "gpio21",
1082 };
1083 static const char * const vsense_data1_groups[] = {
1084     "gpio22",
1085 };
1086 static const char * const vsense_mode_groups[] = {
1087     "gpio23",
1088 };
1089 static const char * const wlan1_adc0_groups[] = {
1090     "gpio9",
1091 };
1092 static const char * const wlan1_adc1_groups[] = {
1093     "gpio8",
1094 };
1095 static const char * const wlan2_adc0_groups[] = {
1096     "gpio11",
1097 };
1098 static const char * const wlan2_adc1_groups[] = {
1099     "gpio10",
1100 };
1101 
1102 static const struct msm_function sdm660_functions[] = {
1103     FUNCTION(adsp_ext),
1104     FUNCTION(agera_pll),
1105     FUNCTION(atest_char),
1106     FUNCTION(atest_char0),
1107     FUNCTION(atest_char1),
1108     FUNCTION(atest_char2),
1109     FUNCTION(atest_char3),
1110     FUNCTION(atest_gpsadc0),
1111     FUNCTION(atest_gpsadc1),
1112     FUNCTION(atest_tsens),
1113     FUNCTION(atest_tsens2),
1114     FUNCTION(atest_usb1),
1115     FUNCTION(atest_usb10),
1116     FUNCTION(atest_usb11),
1117     FUNCTION(atest_usb12),
1118     FUNCTION(atest_usb13),
1119     FUNCTION(atest_usb2),
1120     FUNCTION(atest_usb20),
1121     FUNCTION(atest_usb21),
1122     FUNCTION(atest_usb22),
1123     FUNCTION(atest_usb23),
1124     FUNCTION(audio_ref),
1125     FUNCTION(bimc_dte0),
1126     FUNCTION(bimc_dte1),
1127     FUNCTION(blsp_i2c1),
1128     FUNCTION(blsp_i2c2),
1129     FUNCTION(blsp_i2c3),
1130     FUNCTION(blsp_i2c4),
1131     FUNCTION(blsp_i2c5),
1132     FUNCTION(blsp_i2c6),
1133     FUNCTION(blsp_i2c7),
1134     FUNCTION(blsp_i2c8_a),
1135     FUNCTION(blsp_i2c8_b),
1136     FUNCTION(blsp_spi1),
1137     FUNCTION(blsp_spi2),
1138     FUNCTION(blsp_spi3),
1139     FUNCTION(blsp_spi3_cs1),
1140     FUNCTION(blsp_spi3_cs2),
1141     FUNCTION(blsp_spi4),
1142     FUNCTION(blsp_spi5),
1143     FUNCTION(blsp_spi6),
1144     FUNCTION(blsp_spi7),
1145     FUNCTION(blsp_spi8_a),
1146     FUNCTION(blsp_spi8_b),
1147     FUNCTION(blsp_spi8_cs1),
1148     FUNCTION(blsp_spi8_cs2),
1149     FUNCTION(blsp_uart1),
1150     FUNCTION(blsp_uart2),
1151     FUNCTION(blsp_uart5),
1152     FUNCTION(blsp_uart6_a),
1153     FUNCTION(blsp_uart6_b),
1154     FUNCTION(blsp_uim1),
1155     FUNCTION(blsp_uim2),
1156     FUNCTION(blsp_uim5),
1157     FUNCTION(blsp_uim6),
1158     FUNCTION(cam_mclk),
1159     FUNCTION(cci_async),
1160     FUNCTION(cci_i2c),
1161     FUNCTION(cri_trng),
1162     FUNCTION(cri_trng0),
1163     FUNCTION(cri_trng1),
1164     FUNCTION(dbg_out),
1165     FUNCTION(ddr_bist),
1166     FUNCTION(gcc_gp1),
1167     FUNCTION(gcc_gp2),
1168     FUNCTION(gcc_gp3),
1169     FUNCTION(gpio),
1170     FUNCTION(gps_tx_a),
1171     FUNCTION(gps_tx_b),
1172     FUNCTION(gps_tx_c),
1173     FUNCTION(isense_dbg),
1174     FUNCTION(jitter_bist),
1175     FUNCTION(ldo_en),
1176     FUNCTION(ldo_update),
1177     FUNCTION(m_voc),
1178     FUNCTION(mdp_vsync),
1179     FUNCTION(mdss_vsync0),
1180     FUNCTION(mdss_vsync1),
1181     FUNCTION(mdss_vsync2),
1182     FUNCTION(mdss_vsync3),
1183     FUNCTION(mss_lte),
1184     FUNCTION(nav_pps_a),
1185     FUNCTION(nav_pps_b),
1186     FUNCTION(nav_pps_c),
1187     FUNCTION(pa_indicator),
1188     FUNCTION(phase_flag0),
1189     FUNCTION(phase_flag1),
1190     FUNCTION(phase_flag2),
1191     FUNCTION(phase_flag3),
1192     FUNCTION(phase_flag4),
1193     FUNCTION(phase_flag5),
1194     FUNCTION(phase_flag6),
1195     FUNCTION(phase_flag7),
1196     FUNCTION(phase_flag8),
1197     FUNCTION(phase_flag9),
1198     FUNCTION(phase_flag10),
1199     FUNCTION(phase_flag11),
1200     FUNCTION(phase_flag12),
1201     FUNCTION(phase_flag13),
1202     FUNCTION(phase_flag14),
1203     FUNCTION(phase_flag15),
1204     FUNCTION(phase_flag16),
1205     FUNCTION(phase_flag17),
1206     FUNCTION(phase_flag18),
1207     FUNCTION(phase_flag19),
1208     FUNCTION(phase_flag20),
1209     FUNCTION(phase_flag21),
1210     FUNCTION(phase_flag22),
1211     FUNCTION(phase_flag23),
1212     FUNCTION(phase_flag24),
1213     FUNCTION(phase_flag25),
1214     FUNCTION(phase_flag26),
1215     FUNCTION(phase_flag27),
1216     FUNCTION(phase_flag28),
1217     FUNCTION(phase_flag29),
1218     FUNCTION(phase_flag30),
1219     FUNCTION(phase_flag31),
1220     FUNCTION(pll_bypassnl),
1221     FUNCTION(pll_reset),
1222     FUNCTION(pri_mi2s),
1223     FUNCTION(pri_mi2s_ws),
1224     FUNCTION(prng_rosc),
1225     FUNCTION(pwr_crypto),
1226     FUNCTION(pwr_modem),
1227     FUNCTION(pwr_nav),
1228     FUNCTION(qdss_cti0_a),
1229     FUNCTION(qdss_cti0_b),
1230     FUNCTION(qdss_cti1_a),
1231     FUNCTION(qdss_cti1_b),
1232     FUNCTION(qdss_gpio),
1233     FUNCTION(qdss_gpio0),
1234     FUNCTION(qdss_gpio1),
1235     FUNCTION(qdss_gpio10),
1236     FUNCTION(qdss_gpio11),
1237     FUNCTION(qdss_gpio12),
1238     FUNCTION(qdss_gpio13),
1239     FUNCTION(qdss_gpio14),
1240     FUNCTION(qdss_gpio15),
1241     FUNCTION(qdss_gpio2),
1242     FUNCTION(qdss_gpio3),
1243     FUNCTION(qdss_gpio4),
1244     FUNCTION(qdss_gpio5),
1245     FUNCTION(qdss_gpio6),
1246     FUNCTION(qdss_gpio7),
1247     FUNCTION(qdss_gpio8),
1248     FUNCTION(qdss_gpio9),
1249     FUNCTION(qlink_enable),
1250     FUNCTION(qlink_request),
1251     FUNCTION(qspi_clk),
1252     FUNCTION(qspi_cs),
1253     FUNCTION(qspi_data0),
1254     FUNCTION(qspi_data1),
1255     FUNCTION(qspi_data2),
1256     FUNCTION(qspi_data3),
1257     FUNCTION(qspi_resetn),
1258     FUNCTION(sec_mi2s),
1259     FUNCTION(sndwire_clk),
1260     FUNCTION(sndwire_data),
1261     FUNCTION(sp_cmu),
1262     FUNCTION(ssc_irq),
1263     FUNCTION(tgu_ch0),
1264     FUNCTION(tgu_ch1),
1265     FUNCTION(tsense_pwm1),
1266     FUNCTION(tsense_pwm2),
1267     FUNCTION(uim1_clk),
1268     FUNCTION(uim1_data),
1269     FUNCTION(uim1_present),
1270     FUNCTION(uim1_reset),
1271     FUNCTION(uim2_clk),
1272     FUNCTION(uim2_data),
1273     FUNCTION(uim2_present),
1274     FUNCTION(uim2_reset),
1275     FUNCTION(uim_batt),
1276     FUNCTION(vfr_1),
1277     FUNCTION(vsense_clkout),
1278     FUNCTION(vsense_data0),
1279     FUNCTION(vsense_data1),
1280     FUNCTION(vsense_mode),
1281     FUNCTION(wlan1_adc0),
1282     FUNCTION(wlan1_adc1),
1283     FUNCTION(wlan2_adc0),
1284     FUNCTION(wlan2_adc1),
1285 };
1286 
1287 static const struct msm_pingroup sdm660_groups[] = {
1288     PINGROUP(0, SOUTH, blsp_spi1, blsp_uart1, blsp_uim1, tgu_ch0, _, _, qdss_gpio4, atest_gpsadc1, _),
1289     PINGROUP(1, SOUTH, blsp_spi1, blsp_uart1, blsp_uim1, tgu_ch1, _, _, qdss_gpio5, atest_gpsadc0, _),
1290     PINGROUP(2, SOUTH, blsp_spi1, blsp_uart1, blsp_i2c1, _, _, _, _, _, _),
1291     PINGROUP(3, SOUTH, blsp_spi1, blsp_uart1, blsp_i2c1, ddr_bist, _, _, atest_tsens2, atest_usb1, _),
1292     PINGROUP(4, NORTH, blsp_spi2, blsp_uim2, blsp_uart2, phase_flag3, _, _, _, _, _),
1293     PINGROUP(5, SOUTH, blsp_spi2, blsp_uim2, blsp_uart2, phase_flag14, _, _, _, _, _),
1294     PINGROUP(6, SOUTH, blsp_spi2, blsp_i2c2, blsp_uart2, phase_flag31, _, _, _, _, _),
1295     PINGROUP(7, SOUTH, blsp_spi2, blsp_i2c2, blsp_uart2, _, _, _, _, _, _),
1296     PINGROUP(8, NORTH, blsp_spi3, ddr_bist, _, _, _, wlan1_adc1, atest_usb13, bimc_dte1, _),
1297     PINGROUP(9, NORTH, blsp_spi3, ddr_bist, _, _, _, wlan1_adc0, atest_usb12, bimc_dte0, _),
1298     PINGROUP(10, NORTH, blsp_spi3, blsp_i2c3, ddr_bist, _, _, wlan2_adc1, atest_usb11, bimc_dte1, _),
1299     PINGROUP(11, NORTH, blsp_spi3, blsp_i2c3, _, dbg_out, wlan2_adc0, atest_usb10, bimc_dte0, _, _),
1300     PINGROUP(12, NORTH, blsp_spi4, pri_mi2s, _, phase_flag26, qdss_cti1_b, _, _, _, _),
1301     PINGROUP(13, NORTH, blsp_spi4, _, pri_mi2s_ws, _, _, phase_flag27, qdss_cti0_b, _, _),
1302     PINGROUP(14, NORTH, blsp_spi4, blsp_i2c4, pri_mi2s, _, phase_flag28, _, _, _, _),
1303     PINGROUP(15, NORTH, blsp_spi4, blsp_i2c4, pri_mi2s, _, _, _, _, _, _),
1304     PINGROUP(16, CENTER, blsp_uart5, blsp_spi5, blsp_uim5, _, _, _, _, _, _),
1305     PINGROUP(17, CENTER, blsp_uart5, blsp_spi5, blsp_uim5, _, phase_flag5, _, _, _, _),
1306     PINGROUP(18, CENTER, blsp_uart5, blsp_spi5, blsp_i2c5, _, _, _, _, _, _),
1307     PINGROUP(19, CENTER, blsp_uart5, blsp_spi5, blsp_i2c5, _, _, _, _, _, _),
1308     PINGROUP(20, SOUTH, _, _, blsp_uim6, _, _, _, _, _, _),
1309     PINGROUP(21, SOUTH, _, _, blsp_uim6, _, phase_flag11, qdss_cti0_b, vsense_data0, _, _),
1310     PINGROUP(22, CENTER, blsp_spi6, _, blsp_i2c6, _, phase_flag12, vsense_data1, _, _, _),
1311     PINGROUP(23, CENTER, blsp_spi6, _, blsp_i2c6, _, phase_flag13, vsense_mode, _, _, _),
1312     PINGROUP(24, NORTH, blsp_spi7, blsp_uart6_a, sec_mi2s, sndwire_clk, _, _, phase_flag17, vsense_clkout, _),
1313     PINGROUP(25, NORTH, blsp_spi7, blsp_uart6_a, sec_mi2s, sndwire_data, _, _, phase_flag18, _, _),
1314     PINGROUP(26, NORTH, blsp_spi7, blsp_uart6_a, blsp_i2c7, sec_mi2s, _, phase_flag19, _, _, _),
1315     PINGROUP(27, NORTH, blsp_spi7, blsp_uart6_a, blsp_i2c7, vfr_1, sec_mi2s, _, phase_flag20, _, _),
1316     PINGROUP(28, CENTER, blsp_spi8_a, blsp_uart6_b, m_voc, _, phase_flag21, _, _, _, _),
1317     PINGROUP(29, CENTER, blsp_spi8_a, blsp_uart6_b, _, _, phase_flag22, _, _, _, _),
1318     PINGROUP(30, CENTER, blsp_spi8_a, blsp_uart6_b, blsp_i2c8_a, blsp_spi3_cs1, _, phase_flag23, _, _, _),
1319     PINGROUP(31, CENTER, blsp_spi8_a, blsp_uart6_b, blsp_i2c8_a, pwr_modem, _, phase_flag24, qdss_gpio, _, _),
1320     PINGROUP(32, SOUTH, cam_mclk, pwr_nav, _, _, qdss_gpio0, _, _, _, _),
1321     PINGROUP(33, SOUTH, cam_mclk, qspi_data0, pwr_crypto, _, _, qdss_gpio1, _, _, _),
1322     PINGROUP(34, SOUTH, cam_mclk, qspi_data1, agera_pll, _, _, qdss_gpio2, _, _, _),
1323     PINGROUP(35, SOUTH, cam_mclk, qspi_data2, jitter_bist, _, _, qdss_gpio3, _, atest_usb2, _),
1324     PINGROUP(36, SOUTH, cci_i2c, pll_bypassnl, agera_pll, _, _, qdss_gpio4, atest_tsens, atest_usb21, _),
1325     PINGROUP(37, SOUTH, cci_i2c, pll_reset, _, _, qdss_gpio5, atest_usb23, _, _, _),
1326     PINGROUP(38, SOUTH, cci_i2c, _, _, qdss_gpio6, _, _, _, _, _),
1327     PINGROUP(39, SOUTH, cci_i2c, _, _, qdss_gpio7, _, _, _, _, _),
1328     PINGROUP(40, SOUTH, _, _, blsp_spi8_b, _, _, _, _, _, _),
1329     PINGROUP(41, SOUTH, _, _, blsp_spi8_b, _, _, _, _, _, _),
1330     PINGROUP(42, SOUTH, mdss_vsync0, mdss_vsync1, mdss_vsync2, mdss_vsync3, _, _, qdss_gpio9, _, _),
1331     PINGROUP(43, SOUTH, _, _, qspi_cs, _, _, qdss_gpio10, _, _, _),
1332     PINGROUP(44, SOUTH, _, _, blsp_spi8_b, blsp_i2c8_b, _, _, qdss_gpio11, _, _),
1333     PINGROUP(45, SOUTH, cci_async, _, _, qdss_gpio12, _, _, _, _, _),
1334     PINGROUP(46, SOUTH, blsp_spi1, _, _, qdss_gpio13, _, _, _, _, _),
1335     PINGROUP(47, SOUTH, qspi_clk, _, phase_flag30, qdss_gpio14, _, _, _, _, _),
1336     PINGROUP(48, SOUTH, _, phase_flag1, qdss_gpio15, _, _, _, _, _, _),
1337     PINGROUP(49, SOUTH, blsp_spi6, phase_flag2, qdss_cti0_a, _, _, _, _, _, _),
1338     PINGROUP(50, SOUTH, qspi_cs, _, phase_flag9, qdss_cti0_a, _, _, _, _, _),
1339     PINGROUP(51, SOUTH, qspi_data3, _, phase_flag15, qdss_gpio8, _, _, _, _, _),
1340     PINGROUP(52, SOUTH, _, blsp_spi8_b, blsp_i2c8_b, blsp_spi6, phase_flag16, qdss_gpio, _, _, _),
1341     PINGROUP(53, NORTH, _, phase_flag6, qdss_cti1_a, _, _, _, _, _, _),
1342     PINGROUP(54, NORTH, _, _, phase_flag29, _, _, _, _, _, _),
1343     PINGROUP(55, SOUTH, _, phase_flag25, qdss_cti1_a, _, _, _, _, _, _),
1344     PINGROUP(56, SOUTH, _, phase_flag10, qdss_gpio3, _, atest_usb20, _, _, _, _),
1345     PINGROUP(57, SOUTH, gcc_gp1, _, phase_flag4, atest_usb22, _, _, _, _, _),
1346     PINGROUP(58, SOUTH, _, gcc_gp2, _, _, atest_char, _, _, _, _),
1347     PINGROUP(59, NORTH, mdp_vsync, gcc_gp3, _, _, atest_char3, _, _, _, _),
1348     PINGROUP(60, NORTH, cri_trng0, _, _, atest_char2, _, _, _, _, _),
1349     PINGROUP(61, NORTH, pri_mi2s, cri_trng1, _, _, atest_char1, _, _, _, _),
1350     PINGROUP(62, NORTH, sec_mi2s, audio_ref, _, cri_trng, _, _, atest_char0, _, _),
1351     PINGROUP(63, NORTH, _, _, _, qdss_gpio1, _, _, _, _, _),
1352     PINGROUP(64, SOUTH, blsp_spi8_cs1, sp_cmu, _, _, qdss_gpio2, _, _, _, _),
1353     PINGROUP(65, SOUTH, _, nav_pps_a, nav_pps_a, gps_tx_a, blsp_spi3_cs2, adsp_ext, _, _, _),
1354     PINGROUP(66, NORTH, _, _, qdss_cti1_b, _, _, _, _, _, _),
1355     PINGROUP(67, NORTH, _, _, qdss_gpio0, _, _, _, _, _, _),
1356     PINGROUP(68, NORTH, isense_dbg, _, phase_flag0, qdss_gpio, _, _, _, _, _),
1357     PINGROUP(69, NORTH, _, phase_flag7, qdss_gpio, _, _, _, _, _, _),
1358     PINGROUP(70, NORTH, _, phase_flag8, qdss_gpio6, _, _, _, _, _, _),
1359     PINGROUP(71, NORTH, _, _, qdss_gpio7, tsense_pwm1, tsense_pwm2, _, _, _, _),
1360     PINGROUP(72, NORTH, _, qdss_gpio14, _, _, _, _, _, _, _),
1361     PINGROUP(73, NORTH, _, _, qdss_gpio15, _, _, _, _, _, _),
1362     PINGROUP(74, NORTH, mdp_vsync, _, _, _, _, _, _, _, _),
1363     PINGROUP(75, NORTH, _, _, qdss_gpio8, _, _, _, _, _, _),
1364     PINGROUP(76, NORTH, blsp_spi8_cs2, _, _, _, qdss_gpio9, _, _, _, _),
1365     PINGROUP(77, NORTH, _, _, qdss_gpio10, _, _, _, _, _, _),
1366     PINGROUP(78, NORTH, gcc_gp1, _, qdss_gpio13, _, _, _, _, _, _),
1367     PINGROUP(79, SOUTH, _, _, qdss_gpio11, _, _, _, _, _, _),
1368     PINGROUP(80, SOUTH, nav_pps_b, nav_pps_b, gps_tx_c, _, _, qdss_gpio12, _, _, _),
1369     PINGROUP(81, CENTER, mss_lte, gcc_gp2, _, _, _, _, _, _, _),
1370     PINGROUP(82, CENTER, mss_lte, gcc_gp3, _, _, _, _, _, _, _),
1371     PINGROUP(83, SOUTH, uim2_data, _, _, _, _, _, _, _, _),
1372     PINGROUP(84, SOUTH, uim2_clk, _, _, _, _, _, _, _, _),
1373     PINGROUP(85, SOUTH, uim2_reset, _, _, _, _, _, _, _, _),
1374     PINGROUP(86, SOUTH, uim2_present, _, _, _, _, _, _, _, _),
1375     PINGROUP(87, SOUTH, uim1_data, _, _, _, _, _, _, _, _),
1376     PINGROUP(88, SOUTH, uim1_clk, _, _, _, _, _, _, _, _),
1377     PINGROUP(89, SOUTH, uim1_reset, _, _, _, _, _, _, _, _),
1378     PINGROUP(90, SOUTH, uim1_present, _, _, _, _, _, _, _, _),
1379     PINGROUP(91, SOUTH, uim_batt, _, _, _, _, _, _, _, _),
1380     PINGROUP(92, SOUTH, _, _, pa_indicator, _, _, _, _, _, _),
1381     PINGROUP(93, SOUTH, _, _, _, _, _, _, _, _, _),
1382     PINGROUP(94, SOUTH, _, _, _, _, _, _, _, _, _),
1383     PINGROUP(95, SOUTH, _, _, _, _, _, _, _, _, _),
1384     PINGROUP(96, SOUTH, _, _, _, _, _, _, _, _, _),
1385     PINGROUP(97, SOUTH, _, ldo_en, _, _, _, _, _, _, _),
1386     PINGROUP(98, SOUTH, _, nav_pps_c, nav_pps_c, gps_tx_b, ldo_update, _, _, _, _),
1387     PINGROUP(99, SOUTH, qlink_request, _, _, _, _, _, _, _, _),
1388     PINGROUP(100, SOUTH, qlink_enable, _, _, _, _, _, _, _, _),
1389     PINGROUP(101, SOUTH, _, _, _, _, _, _, _, _, _),
1390     PINGROUP(102, SOUTH, _, prng_rosc, _, _, _, _, _, _, _),
1391     PINGROUP(103, SOUTH, _, _, _, _, _, _, _, _, _),
1392     PINGROUP(104, SOUTH, _, _, _, _, _, _, _, _, _),
1393     PINGROUP(105, SOUTH, _, _, _, _, _, _, _, _, _),
1394     PINGROUP(106, SOUTH, _, _, _, _, _, _, _, _, _),
1395     PINGROUP(107, SOUTH, _, _, _, _, _, _, _, _, _),
1396     PINGROUP(108, SOUTH, _, _, _, _, _, _, _, _, _),
1397     PINGROUP(109, SOUTH, _, _, _, _, _, _, _, _, _),
1398     PINGROUP(110, SOUTH, _, _, _, _, _, _, _, _, _),
1399     PINGROUP(111, SOUTH, _, _, _, _, _, _, _, _, _),
1400     PINGROUP(112, SOUTH, _, _, _, _, _, _, _, _, _),
1401     PINGROUP(113, SOUTH, _, _, _, _, _, _, _, _, _),
1402     SDC_QDSD_PINGROUP(sdc1_clk, 0x9a000, 13, 6),
1403     SDC_QDSD_PINGROUP(sdc1_cmd, 0x9a000, 11, 3),
1404     SDC_QDSD_PINGROUP(sdc1_data, 0x9a000, 9, 0),
1405     SDC_QDSD_PINGROUP(sdc2_clk, 0x9b000, 14, 6),
1406     SDC_QDSD_PINGROUP(sdc2_cmd, 0x9b000, 11, 3),
1407     SDC_QDSD_PINGROUP(sdc2_data, 0x9b000, 9, 0),
1408     SDC_QDSD_PINGROUP(sdc1_rclk, 0x9a000, 15, 0),
1409 };
1410 
1411 static const struct msm_pinctrl_soc_data sdm660_pinctrl = {
1412     .pins = sdm660_pins,
1413     .npins = ARRAY_SIZE(sdm660_pins),
1414     .functions = sdm660_functions,
1415     .nfunctions = ARRAY_SIZE(sdm660_functions),
1416     .groups = sdm660_groups,
1417     .ngroups = ARRAY_SIZE(sdm660_groups),
1418     .ngpios = 114,
1419     .tiles = sdm660_tiles,
1420     .ntiles = ARRAY_SIZE(sdm660_tiles),
1421 };
1422 
1423 static int sdm660_pinctrl_probe(struct platform_device *pdev)
1424 {
1425     return msm_pinctrl_probe(pdev, &sdm660_pinctrl);
1426 }
1427 
1428 static const struct of_device_id sdm660_pinctrl_of_match[] = {
1429     { .compatible = "qcom,sdm660-pinctrl", },
1430     { .compatible = "qcom,sdm630-pinctrl", },
1431     { },
1432 };
1433 
1434 static struct platform_driver sdm660_pinctrl_driver = {
1435     .driver = {
1436         .name = "sdm660-pinctrl",
1437         .of_match_table = sdm660_pinctrl_of_match,
1438     },
1439     .probe = sdm660_pinctrl_probe,
1440     .remove = msm_pinctrl_remove,
1441 };
1442 
1443 static int __init sdm660_pinctrl_init(void)
1444 {
1445     return platform_driver_register(&sdm660_pinctrl_driver);
1446 }
1447 arch_initcall(sdm660_pinctrl_init);
1448 
1449 static void __exit sdm660_pinctrl_exit(void)
1450 {
1451     platform_driver_unregister(&sdm660_pinctrl_driver);
1452 }
1453 module_exit(sdm660_pinctrl_exit);
1454 
1455 MODULE_DESCRIPTION("QTI sdm660 pinctrl driver");
1456 MODULE_LICENSE("GPL v2");
1457 MODULE_DEVICE_TABLE(of, sdm660_pinctrl_of_match);
[ Source navigation ] [ Diff markup ] [ Identifier search ] [ general search ]

This page was automatically generated by the 2.1.0 LXR engine.

The LXR team
Valid CSS 2.1! Valid HTML 4.01!