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OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
0004  * Copyright (c) 2020-2021, Linaro Ltd.
0005  */
0006 
0007 #include <linux/module.h>
0008 #include <linux/of.h>
0009 #include <linux/platform_device.h>
0010 #include <linux/pinctrl/pinctrl.h>
0011 
0012 #include "pinctrl-msm.h"
0013 
0014 static const char * const sc8180x_tiles[] = {
0015     "south",
0016     "east",
0017     "west"
0018 };
0019 
0020 enum {
0021     SOUTH,
0022     EAST,
0023     WEST
0024 };
0025 
0026 /*
0027  * ACPI DSDT has one single memory resource for TLMM.  The offsets below are
0028  * used to locate different tiles for ACPI probe.
0029  */
0030 struct tile_info {
0031     u32 offset;
0032     u32 size;
0033 };
0034 
0035 static const struct tile_info sc8180x_tile_info[] = {
0036     { 0x00d00000, 0x00300000, },
0037     { 0x00500000, 0x00700000, },
0038     { 0x00100000, 0x00300000, },
0039 };
0040 
0041 #define FUNCTION(fname)                 \
0042     [msm_mux_##fname] = {               \
0043         .name = #fname,             \
0044         .groups = fname##_groups,       \
0045         .ngroups = ARRAY_SIZE(fname##_groups),  \
0046     }
0047 
0048 #define REG_SIZE 0x1000
0049 #define PINGROUP_OFFSET(id, _tile, offset, f1, f2, f3, f4, f5, f6, f7, f8, f9)  \
0050     {                       \
0051         .name = "gpio" #id,         \
0052         .pins = gpio##id##_pins,        \
0053         .npins = (unsigned int)ARRAY_SIZE(gpio##id##_pins), \
0054         .funcs = (int[]){           \
0055             msm_mux_gpio, /* gpio mode */   \
0056             msm_mux_##f1,           \
0057             msm_mux_##f2,           \
0058             msm_mux_##f3,           \
0059             msm_mux_##f4,           \
0060             msm_mux_##f5,           \
0061             msm_mux_##f6,           \
0062             msm_mux_##f7,           \
0063             msm_mux_##f8,           \
0064             msm_mux_##f9            \
0065         },                  \
0066         .nfuncs = 10,               \
0067         .ctl_reg = REG_SIZE * id + offset,  \
0068         .io_reg = REG_SIZE * id + 0x4 + offset, \
0069         .intr_cfg_reg = REG_SIZE * id + 0x8 + offset,   \
0070         .intr_status_reg = REG_SIZE * id + 0xc + offset,\
0071         .intr_target_reg = REG_SIZE * id + 0x8 + offset,\
0072         .tile = _tile,              \
0073         .mux_bit = 2,               \
0074         .pull_bit = 0,              \
0075         .drv_bit = 6,               \
0076         .oe_bit = 9,                \
0077         .in_bit = 0,                \
0078         .out_bit = 1,               \
0079         .intr_enable_bit = 0,           \
0080         .intr_status_bit = 0,           \
0081         .intr_target_bit = 5,           \
0082         .intr_target_kpss_val = 3,      \
0083         .intr_raw_status_bit = 4,       \
0084         .intr_polarity_bit = 1,         \
0085         .intr_detection_bit = 2,        \
0086         .intr_detection_width = 2,      \
0087     }
0088 
0089 #define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
0090     PINGROUP_OFFSET(id, _tile, 0x0, f1, f2, f3, f4, f5, f6, f7, f8, f9)
0091 
0092 #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv)  \
0093     {                       \
0094         .name = #pg_name,           \
0095         .pins = pg_name##_pins,         \
0096         .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins),  \
0097         .ctl_reg = ctl,             \
0098         .io_reg = 0,                \
0099         .intr_cfg_reg = 0,          \
0100         .intr_status_reg = 0,           \
0101         .intr_target_reg = 0,           \
0102         .tile = EAST,               \
0103         .mux_bit = -1,              \
0104         .pull_bit = pull,           \
0105         .drv_bit = drv,             \
0106         .oe_bit = -1,               \
0107         .in_bit = -1,               \
0108         .out_bit = -1,              \
0109         .intr_enable_bit = -1,          \
0110         .intr_status_bit = -1,          \
0111         .intr_target_bit = -1,          \
0112         .intr_raw_status_bit = -1,      \
0113         .intr_polarity_bit = -1,        \
0114         .intr_detection_bit = -1,       \
0115         .intr_detection_width = -1,     \
0116     }
0117 
0118 #define UFS_RESET(pg_name)              \
0119     {                       \
0120         .name = #pg_name,           \
0121         .pins = pg_name##_pins,         \
0122         .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins),  \
0123         .ctl_reg = 0xb6000,         \
0124         .io_reg = 0xb6004,          \
0125         .intr_cfg_reg = 0,          \
0126         .intr_status_reg = 0,           \
0127         .intr_target_reg = 0,           \
0128         .tile = SOUTH,              \
0129         .mux_bit = -1,              \
0130         .pull_bit = 3,              \
0131         .drv_bit = 0,               \
0132         .oe_bit = -1,               \
0133         .in_bit = -1,               \
0134         .out_bit = 0,               \
0135         .intr_enable_bit = -1,          \
0136         .intr_status_bit = -1,          \
0137         .intr_target_bit = -1,          \
0138         .intr_raw_status_bit = -1,      \
0139         .intr_polarity_bit = -1,        \
0140         .intr_detection_bit = -1,       \
0141         .intr_detection_width = -1,     \
0142     }
0143 static const struct pinctrl_pin_desc sc8180x_pins[] = {
0144     PINCTRL_PIN(0, "GPIO_0"),
0145     PINCTRL_PIN(1, "GPIO_1"),
0146     PINCTRL_PIN(2, "GPIO_2"),
0147     PINCTRL_PIN(3, "GPIO_3"),
0148     PINCTRL_PIN(4, "GPIO_4"),
0149     PINCTRL_PIN(5, "GPIO_5"),
0150     PINCTRL_PIN(6, "GPIO_6"),
0151     PINCTRL_PIN(7, "GPIO_7"),
0152     PINCTRL_PIN(8, "GPIO_8"),
0153     PINCTRL_PIN(9, "GPIO_9"),
0154     PINCTRL_PIN(10, "GPIO_10"),
0155     PINCTRL_PIN(11, "GPIO_11"),
0156     PINCTRL_PIN(12, "GPIO_12"),
0157     PINCTRL_PIN(13, "GPIO_13"),
0158     PINCTRL_PIN(14, "GPIO_14"),
0159     PINCTRL_PIN(15, "GPIO_15"),
0160     PINCTRL_PIN(16, "GPIO_16"),
0161     PINCTRL_PIN(17, "GPIO_17"),
0162     PINCTRL_PIN(18, "GPIO_18"),
0163     PINCTRL_PIN(19, "GPIO_19"),
0164     PINCTRL_PIN(20, "GPIO_20"),
0165     PINCTRL_PIN(21, "GPIO_21"),
0166     PINCTRL_PIN(22, "GPIO_22"),
0167     PINCTRL_PIN(23, "GPIO_23"),
0168     PINCTRL_PIN(24, "GPIO_24"),
0169     PINCTRL_PIN(25, "GPIO_25"),
0170     PINCTRL_PIN(26, "GPIO_26"),
0171     PINCTRL_PIN(27, "GPIO_27"),
0172     PINCTRL_PIN(28, "GPIO_28"),
0173     PINCTRL_PIN(29, "GPIO_29"),
0174     PINCTRL_PIN(30, "GPIO_30"),
0175     PINCTRL_PIN(31, "GPIO_31"),
0176     PINCTRL_PIN(32, "GPIO_32"),
0177     PINCTRL_PIN(33, "GPIO_33"),
0178     PINCTRL_PIN(34, "GPIO_34"),
0179     PINCTRL_PIN(35, "GPIO_35"),
0180     PINCTRL_PIN(36, "GPIO_36"),
0181     PINCTRL_PIN(37, "GPIO_37"),
0182     PINCTRL_PIN(38, "GPIO_38"),
0183     PINCTRL_PIN(39, "GPIO_39"),
0184     PINCTRL_PIN(40, "GPIO_40"),
0185     PINCTRL_PIN(41, "GPIO_41"),
0186     PINCTRL_PIN(42, "GPIO_42"),
0187     PINCTRL_PIN(43, "GPIO_43"),
0188     PINCTRL_PIN(44, "GPIO_44"),
0189     PINCTRL_PIN(45, "GPIO_45"),
0190     PINCTRL_PIN(46, "GPIO_46"),
0191     PINCTRL_PIN(47, "GPIO_47"),
0192     PINCTRL_PIN(48, "GPIO_48"),
0193     PINCTRL_PIN(49, "GPIO_49"),
0194     PINCTRL_PIN(50, "GPIO_50"),
0195     PINCTRL_PIN(51, "GPIO_51"),
0196     PINCTRL_PIN(52, "GPIO_52"),
0197     PINCTRL_PIN(53, "GPIO_53"),
0198     PINCTRL_PIN(54, "GPIO_54"),
0199     PINCTRL_PIN(55, "GPIO_55"),
0200     PINCTRL_PIN(56, "GPIO_56"),
0201     PINCTRL_PIN(57, "GPIO_57"),
0202     PINCTRL_PIN(58, "GPIO_58"),
0203     PINCTRL_PIN(59, "GPIO_59"),
0204     PINCTRL_PIN(60, "GPIO_60"),
0205     PINCTRL_PIN(61, "GPIO_61"),
0206     PINCTRL_PIN(62, "GPIO_62"),
0207     PINCTRL_PIN(63, "GPIO_63"),
0208     PINCTRL_PIN(64, "GPIO_64"),
0209     PINCTRL_PIN(65, "GPIO_65"),
0210     PINCTRL_PIN(66, "GPIO_66"),
0211     PINCTRL_PIN(67, "GPIO_67"),
0212     PINCTRL_PIN(68, "GPIO_68"),
0213     PINCTRL_PIN(69, "GPIO_69"),
0214     PINCTRL_PIN(70, "GPIO_70"),
0215     PINCTRL_PIN(71, "GPIO_71"),
0216     PINCTRL_PIN(72, "GPIO_72"),
0217     PINCTRL_PIN(73, "GPIO_73"),
0218     PINCTRL_PIN(74, "GPIO_74"),
0219     PINCTRL_PIN(75, "GPIO_75"),
0220     PINCTRL_PIN(76, "GPIO_76"),
0221     PINCTRL_PIN(77, "GPIO_77"),
0222     PINCTRL_PIN(78, "GPIO_78"),
0223     PINCTRL_PIN(79, "GPIO_79"),
0224     PINCTRL_PIN(80, "GPIO_80"),
0225     PINCTRL_PIN(81, "GPIO_81"),
0226     PINCTRL_PIN(82, "GPIO_82"),
0227     PINCTRL_PIN(83, "GPIO_83"),
0228     PINCTRL_PIN(84, "GPIO_84"),
0229     PINCTRL_PIN(85, "GPIO_85"),
0230     PINCTRL_PIN(86, "GPIO_86"),
0231     PINCTRL_PIN(87, "GPIO_87"),
0232     PINCTRL_PIN(88, "GPIO_88"),
0233     PINCTRL_PIN(89, "GPIO_89"),
0234     PINCTRL_PIN(90, "GPIO_90"),
0235     PINCTRL_PIN(91, "GPIO_91"),
0236     PINCTRL_PIN(92, "GPIO_92"),
0237     PINCTRL_PIN(93, "GPIO_93"),
0238     PINCTRL_PIN(94, "GPIO_94"),
0239     PINCTRL_PIN(95, "GPIO_95"),
0240     PINCTRL_PIN(96, "GPIO_96"),
0241     PINCTRL_PIN(97, "GPIO_97"),
0242     PINCTRL_PIN(98, "GPIO_98"),
0243     PINCTRL_PIN(99, "GPIO_99"),
0244     PINCTRL_PIN(100, "GPIO_100"),
0245     PINCTRL_PIN(101, "GPIO_101"),
0246     PINCTRL_PIN(102, "GPIO_102"),
0247     PINCTRL_PIN(103, "GPIO_103"),
0248     PINCTRL_PIN(104, "GPIO_104"),
0249     PINCTRL_PIN(105, "GPIO_105"),
0250     PINCTRL_PIN(106, "GPIO_106"),
0251     PINCTRL_PIN(107, "GPIO_107"),
0252     PINCTRL_PIN(108, "GPIO_108"),
0253     PINCTRL_PIN(109, "GPIO_109"),
0254     PINCTRL_PIN(110, "GPIO_110"),
0255     PINCTRL_PIN(111, "GPIO_111"),
0256     PINCTRL_PIN(112, "GPIO_112"),
0257     PINCTRL_PIN(113, "GPIO_113"),
0258     PINCTRL_PIN(114, "GPIO_114"),
0259     PINCTRL_PIN(115, "GPIO_115"),
0260     PINCTRL_PIN(116, "GPIO_116"),
0261     PINCTRL_PIN(117, "GPIO_117"),
0262     PINCTRL_PIN(118, "GPIO_118"),
0263     PINCTRL_PIN(119, "GPIO_119"),
0264     PINCTRL_PIN(120, "GPIO_120"),
0265     PINCTRL_PIN(121, "GPIO_121"),
0266     PINCTRL_PIN(122, "GPIO_122"),
0267     PINCTRL_PIN(123, "GPIO_123"),
0268     PINCTRL_PIN(124, "GPIO_124"),
0269     PINCTRL_PIN(125, "GPIO_125"),
0270     PINCTRL_PIN(126, "GPIO_126"),
0271     PINCTRL_PIN(127, "GPIO_127"),
0272     PINCTRL_PIN(128, "GPIO_128"),
0273     PINCTRL_PIN(129, "GPIO_129"),
0274     PINCTRL_PIN(130, "GPIO_130"),
0275     PINCTRL_PIN(131, "GPIO_131"),
0276     PINCTRL_PIN(132, "GPIO_132"),
0277     PINCTRL_PIN(133, "GPIO_133"),
0278     PINCTRL_PIN(134, "GPIO_134"),
0279     PINCTRL_PIN(135, "GPIO_135"),
0280     PINCTRL_PIN(136, "GPIO_136"),
0281     PINCTRL_PIN(137, "GPIO_137"),
0282     PINCTRL_PIN(138, "GPIO_138"),
0283     PINCTRL_PIN(139, "GPIO_139"),
0284     PINCTRL_PIN(140, "GPIO_140"),
0285     PINCTRL_PIN(141, "GPIO_141"),
0286     PINCTRL_PIN(142, "GPIO_142"),
0287     PINCTRL_PIN(143, "GPIO_143"),
0288     PINCTRL_PIN(144, "GPIO_144"),
0289     PINCTRL_PIN(145, "GPIO_145"),
0290     PINCTRL_PIN(146, "GPIO_146"),
0291     PINCTRL_PIN(147, "GPIO_147"),
0292     PINCTRL_PIN(148, "GPIO_148"),
0293     PINCTRL_PIN(149, "GPIO_149"),
0294     PINCTRL_PIN(150, "GPIO_150"),
0295     PINCTRL_PIN(151, "GPIO_151"),
0296     PINCTRL_PIN(152, "GPIO_152"),
0297     PINCTRL_PIN(153, "GPIO_153"),
0298     PINCTRL_PIN(154, "GPIO_154"),
0299     PINCTRL_PIN(155, "GPIO_155"),
0300     PINCTRL_PIN(156, "GPIO_156"),
0301     PINCTRL_PIN(157, "GPIO_157"),
0302     PINCTRL_PIN(158, "GPIO_158"),
0303     PINCTRL_PIN(159, "GPIO_159"),
0304     PINCTRL_PIN(160, "GPIO_160"),
0305     PINCTRL_PIN(161, "GPIO_161"),
0306     PINCTRL_PIN(162, "GPIO_162"),
0307     PINCTRL_PIN(163, "GPIO_163"),
0308     PINCTRL_PIN(164, "GPIO_164"),
0309     PINCTRL_PIN(165, "GPIO_165"),
0310     PINCTRL_PIN(166, "GPIO_166"),
0311     PINCTRL_PIN(167, "GPIO_167"),
0312     PINCTRL_PIN(168, "GPIO_168"),
0313     PINCTRL_PIN(169, "GPIO_169"),
0314     PINCTRL_PIN(170, "GPIO_170"),
0315     PINCTRL_PIN(171, "GPIO_171"),
0316     PINCTRL_PIN(172, "GPIO_172"),
0317     PINCTRL_PIN(173, "GPIO_173"),
0318     PINCTRL_PIN(174, "GPIO_174"),
0319     PINCTRL_PIN(175, "GPIO_175"),
0320     PINCTRL_PIN(176, "GPIO_176"),
0321     PINCTRL_PIN(177, "GPIO_177"),
0322     PINCTRL_PIN(178, "GPIO_178"),
0323     PINCTRL_PIN(179, "GPIO_179"),
0324     PINCTRL_PIN(180, "GPIO_180"),
0325     PINCTRL_PIN(181, "GPIO_181"),
0326     PINCTRL_PIN(182, "GPIO_182"),
0327     PINCTRL_PIN(183, "GPIO_183"),
0328     PINCTRL_PIN(184, "GPIO_184"),
0329     PINCTRL_PIN(185, "GPIO_185"),
0330     PINCTRL_PIN(186, "GPIO_186"),
0331     PINCTRL_PIN(187, "GPIO_187"),
0332     PINCTRL_PIN(188, "GPIO_188"),
0333     PINCTRL_PIN(189, "GPIO_189"),
0334     PINCTRL_PIN(190, "UFS_RESET"),
0335     PINCTRL_PIN(191, "SDC2_CLK"),
0336     PINCTRL_PIN(192, "SDC2_CMD"),
0337     PINCTRL_PIN(193, "SDC2_DATA"),
0338 };
0339 
0340 #define DECLARE_MSM_GPIO_PINS(pin) \
0341     static const unsigned int gpio##pin##_pins[] = { pin }
0342 DECLARE_MSM_GPIO_PINS(0);
0343 DECLARE_MSM_GPIO_PINS(1);
0344 DECLARE_MSM_GPIO_PINS(2);
0345 DECLARE_MSM_GPIO_PINS(3);
0346 DECLARE_MSM_GPIO_PINS(4);
0347 DECLARE_MSM_GPIO_PINS(5);
0348 DECLARE_MSM_GPIO_PINS(6);
0349 DECLARE_MSM_GPIO_PINS(7);
0350 DECLARE_MSM_GPIO_PINS(8);
0351 DECLARE_MSM_GPIO_PINS(9);
0352 DECLARE_MSM_GPIO_PINS(10);
0353 DECLARE_MSM_GPIO_PINS(11);
0354 DECLARE_MSM_GPIO_PINS(12);
0355 DECLARE_MSM_GPIO_PINS(13);
0356 DECLARE_MSM_GPIO_PINS(14);
0357 DECLARE_MSM_GPIO_PINS(15);
0358 DECLARE_MSM_GPIO_PINS(16);
0359 DECLARE_MSM_GPIO_PINS(17);
0360 DECLARE_MSM_GPIO_PINS(18);
0361 DECLARE_MSM_GPIO_PINS(19);
0362 DECLARE_MSM_GPIO_PINS(20);
0363 DECLARE_MSM_GPIO_PINS(21);
0364 DECLARE_MSM_GPIO_PINS(22);
0365 DECLARE_MSM_GPIO_PINS(23);
0366 DECLARE_MSM_GPIO_PINS(24);
0367 DECLARE_MSM_GPIO_PINS(25);
0368 DECLARE_MSM_GPIO_PINS(26);
0369 DECLARE_MSM_GPIO_PINS(27);
0370 DECLARE_MSM_GPIO_PINS(28);
0371 DECLARE_MSM_GPIO_PINS(29);
0372 DECLARE_MSM_GPIO_PINS(30);
0373 DECLARE_MSM_GPIO_PINS(31);
0374 DECLARE_MSM_GPIO_PINS(32);
0375 DECLARE_MSM_GPIO_PINS(33);
0376 DECLARE_MSM_GPIO_PINS(34);
0377 DECLARE_MSM_GPIO_PINS(35);
0378 DECLARE_MSM_GPIO_PINS(36);
0379 DECLARE_MSM_GPIO_PINS(37);
0380 DECLARE_MSM_GPIO_PINS(38);
0381 DECLARE_MSM_GPIO_PINS(39);
0382 DECLARE_MSM_GPIO_PINS(40);
0383 DECLARE_MSM_GPIO_PINS(41);
0384 DECLARE_MSM_GPIO_PINS(42);
0385 DECLARE_MSM_GPIO_PINS(43);
0386 DECLARE_MSM_GPIO_PINS(44);
0387 DECLARE_MSM_GPIO_PINS(45);
0388 DECLARE_MSM_GPIO_PINS(46);
0389 DECLARE_MSM_GPIO_PINS(47);
0390 DECLARE_MSM_GPIO_PINS(48);
0391 DECLARE_MSM_GPIO_PINS(49);
0392 DECLARE_MSM_GPIO_PINS(50);
0393 DECLARE_MSM_GPIO_PINS(51);
0394 DECLARE_MSM_GPIO_PINS(52);
0395 DECLARE_MSM_GPIO_PINS(53);
0396 DECLARE_MSM_GPIO_PINS(54);
0397 DECLARE_MSM_GPIO_PINS(55);
0398 DECLARE_MSM_GPIO_PINS(56);
0399 DECLARE_MSM_GPIO_PINS(57);
0400 DECLARE_MSM_GPIO_PINS(58);
0401 DECLARE_MSM_GPIO_PINS(59);
0402 DECLARE_MSM_GPIO_PINS(60);
0403 DECLARE_MSM_GPIO_PINS(61);
0404 DECLARE_MSM_GPIO_PINS(62);
0405 DECLARE_MSM_GPIO_PINS(63);
0406 DECLARE_MSM_GPIO_PINS(64);
0407 DECLARE_MSM_GPIO_PINS(65);
0408 DECLARE_MSM_GPIO_PINS(66);
0409 DECLARE_MSM_GPIO_PINS(67);
0410 DECLARE_MSM_GPIO_PINS(68);
0411 DECLARE_MSM_GPIO_PINS(69);
0412 DECLARE_MSM_GPIO_PINS(70);
0413 DECLARE_MSM_GPIO_PINS(71);
0414 DECLARE_MSM_GPIO_PINS(72);
0415 DECLARE_MSM_GPIO_PINS(73);
0416 DECLARE_MSM_GPIO_PINS(74);
0417 DECLARE_MSM_GPIO_PINS(75);
0418 DECLARE_MSM_GPIO_PINS(76);
0419 DECLARE_MSM_GPIO_PINS(77);
0420 DECLARE_MSM_GPIO_PINS(78);
0421 DECLARE_MSM_GPIO_PINS(79);
0422 DECLARE_MSM_GPIO_PINS(80);
0423 DECLARE_MSM_GPIO_PINS(81);
0424 DECLARE_MSM_GPIO_PINS(82);
0425 DECLARE_MSM_GPIO_PINS(83);
0426 DECLARE_MSM_GPIO_PINS(84);
0427 DECLARE_MSM_GPIO_PINS(85);
0428 DECLARE_MSM_GPIO_PINS(86);
0429 DECLARE_MSM_GPIO_PINS(87);
0430 DECLARE_MSM_GPIO_PINS(88);
0431 DECLARE_MSM_GPIO_PINS(89);
0432 DECLARE_MSM_GPIO_PINS(90);
0433 DECLARE_MSM_GPIO_PINS(91);
0434 DECLARE_MSM_GPIO_PINS(92);
0435 DECLARE_MSM_GPIO_PINS(93);
0436 DECLARE_MSM_GPIO_PINS(94);
0437 DECLARE_MSM_GPIO_PINS(95);
0438 DECLARE_MSM_GPIO_PINS(96);
0439 DECLARE_MSM_GPIO_PINS(97);
0440 DECLARE_MSM_GPIO_PINS(98);
0441 DECLARE_MSM_GPIO_PINS(99);
0442 DECLARE_MSM_GPIO_PINS(100);
0443 DECLARE_MSM_GPIO_PINS(101);
0444 DECLARE_MSM_GPIO_PINS(102);
0445 DECLARE_MSM_GPIO_PINS(103);
0446 DECLARE_MSM_GPIO_PINS(104);
0447 DECLARE_MSM_GPIO_PINS(105);
0448 DECLARE_MSM_GPIO_PINS(106);
0449 DECLARE_MSM_GPIO_PINS(107);
0450 DECLARE_MSM_GPIO_PINS(108);
0451 DECLARE_MSM_GPIO_PINS(109);
0452 DECLARE_MSM_GPIO_PINS(110);
0453 DECLARE_MSM_GPIO_PINS(111);
0454 DECLARE_MSM_GPIO_PINS(112);
0455 DECLARE_MSM_GPIO_PINS(113);
0456 DECLARE_MSM_GPIO_PINS(114);
0457 DECLARE_MSM_GPIO_PINS(115);
0458 DECLARE_MSM_GPIO_PINS(116);
0459 DECLARE_MSM_GPIO_PINS(117);
0460 DECLARE_MSM_GPIO_PINS(118);
0461 DECLARE_MSM_GPIO_PINS(119);
0462 DECLARE_MSM_GPIO_PINS(120);
0463 DECLARE_MSM_GPIO_PINS(121);
0464 DECLARE_MSM_GPIO_PINS(122);
0465 DECLARE_MSM_GPIO_PINS(123);
0466 DECLARE_MSM_GPIO_PINS(124);
0467 DECLARE_MSM_GPIO_PINS(125);
0468 DECLARE_MSM_GPIO_PINS(126);
0469 DECLARE_MSM_GPIO_PINS(127);
0470 DECLARE_MSM_GPIO_PINS(128);
0471 DECLARE_MSM_GPIO_PINS(129);
0472 DECLARE_MSM_GPIO_PINS(130);
0473 DECLARE_MSM_GPIO_PINS(131);
0474 DECLARE_MSM_GPIO_PINS(132);
0475 DECLARE_MSM_GPIO_PINS(133);
0476 DECLARE_MSM_GPIO_PINS(134);
0477 DECLARE_MSM_GPIO_PINS(135);
0478 DECLARE_MSM_GPIO_PINS(136);
0479 DECLARE_MSM_GPIO_PINS(137);
0480 DECLARE_MSM_GPIO_PINS(138);
0481 DECLARE_MSM_GPIO_PINS(139);
0482 DECLARE_MSM_GPIO_PINS(140);
0483 DECLARE_MSM_GPIO_PINS(141);
0484 DECLARE_MSM_GPIO_PINS(142);
0485 DECLARE_MSM_GPIO_PINS(143);
0486 DECLARE_MSM_GPIO_PINS(144);
0487 DECLARE_MSM_GPIO_PINS(145);
0488 DECLARE_MSM_GPIO_PINS(146);
0489 DECLARE_MSM_GPIO_PINS(147);
0490 DECLARE_MSM_GPIO_PINS(148);
0491 DECLARE_MSM_GPIO_PINS(149);
0492 DECLARE_MSM_GPIO_PINS(150);
0493 DECLARE_MSM_GPIO_PINS(151);
0494 DECLARE_MSM_GPIO_PINS(152);
0495 DECLARE_MSM_GPIO_PINS(153);
0496 DECLARE_MSM_GPIO_PINS(154);
0497 DECLARE_MSM_GPIO_PINS(155);
0498 DECLARE_MSM_GPIO_PINS(156);
0499 DECLARE_MSM_GPIO_PINS(157);
0500 DECLARE_MSM_GPIO_PINS(158);
0501 DECLARE_MSM_GPIO_PINS(159);
0502 DECLARE_MSM_GPIO_PINS(160);
0503 DECLARE_MSM_GPIO_PINS(161);
0504 DECLARE_MSM_GPIO_PINS(162);
0505 DECLARE_MSM_GPIO_PINS(163);
0506 DECLARE_MSM_GPIO_PINS(164);
0507 DECLARE_MSM_GPIO_PINS(165);
0508 DECLARE_MSM_GPIO_PINS(166);
0509 DECLARE_MSM_GPIO_PINS(167);
0510 DECLARE_MSM_GPIO_PINS(168);
0511 DECLARE_MSM_GPIO_PINS(169);
0512 DECLARE_MSM_GPIO_PINS(170);
0513 DECLARE_MSM_GPIO_PINS(171);
0514 DECLARE_MSM_GPIO_PINS(172);
0515 DECLARE_MSM_GPIO_PINS(173);
0516 DECLARE_MSM_GPIO_PINS(174);
0517 DECLARE_MSM_GPIO_PINS(175);
0518 DECLARE_MSM_GPIO_PINS(176);
0519 DECLARE_MSM_GPIO_PINS(177);
0520 DECLARE_MSM_GPIO_PINS(178);
0521 DECLARE_MSM_GPIO_PINS(179);
0522 DECLARE_MSM_GPIO_PINS(180);
0523 DECLARE_MSM_GPIO_PINS(181);
0524 DECLARE_MSM_GPIO_PINS(182);
0525 DECLARE_MSM_GPIO_PINS(183);
0526 DECLARE_MSM_GPIO_PINS(184);
0527 DECLARE_MSM_GPIO_PINS(185);
0528 DECLARE_MSM_GPIO_PINS(186);
0529 DECLARE_MSM_GPIO_PINS(187);
0530 DECLARE_MSM_GPIO_PINS(188);
0531 DECLARE_MSM_GPIO_PINS(189);
0532 
0533 static const unsigned int ufs_reset_pins[] = { 190 };
0534 static const unsigned int sdc2_clk_pins[] = { 191 };
0535 static const unsigned int sdc2_cmd_pins[] = { 192 };
0536 static const unsigned int sdc2_data_pins[] = { 193 };
0537 
0538 enum sc8180x_functions {
0539     msm_mux_adsp_ext,
0540     msm_mux_agera_pll,
0541     msm_mux_aoss_cti,
0542     msm_mux_atest_char,
0543     msm_mux_atest_tsens,
0544     msm_mux_atest_tsens2,
0545     msm_mux_atest_usb0,
0546     msm_mux_atest_usb1,
0547     msm_mux_atest_usb2,
0548     msm_mux_atest_usb3,
0549     msm_mux_atest_usb4,
0550     msm_mux_audio_ref,
0551     msm_mux_btfm_slimbus,
0552     msm_mux_cam_mclk,
0553     msm_mux_cci_async,
0554     msm_mux_cci_i2c,
0555     msm_mux_cci_timer0,
0556     msm_mux_cci_timer1,
0557     msm_mux_cci_timer2,
0558     msm_mux_cci_timer3,
0559     msm_mux_cci_timer4,
0560     msm_mux_cci_timer5,
0561     msm_mux_cci_timer6,
0562     msm_mux_cci_timer7,
0563     msm_mux_cci_timer8,
0564     msm_mux_cci_timer9,
0565     msm_mux_cri_trng,
0566     msm_mux_dbg_out,
0567     msm_mux_ddr_bist,
0568     msm_mux_ddr_pxi,
0569     msm_mux_debug_hot,
0570     msm_mux_dp_hot,
0571     msm_mux_edp_hot,
0572     msm_mux_edp_lcd,
0573     msm_mux_emac_phy,
0574     msm_mux_emac_pps,
0575     msm_mux_gcc_gp1,
0576     msm_mux_gcc_gp2,
0577     msm_mux_gcc_gp3,
0578     msm_mux_gcc_gp4,
0579     msm_mux_gcc_gp5,
0580     msm_mux_gpio,
0581     msm_mux_gps,
0582     msm_mux_grfc,
0583     msm_mux_hs1_mi2s,
0584     msm_mux_hs2_mi2s,
0585     msm_mux_hs3_mi2s,
0586     msm_mux_jitter_bist,
0587     msm_mux_lpass_slimbus,
0588     msm_mux_m_voc,
0589     msm_mux_mdp_vsync,
0590     msm_mux_mdp_vsync0,
0591     msm_mux_mdp_vsync1,
0592     msm_mux_mdp_vsync2,
0593     msm_mux_mdp_vsync3,
0594     msm_mux_mdp_vsync4,
0595     msm_mux_mdp_vsync5,
0596     msm_mux_mss_lte,
0597     msm_mux_nav_pps,
0598     msm_mux_pa_indicator,
0599     msm_mux_pci_e0,
0600     msm_mux_pci_e1,
0601     msm_mux_pci_e2,
0602     msm_mux_pci_e3,
0603     msm_mux_phase_flag,
0604     msm_mux_pll_bist,
0605     msm_mux_pll_bypassnl,
0606     msm_mux_pll_reset,
0607     msm_mux_pri_mi2s,
0608     msm_mux_pri_mi2s_ws,
0609     msm_mux_prng_rosc,
0610     msm_mux_qdss_cti,
0611     msm_mux_qdss_gpio,
0612     msm_mux_qlink,
0613     msm_mux_qspi0,
0614     msm_mux_qspi0_clk,
0615     msm_mux_qspi0_cs,
0616     msm_mux_qspi1,
0617     msm_mux_qspi1_clk,
0618     msm_mux_qspi1_cs,
0619     msm_mux_qua_mi2s,
0620     msm_mux_qup0,
0621     msm_mux_qup1,
0622     msm_mux_qup2,
0623     msm_mux_qup3,
0624     msm_mux_qup4,
0625     msm_mux_qup5,
0626     msm_mux_qup6,
0627     msm_mux_qup7,
0628     msm_mux_qup8,
0629     msm_mux_qup9,
0630     msm_mux_qup10,
0631     msm_mux_qup11,
0632     msm_mux_qup12,
0633     msm_mux_qup13,
0634     msm_mux_qup14,
0635     msm_mux_qup15,
0636     msm_mux_qup16,
0637     msm_mux_qup17,
0638     msm_mux_qup18,
0639     msm_mux_qup19,
0640     msm_mux_qup_l4,
0641     msm_mux_qup_l5,
0642     msm_mux_qup_l6,
0643     msm_mux_rgmii,
0644     msm_mux_sd_write,
0645     msm_mux_sdc4,
0646     msm_mux_sdc4_clk,
0647     msm_mux_sdc4_cmd,
0648     msm_mux_sec_mi2s,
0649     msm_mux_sp_cmu,
0650     msm_mux_spkr_i2s,
0651     msm_mux_ter_mi2s,
0652     msm_mux_tgu,
0653     msm_mux_tsense_pwm1,
0654     msm_mux_tsense_pwm2,
0655     msm_mux_tsif1,
0656     msm_mux_tsif2,
0657     msm_mux_uim1,
0658     msm_mux_uim2,
0659     msm_mux_uim_batt,
0660     msm_mux_usb0_phy,
0661     msm_mux_usb1_phy,
0662     msm_mux_usb2phy_ac,
0663     msm_mux_vfr_1,
0664     msm_mux_vsense_trigger,
0665     msm_mux_wlan1_adc,
0666     msm_mux_wlan2_adc,
0667     msm_mux_wmss_reset,
0668     msm_mux__,
0669 };
0670 
0671 static const char * const adsp_ext_groups[] = {
0672     "gpio115",
0673 };
0674 
0675 static const char * const agera_pll_groups[] = {
0676     "gpio37",
0677 };
0678 
0679 static const char * const aoss_cti_groups[] = {
0680     "gpio113",
0681 };
0682 
0683 static const char * const atest_char_groups[] = {
0684     "gpio133", "gpio134", "gpio135", "gpio140", "gpio142",
0685 };
0686 
0687 static const char * const atest_tsens2_groups[] = {
0688     "gpio62",
0689 };
0690 
0691 static const char * const atest_tsens_groups[] = {
0692     "gpio93",
0693 };
0694 
0695 static const char * const atest_usb0_groups[] = {
0696     "gpio90", "gpio91", "gpio92", "gpio93", "gpio94",
0697 };
0698 
0699 static const char * const atest_usb1_groups[] = {
0700     "gpio60", "gpio62", "gpio63", "gpio64", "gpio65",
0701 };
0702 
0703 static const char * const atest_usb2_groups[] = {
0704     "gpio34", "gpio95", "gpio102", "gpio121", "gpio122",
0705 };
0706 
0707 static const char * const atest_usb3_groups[] = {
0708     "gpio68", "gpio71", "gpio72", "gpio73", "gpio74",
0709 };
0710 
0711 static const char * const atest_usb4_groups[] = {
0712     "gpio75", "gpio76", "gpio77", "gpio78", "gpio88",
0713 };
0714 
0715 static const char * const audio_ref_groups[] = {
0716     "gpio148",
0717 };
0718 
0719 static const char * const btfm_slimbus_groups[] = {
0720     "gpio153", "gpio154",
0721 };
0722 
0723 static const char * const cam_mclk_groups[] = {
0724     "gpio13", "gpio14", "gpio15", "gpio16", "gpio25", "gpio179", "gpio180",
0725     "gpio181",
0726 };
0727 
0728 static const char * const cci_async_groups[] = {
0729     "gpio24", "gpio25", "gpio26", "gpio176", "gpio185", "gpio186",
0730 };
0731 
0732 static const char * const cci_i2c_groups[] = {
0733     "gpio0", "gpio1", "gpio2", "gpio3", "gpio17", "gpio18", "gpio19",
0734     "gpio20", "gpio31", "gpio32", "gpio33", "gpio34", "gpio39", "gpio40",
0735     "gpio41", "gpio42",
0736 };
0737 
0738 static const char * const cci_timer0_groups[] = {
0739     "gpio21",
0740 };
0741 
0742 static const char * const cci_timer1_groups[] = {
0743     "gpio22",
0744 };
0745 
0746 static const char * const cci_timer2_groups[] = {
0747     "gpio23",
0748 };
0749 
0750 static const char * const cci_timer3_groups[] = {
0751     "gpio24",
0752 };
0753 
0754 static const char * const cci_timer4_groups[] = {
0755     "gpio178",
0756 };
0757 
0758 static const char * const cci_timer5_groups[] = {
0759     "gpio182",
0760 };
0761 
0762 static const char * const cci_timer6_groups[] = {
0763     "gpio183",
0764 };
0765 
0766 static const char * const cci_timer7_groups[] = {
0767     "gpio184",
0768 };
0769 
0770 static const char * const cci_timer8_groups[] = {
0771     "gpio185",
0772 };
0773 
0774 static const char * const cci_timer9_groups[] = {
0775     "gpio186",
0776 };
0777 
0778 static const char * const cri_trng_groups[] = {
0779     "gpio159",
0780     "gpio160",
0781     "gpio161",
0782 };
0783 
0784 static const char * const dbg_out_groups[] = {
0785     "gpio34",
0786 };
0787 
0788 static const char * const ddr_bist_groups[] = {
0789     "gpio98", "gpio99", "gpio145", "gpio146",
0790 };
0791 
0792 static const char * const ddr_pxi_groups[] = {
0793     "gpio60", "gpio62", "gpio63", "gpio64", "gpio65", "gpio68", "gpio71",
0794     "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", "gpio78",
0795     "gpio88", "gpio90",
0796 };
0797 
0798 static const char * const debug_hot_groups[] = {
0799     "gpio7",
0800 };
0801 
0802 static const char * const dp_hot_groups[] = {
0803     "gpio189",
0804 };
0805 
0806 static const char * const edp_hot_groups[] = {
0807     "gpio10",
0808 };
0809 
0810 static const char * const edp_lcd_groups[] = {
0811     "gpio11",
0812 };
0813 
0814 static const char * const emac_phy_groups[] = {
0815     "gpio124",
0816 };
0817 
0818 static const char * const emac_pps_groups[] = {
0819     "gpio81",
0820 };
0821 
0822 static const char * const gcc_gp1_groups[] = {
0823     "gpio131", "gpio136",
0824 };
0825 
0826 static const char * const gcc_gp2_groups[] = {
0827     "gpio21", "gpio137",
0828 };
0829 
0830 static const char * const gcc_gp3_groups[] = {
0831     "gpio22", "gpio138",
0832 };
0833 
0834 static const char * const gcc_gp4_groups[] = {
0835     "gpio139", "gpio182",
0836 };
0837 
0838 static const char * const gcc_gp5_groups[] = {
0839     "gpio140", "gpio183",
0840 };
0841 
0842 static const char * const gpio_groups[] = {
0843     "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
0844     "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio12", "gpio13",
0845     "gpio14", "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20",
0846     "gpio21", "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27",
0847     "gpio28", "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34",
0848     "gpio35", "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41",
0849     "gpio42", "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48",
0850     "gpio49", "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55",
0851     "gpio56", "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62",
0852     "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69",
0853     "gpio70", "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76",
0854     "gpio77", "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83",
0855     "gpio84", "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90",
0856     "gpio91", "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97",
0857     "gpio98", "gpio99", "gpio100", "gpio101", "gpio102", "gpio103",
0858     "gpio104", "gpio105", "gpio106", "gpio107", "gpio108", "gpio109",
0859     "gpio110", "gpio111", "gpio112", "gpio113", "gpio114", "gpio115",
0860     "gpio116", "gpio117", "gpio118", "gpio119", "gpio120", "gpio121",
0861     "gpio122", "gpio123", "gpio124", "gpio125", "gpio126", "gpio127",
0862     "gpio128", "gpio129", "gpio130", "gpio131", "gpio132", "gpio133",
0863     "gpio134", "gpio135", "gpio136", "gpio137", "gpio138", "gpio139",
0864     "gpio140", "gpio141", "gpio142", "gpio143", "gpio144", "gpio145",
0865     "gpio146", "gpio147", "gpio148", "gpio149", "gpio150", "gpio151",
0866     "gpio152", "gpio153", "gpio154", "gpio155", "gpio156", "gpio157",
0867     "gpio158", "gpio159", "gpio160", "gpio161", "gpio162", "gpio163",
0868     "gpio164", "gpio165", "gpio166", "gpio167", "gpio168", "gpio169",
0869     "gpio170", "gpio171", "gpio172", "gpio173", "gpio174", "gpio175",
0870     "gpio176", "gpio177", "gpio177", "gpio178", "gpio179", "gpio180",
0871     "gpio181", "gpio182", "gpio183", "gpio184", "gpio185", "gpio186",
0872     "gpio186", "gpio187", "gpio187", "gpio188", "gpio188", "gpio189",
0873 };
0874 
0875 static const char * const gps_groups[] = {
0876     "gpio60", "gpio76", "gpio77", "gpio81", "gpio82",
0877 };
0878 
0879 static const char * const grfc_groups[] = {
0880     "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio71", "gpio72",
0881     "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", "gpio78", "gpio79",
0882     "gpio80", "gpio81", "gpio82",
0883 };
0884 
0885 static const char * const hs1_mi2s_groups[] = {
0886     "gpio155", "gpio156", "gpio157", "gpio158", "gpio159",
0887 };
0888 
0889 static const char * const hs2_mi2s_groups[] = {
0890     "gpio160", "gpio161", "gpio162", "gpio163", "gpio164",
0891 };
0892 
0893 static const char * const hs3_mi2s_groups[] = {
0894     "gpio125", "gpio165", "gpio166", "gpio167", "gpio168",
0895 };
0896 
0897 static const char * const jitter_bist_groups[] = {
0898     "gpio129",
0899 };
0900 
0901 static const char * const lpass_slimbus_groups[] = {
0902     "gpio149", "gpio150", "gpio151", "gpio152",
0903 };
0904 
0905 static const char * const m_voc_groups[] = {
0906     "gpio10",
0907 };
0908 
0909 static const char * const mdp_vsync0_groups[] = {
0910     "gpio89",
0911 };
0912 
0913 static const char * const mdp_vsync1_groups[] = {
0914     "gpio89",
0915 };
0916 
0917 static const char * const mdp_vsync2_groups[] = {
0918     "gpio89",
0919 };
0920 
0921 static const char * const mdp_vsync3_groups[] = {
0922     "gpio89",
0923 };
0924 
0925 static const char * const mdp_vsync4_groups[] = {
0926     "gpio89",
0927 };
0928 
0929 static const char * const mdp_vsync5_groups[] = {
0930     "gpio89",
0931 };
0932 
0933 static const char * const mdp_vsync_groups[] = {
0934     "gpio8", "gpio9", "gpio10", "gpio60", "gpio82",
0935 };
0936 
0937 static const char * const mss_lte_groups[] = {
0938     "gpio69", "gpio70",
0939 };
0940 
0941 static const char * const nav_pps_groups[] = {
0942     "gpio60", "gpio60", "gpio76", "gpio76", "gpio77", "gpio77", "gpio81",
0943     "gpio81", "gpio82", "gpio82",
0944 };
0945 
0946 static const char * const pa_indicator_groups[] = {
0947     "gpio68",
0948 };
0949 
0950 static const char * const pci_e0_groups[] = {
0951     "gpio35", "gpio36",
0952 };
0953 
0954 static const char * const pci_e1_groups[] = {
0955     "gpio102", "gpio103",
0956 };
0957 
0958 static const char * const pci_e2_groups[] = {
0959     "gpio175", "gpio176",
0960 };
0961 
0962 static const char * const pci_e3_groups[] = {
0963     "gpio178", "gpio179",
0964 };
0965 
0966 static const char * const phase_flag_groups[] = {
0967     "gpio4", "gpio5", "gpio6", "gpio7", "gpio33", "gpio53", "gpio54",
0968     "gpio102", "gpio120", "gpio121", "gpio122", "gpio123", "gpio125",
0969     "gpio148", "gpio149", "gpio150", "gpio151", "gpio152", "gpio155",
0970     "gpio156", "gpio157", "gpio158", "gpio159", "gpio160", "gpio161",
0971     "gpio162", "gpio163", "gpio164", "gpio165", "gpio166", "gpio167",
0972     "gpio168",
0973 };
0974 
0975 static const char * const pll_bist_groups[] = {
0976     "gpio130",
0977 };
0978 
0979 static const char * const pll_bypassnl_groups[] = {
0980     "gpio100",
0981 };
0982 
0983 static const char * const pll_reset_groups[] = {
0984     "gpio101",
0985 };
0986 
0987 static const char * const pri_mi2s_groups[] = {
0988     "gpio143", "gpio144", "gpio146", "gpio147",
0989 };
0990 
0991 static const char * const pri_mi2s_ws_groups[] = {
0992     "gpio145",
0993 };
0994 
0995 static const char * const prng_rosc_groups[] = {
0996     "gpio163",
0997 };
0998 
0999 static const char * const qdss_cti_groups[] = {
1000     "gpio49", "gpio50", "gpio81", "gpio82", "gpio89", "gpio90", "gpio141",
1001     "gpio142",
1002 };
1003 
1004 static const char * const qdss_gpio_groups[] = {
1005     "gpio13", "gpio14", "gpio15", "gpio16", "gpio17", "gpio18", "gpio19",
1006     "gpio20", "gpio21", "gpio22", "gpio23", "gpio24", "gpio25", "gpio26",
1007     "gpio27", "gpio28", "gpio29", "gpio30", "gpio39", "gpio40", "gpio41",
1008     "gpio42", "gpio92", "gpio114", "gpio115", "gpio116", "gpio117",
1009     "gpio118", "gpio119", "gpio120", "gpio121", "gpio130", "gpio132",
1010     "gpio133", "gpio134", "gpio135",
1011 };
1012 
1013 static const char * const qlink_groups[] = {
1014     "gpio61", "gpio62",
1015 };
1016 
1017 static const char * const qspi0_groups[] = {
1018     "gpio89", "gpio90", "gpio91", "gpio93",
1019 };
1020 
1021 static const char * const qspi0_clk_groups[] = {
1022     "gpio92",
1023 };
1024 
1025 static const char * const qspi0_cs_groups[] = {
1026     "gpio88", "gpio94",
1027 };
1028 
1029 static const char * const qspi1_groups[] = {
1030     "gpio56", "gpio57", "gpio161", "gpio162",
1031 };
1032 
1033 static const char * const qspi1_clk_groups[] = {
1034     "gpio163",
1035 };
1036 
1037 static const char * const qspi1_cs_groups[] = {
1038     "gpio55", "gpio164",
1039 };
1040 
1041 static const char * const qua_mi2s_groups[] = {
1042     "gpio136", "gpio137", "gpio138", "gpio139", "gpio140", "gpio141",
1043     "gpio142",
1044 };
1045 
1046 static const char * const qup0_groups[] = {
1047     "gpio0", "gpio1", "gpio2", "gpio3",
1048 };
1049 
1050 static const char * const qup10_groups[] = {
1051     "gpio9", "gpio10", "gpio11", "gpio12",
1052 };
1053 
1054 static const char * const qup11_groups[] = {
1055     "gpio92", "gpio93", "gpio94", "gpio95",
1056 };
1057 
1058 static const char * const qup12_groups[] = {
1059     "gpio83", "gpio84", "gpio85", "gpio86",
1060 };
1061 
1062 static const char * const qup13_groups[] = {
1063     "gpio43", "gpio44", "gpio45", "gpio46",
1064 };
1065 
1066 static const char * const qup14_groups[] = {
1067     "gpio47", "gpio48", "gpio49", "gpio50",
1068 };
1069 
1070 static const char * const qup15_groups[] = {
1071     "gpio27", "gpio28", "gpio29", "gpio30",
1072 };
1073 
1074 static const char * const qup16_groups[] = {
1075     "gpio83", "gpio84", "gpio85", "gpio86",
1076 };
1077 
1078 static const char * const qup17_groups[] = {
1079     "gpio55", "gpio56", "gpio57", "gpio58",
1080 };
1081 
1082 static const char * const qup18_groups[] = {
1083     "gpio23", "gpio24", "gpio25", "gpio26",
1084 };
1085 
1086 static const char * const qup19_groups[] = {
1087     "gpio181", "gpio182", "gpio183", "gpio184",
1088 };
1089 
1090 static const char * const qup1_groups[] = {
1091     "gpio114", "gpio115", "gpio116", "gpio117",
1092 };
1093 
1094 static const char * const qup2_groups[] = {
1095     "gpio126", "gpio127", "gpio128", "gpio129",
1096 };
1097 
1098 static const char * const qup3_groups[] = {
1099     "gpio144", "gpio145", "gpio146", "gpio147",
1100 };
1101 
1102 static const char * const qup4_groups[] = {
1103     "gpio51", "gpio52", "gpio53", "gpio54",
1104 };
1105 
1106 static const char * const qup5_groups[] = {
1107     "gpio119", "gpio120", "gpio121", "gpio122",
1108 };
1109 
1110 static const char * const qup6_groups[] = {
1111     "gpio4", "gpio5", "gpio6", "gpio7",
1112 };
1113 
1114 static const char * const qup7_groups[] = {
1115     "gpio98", "gpio99", "gpio100", "gpio101",
1116 };
1117 
1118 static const char * const qup8_groups[] = {
1119     "gpio88", "gpio89", "gpio90", "gpio91",
1120 };
1121 
1122 static const char * const qup9_groups[] = {
1123     "gpio39", "gpio40", "gpio41", "gpio42",
1124 };
1125 
1126 static const char * const qup_l4_groups[] = {
1127     "gpio35", "gpio59", "gpio60", "gpio95",
1128 };
1129 
1130 static const char * const qup_l5_groups[] = {
1131     "gpio7", "gpio33", "gpio36", "gpio96",
1132 };
1133 
1134 static const char * const qup_l6_groups[] = {
1135     "gpio6", "gpio34", "gpio37", "gpio97",
1136 };
1137 
1138 static const char * const rgmii_groups[] = {
1139     "gpio4", "gpio5", "gpio6", "gpio7", "gpio59", "gpio114", "gpio115",
1140     "gpio116", "gpio117", "gpio118", "gpio119", "gpio120", "gpio121",
1141     "gpio122",
1142 };
1143 
1144 static const char * const sd_write_groups[] = {
1145     "gpio97",
1146 };
1147 
1148 static const char * const sdc4_groups[] = {
1149     "gpio91", "gpio93", "gpio94", "gpio95",
1150 };
1151 
1152 static const char * const sdc4_clk_groups[] = {
1153     "gpio92",
1154 };
1155 
1156 static const char * const sdc4_cmd_groups[] = {
1157     "gpio90",
1158 };
1159 
1160 static const char * const sec_mi2s_groups[] = {
1161     "gpio126", "gpio127", "gpio128", "gpio129", "gpio130",
1162 };
1163 
1164 static const char * const sp_cmu_groups[] = {
1165     "gpio162",
1166 };
1167 
1168 static const char * const spkr_i2s_groups[] = {
1169     "gpio148", "gpio149", "gpio150", "gpio151", "gpio152",
1170 };
1171 
1172 static const char * const ter_mi2s_groups[] = {
1173     "gpio131", "gpio132", "gpio133", "gpio134", "gpio135",
1174 };
1175 
1176 static const char * const tgu_groups[] = {
1177     "gpio89", "gpio90", "gpio91", "gpio88", "gpio74", "gpio77", "gpio76",
1178     "gpio75",
1179 };
1180 
1181 static const char * const tsense_pwm1_groups[] = {
1182     "gpio150",
1183 };
1184 
1185 static const char * const tsense_pwm2_groups[] = {
1186     "gpio150",
1187 };
1188 
1189 static const char * const tsif1_groups[] = {
1190     "gpio88", "gpio89", "gpio90", "gpio91", "gpio97",
1191 };
1192 
1193 static const char * const tsif2_groups[] = {
1194     "gpio92", "gpio93", "gpio94", "gpio95", "gpio96",
1195 };
1196 
1197 static const char * const uim1_groups[] = {
1198     "gpio109", "gpio110", "gpio111", "gpio112",
1199 };
1200 
1201 static const char * const uim2_groups[] = {
1202     "gpio105", "gpio106", "gpio107", "gpio108",
1203 };
1204 
1205 static const char * const uim_batt_groups[] = {
1206     "gpio113",
1207 };
1208 
1209 static const char * const usb0_phy_groups[] = {
1210     "gpio38",
1211 };
1212 
1213 static const char * const usb1_phy_groups[] = {
1214     "gpio58",
1215 };
1216 
1217 static const char * const usb2phy_ac_groups[] = {
1218     "gpio47", "gpio48", "gpio113", "gpio123",
1219 };
1220 
1221 static const char * const vfr_1_groups[] = {
1222     "gpio91",
1223 };
1224 
1225 static const char * const vsense_trigger_groups[] = {
1226     "gpio62",
1227 };
1228 
1229 static const char * const wlan1_adc_groups[] = {
1230     "gpio64", "gpio63",
1231 };
1232 
1233 static const char * const wlan2_adc_groups[] = {
1234     "gpio68", "gpio65",
1235 };
1236 
1237 static const char * const wmss_reset_groups[] = {
1238     "gpio63",
1239 };
1240 
1241 static const struct msm_function sc8180x_functions[] = {
1242     FUNCTION(adsp_ext),
1243     FUNCTION(agera_pll),
1244     FUNCTION(aoss_cti),
1245     FUNCTION(atest_char),
1246     FUNCTION(atest_tsens),
1247     FUNCTION(atest_tsens2),
1248     FUNCTION(atest_usb0),
1249     FUNCTION(atest_usb1),
1250     FUNCTION(atest_usb2),
1251     FUNCTION(atest_usb3),
1252     FUNCTION(atest_usb4),
1253     FUNCTION(audio_ref),
1254     FUNCTION(btfm_slimbus),
1255     FUNCTION(cam_mclk),
1256     FUNCTION(cci_async),
1257     FUNCTION(cci_i2c),
1258     FUNCTION(cci_timer0),
1259     FUNCTION(cci_timer1),
1260     FUNCTION(cci_timer2),
1261     FUNCTION(cci_timer3),
1262     FUNCTION(cci_timer4),
1263     FUNCTION(cci_timer5),
1264     FUNCTION(cci_timer6),
1265     FUNCTION(cci_timer7),
1266     FUNCTION(cci_timer8),
1267     FUNCTION(cci_timer9),
1268     FUNCTION(cri_trng),
1269     FUNCTION(dbg_out),
1270     FUNCTION(ddr_bist),
1271     FUNCTION(ddr_pxi),
1272     FUNCTION(debug_hot),
1273     FUNCTION(dp_hot),
1274     FUNCTION(edp_hot),
1275     FUNCTION(edp_lcd),
1276     FUNCTION(emac_phy),
1277     FUNCTION(emac_pps),
1278     FUNCTION(gcc_gp1),
1279     FUNCTION(gcc_gp2),
1280     FUNCTION(gcc_gp3),
1281     FUNCTION(gcc_gp4),
1282     FUNCTION(gcc_gp5),
1283     FUNCTION(gpio),
1284     FUNCTION(gps),
1285     FUNCTION(grfc),
1286     FUNCTION(hs1_mi2s),
1287     FUNCTION(hs2_mi2s),
1288     FUNCTION(hs3_mi2s),
1289     FUNCTION(jitter_bist),
1290     FUNCTION(lpass_slimbus),
1291     FUNCTION(m_voc),
1292     FUNCTION(mdp_vsync),
1293     FUNCTION(mdp_vsync0),
1294     FUNCTION(mdp_vsync1),
1295     FUNCTION(mdp_vsync2),
1296     FUNCTION(mdp_vsync3),
1297     FUNCTION(mdp_vsync4),
1298     FUNCTION(mdp_vsync5),
1299     FUNCTION(mss_lte),
1300     FUNCTION(nav_pps),
1301     FUNCTION(pa_indicator),
1302     FUNCTION(pci_e0),
1303     FUNCTION(pci_e1),
1304     FUNCTION(pci_e2),
1305     FUNCTION(pci_e3),
1306     FUNCTION(phase_flag),
1307     FUNCTION(pll_bist),
1308     FUNCTION(pll_bypassnl),
1309     FUNCTION(pll_reset),
1310     FUNCTION(pri_mi2s),
1311     FUNCTION(pri_mi2s_ws),
1312     FUNCTION(prng_rosc),
1313     FUNCTION(qdss_cti),
1314     FUNCTION(qdss_gpio),
1315     FUNCTION(qlink),
1316     FUNCTION(qspi0),
1317     FUNCTION(qspi0_clk),
1318     FUNCTION(qspi0_cs),
1319     FUNCTION(qspi1),
1320     FUNCTION(qspi1_clk),
1321     FUNCTION(qspi1_cs),
1322     FUNCTION(qua_mi2s),
1323     FUNCTION(qup0),
1324     FUNCTION(qup1),
1325     FUNCTION(qup2),
1326     FUNCTION(qup3),
1327     FUNCTION(qup4),
1328     FUNCTION(qup5),
1329     FUNCTION(qup6),
1330     FUNCTION(qup7),
1331     FUNCTION(qup8),
1332     FUNCTION(qup9),
1333     FUNCTION(qup10),
1334     FUNCTION(qup11),
1335     FUNCTION(qup12),
1336     FUNCTION(qup13),
1337     FUNCTION(qup14),
1338     FUNCTION(qup15),
1339     FUNCTION(qup16),
1340     FUNCTION(qup17),
1341     FUNCTION(qup18),
1342     FUNCTION(qup19),
1343     FUNCTION(qup_l4),
1344     FUNCTION(qup_l5),
1345     FUNCTION(qup_l6),
1346     FUNCTION(rgmii),
1347     FUNCTION(sd_write),
1348     FUNCTION(sdc4),
1349     FUNCTION(sdc4_clk),
1350     FUNCTION(sdc4_cmd),
1351     FUNCTION(sec_mi2s),
1352     FUNCTION(sp_cmu),
1353     FUNCTION(spkr_i2s),
1354     FUNCTION(ter_mi2s),
1355     FUNCTION(tgu),
1356     FUNCTION(tsense_pwm1),
1357     FUNCTION(tsense_pwm2),
1358     FUNCTION(tsif1),
1359     FUNCTION(tsif2),
1360     FUNCTION(uim1),
1361     FUNCTION(uim2),
1362     FUNCTION(uim_batt),
1363     FUNCTION(usb0_phy),
1364     FUNCTION(usb1_phy),
1365     FUNCTION(usb2phy_ac),
1366     FUNCTION(vfr_1),
1367     FUNCTION(vsense_trigger),
1368     FUNCTION(wlan1_adc),
1369     FUNCTION(wlan2_adc),
1370     FUNCTION(wmss_reset),
1371 };
1372 
1373 /* Every pin is maintained as a single group, and missing or non-existing pin
1374  * would be maintained as dummy group to synchronize pin group index with
1375  * pin descriptor registered with pinctrl core.
1376  * Clients would not be able to request these dummy pin groups.
1377  */
1378 static const struct msm_pingroup sc8180x_groups[] = {
1379     [0] = PINGROUP(0, WEST, qup0, cci_i2c, _, _, _, _, _, _, _),
1380     [1] = PINGROUP(1, WEST, qup0, cci_i2c, _, _, _, _, _, _, _),
1381     [2] = PINGROUP(2, WEST, qup0, cci_i2c, _, _, _, _, _, _, _),
1382     [3] = PINGROUP(3, WEST, qup0, cci_i2c, _, _, _, _, _, _, _),
1383     [4] = PINGROUP(4, WEST, qup6, rgmii, _, phase_flag, _, _, _, _, _),
1384     [5] = PINGROUP(5, WEST, qup6, rgmii, _, phase_flag, _, _, _, _, _),
1385     [6] = PINGROUP(6, WEST, qup6, rgmii, qup_l6, _, phase_flag, _, _, _, _),
1386     [7] = PINGROUP(7, WEST, qup6, debug_hot, rgmii, qup_l5, _, phase_flag, _, _, _),
1387     [8] = PINGROUP(8, EAST, mdp_vsync, _, _, _, _, _, _, _, _),
1388     [9] = PINGROUP(9, EAST, mdp_vsync, qup10, _, _, _, _, _, _, _),
1389     [10] = PINGROUP(10, EAST, edp_hot, m_voc, mdp_vsync, qup10, _, _, _, _, _),
1390     [11] = PINGROUP(11, EAST, edp_lcd, qup10, _, _, _, _, _, _, _),
1391     [12] = PINGROUP(12, EAST, qup10, _, _, _, _, _, _, _, _),
1392     [13] = PINGROUP(13, EAST, cam_mclk, qdss_gpio, _, _, _, _, _, _, _),
1393     [14] = PINGROUP(14, EAST, cam_mclk, qdss_gpio, _, _, _, _, _, _, _),
1394     [15] = PINGROUP(15, EAST, cam_mclk, qdss_gpio, _, _, _, _, _, _, _),
1395     [16] = PINGROUP(16, EAST, cam_mclk, qdss_gpio, _, _, _, _, _, _, _),
1396     [17] = PINGROUP(17, EAST, cci_i2c, qdss_gpio, _, _, _, _, _, _, _),
1397     [18] = PINGROUP(18, EAST, cci_i2c, qdss_gpio, _, _, _, _, _, _, _),
1398     [19] = PINGROUP(19, EAST, cci_i2c, qdss_gpio, _, _, _, _, _, _, _),
1399     [20] = PINGROUP(20, EAST, cci_i2c, qdss_gpio, _, _, _, _, _, _, _),
1400     [21] = PINGROUP(21, EAST, cci_timer0, gcc_gp2, qdss_gpio, _, _, _, _, _, _),
1401     [22] = PINGROUP(22, EAST, cci_timer1, gcc_gp3, qdss_gpio, _, _, _, _, _, _),
1402     [23] = PINGROUP(23, EAST, cci_timer2, qup18, qdss_gpio, _, _, _, _, _, _),
1403     [24] = PINGROUP(24, EAST, cci_timer3, cci_async, qup18, qdss_gpio, _, _, _, _, _),
1404     [25] = PINGROUP(25, EAST, cam_mclk, cci_async, qup18, qdss_gpio, _, _, _, _, _),
1405     [26] = PINGROUP(26, EAST, cci_async, qup18, qdss_gpio, _, _, _, _, _, _),
1406     [27] = PINGROUP(27, EAST, qup15, _, qdss_gpio, _, _, _, _, _, _),
1407     [28] = PINGROUP(28, EAST, qup15, qdss_gpio, _, _, _, _, _, _, _),
1408     [29] = PINGROUP(29, EAST, qup15, qdss_gpio, _, _, _, _, _, _, _),
1409     [30] = PINGROUP(30, EAST, qup15, qdss_gpio, _, _, _, _, _, _, _),
1410     [31] = PINGROUP(31, EAST, cci_i2c, _, _, _, _, _, _, _, _),
1411     [32] = PINGROUP(32, EAST, cci_i2c, _, _, _, _, _, _, _, _),
1412     [33] = PINGROUP(33, EAST, cci_i2c, qup_l5, _, phase_flag, _, _, _, _, _),
1413     [34] = PINGROUP(34, EAST, cci_i2c, qup_l6, dbg_out, atest_usb2, _, _, _, _, _),
1414     [35] = PINGROUP(35, SOUTH, pci_e0, qup_l4, _, _, _, _, _, _, _),
1415     [36] = PINGROUP(36, SOUTH, pci_e0, qup_l5, _, _, _, _, _, _, _),
1416     [37] = PINGROUP(37, SOUTH, qup_l6, agera_pll, _, _, _, _, _, _, _),
1417     [38] = PINGROUP(38, SOUTH, usb0_phy, _, _, _, _, _, _, _, _),
1418     [39] = PINGROUP(39, EAST, qup9, cci_i2c, qdss_gpio, _, _, _, _, _, _),
1419     [40] = PINGROUP(40, EAST, qup9, cci_i2c, qdss_gpio, _, _, _, _, _, _),
1420     [41] = PINGROUP(41, EAST, qup9, cci_i2c, qdss_gpio, _, _, _, _, _, _),
1421     [42] = PINGROUP(42, EAST, qup9, cci_i2c, qdss_gpio, _, _, _, _, _, _),
1422     [43] = PINGROUP(43, EAST, qup13, _, _, _, _, _, _, _, _),
1423     [44] = PINGROUP(44, EAST, qup13, _, _, _, _, _, _, _, _),
1424     [45] = PINGROUP(45, EAST, qup13, _, _, _, _, _, _, _, _),
1425     [46] = PINGROUP(46, EAST, qup13, _, _, _, _, _, _, _, _),
1426     [47] = PINGROUP(47, EAST, qup14, usb2phy_ac, _, _, _, _, _, _, _),
1427     [48] = PINGROUP(48, EAST, qup14, usb2phy_ac, _, _, _, _, _, _, _),
1428     [49] = PINGROUP(49, EAST, qup14, qdss_cti, _, _, _, _, _, _, _),
1429     [50] = PINGROUP(50, EAST, qup14, qdss_cti, _, _, _, _, _, _, _),
1430     [51] = PINGROUP(51, WEST, qup4, _, _, _, _, _, _, _, _),
1431     [52] = PINGROUP(52, WEST, qup4, _, _, _, _, _, _, _, _),
1432     [53] = PINGROUP(53, WEST, qup4, _, phase_flag, _, _, _, _, _, _),
1433     [54] = PINGROUP(54, WEST, qup4, _, _, phase_flag, _, _, _, _, _),
1434     [55] = PINGROUP(55, WEST, qup17, qspi1_cs, _, _, _, _, _, _, _),
1435     [56] = PINGROUP(56, WEST, qup17, qspi1, _, _, _, _, _, _, _),
1436     [57] = PINGROUP(57, WEST, qup17, qspi1, _, _, _, _, _, _, _),
1437     [58] = PINGROUP(58, WEST, usb1_phy, qup17, _, _, _, _, _, _, _),
1438     [59] = PINGROUP(59, WEST, rgmii, qup_l4, _, _, _, _, _, _, _),
1439     [60] = PINGROUP(60, EAST, gps, nav_pps, nav_pps, qup_l4, mdp_vsync, atest_usb1, ddr_pxi, _, _),
1440     [61] = PINGROUP(61, EAST, qlink, _, _, _, _, _, _, _, _),
1441     [62] = PINGROUP(62, EAST, qlink, atest_tsens2, atest_usb1, ddr_pxi, vsense_trigger, _, _, _, _),
1442     [63] = PINGROUP(63, EAST, wmss_reset, _, atest_usb1, ddr_pxi, wlan1_adc, _, _, _, _),
1443     [64] = PINGROUP(64, EAST, grfc, _, atest_usb1, ddr_pxi, wlan1_adc, _, _, _, _),
1444     [65] = PINGROUP(65, EAST, grfc, atest_usb1, ddr_pxi, wlan2_adc, _, _, _, _, _),
1445     [66] = PINGROUP(66, EAST, grfc, _, _, _, _, _, _, _, _),
1446     [67] = PINGROUP(67, EAST, grfc, _, _, _, _, _, _, _, _),
1447     [68] = PINGROUP(68, EAST, grfc, pa_indicator, atest_usb3, ddr_pxi, wlan2_adc, _, _, _, _),
1448     [69] = PINGROUP(69, EAST, mss_lte, _, _, _, _, _, _, _, _),
1449     [70] = PINGROUP(70, EAST, mss_lte, _, _, _, _, _, _, _, _),
1450     [71] = PINGROUP(71, EAST, _, grfc, atest_usb3, ddr_pxi, _, _, _, _, _),
1451     [72] = PINGROUP(72, EAST, _, grfc, atest_usb3, ddr_pxi, _, _, _, _, _),
1452     [73] = PINGROUP(73, EAST, _, grfc, atest_usb3, ddr_pxi, _, _, _, _, _),
1453     [74] = PINGROUP(74, EAST, _, grfc, tgu, atest_usb3, ddr_pxi, _, _, _, _),
1454     [75] = PINGROUP(75, EAST, _, grfc, tgu, atest_usb4, ddr_pxi, _, _, _, _),
1455     [76] = PINGROUP(76, EAST, _, grfc, gps, nav_pps, nav_pps, tgu, atest_usb4, ddr_pxi, _),
1456     [77] = PINGROUP(77, EAST, _, grfc, gps, nav_pps, nav_pps, tgu, atest_usb4, ddr_pxi, _),
1457     [78] = PINGROUP(78, EAST, _, grfc, _, atest_usb4, ddr_pxi, _, _, _, _),
1458     [79] = PINGROUP(79, EAST, _, grfc, _, _, _, _, _, _, _),
1459     [80] = PINGROUP(80, EAST, _, grfc, _, _, _, _, _, _, _),
1460     [81] = PINGROUP(81, EAST, _, grfc, gps, nav_pps, nav_pps, qdss_cti, _, emac_pps, _),
1461     [82] = PINGROUP(82, EAST, _, grfc, gps, nav_pps, nav_pps, mdp_vsync, qdss_cti, _, _),
1462     [83] = PINGROUP(83, EAST, qup12, qup16, _, _, _, _, _, _, _),
1463     [84] = PINGROUP(84, EAST, qup12, qup16, _, _, _, _, _, _, _),
1464     [85] = PINGROUP(85, EAST, qup12, qup16, _, _, _, _, _, _, _),
1465     [86] = PINGROUP(86, EAST, qup12, qup16, _, _, _, _, _, _, _),
1466     [87] = PINGROUP(87, SOUTH, _, _, _, _, _, _, _, _, _),
1467     [88] = PINGROUP(88, EAST, tsif1, qup8, qspi0_cs, tgu, atest_usb4, ddr_pxi, _, _, _),
1468     [89] = PINGROUP(89, EAST, tsif1, qup8, qspi0, mdp_vsync0, mdp_vsync1, mdp_vsync2, mdp_vsync3, mdp_vsync4, mdp_vsync5),
1469     [90] = PINGROUP(90, EAST, tsif1, qup8, qspi0, sdc4_cmd, tgu, qdss_cti, atest_usb0, ddr_pxi, _),
1470     [91] = PINGROUP(91, EAST, tsif1, qup8, qspi0, sdc4, vfr_1, tgu, atest_usb0, _, _),
1471     [92] = PINGROUP(92, EAST, tsif2, qup11, qspi0_clk, sdc4_clk, qdss_gpio, atest_usb0, _, _, _),
1472     [93] = PINGROUP(93, EAST, tsif2, qup11, qspi0, sdc4, atest_tsens, atest_usb0, _, _, _),
1473     [94] = PINGROUP(94, EAST, tsif2, qup11, qspi0_cs, sdc4, _, atest_usb0, _, _, _),
1474     [95] = PINGROUP(95, EAST, tsif2, qup11, sdc4, qup_l4, atest_usb2, _, _, _, _),
1475     [96] = PINGROUP(96, WEST, tsif2, qup_l5, _, _, _, _, _, _, _),
1476     [97] = PINGROUP(97, WEST, sd_write, tsif1, qup_l6, _, _, _, _, _, _),
1477     [98] = PINGROUP(98, WEST, qup7, ddr_bist, _, _, _, _, _, _, _),
1478     [99] = PINGROUP(99, WEST, qup7, ddr_bist, _, _, _, _, _, _, _),
1479     [100] = PINGROUP(100, WEST, qup7, pll_bypassnl, _, _, _, _, _, _, _),
1480     [101] = PINGROUP(101, WEST, qup7, pll_reset, _, _, _, _, _, _, _),
1481     [102] = PINGROUP(102, SOUTH, pci_e1, _, phase_flag, atest_usb2, _, _, _, _, _),
1482     [103] = PINGROUP(103, SOUTH, pci_e1, _, _, _, _, _, _, _, _),
1483     [104] = PINGROUP(104, SOUTH, _, _, _, _, _, _, _, _, _),
1484     [105] = PINGROUP(105, WEST, uim2, _, _, _, _, _, _, _, _),
1485     [106] = PINGROUP(106, WEST, uim2, _, _, _, _, _, _, _, _),
1486     [107] = PINGROUP(107, WEST, uim2, _, _, _, _, _, _, _, _),
1487     [108] = PINGROUP(108, WEST, uim2, _, _, _, _, _, _, _, _),
1488     [109] = PINGROUP(109, WEST, uim1, _, _, _, _, _, _, _, _),
1489     [110] = PINGROUP(110, WEST, uim1, _, _, _, _, _, _, _, _),
1490     [111] = PINGROUP(111, WEST, uim1, _, _, _, _, _, _, _, _),
1491     [112] = PINGROUP(112, WEST, uim1, _, _, _, _, _, _, _, _),
1492     [113] = PINGROUP(113, WEST, uim_batt, usb2phy_ac, aoss_cti, _, _, _, _, _, _),
1493     [114] = PINGROUP(114, WEST, qup1, rgmii, _, qdss_gpio, _, _, _, _, _),
1494     [115] = PINGROUP(115, WEST, qup1, rgmii, adsp_ext, _, qdss_gpio, _, _, _, _),
1495     [116] = PINGROUP(116, WEST, qup1, rgmii, _, qdss_gpio, _, _, _, _, _),
1496     [117] = PINGROUP(117, WEST, qup1, rgmii, _, qdss_gpio, _, _, _, _, _),
1497     [118] = PINGROUP(118, WEST, rgmii, _, qdss_gpio, _, _, _, _, _, _),
1498     [119] = PINGROUP(119, WEST, qup5, rgmii, _, qdss_gpio, _, _, _, _, _),
1499     [120] = PINGROUP(120, WEST, qup5, rgmii, _, phase_flag, qdss_gpio, _, _, _, _),
1500     [121] = PINGROUP(121, WEST, qup5, rgmii, _, phase_flag, qdss_gpio, atest_usb2, _, _, _),
1501     [122] = PINGROUP(122, WEST, qup5, rgmii, _, phase_flag, atest_usb2, _, _, _, _),
1502     [123] = PINGROUP(123, SOUTH, usb2phy_ac, _, phase_flag, _, _, _, _, _, _),
1503     [124] = PINGROUP(124, SOUTH, emac_phy, _, _, _, _, _, _, _, _),
1504     [125] = PINGROUP(125, WEST, hs3_mi2s, _, phase_flag, _, _, _, _, _, _),
1505     [126] = PINGROUP(126, WEST, sec_mi2s, qup2, _, _, _, _, _, _, _),
1506     [127] = PINGROUP(127, WEST, sec_mi2s, qup2, _, _, _, _, _, _, _),
1507     [128] = PINGROUP(128, WEST, sec_mi2s, qup2, _, _, _, _, _, _, _),
1508     [129] = PINGROUP(129, WEST, sec_mi2s, qup2, jitter_bist, _, _, _, _, _, _),
1509     [130] = PINGROUP(130, WEST, sec_mi2s, pll_bist, _, qdss_gpio, _, _, _, _, _),
1510     [131] = PINGROUP(131, WEST, ter_mi2s, gcc_gp1, _, _, _, _, _, _, _),
1511     [132] = PINGROUP(132, WEST, ter_mi2s, _, qdss_gpio, _, _, _, _, _, _),
1512     [133] = PINGROUP(133, WEST, ter_mi2s, _, qdss_gpio, atest_char, _, _, _, _, _),
1513     [134] = PINGROUP(134, WEST, ter_mi2s, _, qdss_gpio, atest_char, _, _, _, _, _),
1514     [135] = PINGROUP(135, WEST, ter_mi2s, _, qdss_gpio, atest_char, _, _, _, _, _),
1515     [136] = PINGROUP(136, WEST, qua_mi2s, gcc_gp1, _, _, _, _, _, _, _),
1516     [137] = PINGROUP(137, WEST, qua_mi2s, gcc_gp2, _, _, _, _, _, _, _),
1517     [138] = PINGROUP(138, WEST, qua_mi2s, gcc_gp3, _, _, _, _, _, _, _),
1518     [139] = PINGROUP(139, WEST, qua_mi2s, gcc_gp4, _, _, _, _, _, _, _),
1519     [140] = PINGROUP(140, WEST, qua_mi2s, gcc_gp5, _, atest_char, _, _, _, _, _),
1520     [141] = PINGROUP(141, WEST, qua_mi2s, qdss_cti, _, _, _, _, _, _, _),
1521     [142] = PINGROUP(142, WEST, qua_mi2s, _, _, qdss_cti, atest_char, _, _, _, _),
1522     [143] = PINGROUP(143, WEST, pri_mi2s, _, _, _, _, _, _, _, _),
1523     [144] = PINGROUP(144, WEST, pri_mi2s, qup3, _, _, _, _, _, _, _),
1524     [145] = PINGROUP(145, WEST, pri_mi2s_ws, qup3, ddr_bist, _, _, _, _, _, _),
1525     [146] = PINGROUP(146, WEST, pri_mi2s, qup3, ddr_bist, _, _, _, _, _, _),
1526     [147] = PINGROUP(147, WEST, pri_mi2s, qup3, _, _, _, _, _, _, _),
1527     [148] = PINGROUP(148, WEST, spkr_i2s, audio_ref, _, phase_flag, _, _, _, _, _),
1528     [149] = PINGROUP(149, WEST, lpass_slimbus, spkr_i2s, _, phase_flag, _, _, _, _, _),
1529     [150] = PINGROUP(150, WEST, lpass_slimbus, spkr_i2s, _, phase_flag, tsense_pwm1, tsense_pwm2, _, _, _),
1530     [151] = PINGROUP(151, WEST, lpass_slimbus, spkr_i2s, _, phase_flag, _, _, _, _, _),
1531     [152] = PINGROUP(152, WEST, lpass_slimbus, spkr_i2s, _, phase_flag, _, _, _, _, _),
1532     [153] = PINGROUP(153, WEST, btfm_slimbus, _, _, _, _, _, _, _, _),
1533     [154] = PINGROUP(154, WEST, btfm_slimbus, _, _, _, _, _, _, _, _),
1534     [155] = PINGROUP(155, WEST, hs1_mi2s, _, phase_flag, _, _, _, _, _, _),
1535     [156] = PINGROUP(156, WEST, hs1_mi2s, _, phase_flag, _, _, _, _, _, _),
1536     [157] = PINGROUP(157, WEST, hs1_mi2s, _, phase_flag, _, _, _, _, _, _),
1537     [158] = PINGROUP(158, WEST, hs1_mi2s, _, phase_flag, _, _, _, _, _, _),
1538     [159] = PINGROUP(159, WEST, hs1_mi2s, cri_trng, _, phase_flag, _, _, _, _, _),
1539     [160] = PINGROUP(160, WEST, hs2_mi2s, cri_trng, _, phase_flag, _, _, _, _, _),
1540     [161] = PINGROUP(161, WEST, hs2_mi2s, qspi1, cri_trng, _, phase_flag, _, _, _, _),
1541     [162] = PINGROUP(162, WEST, hs2_mi2s, qspi1, sp_cmu, _, phase_flag, _, _, _, _),
1542     [163] = PINGROUP(163, WEST, hs2_mi2s, qspi1_clk, prng_rosc, _, phase_flag, _, _, _, _),
1543     [164] = PINGROUP(164, WEST, hs2_mi2s, qspi1_cs, _, phase_flag, _, _, _, _, _),
1544     [165] = PINGROUP(165, WEST, hs3_mi2s, _, phase_flag, _, _, _, _, _, _),
1545     [166] = PINGROUP(166, WEST, hs3_mi2s, _, phase_flag, _, _, _, _, _, _),
1546     [167] = PINGROUP(167, WEST, hs3_mi2s, _, phase_flag, _, _, _, _, _, _),
1547     [168] = PINGROUP(168, WEST, hs3_mi2s, _, phase_flag, _, _, _, _, _, _),
1548     [169] = PINGROUP(169, SOUTH, _, _, _, _, _, _, _, _, _),
1549     [170] = PINGROUP(170, SOUTH, _, _, _, _, _, _, _, _, _),
1550     [171] = PINGROUP(171, SOUTH, _, _, _, _, _, _, _, _, _),
1551     [172] = PINGROUP(172, SOUTH, _, _, _, _, _, _, _, _, _),
1552     [173] = PINGROUP(173, SOUTH, _, _, _, _, _, _, _, _, _),
1553     [174] = PINGROUP(174, SOUTH, _, _, _, _, _, _, _, _, _),
1554     [175] = PINGROUP(175, SOUTH, pci_e2, _, _, _, _, _, _, _, _),
1555     [176] = PINGROUP(176, SOUTH, pci_e2, cci_async, _, _, _, _, _, _, _),
1556     [177] = PINGROUP_OFFSET(177, SOUTH, 0x1e000, _, _, _, _, _, _, _, _, _),
1557     [178] = PINGROUP_OFFSET(178, SOUTH, 0x1e000, pci_e3, cci_timer4, _, _, _, _, _, _, _),
1558     [179] = PINGROUP_OFFSET(179, SOUTH, 0x1e000, pci_e3, cam_mclk, _, _, _, _, _, _, _),
1559     [180] = PINGROUP_OFFSET(180, SOUTH, 0x1e000, cam_mclk, _, _, _, _, _, _, _, _),
1560     [181] = PINGROUP_OFFSET(181, SOUTH, 0x1e000, qup19, cam_mclk, _, _, _, _, _, _, _),
1561     [182] = PINGROUP_OFFSET(182, SOUTH, 0x1e000, qup19, cci_timer5, gcc_gp4, _, _, _, _, _, _),
1562     [183] = PINGROUP_OFFSET(183, SOUTH, 0x1e000, qup19, cci_timer6, gcc_gp5, _, _, _, _, _, _),
1563     [184] = PINGROUP_OFFSET(184, SOUTH, 0x1e000, qup19, cci_timer7, _, _, _, _, _, _, _),
1564     [185] = PINGROUP_OFFSET(185, SOUTH, 0x1e000, cci_timer8, cci_async, _, _, _, _, _, _, _),
1565     [186] = PINGROUP_OFFSET(186, SOUTH, 0x1e000, cci_timer9, cci_async, _, _, _, _, _, _, _),
1566     [187] = PINGROUP_OFFSET(187, SOUTH, 0x1e000, _, _, _, _, _, _, _, _, _),
1567     [188] = PINGROUP_OFFSET(188, SOUTH, 0x1e000, _, _, _, _, _, _, _, _, _),
1568     [189] = PINGROUP_OFFSET(189, SOUTH, 0x1e000, dp_hot, _, _, _, _, _, _, _, _),
1569     [190] = UFS_RESET(ufs_reset),
1570     [191] = SDC_QDSD_PINGROUP(sdc2_clk, 0x4b2000, 14, 6),
1571     [192] = SDC_QDSD_PINGROUP(sdc2_cmd, 0x4b2000, 11, 3),
1572     [193] = SDC_QDSD_PINGROUP(sdc2_data, 0x4b2000, 9, 0),
1573 };
1574 
1575 static const int sc8180x_acpi_reserved_gpios[] = {
1576     0, 1, 2, 3,
1577     47, 48, 49, 50,
1578     126, 127, 128, 129,
1579     -1 /* terminator */
1580 };
1581 
1582 static const struct msm_gpio_wakeirq_map sc8180x_pdc_map[] = {
1583     { 3, 31 }, { 5, 32 }, { 8, 33 }, { 9, 34 }, { 10, 100 }, { 12, 104 },
1584     { 24, 37 }, { 26, 38 }, { 27, 41 }, { 28, 42 }, { 30, 39 }, { 36, 43 },
1585     { 37, 44 }, { 38, 45 }, { 39, 118 }, { 39, 125 }, { 41, 47 },
1586     { 42, 48 }, { 46, 50 }, { 47, 49 }, { 48, 51 }, { 49, 53 }, { 50, 52 },
1587     { 51, 116 }, { 51, 123 }, { 53, 54 }, { 54, 55 }, { 55, 56 },
1588     { 56, 57 }, { 58, 58 }, { 60, 60 }, { 68, 62 }, { 70, 63 }, { 76, 86 },
1589     { 77, 36 }, { 81, 64 }, { 83, 65 }, { 86, 67 }, { 87, 84 }, { 88, 117 },
1590     { 88, 124 }, { 90, 69 }, { 91, 70 }, { 93, 75 }, { 95, 72 }, { 97, 74 },
1591     { 101, 76 }, { 103, 77 }, { 104, 78 }, { 114, 82 }, { 117, 85 },
1592     { 118, 101 }, { 119, 87 }, { 120, 88 }, { 121, 89 }, { 122, 90 },
1593     { 123, 91 }, { 124, 92 }, { 125, 93 }, { 129, 94 }, { 132, 105 },
1594     { 133, 35 }, { 134, 36 }, { 136, 97 }, { 142, 103 }, { 144, 115 },
1595     { 144, 122 }, { 147, 106 }, { 150, 107 }, { 152, 108 }, { 153, 109 },
1596     { 177, 111 }, { 180, 112 }, { 184, 113 }, { 189, 114 }
1597 };
1598 
1599 static struct msm_pinctrl_soc_data sc8180x_pinctrl = {
1600     .tiles = sc8180x_tiles,
1601     .ntiles = ARRAY_SIZE(sc8180x_tiles),
1602     .pins = sc8180x_pins,
1603     .npins = ARRAY_SIZE(sc8180x_pins),
1604     .functions = sc8180x_functions,
1605     .nfunctions = ARRAY_SIZE(sc8180x_functions),
1606     .groups = sc8180x_groups,
1607     .ngroups = ARRAY_SIZE(sc8180x_groups),
1608     .ngpios = 191,
1609     .wakeirq_map = sc8180x_pdc_map,
1610     .nwakeirq_map = ARRAY_SIZE(sc8180x_pdc_map),
1611 };
1612 
1613 static const struct msm_pinctrl_soc_data sc8180x_acpi_pinctrl = {
1614     .tiles = sc8180x_tiles,
1615     .ntiles = ARRAY_SIZE(sc8180x_tiles),
1616     .pins = sc8180x_pins,
1617     .npins = ARRAY_SIZE(sc8180x_pins),
1618     .groups = sc8180x_groups,
1619     .ngroups = ARRAY_SIZE(sc8180x_groups),
1620     .reserved_gpios = sc8180x_acpi_reserved_gpios,
1621     .ngpios = 190,
1622 };
1623 
1624 /*
1625  * ACPI DSDT has one single memory resource for TLMM, which violates the
1626  * hardware layout of 3 separate tiles.  Let's split the memory resource into
1627  * 3 named ones, so that msm_pinctrl_probe() can map memory for ACPI in the
1628  * same way as for DT probe.
1629  */
1630 static int sc8180x_pinctrl_add_tile_resources(struct platform_device *pdev)
1631 {
1632     int nres_num = pdev->num_resources + ARRAY_SIZE(sc8180x_tiles) - 1;
1633     struct resource *mres, *nres, *res;
1634     int i, ret;
1635 
1636     /*
1637      * DT already has tiles defined properly, so nothing needs to be done
1638      * for DT probe.
1639      */
1640     if (pdev->dev.of_node)
1641         return 0;
1642 
1643     /* Allocate for new resources */
1644     nres = devm_kzalloc(&pdev->dev, sizeof(*nres) * nres_num, GFP_KERNEL);
1645     if (!nres)
1646         return -ENOMEM;
1647 
1648     res = nres;
1649 
1650     for (i = 0; i < pdev->num_resources; i++) {
1651         struct resource *r = &pdev->resource[i];
1652 
1653         /* Save memory resource and copy others */
1654         if (resource_type(r) == IORESOURCE_MEM)
1655             mres = r;
1656         else
1657             *res++ = *r;
1658     }
1659 
1660     /* Append tile memory resources */
1661     for (i = 0; i < ARRAY_SIZE(sc8180x_tiles); i++, res++) {
1662         const struct tile_info *info = &sc8180x_tile_info[i];
1663 
1664         res->start = mres->start + info->offset;
1665         res->end = mres->start + info->offset + info->size - 1;
1666         res->flags = mres->flags;
1667         res->name = sc8180x_tiles[i];
1668 
1669         /* Add new MEM to resource tree */
1670         insert_resource(mres->parent, res);
1671     }
1672 
1673     /* Remove old MEM from resource tree */
1674     remove_resource(mres);
1675 
1676     /* Free old resources and install new ones */
1677     ret = platform_device_add_resources(pdev, nres, nres_num);
1678     if (ret) {
1679         dev_err(&pdev->dev, "failed to add new resources: %d\n", ret);
1680         return ret;
1681     }
1682 
1683     return 0;
1684 }
1685 
1686 static int sc8180x_pinctrl_probe(struct platform_device *pdev)
1687 {
1688     const struct msm_pinctrl_soc_data *soc_data;
1689     int ret;
1690 
1691     soc_data = device_get_match_data(&pdev->dev);
1692     if (!soc_data)
1693         return -EINVAL;
1694 
1695     ret = sc8180x_pinctrl_add_tile_resources(pdev);
1696     if (ret)
1697         return ret;
1698 
1699     return msm_pinctrl_probe(pdev, soc_data);
1700 }
1701 
1702 static const struct acpi_device_id sc8180x_pinctrl_acpi_match[] = {
1703     {
1704         .id = "QCOM040D",
1705         .driver_data = (kernel_ulong_t) &sc8180x_acpi_pinctrl,
1706     },
1707     { }
1708 };
1709 MODULE_DEVICE_TABLE(acpi, sc8180x_pinctrl_acpi_match);
1710 
1711 static const struct of_device_id sc8180x_pinctrl_of_match[] = {
1712     {
1713         .compatible = "qcom,sc8180x-tlmm",
1714         .data = &sc8180x_pinctrl,
1715     },
1716     { },
1717 };
1718 MODULE_DEVICE_TABLE(of, sc8180x_pinctrl_of_match);
1719 
1720 static struct platform_driver sc8180x_pinctrl_driver = {
1721     .driver = {
1722         .name = "sc8180x-pinctrl",
1723         .of_match_table = sc8180x_pinctrl_of_match,
1724         .acpi_match_table = sc8180x_pinctrl_acpi_match,
1725     },
1726     .probe = sc8180x_pinctrl_probe,
1727     .remove = msm_pinctrl_remove,
1728 };
1729 
1730 static int __init sc8180x_pinctrl_init(void)
1731 {
1732     return platform_driver_register(&sc8180x_pinctrl_driver);
1733 }
1734 arch_initcall(sc8180x_pinctrl_init);
1735 
1736 static void __exit sc8180x_pinctrl_exit(void)
1737 {
1738     platform_driver_unregister(&sc8180x_pinctrl_driver);
1739 }
1740 module_exit(sc8180x_pinctrl_exit);
1741 
1742 MODULE_DESCRIPTION("QTI SC8180x pinctrl driver");
1743 MODULE_LICENSE("GPL v2");
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