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OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (c) 2020, The Linux Foundation. All rights reserved.
0004  */
0005 
0006 #include <linux/module.h>
0007 #include <linux/of.h>
0008 #include <linux/platform_device.h>
0009 #include <linux/pinctrl/pinctrl.h>
0010 
0011 #include "pinctrl-msm.h"
0012 
0013 #define FUNCTION(fname)                         \
0014     [msm_mux_##fname] = {                       \
0015         .name = #fname,             \
0016         .groups = fname##_groups,               \
0017         .ngroups = ARRAY_SIZE(fname##_groups),  \
0018     }
0019 
0020 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9)    \
0021     {                           \
0022         .name = "gpio" #id,         \
0023         .pins = gpio##id##_pins,        \
0024         .npins = (unsigned int)ARRAY_SIZE(gpio##id##_pins), \
0025         .funcs = (int[]){           \
0026             msm_mux_gpio, /* gpio mode */   \
0027             msm_mux_##f1,           \
0028             msm_mux_##f2,           \
0029             msm_mux_##f3,           \
0030             msm_mux_##f4,           \
0031             msm_mux_##f5,           \
0032             msm_mux_##f6,           \
0033             msm_mux_##f7,           \
0034             msm_mux_##f8,           \
0035             msm_mux_##f9            \
0036         },                      \
0037         .nfuncs = 10,               \
0038         .ctl_reg = 0x1000 * id,         \
0039         .io_reg = 0x1000 * id + 0x4,        \
0040         .intr_cfg_reg = 0x1000 * id + 0x8,  \
0041         .intr_status_reg = 0x1000 * id + 0xc,   \
0042         .intr_target_reg = 0x1000 * id + 0x8,   \
0043         .mux_bit = 2,           \
0044         .pull_bit = 0,          \
0045         .drv_bit = 6,           \
0046         .egpio_enable = 12,     \
0047         .egpio_present = 11,        \
0048         .oe_bit = 9,            \
0049         .in_bit = 0,            \
0050         .out_bit = 1,           \
0051         .intr_enable_bit = 0,       \
0052         .intr_status_bit = 0,       \
0053         .intr_target_bit = 5,       \
0054         .intr_target_kpss_val = 3,  \
0055         .intr_raw_status_bit = 4,   \
0056         .intr_polarity_bit = 1,     \
0057         .intr_detection_bit = 2,    \
0058         .intr_detection_width = 2,  \
0059     }
0060 
0061 #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv)  \
0062     {                           \
0063         .name = #pg_name,           \
0064         .pins = pg_name##_pins,         \
0065         .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins),  \
0066         .ctl_reg = ctl,             \
0067         .io_reg = 0,                \
0068         .intr_cfg_reg = 0,          \
0069         .intr_status_reg = 0,           \
0070         .intr_target_reg = 0,           \
0071         .mux_bit = -1,              \
0072         .pull_bit = pull,           \
0073         .drv_bit = drv,             \
0074         .oe_bit = -1,               \
0075         .in_bit = -1,               \
0076         .out_bit = -1,              \
0077         .intr_enable_bit = -1,          \
0078         .intr_status_bit = -1,          \
0079         .intr_target_bit = -1,          \
0080         .intr_raw_status_bit = -1,      \
0081         .intr_polarity_bit = -1,        \
0082         .intr_detection_bit = -1,       \
0083         .intr_detection_width = -1,     \
0084     }
0085 
0086 #define UFS_RESET(pg_name, offset)              \
0087     {                           \
0088         .name = #pg_name,           \
0089         .pins = pg_name##_pins,         \
0090         .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins),  \
0091         .ctl_reg = offset,          \
0092         .io_reg = offset + 0x4,         \
0093         .intr_cfg_reg = 0,          \
0094         .intr_status_reg = 0,           \
0095         .intr_target_reg = 0,           \
0096         .mux_bit = -1,              \
0097         .pull_bit = 3,              \
0098         .drv_bit = 0,               \
0099         .oe_bit = -1,               \
0100         .in_bit = -1,               \
0101         .out_bit = 0,               \
0102         .intr_enable_bit = -1,          \
0103         .intr_status_bit = -1,          \
0104         .intr_target_bit = -1,          \
0105         .intr_raw_status_bit = -1,      \
0106         .intr_polarity_bit = -1,        \
0107         .intr_detection_bit = -1,       \
0108         .intr_detection_width = -1,     \
0109     }
0110 
0111 static const struct pinctrl_pin_desc sc7280_pins[] = {
0112     PINCTRL_PIN(0, "GPIO_0"),
0113     PINCTRL_PIN(1, "GPIO_1"),
0114     PINCTRL_PIN(2, "GPIO_2"),
0115     PINCTRL_PIN(3, "GPIO_3"),
0116     PINCTRL_PIN(4, "GPIO_4"),
0117     PINCTRL_PIN(5, "GPIO_5"),
0118     PINCTRL_PIN(6, "GPIO_6"),
0119     PINCTRL_PIN(7, "GPIO_7"),
0120     PINCTRL_PIN(8, "GPIO_8"),
0121     PINCTRL_PIN(9, "GPIO_9"),
0122     PINCTRL_PIN(10, "GPIO_10"),
0123     PINCTRL_PIN(11, "GPIO_11"),
0124     PINCTRL_PIN(12, "GPIO_12"),
0125     PINCTRL_PIN(13, "GPIO_13"),
0126     PINCTRL_PIN(14, "GPIO_14"),
0127     PINCTRL_PIN(15, "GPIO_15"),
0128     PINCTRL_PIN(16, "GPIO_16"),
0129     PINCTRL_PIN(17, "GPIO_17"),
0130     PINCTRL_PIN(18, "GPIO_18"),
0131     PINCTRL_PIN(19, "GPIO_19"),
0132     PINCTRL_PIN(20, "GPIO_20"),
0133     PINCTRL_PIN(21, "GPIO_21"),
0134     PINCTRL_PIN(22, "GPIO_22"),
0135     PINCTRL_PIN(23, "GPIO_23"),
0136     PINCTRL_PIN(24, "GPIO_24"),
0137     PINCTRL_PIN(25, "GPIO_25"),
0138     PINCTRL_PIN(26, "GPIO_26"),
0139     PINCTRL_PIN(27, "GPIO_27"),
0140     PINCTRL_PIN(28, "GPIO_28"),
0141     PINCTRL_PIN(29, "GPIO_29"),
0142     PINCTRL_PIN(30, "GPIO_30"),
0143     PINCTRL_PIN(31, "GPIO_31"),
0144     PINCTRL_PIN(32, "GPIO_32"),
0145     PINCTRL_PIN(33, "GPIO_33"),
0146     PINCTRL_PIN(34, "GPIO_34"),
0147     PINCTRL_PIN(35, "GPIO_35"),
0148     PINCTRL_PIN(36, "GPIO_36"),
0149     PINCTRL_PIN(37, "GPIO_37"),
0150     PINCTRL_PIN(38, "GPIO_38"),
0151     PINCTRL_PIN(39, "GPIO_39"),
0152     PINCTRL_PIN(40, "GPIO_40"),
0153     PINCTRL_PIN(41, "GPIO_41"),
0154     PINCTRL_PIN(42, "GPIO_42"),
0155     PINCTRL_PIN(43, "GPIO_43"),
0156     PINCTRL_PIN(44, "GPIO_44"),
0157     PINCTRL_PIN(45, "GPIO_45"),
0158     PINCTRL_PIN(46, "GPIO_46"),
0159     PINCTRL_PIN(47, "GPIO_47"),
0160     PINCTRL_PIN(48, "GPIO_48"),
0161     PINCTRL_PIN(49, "GPIO_49"),
0162     PINCTRL_PIN(50, "GPIO_50"),
0163     PINCTRL_PIN(51, "GPIO_51"),
0164     PINCTRL_PIN(52, "GPIO_52"),
0165     PINCTRL_PIN(53, "GPIO_53"),
0166     PINCTRL_PIN(54, "GPIO_54"),
0167     PINCTRL_PIN(55, "GPIO_55"),
0168     PINCTRL_PIN(56, "GPIO_56"),
0169     PINCTRL_PIN(57, "GPIO_57"),
0170     PINCTRL_PIN(58, "GPIO_58"),
0171     PINCTRL_PIN(59, "GPIO_59"),
0172     PINCTRL_PIN(60, "GPIO_60"),
0173     PINCTRL_PIN(61, "GPIO_61"),
0174     PINCTRL_PIN(62, "GPIO_62"),
0175     PINCTRL_PIN(63, "GPIO_63"),
0176     PINCTRL_PIN(64, "GPIO_64"),
0177     PINCTRL_PIN(65, "GPIO_65"),
0178     PINCTRL_PIN(66, "GPIO_66"),
0179     PINCTRL_PIN(67, "GPIO_67"),
0180     PINCTRL_PIN(68, "GPIO_68"),
0181     PINCTRL_PIN(69, "GPIO_69"),
0182     PINCTRL_PIN(70, "GPIO_70"),
0183     PINCTRL_PIN(71, "GPIO_71"),
0184     PINCTRL_PIN(72, "GPIO_72"),
0185     PINCTRL_PIN(73, "GPIO_73"),
0186     PINCTRL_PIN(74, "GPIO_74"),
0187     PINCTRL_PIN(75, "GPIO_75"),
0188     PINCTRL_PIN(76, "GPIO_76"),
0189     PINCTRL_PIN(77, "GPIO_77"),
0190     PINCTRL_PIN(78, "GPIO_78"),
0191     PINCTRL_PIN(79, "GPIO_79"),
0192     PINCTRL_PIN(80, "GPIO_80"),
0193     PINCTRL_PIN(81, "GPIO_81"),
0194     PINCTRL_PIN(82, "GPIO_82"),
0195     PINCTRL_PIN(83, "GPIO_83"),
0196     PINCTRL_PIN(84, "GPIO_84"),
0197     PINCTRL_PIN(85, "GPIO_85"),
0198     PINCTRL_PIN(86, "GPIO_86"),
0199     PINCTRL_PIN(87, "GPIO_87"),
0200     PINCTRL_PIN(88, "GPIO_88"),
0201     PINCTRL_PIN(89, "GPIO_89"),
0202     PINCTRL_PIN(90, "GPIO_90"),
0203     PINCTRL_PIN(91, "GPIO_91"),
0204     PINCTRL_PIN(92, "GPIO_92"),
0205     PINCTRL_PIN(93, "GPIO_93"),
0206     PINCTRL_PIN(94, "GPIO_94"),
0207     PINCTRL_PIN(95, "GPIO_95"),
0208     PINCTRL_PIN(96, "GPIO_96"),
0209     PINCTRL_PIN(97, "GPIO_97"),
0210     PINCTRL_PIN(98, "GPIO_98"),
0211     PINCTRL_PIN(99, "GPIO_99"),
0212     PINCTRL_PIN(100, "GPIO_100"),
0213     PINCTRL_PIN(101, "GPIO_101"),
0214     PINCTRL_PIN(102, "GPIO_102"),
0215     PINCTRL_PIN(103, "GPIO_103"),
0216     PINCTRL_PIN(104, "GPIO_104"),
0217     PINCTRL_PIN(105, "GPIO_105"),
0218     PINCTRL_PIN(106, "GPIO_106"),
0219     PINCTRL_PIN(107, "GPIO_107"),
0220     PINCTRL_PIN(108, "GPIO_108"),
0221     PINCTRL_PIN(109, "GPIO_109"),
0222     PINCTRL_PIN(110, "GPIO_110"),
0223     PINCTRL_PIN(111, "GPIO_111"),
0224     PINCTRL_PIN(112, "GPIO_112"),
0225     PINCTRL_PIN(113, "GPIO_113"),
0226     PINCTRL_PIN(114, "GPIO_114"),
0227     PINCTRL_PIN(115, "GPIO_115"),
0228     PINCTRL_PIN(116, "GPIO_116"),
0229     PINCTRL_PIN(117, "GPIO_117"),
0230     PINCTRL_PIN(118, "GPIO_118"),
0231     PINCTRL_PIN(119, "GPIO_119"),
0232     PINCTRL_PIN(120, "GPIO_120"),
0233     PINCTRL_PIN(121, "GPIO_121"),
0234     PINCTRL_PIN(122, "GPIO_122"),
0235     PINCTRL_PIN(123, "GPIO_123"),
0236     PINCTRL_PIN(124, "GPIO_124"),
0237     PINCTRL_PIN(125, "GPIO_125"),
0238     PINCTRL_PIN(126, "GPIO_126"),
0239     PINCTRL_PIN(127, "GPIO_127"),
0240     PINCTRL_PIN(128, "GPIO_128"),
0241     PINCTRL_PIN(129, "GPIO_129"),
0242     PINCTRL_PIN(130, "GPIO_130"),
0243     PINCTRL_PIN(131, "GPIO_131"),
0244     PINCTRL_PIN(132, "GPIO_132"),
0245     PINCTRL_PIN(133, "GPIO_133"),
0246     PINCTRL_PIN(134, "GPIO_134"),
0247     PINCTRL_PIN(135, "GPIO_135"),
0248     PINCTRL_PIN(136, "GPIO_136"),
0249     PINCTRL_PIN(137, "GPIO_137"),
0250     PINCTRL_PIN(138, "GPIO_138"),
0251     PINCTRL_PIN(139, "GPIO_139"),
0252     PINCTRL_PIN(140, "GPIO_140"),
0253     PINCTRL_PIN(141, "GPIO_141"),
0254     PINCTRL_PIN(142, "GPIO_142"),
0255     PINCTRL_PIN(143, "GPIO_143"),
0256     PINCTRL_PIN(144, "GPIO_144"),
0257     PINCTRL_PIN(145, "GPIO_145"),
0258     PINCTRL_PIN(146, "GPIO_146"),
0259     PINCTRL_PIN(147, "GPIO_147"),
0260     PINCTRL_PIN(148, "GPIO_148"),
0261     PINCTRL_PIN(149, "GPIO_149"),
0262     PINCTRL_PIN(150, "GPIO_150"),
0263     PINCTRL_PIN(151, "GPIO_151"),
0264     PINCTRL_PIN(152, "GPIO_152"),
0265     PINCTRL_PIN(153, "GPIO_153"),
0266     PINCTRL_PIN(154, "GPIO_154"),
0267     PINCTRL_PIN(155, "GPIO_155"),
0268     PINCTRL_PIN(156, "GPIO_156"),
0269     PINCTRL_PIN(157, "GPIO_157"),
0270     PINCTRL_PIN(158, "GPIO_158"),
0271     PINCTRL_PIN(159, "GPIO_159"),
0272     PINCTRL_PIN(160, "GPIO_160"),
0273     PINCTRL_PIN(161, "GPIO_161"),
0274     PINCTRL_PIN(162, "GPIO_162"),
0275     PINCTRL_PIN(163, "GPIO_163"),
0276     PINCTRL_PIN(164, "GPIO_164"),
0277     PINCTRL_PIN(165, "GPIO_165"),
0278     PINCTRL_PIN(166, "GPIO_166"),
0279     PINCTRL_PIN(167, "GPIO_167"),
0280     PINCTRL_PIN(168, "GPIO_168"),
0281     PINCTRL_PIN(169, "GPIO_169"),
0282     PINCTRL_PIN(170, "GPIO_170"),
0283     PINCTRL_PIN(171, "GPIO_171"),
0284     PINCTRL_PIN(172, "GPIO_172"),
0285     PINCTRL_PIN(173, "GPIO_173"),
0286     PINCTRL_PIN(174, "GPIO_174"),
0287     PINCTRL_PIN(175, "UFS_RESET"),
0288     PINCTRL_PIN(176, "SDC1_RCLK"),
0289     PINCTRL_PIN(177, "SDC1_CLK"),
0290     PINCTRL_PIN(178, "SDC1_CMD"),
0291     PINCTRL_PIN(179, "SDC1_DATA"),
0292     PINCTRL_PIN(180, "SDC2_CLK"),
0293     PINCTRL_PIN(181, "SDC2_CMD"),
0294     PINCTRL_PIN(182, "SDC2_DATA"),
0295 };
0296 
0297 #define DECLARE_MSM_GPIO_PINS(pin) \
0298     static const unsigned int gpio##pin##_pins[] = { pin }
0299 DECLARE_MSM_GPIO_PINS(0);
0300 DECLARE_MSM_GPIO_PINS(1);
0301 DECLARE_MSM_GPIO_PINS(2);
0302 DECLARE_MSM_GPIO_PINS(3);
0303 DECLARE_MSM_GPIO_PINS(4);
0304 DECLARE_MSM_GPIO_PINS(5);
0305 DECLARE_MSM_GPIO_PINS(6);
0306 DECLARE_MSM_GPIO_PINS(7);
0307 DECLARE_MSM_GPIO_PINS(8);
0308 DECLARE_MSM_GPIO_PINS(9);
0309 DECLARE_MSM_GPIO_PINS(10);
0310 DECLARE_MSM_GPIO_PINS(11);
0311 DECLARE_MSM_GPIO_PINS(12);
0312 DECLARE_MSM_GPIO_PINS(13);
0313 DECLARE_MSM_GPIO_PINS(14);
0314 DECLARE_MSM_GPIO_PINS(15);
0315 DECLARE_MSM_GPIO_PINS(16);
0316 DECLARE_MSM_GPIO_PINS(17);
0317 DECLARE_MSM_GPIO_PINS(18);
0318 DECLARE_MSM_GPIO_PINS(19);
0319 DECLARE_MSM_GPIO_PINS(20);
0320 DECLARE_MSM_GPIO_PINS(21);
0321 DECLARE_MSM_GPIO_PINS(22);
0322 DECLARE_MSM_GPIO_PINS(23);
0323 DECLARE_MSM_GPIO_PINS(24);
0324 DECLARE_MSM_GPIO_PINS(25);
0325 DECLARE_MSM_GPIO_PINS(26);
0326 DECLARE_MSM_GPIO_PINS(27);
0327 DECLARE_MSM_GPIO_PINS(28);
0328 DECLARE_MSM_GPIO_PINS(29);
0329 DECLARE_MSM_GPIO_PINS(30);
0330 DECLARE_MSM_GPIO_PINS(31);
0331 DECLARE_MSM_GPIO_PINS(32);
0332 DECLARE_MSM_GPIO_PINS(33);
0333 DECLARE_MSM_GPIO_PINS(34);
0334 DECLARE_MSM_GPIO_PINS(35);
0335 DECLARE_MSM_GPIO_PINS(36);
0336 DECLARE_MSM_GPIO_PINS(37);
0337 DECLARE_MSM_GPIO_PINS(38);
0338 DECLARE_MSM_GPIO_PINS(39);
0339 DECLARE_MSM_GPIO_PINS(40);
0340 DECLARE_MSM_GPIO_PINS(41);
0341 DECLARE_MSM_GPIO_PINS(42);
0342 DECLARE_MSM_GPIO_PINS(43);
0343 DECLARE_MSM_GPIO_PINS(44);
0344 DECLARE_MSM_GPIO_PINS(45);
0345 DECLARE_MSM_GPIO_PINS(46);
0346 DECLARE_MSM_GPIO_PINS(47);
0347 DECLARE_MSM_GPIO_PINS(48);
0348 DECLARE_MSM_GPIO_PINS(49);
0349 DECLARE_MSM_GPIO_PINS(50);
0350 DECLARE_MSM_GPIO_PINS(51);
0351 DECLARE_MSM_GPIO_PINS(52);
0352 DECLARE_MSM_GPIO_PINS(53);
0353 DECLARE_MSM_GPIO_PINS(54);
0354 DECLARE_MSM_GPIO_PINS(55);
0355 DECLARE_MSM_GPIO_PINS(56);
0356 DECLARE_MSM_GPIO_PINS(57);
0357 DECLARE_MSM_GPIO_PINS(58);
0358 DECLARE_MSM_GPIO_PINS(59);
0359 DECLARE_MSM_GPIO_PINS(60);
0360 DECLARE_MSM_GPIO_PINS(61);
0361 DECLARE_MSM_GPIO_PINS(62);
0362 DECLARE_MSM_GPIO_PINS(63);
0363 DECLARE_MSM_GPIO_PINS(64);
0364 DECLARE_MSM_GPIO_PINS(65);
0365 DECLARE_MSM_GPIO_PINS(66);
0366 DECLARE_MSM_GPIO_PINS(67);
0367 DECLARE_MSM_GPIO_PINS(68);
0368 DECLARE_MSM_GPIO_PINS(69);
0369 DECLARE_MSM_GPIO_PINS(70);
0370 DECLARE_MSM_GPIO_PINS(71);
0371 DECLARE_MSM_GPIO_PINS(72);
0372 DECLARE_MSM_GPIO_PINS(73);
0373 DECLARE_MSM_GPIO_PINS(74);
0374 DECLARE_MSM_GPIO_PINS(75);
0375 DECLARE_MSM_GPIO_PINS(76);
0376 DECLARE_MSM_GPIO_PINS(77);
0377 DECLARE_MSM_GPIO_PINS(78);
0378 DECLARE_MSM_GPIO_PINS(79);
0379 DECLARE_MSM_GPIO_PINS(80);
0380 DECLARE_MSM_GPIO_PINS(81);
0381 DECLARE_MSM_GPIO_PINS(82);
0382 DECLARE_MSM_GPIO_PINS(83);
0383 DECLARE_MSM_GPIO_PINS(84);
0384 DECLARE_MSM_GPIO_PINS(85);
0385 DECLARE_MSM_GPIO_PINS(86);
0386 DECLARE_MSM_GPIO_PINS(87);
0387 DECLARE_MSM_GPIO_PINS(88);
0388 DECLARE_MSM_GPIO_PINS(89);
0389 DECLARE_MSM_GPIO_PINS(90);
0390 DECLARE_MSM_GPIO_PINS(91);
0391 DECLARE_MSM_GPIO_PINS(92);
0392 DECLARE_MSM_GPIO_PINS(93);
0393 DECLARE_MSM_GPIO_PINS(94);
0394 DECLARE_MSM_GPIO_PINS(95);
0395 DECLARE_MSM_GPIO_PINS(96);
0396 DECLARE_MSM_GPIO_PINS(97);
0397 DECLARE_MSM_GPIO_PINS(98);
0398 DECLARE_MSM_GPIO_PINS(99);
0399 DECLARE_MSM_GPIO_PINS(100);
0400 DECLARE_MSM_GPIO_PINS(101);
0401 DECLARE_MSM_GPIO_PINS(102);
0402 DECLARE_MSM_GPIO_PINS(103);
0403 DECLARE_MSM_GPIO_PINS(104);
0404 DECLARE_MSM_GPIO_PINS(105);
0405 DECLARE_MSM_GPIO_PINS(106);
0406 DECLARE_MSM_GPIO_PINS(107);
0407 DECLARE_MSM_GPIO_PINS(108);
0408 DECLARE_MSM_GPIO_PINS(109);
0409 DECLARE_MSM_GPIO_PINS(110);
0410 DECLARE_MSM_GPIO_PINS(111);
0411 DECLARE_MSM_GPIO_PINS(112);
0412 DECLARE_MSM_GPIO_PINS(113);
0413 DECLARE_MSM_GPIO_PINS(114);
0414 DECLARE_MSM_GPIO_PINS(115);
0415 DECLARE_MSM_GPIO_PINS(116);
0416 DECLARE_MSM_GPIO_PINS(117);
0417 DECLARE_MSM_GPIO_PINS(118);
0418 DECLARE_MSM_GPIO_PINS(119);
0419 DECLARE_MSM_GPIO_PINS(120);
0420 DECLARE_MSM_GPIO_PINS(121);
0421 DECLARE_MSM_GPIO_PINS(122);
0422 DECLARE_MSM_GPIO_PINS(123);
0423 DECLARE_MSM_GPIO_PINS(124);
0424 DECLARE_MSM_GPIO_PINS(125);
0425 DECLARE_MSM_GPIO_PINS(126);
0426 DECLARE_MSM_GPIO_PINS(127);
0427 DECLARE_MSM_GPIO_PINS(128);
0428 DECLARE_MSM_GPIO_PINS(129);
0429 DECLARE_MSM_GPIO_PINS(130);
0430 DECLARE_MSM_GPIO_PINS(131);
0431 DECLARE_MSM_GPIO_PINS(132);
0432 DECLARE_MSM_GPIO_PINS(133);
0433 DECLARE_MSM_GPIO_PINS(134);
0434 DECLARE_MSM_GPIO_PINS(135);
0435 DECLARE_MSM_GPIO_PINS(136);
0436 DECLARE_MSM_GPIO_PINS(137);
0437 DECLARE_MSM_GPIO_PINS(138);
0438 DECLARE_MSM_GPIO_PINS(139);
0439 DECLARE_MSM_GPIO_PINS(140);
0440 DECLARE_MSM_GPIO_PINS(141);
0441 DECLARE_MSM_GPIO_PINS(142);
0442 DECLARE_MSM_GPIO_PINS(143);
0443 DECLARE_MSM_GPIO_PINS(144);
0444 DECLARE_MSM_GPIO_PINS(145);
0445 DECLARE_MSM_GPIO_PINS(146);
0446 DECLARE_MSM_GPIO_PINS(147);
0447 DECLARE_MSM_GPIO_PINS(148);
0448 DECLARE_MSM_GPIO_PINS(149);
0449 DECLARE_MSM_GPIO_PINS(150);
0450 DECLARE_MSM_GPIO_PINS(151);
0451 DECLARE_MSM_GPIO_PINS(152);
0452 DECLARE_MSM_GPIO_PINS(153);
0453 DECLARE_MSM_GPIO_PINS(154);
0454 DECLARE_MSM_GPIO_PINS(155);
0455 DECLARE_MSM_GPIO_PINS(156);
0456 DECLARE_MSM_GPIO_PINS(157);
0457 DECLARE_MSM_GPIO_PINS(158);
0458 DECLARE_MSM_GPIO_PINS(159);
0459 DECLARE_MSM_GPIO_PINS(160);
0460 DECLARE_MSM_GPIO_PINS(161);
0461 DECLARE_MSM_GPIO_PINS(162);
0462 DECLARE_MSM_GPIO_PINS(163);
0463 DECLARE_MSM_GPIO_PINS(164);
0464 DECLARE_MSM_GPIO_PINS(165);
0465 DECLARE_MSM_GPIO_PINS(166);
0466 DECLARE_MSM_GPIO_PINS(167);
0467 DECLARE_MSM_GPIO_PINS(168);
0468 DECLARE_MSM_GPIO_PINS(169);
0469 DECLARE_MSM_GPIO_PINS(170);
0470 DECLARE_MSM_GPIO_PINS(171);
0471 DECLARE_MSM_GPIO_PINS(172);
0472 DECLARE_MSM_GPIO_PINS(173);
0473 DECLARE_MSM_GPIO_PINS(174);
0474 
0475 static const unsigned int ufs_reset_pins[] = { 175 };
0476 static const unsigned int sdc1_rclk_pins[] = { 176 };
0477 static const unsigned int sdc1_clk_pins[] = { 177 };
0478 static const unsigned int sdc1_cmd_pins[] = { 178 };
0479 static const unsigned int sdc1_data_pins[] = { 179 };
0480 static const unsigned int sdc2_clk_pins[] = { 180 };
0481 static const unsigned int sdc2_cmd_pins[] = { 181 };
0482 static const unsigned int sdc2_data_pins[] = { 182 };
0483 
0484 enum sc7280_functions {
0485     msm_mux_atest_char,
0486     msm_mux_atest_char0,
0487     msm_mux_atest_char1,
0488     msm_mux_atest_char2,
0489     msm_mux_atest_char3,
0490     msm_mux_atest_usb0,
0491     msm_mux_atest_usb00,
0492     msm_mux_atest_usb01,
0493     msm_mux_atest_usb02,
0494     msm_mux_atest_usb03,
0495     msm_mux_atest_usb1,
0496     msm_mux_atest_usb10,
0497     msm_mux_atest_usb11,
0498     msm_mux_atest_usb12,
0499     msm_mux_atest_usb13,
0500     msm_mux_audio_ref,
0501     msm_mux_cam_mclk,
0502     msm_mux_cci_async,
0503     msm_mux_cci_i2c,
0504     msm_mux_cci_timer0,
0505     msm_mux_cci_timer1,
0506     msm_mux_cci_timer2,
0507     msm_mux_cci_timer3,
0508     msm_mux_cci_timer4,
0509     msm_mux_cmu_rng0,
0510     msm_mux_cmu_rng1,
0511     msm_mux_cmu_rng2,
0512     msm_mux_cmu_rng3,
0513     msm_mux_coex_uart1,
0514     msm_mux_cri_trng,
0515     msm_mux_cri_trng0,
0516     msm_mux_cri_trng1,
0517     msm_mux_dbg_out,
0518     msm_mux_ddr_bist,
0519     msm_mux_ddr_pxi0,
0520     msm_mux_ddr_pxi1,
0521     msm_mux_dp_hot,
0522     msm_mux_dp_lcd,
0523     msm_mux_edp_hot,
0524     msm_mux_edp_lcd,
0525     msm_mux_egpio,
0526     msm_mux_gcc_gp1,
0527     msm_mux_gcc_gp2,
0528     msm_mux_gcc_gp3,
0529     msm_mux_gpio,
0530     msm_mux_host2wlan_sol,
0531     msm_mux_ibi_i3c,
0532     msm_mux_jitter_bist,
0533     msm_mux_lpass_slimbus,
0534     msm_mux_mdp_vsync,
0535     msm_mux_mdp_vsync0,
0536     msm_mux_mdp_vsync1,
0537     msm_mux_mdp_vsync2,
0538     msm_mux_mdp_vsync3,
0539     msm_mux_mdp_vsync4,
0540     msm_mux_mdp_vsync5,
0541     msm_mux_mi2s0_data0,
0542     msm_mux_mi2s0_data1,
0543     msm_mux_mi2s0_sck,
0544     msm_mux_mi2s0_ws,
0545     msm_mux_mi2s1_data0,
0546     msm_mux_mi2s1_data1,
0547     msm_mux_mi2s1_sck,
0548     msm_mux_mi2s1_ws,
0549     msm_mux_mi2s2_data0,
0550     msm_mux_mi2s2_data1,
0551     msm_mux_mi2s2_sck,
0552     msm_mux_mi2s2_ws,
0553     msm_mux_mss_grfc0,
0554     msm_mux_mss_grfc1,
0555     msm_mux_mss_grfc10,
0556     msm_mux_mss_grfc11,
0557     msm_mux_mss_grfc12,
0558     msm_mux_mss_grfc2,
0559     msm_mux_mss_grfc3,
0560     msm_mux_mss_grfc4,
0561     msm_mux_mss_grfc5,
0562     msm_mux_mss_grfc6,
0563     msm_mux_mss_grfc7,
0564     msm_mux_mss_grfc8,
0565     msm_mux_mss_grfc9,
0566     msm_mux_nav_gpio0,
0567     msm_mux_nav_gpio1,
0568     msm_mux_nav_gpio2,
0569     msm_mux_pa_indicator,
0570     msm_mux_pcie0_clkreqn,
0571     msm_mux_pcie1_clkreqn,
0572     msm_mux_phase_flag,
0573     msm_mux_pll_bist,
0574     msm_mux_pll_bypassnl,
0575     msm_mux_pll_clk,
0576     msm_mux_pll_reset,
0577     msm_mux_pri_mi2s,
0578     msm_mux_prng_rosc,
0579     msm_mux_qdss,
0580     msm_mux_qdss_cti,
0581     msm_mux_qlink0_enable,
0582     msm_mux_qlink0_request,
0583     msm_mux_qlink0_wmss,
0584     msm_mux_qlink1_enable,
0585     msm_mux_qlink1_request,
0586     msm_mux_qlink1_wmss,
0587     msm_mux_qspi_clk,
0588     msm_mux_qspi_cs,
0589     msm_mux_qspi_data,
0590     msm_mux_qup00,
0591     msm_mux_qup01,
0592     msm_mux_qup02,
0593     msm_mux_qup03,
0594     msm_mux_qup04,
0595     msm_mux_qup05,
0596     msm_mux_qup06,
0597     msm_mux_qup07,
0598     msm_mux_qup10,
0599     msm_mux_qup11,
0600     msm_mux_qup12,
0601     msm_mux_qup13,
0602     msm_mux_qup14,
0603     msm_mux_qup15,
0604     msm_mux_qup16,
0605     msm_mux_qup17,
0606     msm_mux_sd_write,
0607     msm_mux_sdc40,
0608     msm_mux_sdc41,
0609     msm_mux_sdc42,
0610     msm_mux_sdc43,
0611     msm_mux_sdc4_clk,
0612     msm_mux_sdc4_cmd,
0613     msm_mux_sec_mi2s,
0614     msm_mux_tb_trig,
0615     msm_mux_tgu_ch0,
0616     msm_mux_tgu_ch1,
0617     msm_mux_tsense_pwm1,
0618     msm_mux_tsense_pwm2,
0619     msm_mux_uim0_clk,
0620     msm_mux_uim0_data,
0621     msm_mux_uim0_present,
0622     msm_mux_uim0_reset,
0623     msm_mux_uim1_clk,
0624     msm_mux_uim1_data,
0625     msm_mux_uim1_present,
0626     msm_mux_uim1_reset,
0627     msm_mux_usb2phy_ac,
0628     msm_mux_usb_phy,
0629     msm_mux_vfr_0,
0630     msm_mux_vfr_1,
0631     msm_mux_vsense_trigger,
0632     msm_mux__,
0633 };
0634 
0635 static const char * const gpio_groups[] = {
0636     "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
0637     "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
0638     "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
0639     "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
0640     "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
0641     "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
0642     "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
0643     "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
0644     "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
0645     "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
0646     "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
0647     "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
0648     "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
0649     "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
0650     "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
0651     "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
0652     "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
0653     "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122",
0654     "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", "gpio128",
0655     "gpio129", "gpio130", "gpio131", "gpio132", "gpio133", "gpio134",
0656     "gpio135", "gpio136", "gpio137", "gpio138", "gpio139", "gpio140",
0657     "gpio141", "gpio142", "gpio143", "gpio144", "gpio145", "gpio146",
0658     "gpio147", "gpio148", "gpio149", "gpio150", "gpio151", "gpio152",
0659     "gpio153", "gpio154", "gpio155", "gpio156", "gpio157", "gpio158",
0660     "gpio159", "gpio160", "gpio161", "gpio162", "gpio163", "gpio164",
0661     "gpio165", "gpio166", "gpio167", "gpio168", "gpio169", "gpio170",
0662     "gpio171", "gpio172", "gpio173", "gpio174",
0663 };
0664 static const char * const egpio_groups[] = {
0665     "gpio144", "gpio145", "gpio146", "gpio147", "gpio148", "gpio149",
0666     "gpio150", "gpio151", "gpio152", "gpio153", "gpio154", "gpio155",
0667     "gpio156", "gpio157", "gpio158", "gpio159", "gpio160", "gpio161",
0668     "gpio162", "gpio163", "gpio164", "gpio165", "gpio166", "gpio167",
0669     "gpio168", "gpio169", "gpio170", "gpio171", "gpio172", "gpio173",
0670     "gpio174",
0671 };
0672 static const char * const atest_char_groups[] = {
0673     "gpio81",
0674 };
0675 static const char * const atest_char0_groups[] = {
0676     "gpio77",
0677 };
0678 static const char * const atest_char1_groups[] = {
0679     "gpio78",
0680 };
0681 static const char * const atest_char2_groups[] = {
0682     "gpio79",
0683 };
0684 static const char * const atest_char3_groups[] = {
0685     "gpio80",
0686 };
0687 static const char * const atest_usb0_groups[] = {
0688     "gpio107",
0689 };
0690 static const char * const atest_usb00_groups[] = {
0691     "gpio106",
0692 };
0693 static const char * const atest_usb01_groups[] = {
0694     "gpio105",
0695 };
0696 static const char * const atest_usb02_groups[] = {
0697     "gpio104",
0698 };
0699 static const char * const atest_usb03_groups[] = {
0700     "gpio103",
0701 };
0702 static const char * const atest_usb1_groups[] = {
0703     "gpio81",
0704 };
0705 static const char * const atest_usb10_groups[] = {
0706     "gpio80",
0707 };
0708 static const char * const atest_usb11_groups[] = {
0709     "gpio79",
0710 };
0711 static const char * const atest_usb12_groups[] = {
0712     "gpio78",
0713 };
0714 static const char * const atest_usb13_groups[] = {
0715     "gpio77",
0716 };
0717 static const char * const audio_ref_groups[] = {
0718     "gpio105",
0719 };
0720 static const char * const cam_mclk_groups[] = {
0721     "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio93",
0722 };
0723 static const char * const cci_async_groups[] = {
0724     "gpio78", "gpio79", "gpio93",
0725 };
0726 static const char * const cci_i2c_groups[] = {
0727     "gpio69", "gpio70", "gpio71", "gpio72", "gpio73", "gpio74", "gpio75",
0728     "gpio76",
0729 };
0730 static const char * const cci_timer0_groups[] = {
0731     "gpio20",
0732 };
0733 static const char * const cci_timer1_groups[] = {
0734     "gpio21",
0735 };
0736 static const char * const cci_timer2_groups[] = {
0737     "gpio77",
0738 };
0739 static const char * const cci_timer3_groups[] = {
0740     "gpio78",
0741 };
0742 static const char * const cci_timer4_groups[] = {
0743     "gpio79",
0744 };
0745 static const char * const cmu_rng0_groups[] = {
0746     "gpio120",
0747 };
0748 static const char * const cmu_rng1_groups[] = {
0749     "gpio119",
0750 };
0751 static const char * const cmu_rng2_groups[] = {
0752     "gpio118",
0753 };
0754 static const char * const cmu_rng3_groups[] = {
0755     "gpio117",
0756 };
0757 static const char * const coex_uart1_groups[] = {
0758     "gpio127", "gpio128",
0759 };
0760 static const char * const cri_trng_groups[] = {
0761     "gpio124",
0762 };
0763 static const char * const cri_trng0_groups[] = {
0764     "gpio121",
0765 };
0766 static const char * const cri_trng1_groups[] = {
0767     "gpio122",
0768 };
0769 static const char * const dbg_out_groups[] = {
0770     "gpio38",
0771 };
0772 static const char * const ddr_bist_groups[] = {
0773     "gpio56", "gpio57", "gpio58", "gpio59",
0774 };
0775 static const char * const ddr_pxi0_groups[] = {
0776     "gpio14", "gpio15",
0777 };
0778 static const char * const ddr_pxi1_groups[] = {
0779     "gpio12", "gpio13",
0780 };
0781 static const char * const dp_hot_groups[] = {
0782     "gpio47",
0783 };
0784 static const char * const dp_lcd_groups[] = {
0785     "gpio81",
0786 };
0787 static const char * const edp_hot_groups[] = {
0788     "gpio60",
0789 };
0790 static const char * const edp_lcd_groups[] = {
0791     "gpio46",
0792 };
0793 static const char * const gcc_gp1_groups[] = {
0794     "gpio76", "gpio105",
0795 };
0796 static const char * const gcc_gp2_groups[] = {
0797     "gpio77", "gpio106",
0798 };
0799 static const char * const gcc_gp3_groups[] = {
0800     "gpio78", "gpio107",
0801 };
0802 static const char * const host2wlan_sol_groups[] = {
0803     "gpio26",
0804 };
0805 static const char * const ibi_i3c_groups[] = {
0806     "gpio0", "gpio1", "gpio4", "gpio5", "gpio36", "gpio37",
0807 };
0808 static const char * const jitter_bist_groups[] = {
0809     "gpio79",
0810 };
0811 static const char * const lpass_slimbus_groups[] = {
0812     "gpio94", "gpio95",
0813 };
0814 static const char * const mdp_vsync_groups[] = {
0815     "gpio14", "gpio16", "gpio79", "gpio80", "gpio81",
0816 };
0817 static const char * const mdp_vsync0_groups[] = {
0818     "gpio80",
0819 };
0820 static const char * const mdp_vsync1_groups[] = {
0821     "gpio80",
0822 };
0823 static const char * const mdp_vsync2_groups[] = {
0824     "gpio81",
0825 };
0826 static const char * const mdp_vsync3_groups[] = {
0827     "gpio81",
0828 };
0829 static const char * const mdp_vsync4_groups[] = {
0830     "gpio80",
0831 };
0832 static const char * const mdp_vsync5_groups[] = {
0833     "gpio81",
0834 };
0835 static const char * const mi2s0_data0_groups[] = {
0836     "gpio98",
0837 };
0838 static const char * const mi2s0_data1_groups[] = {
0839     "gpio99",
0840 };
0841 static const char * const mi2s0_sck_groups[] = {
0842     "gpio97",
0843 };
0844 static const char * const mi2s0_ws_groups[] = {
0845     "gpio100",
0846 };
0847 static const char * const mi2s1_data0_groups[] = {
0848     "gpio107",
0849 };
0850 static const char * const mi2s1_data1_groups[] = {
0851     "gpio105",
0852 };
0853 static const char * const mi2s1_sck_groups[] = {
0854     "gpio106",
0855 };
0856 static const char * const mi2s1_ws_groups[] = {
0857     "gpio108",
0858 };
0859 static const char * const mi2s2_data0_groups[] = {
0860     "gpio102",
0861 };
0862 static const char * const mi2s2_data1_groups[] = {
0863     "gpio104",
0864 };
0865 static const char * const mi2s2_sck_groups[] = {
0866     "gpio101",
0867 };
0868 static const char * const mi2s2_ws_groups[] = {
0869     "gpio103",
0870 };
0871 static const char * const mss_grfc0_groups[] = {
0872     "gpio117", "gpio132",
0873 };
0874 static const char * const mss_grfc1_groups[] = {
0875     "gpio118",
0876 };
0877 static const char * const mss_grfc10_groups[] = {
0878     "gpio127",
0879 };
0880 static const char * const mss_grfc11_groups[] = {
0881     "gpio128",
0882 };
0883 static const char * const mss_grfc12_groups[] = {
0884     "gpio131",
0885 };
0886 static const char * const mss_grfc2_groups[] = {
0887     "gpio119",
0888 };
0889 static const char * const mss_grfc3_groups[] = {
0890     "gpio120",
0891 };
0892 static const char * const mss_grfc4_groups[] = {
0893     "gpio121",
0894 };
0895 static const char * const mss_grfc5_groups[] = {
0896     "gpio122",
0897 };
0898 static const char * const mss_grfc6_groups[] = {
0899     "gpio123",
0900 };
0901 static const char * const mss_grfc7_groups[] = {
0902     "gpio124",
0903 };
0904 static const char * const mss_grfc8_groups[] = {
0905     "gpio125",
0906 };
0907 static const char * const mss_grfc9_groups[] = {
0908     "gpio126",
0909 };
0910 static const char * const nav_gpio0_groups[] = {
0911     "gpio129",
0912 };
0913 static const char * const nav_gpio1_groups[] = {
0914     "gpio130",
0915 };
0916 static const char * const nav_gpio2_groups[] = {
0917     "gpio131",
0918 };
0919 static const char * const pa_indicator_groups[] = {
0920     "gpio131",
0921 };
0922 static const char * const pcie0_clkreqn_groups[] = {
0923     "gpio88",
0924 };
0925 static const char * const pcie1_clkreqn_groups[] = {
0926     "gpio79",
0927 };
0928 static const char * const phase_flag_groups[] = {
0929     "gpio12", "gpio13", "gpio14", "gpio15", "gpio16",
0930     "gpio17", "gpio18", "gpio19", "gpio56", "gpio57",
0931     "gpio58", "gpio59", "gpio60", "gpio61", "gpio62",
0932     "gpio63", "gpio117", "gpio118", "gpio119", "gpio120",
0933     "gpio121", "gpio122", "gpio123", "gpio124", "gpio125",
0934     "gpio126", "gpio127", "gpio128", "gpio129", "gpio130",
0935     "gpio131", "gpio132",
0936 };
0937 static const char * const pll_bist_groups[] = {
0938     "gpio80",
0939 };
0940 static const char * const pll_bypassnl_groups[] = {
0941     "gpio66",
0942 };
0943 static const char * const pll_clk_groups[] = {
0944     "gpio140",
0945 };
0946 static const char * const pll_reset_groups[] = {
0947     "gpio67",
0948 };
0949 static const char * const pri_mi2s_groups[] = {
0950     "gpio96",
0951 };
0952 static const char * const prng_rosc_groups[] = {
0953     "gpio123",
0954 };
0955 static const char * const qdss_groups[] = {
0956     "gpio2", "gpio3", "gpio8", "gpio9", "gpio10",
0957     "gpio11", "gpio12", "gpio13", "gpio20", "gpio21",
0958     "gpio22", "gpio23", "gpio24", "gpio25", "gpio26",
0959     "gpio27", "gpio28", "gpio29", "gpio58", "gpio59",
0960     "gpio101", "gpio102", "gpio103", "gpio104", "gpio105",
0961     "gpio106", "gpio107", "gpio108", "gpio150", "gpio151",
0962     "gpio152", "gpio153", "gpio171", "gpio172", "gpio173",
0963     "gpio174",
0964 };
0965 static const char * const qdss_cti_groups[] = {
0966     "gpio15", "gpio16", "gpio18", "gpio19", "gpio156", "gpio157",
0967     "gpio165", "gpio166",
0968 };
0969 static const char * const qlink0_enable_groups[] = {
0970     "gpio134",
0971 };
0972 static const char * const qlink0_request_groups[] = {
0973     "gpio133",
0974 };
0975 static const char * const qlink0_wmss_groups[] = {
0976     "gpio135",
0977 };
0978 static const char * const qlink1_enable_groups[] = {
0979     "gpio137",
0980 };
0981 static const char * const qlink1_request_groups[] = {
0982     "gpio136",
0983 };
0984 static const char * const qlink1_wmss_groups[] = {
0985     "gpio138",
0986 };
0987 static const char * const qspi_clk_groups[] = {
0988     "gpio14",
0989 };
0990 static const char * const qspi_cs_groups[] = {
0991     "gpio15", "gpio19",
0992 };
0993 static const char * const qspi_data_groups[] = {
0994     "gpio12", "gpio13", "gpio16", "gpio17",
0995 };
0996 static const char * const qup00_groups[] = {
0997     "gpio0", "gpio1", "gpio2", "gpio3",
0998 };
0999 static const char * const qup01_groups[] = {
1000     "gpio4", "gpio5", "gpio6", "gpio7",
1001 };
1002 static const char * const qup02_groups[] = {
1003     "gpio8", "gpio9", "gpio10", "gpio11",
1004 };
1005 static const char * const qup03_groups[] = {
1006     "gpio12", "gpio13", "gpio14", "gpio15",
1007 };
1008 static const char * const qup04_groups[] = {
1009     "gpio16", "gpio17", "gpio18", "gpio19",
1010 };
1011 static const char * const qup05_groups[] = {
1012     "gpio20", "gpio21", "gpio22", "gpio23",
1013 };
1014 static const char * const qup06_groups[] = {
1015     "gpio24", "gpio25", "gpio26", "gpio27",
1016 };
1017 static const char * const qup07_groups[] = {
1018     "gpio2", "gpio3", "gpio6", "gpio28", "gpio29", "gpio30", "gpio31",
1019 };
1020 static const char * const qup10_groups[] = {
1021     "gpio32", "gpio33", "gpio34", "gpio35",
1022 };
1023 static const char * const qup11_groups[] = {
1024     "gpio36", "gpio37", "gpio38", "gpio39",
1025 };
1026 static const char * const qup12_groups[] = {
1027     "gpio40", "gpio41", "gpio42", "gpio43",
1028 };
1029 static const char * const qup13_groups[] = {
1030     "gpio44", "gpio45", "gpio46", "gpio47",
1031 };
1032 static const char * const qup14_groups[] = {
1033     "gpio38", "gpio48", "gpio49", "gpio50", "gpio51", "gpio54", "gpio55",
1034 };
1035 static const char * const qup15_groups[] = {
1036     "gpio52", "gpio53", "gpio54", "gpio55",
1037 };
1038 static const char * const qup16_groups[] = {
1039     "gpio50", "gpio56", "gpio57", "gpio58", "gpio59", "gpio62", "gpio63",
1040 };
1041 static const char * const qup17_groups[] = {
1042     "gpio60", "gpio61", "gpio62", "gpio63",
1043 };
1044 static const char * const sd_write_groups[] = {
1045     "gpio61",
1046 };
1047 static const char * const sdc40_groups[] = {
1048     "gpio12",
1049 };
1050 static const char * const sdc41_groups[] = {
1051     "gpio13",
1052 };
1053 static const char * const sdc42_groups[] = {
1054     "gpio16",
1055 };
1056 static const char * const sdc43_groups[] = {
1057     "gpio17",
1058 };
1059 static const char * const sdc4_clk_groups[] = {
1060     "gpio14",
1061 };
1062 static const char * const sdc4_cmd_groups[] = {
1063     "gpio19",
1064 };
1065 static const char * const sec_mi2s_groups[] = {
1066     "gpio105",
1067 };
1068 static const char * const tb_trig_groups[] = {
1069     "gpio12", "gpio13", "gpio15",
1070 };
1071 static const char * const tgu_ch0_groups[] = {
1072     "gpio65",
1073 };
1074 static const char * const tgu_ch1_groups[] = {
1075     "gpio66",
1076 };
1077 static const char * const tsense_pwm1_groups[] = {
1078     "gpio61",
1079 };
1080 static const char * const tsense_pwm2_groups[] = {
1081     "gpio61",
1082 };
1083 static const char * const uim0_clk_groups[] = {
1084     "gpio114",
1085 };
1086 static const char * const uim0_data_groups[] = {
1087     "gpio113",
1088 };
1089 static const char * const uim0_present_groups[] = {
1090     "gpio116",
1091 };
1092 static const char * const uim0_reset_groups[] = {
1093     "gpio115",
1094 };
1095 static const char * const uim1_clk_groups[] = {
1096     "gpio110",
1097 };
1098 static const char * const uim1_data_groups[] = {
1099     "gpio109",
1100 };
1101 static const char * const uim1_present_groups[] = {
1102     "gpio112",
1103 };
1104 static const char * const uim1_reset_groups[] = {
1105     "gpio111",
1106 };
1107 static const char * const usb2phy_ac_groups[] = {
1108     "gpio84", "gpio85",
1109 };
1110 static const char * const usb_phy_groups[] = {
1111     "gpio140",
1112 };
1113 static const char * const vfr_0_groups[] = {
1114     "gpio80",
1115 };
1116 static const char * const vfr_1_groups[] = {
1117     "gpio103",
1118 };
1119 static const char * const vsense_trigger_groups[] = {
1120     "gpio100",
1121 };
1122 
1123 static const struct msm_function sc7280_functions[] = {
1124     FUNCTION(atest_char),
1125     FUNCTION(atest_char0),
1126     FUNCTION(atest_char1),
1127     FUNCTION(atest_char2),
1128     FUNCTION(atest_char3),
1129     FUNCTION(atest_usb0),
1130     FUNCTION(atest_usb00),
1131     FUNCTION(atest_usb01),
1132     FUNCTION(atest_usb02),
1133     FUNCTION(atest_usb03),
1134     FUNCTION(atest_usb1),
1135     FUNCTION(atest_usb10),
1136     FUNCTION(atest_usb11),
1137     FUNCTION(atest_usb12),
1138     FUNCTION(atest_usb13),
1139     FUNCTION(audio_ref),
1140     FUNCTION(cam_mclk),
1141     FUNCTION(cci_async),
1142     FUNCTION(cci_i2c),
1143     FUNCTION(cci_timer0),
1144     FUNCTION(cci_timer1),
1145     FUNCTION(cci_timer2),
1146     FUNCTION(cci_timer3),
1147     FUNCTION(cci_timer4),
1148     FUNCTION(cmu_rng0),
1149     FUNCTION(cmu_rng1),
1150     FUNCTION(cmu_rng2),
1151     FUNCTION(cmu_rng3),
1152     FUNCTION(coex_uart1),
1153     FUNCTION(cri_trng),
1154     FUNCTION(cri_trng0),
1155     FUNCTION(cri_trng1),
1156     FUNCTION(dbg_out),
1157     FUNCTION(ddr_bist),
1158     FUNCTION(ddr_pxi0),
1159     FUNCTION(ddr_pxi1),
1160     FUNCTION(dp_hot),
1161     FUNCTION(dp_lcd),
1162     FUNCTION(edp_hot),
1163     FUNCTION(edp_lcd),
1164     FUNCTION(egpio),
1165     FUNCTION(gcc_gp1),
1166     FUNCTION(gcc_gp2),
1167     FUNCTION(gcc_gp3),
1168     FUNCTION(gpio),
1169     FUNCTION(host2wlan_sol),
1170     FUNCTION(ibi_i3c),
1171     FUNCTION(jitter_bist),
1172     FUNCTION(lpass_slimbus),
1173     FUNCTION(mdp_vsync),
1174     FUNCTION(mdp_vsync0),
1175     FUNCTION(mdp_vsync1),
1176     FUNCTION(mdp_vsync2),
1177     FUNCTION(mdp_vsync3),
1178     FUNCTION(mdp_vsync4),
1179     FUNCTION(mdp_vsync5),
1180     FUNCTION(mi2s0_data0),
1181     FUNCTION(mi2s0_data1),
1182     FUNCTION(mi2s0_sck),
1183     FUNCTION(mi2s0_ws),
1184     FUNCTION(mi2s1_data0),
1185     FUNCTION(mi2s1_data1),
1186     FUNCTION(mi2s1_sck),
1187     FUNCTION(mi2s1_ws),
1188     FUNCTION(mi2s2_data0),
1189     FUNCTION(mi2s2_data1),
1190     FUNCTION(mi2s2_sck),
1191     FUNCTION(mi2s2_ws),
1192     FUNCTION(mss_grfc0),
1193     FUNCTION(mss_grfc1),
1194     FUNCTION(mss_grfc10),
1195     FUNCTION(mss_grfc11),
1196     FUNCTION(mss_grfc12),
1197     FUNCTION(mss_grfc2),
1198     FUNCTION(mss_grfc3),
1199     FUNCTION(mss_grfc4),
1200     FUNCTION(mss_grfc5),
1201     FUNCTION(mss_grfc6),
1202     FUNCTION(mss_grfc7),
1203     FUNCTION(mss_grfc8),
1204     FUNCTION(mss_grfc9),
1205     FUNCTION(nav_gpio0),
1206     FUNCTION(nav_gpio1),
1207     FUNCTION(nav_gpio2),
1208     FUNCTION(pa_indicator),
1209     FUNCTION(pcie0_clkreqn),
1210     FUNCTION(pcie1_clkreqn),
1211     FUNCTION(phase_flag),
1212     FUNCTION(pll_bist),
1213     FUNCTION(pll_bypassnl),
1214     FUNCTION(pll_clk),
1215     FUNCTION(pll_reset),
1216     FUNCTION(pri_mi2s),
1217     FUNCTION(prng_rosc),
1218     FUNCTION(qdss),
1219     FUNCTION(qdss_cti),
1220     FUNCTION(qlink0_enable),
1221     FUNCTION(qlink0_request),
1222     FUNCTION(qlink0_wmss),
1223     FUNCTION(qlink1_enable),
1224     FUNCTION(qlink1_request),
1225     FUNCTION(qlink1_wmss),
1226     FUNCTION(qspi_clk),
1227     FUNCTION(qspi_cs),
1228     FUNCTION(qspi_data),
1229     FUNCTION(qup00),
1230     FUNCTION(qup01),
1231     FUNCTION(qup02),
1232     FUNCTION(qup03),
1233     FUNCTION(qup04),
1234     FUNCTION(qup05),
1235     FUNCTION(qup06),
1236     FUNCTION(qup07),
1237     FUNCTION(qup10),
1238     FUNCTION(qup11),
1239     FUNCTION(qup12),
1240     FUNCTION(qup13),
1241     FUNCTION(qup14),
1242     FUNCTION(qup15),
1243     FUNCTION(qup16),
1244     FUNCTION(qup17),
1245     FUNCTION(sdc40),
1246     FUNCTION(sdc41),
1247     FUNCTION(sdc42),
1248     FUNCTION(sdc43),
1249     FUNCTION(sdc4_clk),
1250     FUNCTION(sdc4_cmd),
1251     FUNCTION(sd_write),
1252     FUNCTION(sec_mi2s),
1253     FUNCTION(tb_trig),
1254     FUNCTION(tgu_ch0),
1255     FUNCTION(tgu_ch1),
1256     FUNCTION(tsense_pwm1),
1257     FUNCTION(tsense_pwm2),
1258     FUNCTION(uim0_clk),
1259     FUNCTION(uim0_data),
1260     FUNCTION(uim0_present),
1261     FUNCTION(uim0_reset),
1262     FUNCTION(uim1_clk),
1263     FUNCTION(uim1_data),
1264     FUNCTION(uim1_present),
1265     FUNCTION(uim1_reset),
1266     FUNCTION(usb2phy_ac),
1267     FUNCTION(usb_phy),
1268     FUNCTION(vfr_0),
1269     FUNCTION(vfr_1),
1270     FUNCTION(vsense_trigger),
1271 };
1272 
1273 /* Every pin is maintained as a single group, and missing or non-existing pin
1274  * would be maintained as dummy group to synchronize pin group index with
1275  * pin descriptor registered with pinctrl core.
1276  * Clients would not be able to request these dummy pin groups.
1277  */
1278 static const struct msm_pingroup sc7280_groups[] = {
1279     [0] = PINGROUP(0, qup00, ibi_i3c, _, _, _, _, _, _, _),
1280     [1] = PINGROUP(1, qup00, ibi_i3c, _, _, _, _, _, _, _),
1281     [2] = PINGROUP(2, qup00, qup07, _, qdss, _, _, _, _, _),
1282     [3] = PINGROUP(3, qup00, qup07, _, qdss, _, _, _, _, _),
1283     [4] = PINGROUP(4, qup01, ibi_i3c, _, _, _, _, _, _, _),
1284     [5] = PINGROUP(5, qup01, ibi_i3c, _, _, _, _, _, _, _),
1285     [6] = PINGROUP(6, qup01, qup07, _, _, _, _, _, _, _),
1286     [7] = PINGROUP(7, qup01, _, _, _, _, _, _, _, _),
1287     [8] = PINGROUP(8, qup02, _, qdss, _, _, _, _, _, _),
1288     [9] = PINGROUP(9, qup02, _, qdss, _, _, _, _, _, _),
1289     [10] = PINGROUP(10, qup02, _, qdss, _, _, _, _, _, _),
1290     [11] = PINGROUP(11, qup02, _, qdss, _, _, _, _, _, _),
1291     [12] = PINGROUP(12, qup03, qspi_data, sdc40, tb_trig, phase_flag, qdss, ddr_pxi1, _, _),
1292     [13] = PINGROUP(13, qup03, qspi_data, sdc41, tb_trig, phase_flag, qdss, ddr_pxi1, _, _),
1293     [14] = PINGROUP(14, qup03, qspi_clk, sdc4_clk, mdp_vsync, phase_flag, ddr_pxi0, _, _, _),
1294     [15] = PINGROUP(15, qup03, qspi_cs, tb_trig, phase_flag, qdss_cti, ddr_pxi0, _, _, _),
1295     [16] = PINGROUP(16, qup04, qspi_data, sdc42, mdp_vsync, phase_flag, qdss_cti, _, _, _),
1296     [17] = PINGROUP(17, qup04, qspi_data, sdc43, _, phase_flag, _, _, _, _),
1297     [18] = PINGROUP(18, qup04, _, phase_flag, qdss_cti, _, _, _, _, _),
1298     [19] = PINGROUP(19, qup04, qspi_cs, sdc4_cmd, _, phase_flag, qdss_cti, _, _, _),
1299     [20] = PINGROUP(20, qup05, cci_timer0, _, qdss, _, _, _, _, _),
1300     [21] = PINGROUP(21, qup05, cci_timer1, _, qdss, _, _, _, _, _),
1301     [22] = PINGROUP(22, qup05, _, qdss, _, _, _, _, _, _),
1302     [23] = PINGROUP(23, qup05, _, qdss, _, _, _, _, _, _),
1303     [24] = PINGROUP(24, qup06, _, qdss, _, _, _, _, _, _),
1304     [25] = PINGROUP(25, qup06, _, qdss, _, _, _, _, _, _),
1305     [26] = PINGROUP(26, qup06, host2wlan_sol, _, qdss, _, _, _, _, _),
1306     [27] = PINGROUP(27, qup06, _, qdss, _, _, _, _, _, _),
1307     [28] = PINGROUP(28, qup07, _, qdss, _, _, _, _, _, _),
1308     [29] = PINGROUP(29, qup07, qdss, _, _, _, _, _, _, _),
1309     [30] = PINGROUP(30, qup07, _, _, _, _, _, _, _, _),
1310     [31] = PINGROUP(31, qup07, _, _, _, _, _, _, _, _),
1311     [32] = PINGROUP(32, qup10, _, _, _, _, _, _, _, _),
1312     [33] = PINGROUP(33, qup10, _, _, _, _, _, _, _, _),
1313     [34] = PINGROUP(34, qup10, _, _, _, _, _, _, _, _),
1314     [35] = PINGROUP(35, qup10, _, _, _, _, _, _, _, _),
1315     [36] = PINGROUP(36, qup11, ibi_i3c, _, _, _, _, _, _, _),
1316     [37] = PINGROUP(37, qup11, ibi_i3c, _, _, _, _, _, _, _),
1317     [38] = PINGROUP(38, qup11, qup14, dbg_out, _, _, _, _, _, _),
1318     [39] = PINGROUP(39, qup11, _, _, _, _, _, _, _, _),
1319     [40] = PINGROUP(40, qup12, _, _, _, _, _, _, _, _),
1320     [41] = PINGROUP(41, qup12, _, _, _, _, _, _, _, _),
1321     [42] = PINGROUP(42, qup12, _, _, _, _, _, _, _, _),
1322     [43] = PINGROUP(43, qup12, _, _, _, _, _, _, _, _),
1323     [44] = PINGROUP(44, qup13, _, _, _, _, _, _, _, _),
1324     [45] = PINGROUP(45, qup13, _, _, _, _, _, _, _, _),
1325     [46] = PINGROUP(46, qup13, edp_lcd, _, _, _, _, _, _, _),
1326     [47] = PINGROUP(47, qup13, dp_hot, _, _, _, _, _, _, _),
1327     [48] = PINGROUP(48, qup14, _, _, _, _, _, _, _, _),
1328     [49] = PINGROUP(49, qup14, _, _, _, _, _, _, _, _),
1329     [50] = PINGROUP(50, qup14, qup16, _, _, _, _, _, _, _),
1330     [51] = PINGROUP(51, qup14, _, _, _, _, _, _, _, _),
1331     [52] = PINGROUP(52, qup15, _, _, _, _, _, _, _, _),
1332     [53] = PINGROUP(53, qup15, _, _, _, _, _, _, _, _),
1333     [54] = PINGROUP(54, qup15, qup14, _, _, _, _, _, _, _),
1334     [55] = PINGROUP(55, qup15, qup14, _, _, _, _, _, _, _),
1335     [56] = PINGROUP(56, qup16, ddr_bist, phase_flag, _, _, _, _, _, _),
1336     [57] = PINGROUP(57, qup16, ddr_bist, phase_flag, _, _, _, _, _, _),
1337     [58] = PINGROUP(58, qup16, ddr_bist, phase_flag, qdss, _, _, _, _, _),
1338     [59] = PINGROUP(59, qup16, ddr_bist, phase_flag, qdss, _, _, _, _, _),
1339     [60] = PINGROUP(60, qup17, edp_hot, _, phase_flag, _, _, _, _, _),
1340     [61] = PINGROUP(61, qup17, sd_write, phase_flag, tsense_pwm1, tsense_pwm2, _, _, _, _),
1341     [62] = PINGROUP(62, qup17, qup16, phase_flag, _, _, _, _, _, _),
1342     [63] = PINGROUP(63, qup17, qup16, phase_flag, _, _, _, _, _, _),
1343     [64] = PINGROUP(64, cam_mclk, _, _, _, _, _, _, _, _),
1344     [65] = PINGROUP(65, cam_mclk, tgu_ch0, _, _, _, _, _, _, _),
1345     [66] = PINGROUP(66, cam_mclk, pll_bypassnl, tgu_ch1, _, _, _, _, _, _),
1346     [67] = PINGROUP(67, cam_mclk, pll_reset, _, _, _, _, _, _, _),
1347     [68] = PINGROUP(68, cam_mclk, _, _, _, _, _, _, _, _),
1348     [69] = PINGROUP(69, cci_i2c, _, _, _, _, _, _, _, _),
1349     [70] = PINGROUP(70, cci_i2c, _, _, _, _, _, _, _, _),
1350     [71] = PINGROUP(71, cci_i2c, _, _, _, _, _, _, _, _),
1351     [72] = PINGROUP(72, cci_i2c, _, _, _, _, _, _, _, _),
1352     [73] = PINGROUP(73, cci_i2c, _, _, _, _, _, _, _, _),
1353     [74] = PINGROUP(74, cci_i2c, _, _, _, _, _, _, _, _),
1354     [75] = PINGROUP(75, cci_i2c, _, _, _, _, _, _, _, _),
1355     [76] = PINGROUP(76, cci_i2c, gcc_gp1, _, _, _, _, _, _, _),
1356     [77] = PINGROUP(77, cci_timer2, gcc_gp2, _, atest_usb13, atest_char0, _, _, _, _),
1357     [78] = PINGROUP(78, cci_timer3, cci_async, gcc_gp3, _, atest_usb12, atest_char1, _, _, _),
1358     [79] = PINGROUP(79, cci_timer4, cci_async, pcie1_clkreqn, mdp_vsync, jitter_bist, atest_usb11, atest_char2, _, _),
1359     [80] = PINGROUP(80, mdp_vsync, vfr_0, mdp_vsync0, mdp_vsync1, mdp_vsync4, pll_bist, atest_usb10, atest_char3, _),
1360     [81] = PINGROUP(81, mdp_vsync, dp_lcd, mdp_vsync2, mdp_vsync3, mdp_vsync5, atest_usb1, atest_char, _, _),
1361     [82] = PINGROUP(82, _, _, _, _, _, _, _, _, _),
1362     [83] = PINGROUP(83, _, _, _, _, _, _, _, _, _),
1363     [84] = PINGROUP(84, usb2phy_ac, _, _, _, _, _, _, _, _),
1364     [85] = PINGROUP(85, usb2phy_ac, _, _, _, _, _, _, _, _),
1365     [86] = PINGROUP(86, _, _, _, _, _, _, _, _, _),
1366     [87] = PINGROUP(87, _, _, _, _, _, _, _, _, _),
1367     [88] = PINGROUP(88, pcie0_clkreqn, _, _, _, _, _, _, _, _),
1368     [89] = PINGROUP(89, _, _, _, _, _, _, _, _, _),
1369     [90] = PINGROUP(90, _, _, _, _, _, _, _, _, _),
1370     [91] = PINGROUP(91, _, _, _, _, _, _, _, _, _),
1371     [92] = PINGROUP(92, _, _, _, _, _, _, _, _, _),
1372     [93] = PINGROUP(93, cam_mclk, cci_async, _, _, _, _, _, _, _),
1373     [94] = PINGROUP(94, lpass_slimbus, _, _, _, _, _, _, _, _),
1374     [95] = PINGROUP(95, lpass_slimbus, _, _, _, _, _, _, _, _),
1375     [96] = PINGROUP(96, pri_mi2s, _, _, _, _, _, _, _, _),
1376     [97] = PINGROUP(97, mi2s0_sck, _, _, _, _, _, _, _, _),
1377     [98] = PINGROUP(98, mi2s0_data0, _, _, _, _, _, _, _, _),
1378     [99] = PINGROUP(99, mi2s0_data1, _, _, _, _, _, _, _, _),
1379     [100] = PINGROUP(100, mi2s0_ws, _, vsense_trigger, _, _, _, _, _, _),
1380     [101] = PINGROUP(101, mi2s2_sck, _, qdss, _, _, _, _, _, _),
1381     [102] = PINGROUP(102, mi2s2_data0, _, _, qdss, _, _, _, _, _),
1382     [103] = PINGROUP(103, mi2s2_ws, vfr_1, _, _, qdss, _, atest_usb03, _, _),
1383     [104] = PINGROUP(104, mi2s2_data1, _, _, qdss, _, atest_usb02, _, _, _),
1384     [105] = PINGROUP(105, sec_mi2s, mi2s1_data1, audio_ref, gcc_gp1, _, qdss, atest_usb01, _, _),
1385     [106] = PINGROUP(106, mi2s1_sck, gcc_gp2, _, qdss, atest_usb00, _, _, _, _),
1386     [107] = PINGROUP(107, mi2s1_data0, gcc_gp3, _, qdss, atest_usb0, _, _, _, _),
1387     [108] = PINGROUP(108, mi2s1_ws, _, qdss, _, _, _, _, _, _),
1388     [109] = PINGROUP(109, uim1_data, _, _, _, _, _, _, _, _),
1389     [110] = PINGROUP(110, uim1_clk, _, _, _, _, _, _, _, _),
1390     [111] = PINGROUP(111, uim1_reset, _, _, _, _, _, _, _, _),
1391     [112] = PINGROUP(112, uim1_present, _, _, _, _, _, _, _, _),
1392     [113] = PINGROUP(113, uim0_data, _, _, _, _, _, _, _, _),
1393     [114] = PINGROUP(114, uim0_clk, _, _, _, _, _, _, _, _),
1394     [115] = PINGROUP(115, uim0_reset, _, _, _, _, _, _, _, _),
1395     [116] = PINGROUP(116, uim0_present, _, _, _, _, _, _, _, _),
1396     [117] = PINGROUP(117, _, mss_grfc0, cmu_rng3, phase_flag, _, _, _, _, _),
1397     [118] = PINGROUP(118, _, mss_grfc1, cmu_rng2, phase_flag, _, _, _, _, _),
1398     [119] = PINGROUP(119, _, mss_grfc2, cmu_rng1, phase_flag, _, _, _, _, _),
1399     [120] = PINGROUP(120, _, mss_grfc3, cmu_rng0, phase_flag, _, _, _, _, _),
1400     [121] = PINGROUP(121, _, mss_grfc4, cri_trng0, phase_flag, _, _, _, _, _),
1401     [122] = PINGROUP(122, _, mss_grfc5, cri_trng1, phase_flag, _, _, _, _, _),
1402     [123] = PINGROUP(123, _, mss_grfc6, prng_rosc, phase_flag, _, _, _, _, _),
1403     [124] = PINGROUP(124, _, mss_grfc7, cri_trng, phase_flag, _, _, _, _, _),
1404     [125] = PINGROUP(125, _, mss_grfc8, phase_flag, _, _, _, _, _, _),
1405     [126] = PINGROUP(126, _, mss_grfc9, phase_flag, _, _, _, _, _, _),
1406     [127] = PINGROUP(127, coex_uart1, mss_grfc10, phase_flag, _, _, _, _, _, _),
1407     [128] = PINGROUP(128, coex_uart1, mss_grfc11, phase_flag, _, _, _, _, _, _),
1408     [129] = PINGROUP(129, nav_gpio0, phase_flag, _, _, _, _, _, _, _),
1409     [130] = PINGROUP(130, nav_gpio1, phase_flag, _, _, _, _, _, _, _),
1410     [131] = PINGROUP(131, mss_grfc12, nav_gpio2, pa_indicator, phase_flag, _, _, _, _, _),
1411     [132] = PINGROUP(132, mss_grfc0, phase_flag, _, _, _, _, _, _, _),
1412     [133] = PINGROUP(133, qlink0_request, _, _, _, _, _, _, _, _),
1413     [134] = PINGROUP(134, qlink0_enable, _, _, _, _, _, _, _, _),
1414     [135] = PINGROUP(135, qlink0_wmss, _, _, _, _, _, _, _, _),
1415     [136] = PINGROUP(136, qlink1_request, _, _, _, _, _, _, _, _),
1416     [137] = PINGROUP(137, qlink1_enable, _, _, _, _, _, _, _, _),
1417     [138] = PINGROUP(138, qlink1_wmss, _, _, _, _, _, _, _, _),
1418     [139] = PINGROUP(139, _, _, _, _, _, _, _, _, _),
1419     [140] = PINGROUP(140, usb_phy, pll_clk, _, _, _, _, _, _, _),
1420     [141] = PINGROUP(141, _, _, _, _, _, _, _, _, _),
1421     [142] = PINGROUP(142, _, _, _, _, _, _, _, _, _),
1422     [143] = PINGROUP(143, _, _, _, _, _, _, _, _, _),
1423     [144] = PINGROUP(144, _, _, _, _, _, _, _, _, egpio),
1424     [145] = PINGROUP(145, _, _, _, _, _, _, _, _, egpio),
1425     [146] = PINGROUP(146, _, _, _, _, _, _, _, _, egpio),
1426     [147] = PINGROUP(147, _, _, _, _, _, _, _, _, egpio),
1427     [148] = PINGROUP(148, _, _, _, _, _, _, _, _, egpio),
1428     [149] = PINGROUP(149, _, _, _, _, _, _, _, _, egpio),
1429     [150] = PINGROUP(150, qdss, _, _, _, _, _, _, _, egpio),
1430     [151] = PINGROUP(151, qdss, _, _, _, _, _, _, _, egpio),
1431     [152] = PINGROUP(152, qdss, _, _, _, _, _, _, _, egpio),
1432     [153] = PINGROUP(153, qdss, _, _, _, _, _, _, _, egpio),
1433     [154] = PINGROUP(154, _, _, _, _, _, _, _, _, egpio),
1434     [155] = PINGROUP(155, _, _, _, _, _, _, _, _, egpio),
1435     [156] = PINGROUP(156, qdss_cti, _, _, _, _, _, _, _, egpio),
1436     [157] = PINGROUP(157, qdss_cti, _, _, _, _, _, _, _, egpio),
1437     [158] = PINGROUP(158, _, _, _, _, _, _, _, _, egpio),
1438     [159] = PINGROUP(159, _, _, _, _, _, _, _, _, egpio),
1439     [160] = PINGROUP(160, _, _, _, _, _, _, _, _, egpio),
1440     [161] = PINGROUP(161, _, _, _, _, _, _, _, _, egpio),
1441     [162] = PINGROUP(162, _, _, _, _, _, _, _, _, egpio),
1442     [163] = PINGROUP(163, _, _, _, _, _, _, _, _, egpio),
1443     [164] = PINGROUP(164, _, _, _, _, _, _, _, _, egpio),
1444     [165] = PINGROUP(165, qdss_cti, _, _, _, _, _, _, _, egpio),
1445     [166] = PINGROUP(166, qdss_cti, _, _, _, _, _, _, _, egpio),
1446     [167] = PINGROUP(167, _, _, _, _, _, _, _, _, egpio),
1447     [168] = PINGROUP(168, _, _, _, _, _, _, _, _, egpio),
1448     [169] = PINGROUP(169, _, _, _, _, _, _, _, _, egpio),
1449     [170] = PINGROUP(170, _, _, _, _, _, _, _, _, egpio),
1450     [171] = PINGROUP(171, qdss, _, _, _, _, _, _, _, egpio),
1451     [172] = PINGROUP(172, qdss, _, _, _, _, _, _, _, egpio),
1452     [173] = PINGROUP(173, qdss, _, _, _, _, _, _, _, egpio),
1453     [174] = PINGROUP(174, qdss, _, _, _, _, _, _, _, egpio),
1454     [175] = UFS_RESET(ufs_reset, 0xbe000),
1455     [176] = SDC_QDSD_PINGROUP(sdc1_rclk, 0xb3004, 0, 6),
1456     [177] = SDC_QDSD_PINGROUP(sdc1_clk, 0xb3000, 13, 6),
1457     [178] = SDC_QDSD_PINGROUP(sdc1_cmd, 0xb3000, 11, 3),
1458     [179] = SDC_QDSD_PINGROUP(sdc1_data, 0xb3000, 9, 0),
1459     [180] = SDC_QDSD_PINGROUP(sdc2_clk, 0xb4000, 14, 6),
1460     [181] = SDC_QDSD_PINGROUP(sdc2_cmd, 0xb4000, 11, 3),
1461     [182] = SDC_QDSD_PINGROUP(sdc2_data, 0xb4000, 9, 0),
1462 };
1463 
1464 static const struct msm_gpio_wakeirq_map sc7280_pdc_map[] = {
1465     { 0, 134 }, { 3, 131 }, { 4, 121 }, { 7, 103 }, { 8, 155 },
1466     { 11, 93 }, { 12, 78 }, { 15, 79 }, { 16, 80 }, { 18, 81 },
1467     { 19, 107 }, { 20, 82 }, { 21, 83 }, { 23, 99 }, { 24, 86 },
1468     { 25, 95 }, { 27, 158 }, { 28, 159 }, { 31, 90 }, { 32, 144 },
1469     { 34, 77 }, { 35, 92 }, { 36, 157 }, { 39, 73 }, { 40, 97 },
1470     { 41, 98 }, { 43, 85 }, { 44, 100 }, { 45, 101 }, { 47, 102 },
1471     { 48, 74 }, { 51, 112 }, { 52, 156 }, { 54, 117 }, { 55, 84 },
1472     { 56, 108 }, { 59, 110 }, { 60, 111 }, { 61, 123 }, { 63, 104 },
1473     { 68, 127 }, { 72, 150 }, { 75, 133 }, { 77, 125 }, { 78, 105 },
1474     { 79, 106 }, { 80, 118 }, { 81, 119 }, { 82, 162 }, { 83, 122 },
1475     { 86, 75 }, { 88, 154 }, { 89, 124 }, { 90, 149 }, { 91, 76 },
1476     { 93, 128 }, { 95, 160 }, { 101, 126 }, { 102, 96 }, { 103, 116 },
1477     { 104, 114 }, { 112, 72 }, { 116, 135 }, { 117, 163 }, { 119, 137 },
1478     { 121, 138 }, { 123, 139 }, { 125, 140 }, { 127, 141 }, { 128, 165 },
1479     { 129, 143 }, { 130, 94 }, { 131, 145 }, { 133, 146 }, { 136, 147 },
1480     { 140, 148 }, { 141, 115 }, { 142, 113 }, { 145, 130 }, { 148, 132 },
1481     { 150, 87 }, { 151, 88 }, { 153, 89 }, { 155, 164 }, { 156, 129 },
1482     { 157, 161 }, { 158, 120 }, { 161, 136 }, { 163, 142 }, { 172, 166 },
1483     { 174, 167 },
1484 };
1485 
1486 static const struct msm_pinctrl_soc_data sc7280_pinctrl = {
1487     .pins = sc7280_pins,
1488     .npins = ARRAY_SIZE(sc7280_pins),
1489     .functions = sc7280_functions,
1490     .nfunctions = ARRAY_SIZE(sc7280_functions),
1491     .groups = sc7280_groups,
1492     .ngroups = ARRAY_SIZE(sc7280_groups),
1493     .ngpios = 176,
1494     .wakeirq_map = sc7280_pdc_map,
1495     .nwakeirq_map = ARRAY_SIZE(sc7280_pdc_map),
1496     .egpio_func = 9,
1497 };
1498 
1499 static int sc7280_pinctrl_probe(struct platform_device *pdev)
1500 {
1501     return msm_pinctrl_probe(pdev, &sc7280_pinctrl);
1502 }
1503 
1504 static const struct of_device_id sc7280_pinctrl_of_match[] = {
1505     { .compatible = "qcom,sc7280-pinctrl", },
1506     { },
1507 };
1508 
1509 static struct platform_driver sc7280_pinctrl_driver = {
1510     .driver = {
1511         .name = "sc7280-pinctrl",
1512         .pm = &msm_pinctrl_dev_pm_ops,
1513         .of_match_table = sc7280_pinctrl_of_match,
1514     },
1515     .probe = sc7280_pinctrl_probe,
1516     .remove = msm_pinctrl_remove,
1517 };
1518 
1519 static int __init sc7280_pinctrl_init(void)
1520 {
1521     return platform_driver_register(&sc7280_pinctrl_driver);
1522 }
1523 arch_initcall(sc7280_pinctrl_init);
1524 
1525 static void __exit sc7280_pinctrl_exit(void)
1526 {
1527     platform_driver_unregister(&sc7280_pinctrl_driver);
1528 }
1529 module_exit(sc7280_pinctrl_exit);
1530 
1531 MODULE_DESCRIPTION("QTI sc7280 pinctrl driver");
1532 MODULE_LICENSE("GPL v2");
1533 MODULE_DEVICE_TABLE(of, sc7280_pinctrl_of_match);
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