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OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0
0002 // Copyright (c) 2019, The Linux Foundation. All rights reserved.
0003 
0004 #include <linux/module.h>
0005 #include <linux/of.h>
0006 #include <linux/platform_device.h>
0007 #include <linux/pinctrl/pinctrl.h>
0008 
0009 #include "pinctrl-msm.h"
0010 
0011 static const char * const sc7180_tiles[] = {
0012     "north",
0013     "south",
0014     "west",
0015 };
0016 
0017 enum {
0018     NORTH,
0019     SOUTH,
0020     WEST
0021 };
0022 
0023 #define FUNCTION(fname)                 \
0024     [msm_mux_##fname] = {               \
0025         .name = #fname,             \
0026         .groups = fname##_groups,       \
0027         .ngroups = ARRAY_SIZE(fname##_groups),  \
0028     }
0029 
0030 #define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
0031     {                       \
0032         .name = "gpio" #id,         \
0033         .pins = gpio##id##_pins,        \
0034         .npins = ARRAY_SIZE(gpio##id##_pins),   \
0035         .funcs = (int[]){           \
0036             msm_mux_gpio, /* gpio mode */   \
0037             msm_mux_##f1,           \
0038             msm_mux_##f2,           \
0039             msm_mux_##f3,           \
0040             msm_mux_##f4,           \
0041             msm_mux_##f5,           \
0042             msm_mux_##f6,           \
0043             msm_mux_##f7,           \
0044             msm_mux_##f8,           \
0045             msm_mux_##f9            \
0046         },                  \
0047         .nfuncs = 10,               \
0048         .ctl_reg = 0x1000 * id,     \
0049         .io_reg = 0x1000 * id + 0x4,        \
0050         .intr_cfg_reg = 0x1000 * id + 0x8,  \
0051         .intr_status_reg = 0x1000 * id + 0xc,   \
0052         .intr_target_reg = 0x1000 * id + 0x8,   \
0053         .tile = _tile,          \
0054         .mux_bit = 2,           \
0055         .pull_bit = 0,          \
0056         .drv_bit = 6,           \
0057         .oe_bit = 9,            \
0058         .in_bit = 0,            \
0059         .out_bit = 1,           \
0060         .intr_enable_bit = 0,       \
0061         .intr_status_bit = 0,       \
0062         .intr_target_bit = 5,       \
0063         .intr_target_kpss_val = 3,  \
0064         .intr_raw_status_bit = 4,   \
0065         .intr_polarity_bit = 1,     \
0066         .intr_detection_bit = 2,    \
0067         .intr_detection_width = 2,  \
0068     }
0069 
0070 #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv)  \
0071     {                       \
0072         .name = #pg_name,           \
0073         .pins = pg_name##_pins,         \
0074         .npins = ARRAY_SIZE(pg_name##_pins),    \
0075         .ctl_reg = ctl,             \
0076         .io_reg = 0,                \
0077         .intr_cfg_reg = 0,          \
0078         .intr_status_reg = 0,           \
0079         .intr_target_reg = 0,           \
0080         .tile = SOUTH,              \
0081         .mux_bit = -1,              \
0082         .pull_bit = pull,           \
0083         .drv_bit = drv,             \
0084         .oe_bit = -1,               \
0085         .in_bit = -1,               \
0086         .out_bit = -1,              \
0087         .intr_enable_bit = -1,          \
0088         .intr_status_bit = -1,          \
0089         .intr_target_bit = -1,          \
0090         .intr_raw_status_bit = -1,      \
0091         .intr_polarity_bit = -1,        \
0092         .intr_detection_bit = -1,       \
0093         .intr_detection_width = -1,     \
0094     }
0095 
0096 #define UFS_RESET(pg_name, offset)              \
0097     {                       \
0098         .name = #pg_name,           \
0099         .pins = pg_name##_pins,         \
0100         .npins = ARRAY_SIZE(pg_name##_pins),    \
0101         .ctl_reg = offset,          \
0102         .io_reg = offset + 0x4,         \
0103         .intr_cfg_reg = 0,          \
0104         .intr_status_reg = 0,           \
0105         .intr_target_reg = 0,           \
0106         .tile = SOUTH,              \
0107         .mux_bit = -1,              \
0108         .pull_bit = 3,              \
0109         .drv_bit = 0,               \
0110         .oe_bit = -1,               \
0111         .in_bit = -1,               \
0112         .out_bit = 0,               \
0113         .intr_enable_bit = -1,          \
0114         .intr_status_bit = -1,          \
0115         .intr_target_bit = -1,          \
0116         .intr_raw_status_bit = -1,      \
0117         .intr_polarity_bit = -1,        \
0118         .intr_detection_bit = -1,       \
0119         .intr_detection_width = -1,     \
0120     }
0121 static const struct pinctrl_pin_desc sc7180_pins[] = {
0122     PINCTRL_PIN(0, "GPIO_0"),
0123     PINCTRL_PIN(1, "GPIO_1"),
0124     PINCTRL_PIN(2, "GPIO_2"),
0125     PINCTRL_PIN(3, "GPIO_3"),
0126     PINCTRL_PIN(4, "GPIO_4"),
0127     PINCTRL_PIN(5, "GPIO_5"),
0128     PINCTRL_PIN(6, "GPIO_6"),
0129     PINCTRL_PIN(7, "GPIO_7"),
0130     PINCTRL_PIN(8, "GPIO_8"),
0131     PINCTRL_PIN(9, "GPIO_9"),
0132     PINCTRL_PIN(10, "GPIO_10"),
0133     PINCTRL_PIN(11, "GPIO_11"),
0134     PINCTRL_PIN(12, "GPIO_12"),
0135     PINCTRL_PIN(13, "GPIO_13"),
0136     PINCTRL_PIN(14, "GPIO_14"),
0137     PINCTRL_PIN(15, "GPIO_15"),
0138     PINCTRL_PIN(16, "GPIO_16"),
0139     PINCTRL_PIN(17, "GPIO_17"),
0140     PINCTRL_PIN(18, "GPIO_18"),
0141     PINCTRL_PIN(19, "GPIO_19"),
0142     PINCTRL_PIN(20, "GPIO_20"),
0143     PINCTRL_PIN(21, "GPIO_21"),
0144     PINCTRL_PIN(22, "GPIO_22"),
0145     PINCTRL_PIN(23, "GPIO_23"),
0146     PINCTRL_PIN(24, "GPIO_24"),
0147     PINCTRL_PIN(25, "GPIO_25"),
0148     PINCTRL_PIN(26, "GPIO_26"),
0149     PINCTRL_PIN(27, "GPIO_27"),
0150     PINCTRL_PIN(28, "GPIO_28"),
0151     PINCTRL_PIN(29, "GPIO_29"),
0152     PINCTRL_PIN(30, "GPIO_30"),
0153     PINCTRL_PIN(31, "GPIO_31"),
0154     PINCTRL_PIN(32, "GPIO_32"),
0155     PINCTRL_PIN(33, "GPIO_33"),
0156     PINCTRL_PIN(34, "GPIO_34"),
0157     PINCTRL_PIN(35, "GPIO_35"),
0158     PINCTRL_PIN(36, "GPIO_36"),
0159     PINCTRL_PIN(37, "GPIO_37"),
0160     PINCTRL_PIN(38, "GPIO_38"),
0161     PINCTRL_PIN(39, "GPIO_39"),
0162     PINCTRL_PIN(40, "GPIO_40"),
0163     PINCTRL_PIN(41, "GPIO_41"),
0164     PINCTRL_PIN(42, "GPIO_42"),
0165     PINCTRL_PIN(43, "GPIO_43"),
0166     PINCTRL_PIN(44, "GPIO_44"),
0167     PINCTRL_PIN(45, "GPIO_45"),
0168     PINCTRL_PIN(46, "GPIO_46"),
0169     PINCTRL_PIN(47, "GPIO_47"),
0170     PINCTRL_PIN(48, "GPIO_48"),
0171     PINCTRL_PIN(49, "GPIO_49"),
0172     PINCTRL_PIN(50, "GPIO_50"),
0173     PINCTRL_PIN(51, "GPIO_51"),
0174     PINCTRL_PIN(52, "GPIO_52"),
0175     PINCTRL_PIN(53, "GPIO_53"),
0176     PINCTRL_PIN(54, "GPIO_54"),
0177     PINCTRL_PIN(55, "GPIO_55"),
0178     PINCTRL_PIN(56, "GPIO_56"),
0179     PINCTRL_PIN(57, "GPIO_57"),
0180     PINCTRL_PIN(58, "GPIO_58"),
0181     PINCTRL_PIN(59, "GPIO_59"),
0182     PINCTRL_PIN(60, "GPIO_60"),
0183     PINCTRL_PIN(61, "GPIO_61"),
0184     PINCTRL_PIN(62, "GPIO_62"),
0185     PINCTRL_PIN(63, "GPIO_63"),
0186     PINCTRL_PIN(64, "GPIO_64"),
0187     PINCTRL_PIN(65, "GPIO_65"),
0188     PINCTRL_PIN(66, "GPIO_66"),
0189     PINCTRL_PIN(67, "GPIO_67"),
0190     PINCTRL_PIN(68, "GPIO_68"),
0191     PINCTRL_PIN(69, "GPIO_69"),
0192     PINCTRL_PIN(70, "GPIO_70"),
0193     PINCTRL_PIN(71, "GPIO_71"),
0194     PINCTRL_PIN(72, "GPIO_72"),
0195     PINCTRL_PIN(73, "GPIO_73"),
0196     PINCTRL_PIN(74, "GPIO_74"),
0197     PINCTRL_PIN(75, "GPIO_75"),
0198     PINCTRL_PIN(76, "GPIO_76"),
0199     PINCTRL_PIN(77, "GPIO_77"),
0200     PINCTRL_PIN(78, "GPIO_78"),
0201     PINCTRL_PIN(79, "GPIO_79"),
0202     PINCTRL_PIN(80, "GPIO_80"),
0203     PINCTRL_PIN(81, "GPIO_81"),
0204     PINCTRL_PIN(82, "GPIO_82"),
0205     PINCTRL_PIN(83, "GPIO_83"),
0206     PINCTRL_PIN(84, "GPIO_84"),
0207     PINCTRL_PIN(85, "GPIO_85"),
0208     PINCTRL_PIN(86, "GPIO_86"),
0209     PINCTRL_PIN(87, "GPIO_87"),
0210     PINCTRL_PIN(88, "GPIO_88"),
0211     PINCTRL_PIN(89, "GPIO_89"),
0212     PINCTRL_PIN(90, "GPIO_90"),
0213     PINCTRL_PIN(91, "GPIO_91"),
0214     PINCTRL_PIN(92, "GPIO_92"),
0215     PINCTRL_PIN(93, "GPIO_93"),
0216     PINCTRL_PIN(94, "GPIO_94"),
0217     PINCTRL_PIN(95, "GPIO_95"),
0218     PINCTRL_PIN(96, "GPIO_96"),
0219     PINCTRL_PIN(97, "GPIO_97"),
0220     PINCTRL_PIN(98, "GPIO_98"),
0221     PINCTRL_PIN(99, "GPIO_99"),
0222     PINCTRL_PIN(100, "GPIO_100"),
0223     PINCTRL_PIN(101, "GPIO_101"),
0224     PINCTRL_PIN(102, "GPIO_102"),
0225     PINCTRL_PIN(103, "GPIO_103"),
0226     PINCTRL_PIN(104, "GPIO_104"),
0227     PINCTRL_PIN(105, "GPIO_105"),
0228     PINCTRL_PIN(106, "GPIO_106"),
0229     PINCTRL_PIN(107, "GPIO_107"),
0230     PINCTRL_PIN(108, "GPIO_108"),
0231     PINCTRL_PIN(109, "GPIO_109"),
0232     PINCTRL_PIN(110, "GPIO_110"),
0233     PINCTRL_PIN(111, "GPIO_111"),
0234     PINCTRL_PIN(112, "GPIO_112"),
0235     PINCTRL_PIN(113, "GPIO_113"),
0236     PINCTRL_PIN(114, "GPIO_114"),
0237     PINCTRL_PIN(115, "GPIO_115"),
0238     PINCTRL_PIN(116, "GPIO_116"),
0239     PINCTRL_PIN(117, "GPIO_117"),
0240     PINCTRL_PIN(118, "GPIO_118"),
0241     PINCTRL_PIN(119, "UFS_RESET"),
0242     PINCTRL_PIN(120, "SDC1_RCLK"),
0243     PINCTRL_PIN(121, "SDC1_CLK"),
0244     PINCTRL_PIN(122, "SDC1_CMD"),
0245     PINCTRL_PIN(123, "SDC1_DATA"),
0246     PINCTRL_PIN(124, "SDC2_CLK"),
0247     PINCTRL_PIN(125, "SDC2_CMD"),
0248     PINCTRL_PIN(126, "SDC2_DATA"),
0249 };
0250 
0251 #define DECLARE_MSM_GPIO_PINS(pin) \
0252     static const unsigned int gpio##pin##_pins[] = { pin }
0253 DECLARE_MSM_GPIO_PINS(0);
0254 DECLARE_MSM_GPIO_PINS(1);
0255 DECLARE_MSM_GPIO_PINS(2);
0256 DECLARE_MSM_GPIO_PINS(3);
0257 DECLARE_MSM_GPIO_PINS(4);
0258 DECLARE_MSM_GPIO_PINS(5);
0259 DECLARE_MSM_GPIO_PINS(6);
0260 DECLARE_MSM_GPIO_PINS(7);
0261 DECLARE_MSM_GPIO_PINS(8);
0262 DECLARE_MSM_GPIO_PINS(9);
0263 DECLARE_MSM_GPIO_PINS(10);
0264 DECLARE_MSM_GPIO_PINS(11);
0265 DECLARE_MSM_GPIO_PINS(12);
0266 DECLARE_MSM_GPIO_PINS(13);
0267 DECLARE_MSM_GPIO_PINS(14);
0268 DECLARE_MSM_GPIO_PINS(15);
0269 DECLARE_MSM_GPIO_PINS(16);
0270 DECLARE_MSM_GPIO_PINS(17);
0271 DECLARE_MSM_GPIO_PINS(18);
0272 DECLARE_MSM_GPIO_PINS(19);
0273 DECLARE_MSM_GPIO_PINS(20);
0274 DECLARE_MSM_GPIO_PINS(21);
0275 DECLARE_MSM_GPIO_PINS(22);
0276 DECLARE_MSM_GPIO_PINS(23);
0277 DECLARE_MSM_GPIO_PINS(24);
0278 DECLARE_MSM_GPIO_PINS(25);
0279 DECLARE_MSM_GPIO_PINS(26);
0280 DECLARE_MSM_GPIO_PINS(27);
0281 DECLARE_MSM_GPIO_PINS(28);
0282 DECLARE_MSM_GPIO_PINS(29);
0283 DECLARE_MSM_GPIO_PINS(30);
0284 DECLARE_MSM_GPIO_PINS(31);
0285 DECLARE_MSM_GPIO_PINS(32);
0286 DECLARE_MSM_GPIO_PINS(33);
0287 DECLARE_MSM_GPIO_PINS(34);
0288 DECLARE_MSM_GPIO_PINS(35);
0289 DECLARE_MSM_GPIO_PINS(36);
0290 DECLARE_MSM_GPIO_PINS(37);
0291 DECLARE_MSM_GPIO_PINS(38);
0292 DECLARE_MSM_GPIO_PINS(39);
0293 DECLARE_MSM_GPIO_PINS(40);
0294 DECLARE_MSM_GPIO_PINS(41);
0295 DECLARE_MSM_GPIO_PINS(42);
0296 DECLARE_MSM_GPIO_PINS(43);
0297 DECLARE_MSM_GPIO_PINS(44);
0298 DECLARE_MSM_GPIO_PINS(45);
0299 DECLARE_MSM_GPIO_PINS(46);
0300 DECLARE_MSM_GPIO_PINS(47);
0301 DECLARE_MSM_GPIO_PINS(48);
0302 DECLARE_MSM_GPIO_PINS(49);
0303 DECLARE_MSM_GPIO_PINS(50);
0304 DECLARE_MSM_GPIO_PINS(51);
0305 DECLARE_MSM_GPIO_PINS(52);
0306 DECLARE_MSM_GPIO_PINS(53);
0307 DECLARE_MSM_GPIO_PINS(54);
0308 DECLARE_MSM_GPIO_PINS(55);
0309 DECLARE_MSM_GPIO_PINS(56);
0310 DECLARE_MSM_GPIO_PINS(57);
0311 DECLARE_MSM_GPIO_PINS(58);
0312 DECLARE_MSM_GPIO_PINS(59);
0313 DECLARE_MSM_GPIO_PINS(60);
0314 DECLARE_MSM_GPIO_PINS(61);
0315 DECLARE_MSM_GPIO_PINS(62);
0316 DECLARE_MSM_GPIO_PINS(63);
0317 DECLARE_MSM_GPIO_PINS(64);
0318 DECLARE_MSM_GPIO_PINS(65);
0319 DECLARE_MSM_GPIO_PINS(66);
0320 DECLARE_MSM_GPIO_PINS(67);
0321 DECLARE_MSM_GPIO_PINS(68);
0322 DECLARE_MSM_GPIO_PINS(69);
0323 DECLARE_MSM_GPIO_PINS(70);
0324 DECLARE_MSM_GPIO_PINS(71);
0325 DECLARE_MSM_GPIO_PINS(72);
0326 DECLARE_MSM_GPIO_PINS(73);
0327 DECLARE_MSM_GPIO_PINS(74);
0328 DECLARE_MSM_GPIO_PINS(75);
0329 DECLARE_MSM_GPIO_PINS(76);
0330 DECLARE_MSM_GPIO_PINS(77);
0331 DECLARE_MSM_GPIO_PINS(78);
0332 DECLARE_MSM_GPIO_PINS(79);
0333 DECLARE_MSM_GPIO_PINS(80);
0334 DECLARE_MSM_GPIO_PINS(81);
0335 DECLARE_MSM_GPIO_PINS(82);
0336 DECLARE_MSM_GPIO_PINS(83);
0337 DECLARE_MSM_GPIO_PINS(84);
0338 DECLARE_MSM_GPIO_PINS(85);
0339 DECLARE_MSM_GPIO_PINS(86);
0340 DECLARE_MSM_GPIO_PINS(87);
0341 DECLARE_MSM_GPIO_PINS(88);
0342 DECLARE_MSM_GPIO_PINS(89);
0343 DECLARE_MSM_GPIO_PINS(90);
0344 DECLARE_MSM_GPIO_PINS(91);
0345 DECLARE_MSM_GPIO_PINS(92);
0346 DECLARE_MSM_GPIO_PINS(93);
0347 DECLARE_MSM_GPIO_PINS(94);
0348 DECLARE_MSM_GPIO_PINS(95);
0349 DECLARE_MSM_GPIO_PINS(96);
0350 DECLARE_MSM_GPIO_PINS(97);
0351 DECLARE_MSM_GPIO_PINS(98);
0352 DECLARE_MSM_GPIO_PINS(99);
0353 DECLARE_MSM_GPIO_PINS(100);
0354 DECLARE_MSM_GPIO_PINS(101);
0355 DECLARE_MSM_GPIO_PINS(102);
0356 DECLARE_MSM_GPIO_PINS(103);
0357 DECLARE_MSM_GPIO_PINS(104);
0358 DECLARE_MSM_GPIO_PINS(105);
0359 DECLARE_MSM_GPIO_PINS(106);
0360 DECLARE_MSM_GPIO_PINS(107);
0361 DECLARE_MSM_GPIO_PINS(108);
0362 DECLARE_MSM_GPIO_PINS(109);
0363 DECLARE_MSM_GPIO_PINS(110);
0364 DECLARE_MSM_GPIO_PINS(111);
0365 DECLARE_MSM_GPIO_PINS(112);
0366 DECLARE_MSM_GPIO_PINS(113);
0367 DECLARE_MSM_GPIO_PINS(114);
0368 DECLARE_MSM_GPIO_PINS(115);
0369 DECLARE_MSM_GPIO_PINS(116);
0370 DECLARE_MSM_GPIO_PINS(117);
0371 DECLARE_MSM_GPIO_PINS(118);
0372 
0373 static const unsigned int ufs_reset_pins[] = { 119 };
0374 static const unsigned int sdc1_rclk_pins[] = { 120 };
0375 static const unsigned int sdc1_clk_pins[] = { 121 };
0376 static const unsigned int sdc1_cmd_pins[] = { 122 };
0377 static const unsigned int sdc1_data_pins[] = { 123 };
0378 static const unsigned int sdc2_clk_pins[] = { 124 };
0379 static const unsigned int sdc2_cmd_pins[] = { 125 };
0380 static const unsigned int sdc2_data_pins[] = { 126 };
0381 
0382 enum sc7180_functions {
0383     msm_mux_adsp_ext,
0384     msm_mux_agera_pll,
0385     msm_mux_aoss_cti,
0386     msm_mux_atest_char,
0387     msm_mux_atest_char0,
0388     msm_mux_atest_char1,
0389     msm_mux_atest_char2,
0390     msm_mux_atest_char3,
0391     msm_mux_atest_tsens,
0392     msm_mux_atest_tsens2,
0393     msm_mux_atest_usb1,
0394     msm_mux_atest_usb2,
0395     msm_mux_atest_usb10,
0396     msm_mux_atest_usb11,
0397     msm_mux_atest_usb12,
0398     msm_mux_atest_usb13,
0399     msm_mux_atest_usb20,
0400     msm_mux_atest_usb21,
0401     msm_mux_atest_usb22,
0402     msm_mux_atest_usb23,
0403     msm_mux_audio_ref,
0404     msm_mux_btfm_slimbus,
0405     msm_mux_cam_mclk,
0406     msm_mux_cci_async,
0407     msm_mux_cci_i2c,
0408     msm_mux_cci_timer0,
0409     msm_mux_cci_timer1,
0410     msm_mux_cci_timer2,
0411     msm_mux_cci_timer3,
0412     msm_mux_cci_timer4,
0413     msm_mux_cri_trng,
0414     msm_mux_dbg_out,
0415     msm_mux_ddr_bist,
0416     msm_mux_ddr_pxi0,
0417     msm_mux_ddr_pxi1,
0418     msm_mux_ddr_pxi2,
0419     msm_mux_ddr_pxi3,
0420     msm_mux_dp_hot,
0421     msm_mux_edp_lcd,
0422     msm_mux_gcc_gp1,
0423     msm_mux_gcc_gp2,
0424     msm_mux_gcc_gp3,
0425     msm_mux_gpio,
0426     msm_mux_gp_pdm0,
0427     msm_mux_gp_pdm1,
0428     msm_mux_gp_pdm2,
0429     msm_mux_gps_tx,
0430     msm_mux_jitter_bist,
0431     msm_mux_ldo_en,
0432     msm_mux_ldo_update,
0433     msm_mux_lpass_ext,
0434     msm_mux_mdp_vsync,
0435     msm_mux_mdp_vsync0,
0436     msm_mux_mdp_vsync1,
0437     msm_mux_mdp_vsync2,
0438     msm_mux_mdp_vsync3,
0439     msm_mux_mi2s_1,
0440     msm_mux_mi2s_0,
0441     msm_mux_mi2s_2,
0442     msm_mux_mss_lte,
0443     msm_mux_m_voc,
0444     msm_mux_pa_indicator,
0445     msm_mux_phase_flag,
0446     msm_mux_PLL_BIST,
0447     msm_mux_pll_bypassnl,
0448     msm_mux_pll_reset,
0449     msm_mux_prng_rosc,
0450     msm_mux_qdss,
0451     msm_mux_qdss_cti,
0452     msm_mux_qlink_enable,
0453     msm_mux_qlink_request,
0454     msm_mux_qspi_clk,
0455     msm_mux_qspi_cs,
0456     msm_mux_qspi_data,
0457     msm_mux_qup00,
0458     msm_mux_qup01,
0459     msm_mux_qup02_i2c,
0460     msm_mux_qup02_uart,
0461     msm_mux_qup03,
0462     msm_mux_qup04_i2c,
0463     msm_mux_qup04_uart,
0464     msm_mux_qup05,
0465     msm_mux_qup10,
0466     msm_mux_qup11_i2c,
0467     msm_mux_qup11_uart,
0468     msm_mux_qup12,
0469     msm_mux_qup13_i2c,
0470     msm_mux_qup13_uart,
0471     msm_mux_qup14,
0472     msm_mux_qup15,
0473     msm_mux_sdc1_tb,
0474     msm_mux_sdc2_tb,
0475     msm_mux_sd_write,
0476     msm_mux_sp_cmu,
0477     msm_mux_tgu_ch0,
0478     msm_mux_tgu_ch1,
0479     msm_mux_tgu_ch2,
0480     msm_mux_tgu_ch3,
0481     msm_mux_tsense_pwm1,
0482     msm_mux_tsense_pwm2,
0483     msm_mux_uim1,
0484     msm_mux_uim2,
0485     msm_mux_uim_batt,
0486     msm_mux_usb_phy,
0487     msm_mux_vfr_1,
0488     msm_mux__V_GPIO,
0489     msm_mux__V_PPS_IN,
0490     msm_mux__V_PPS_OUT,
0491     msm_mux_vsense_trigger,
0492     msm_mux_wlan1_adc0,
0493     msm_mux_wlan1_adc1,
0494     msm_mux_wlan2_adc0,
0495     msm_mux_wlan2_adc1,
0496     msm_mux__,
0497 };
0498 
0499 static const char * const qup01_groups[] = {
0500     "gpio0", "gpio1", "gpio2", "gpio3", "gpio12", "gpio94",
0501 };
0502 static const char * const gpio_groups[] = {
0503     "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
0504     "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
0505     "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
0506     "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
0507     "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
0508     "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
0509     "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
0510     "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
0511     "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
0512     "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
0513     "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
0514     "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
0515     "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
0516     "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
0517     "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
0518     "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
0519     "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
0520     "gpio117", "gpio118",
0521 };
0522 static const char * const phase_flag_groups[] = {
0523     "gpio0", "gpio1", "gpio2", "gpio8", "gpio9",
0524     "gpio11", "gpio12", "gpio17", "gpio18", "gpio19",
0525     "gpio20", "gpio25", "gpio26", "gpio27", "gpio28",
0526     "gpio32", "gpio33", "gpio34", "gpio35", "gpio36",
0527     "gpio37", "gpio38", "gpio39", "gpio42", "gpio44",
0528     "gpio56", "gpio57", "gpio58", "gpio63", "gpio64",
0529     "gpio108", "gpio109",
0530 };
0531 static const char * const cri_trng_groups[] = {
0532     "gpio0", "gpio1", "gpio2",
0533 };
0534 static const char * const sp_cmu_groups[] = {
0535     "gpio3",
0536 };
0537 static const char * const dbg_out_groups[] = {
0538     "gpio3",
0539 };
0540 static const char * const qdss_cti_groups[] = {
0541     "gpio3", "gpio4", "gpio8", "gpio9", "gpio33", "gpio44", "gpio45",
0542     "gpio72",
0543 };
0544 static const char * const sdc1_tb_groups[] = {
0545     "gpio4",
0546 };
0547 static const char * const sdc2_tb_groups[] = {
0548     "gpio5",
0549 };
0550 static const char * const qup11_i2c_groups[] = {
0551     "gpio6", "gpio7",
0552 };
0553 static const char * const qup11_uart_groups[] = {
0554     "gpio6", "gpio7",
0555 };
0556 static const char * const ddr_bist_groups[] = {
0557     "gpio7", "gpio8", "gpio9", "gpio10",
0558 };
0559 static const char * const gp_pdm1_groups[] = {
0560     "gpio8", "gpio50",
0561 };
0562 static const char * const mdp_vsync_groups[] = {
0563     "gpio10", "gpio11", "gpio12", "gpio70", "gpio71",
0564 };
0565 static const char * const edp_lcd_groups[] = {
0566     "gpio11",
0567 };
0568 static const char * const ddr_pxi2_groups[] = {
0569     "gpio11", "gpio26",
0570 };
0571 static const char * const m_voc_groups[] = {
0572     "gpio12",
0573 };
0574 static const char * const wlan2_adc0_groups[] = {
0575     "gpio12",
0576 };
0577 static const char * const atest_usb10_groups[] = {
0578     "gpio12",
0579 };
0580 static const char * const ddr_pxi3_groups[] = {
0581     "gpio12", "gpio108",
0582 };
0583 static const char * const cam_mclk_groups[] = {
0584     "gpio13", "gpio14", "gpio15", "gpio16", "gpio23",
0585 };
0586 static const char * const pll_bypassnl_groups[] = {
0587     "gpio13",
0588 };
0589 static const char * const qdss_groups[] = {
0590     "gpio13", "gpio86", "gpio14", "gpio87",
0591     "gpio15", "gpio88", "gpio16", "gpio89",
0592     "gpio17", "gpio90", "gpio18", "gpio91",
0593     "gpio19", "gpio21", "gpio20", "gpio22",
0594     "gpio23", "gpio54", "gpio24", "gpio36",
0595     "gpio25", "gpio57", "gpio26", "gpio31",
0596     "gpio27", "gpio56", "gpio28", "gpio29",
0597     "gpio30", "gpio35", "gpio93", "gpio104",
0598     "gpio34", "gpio53", "gpio37", "gpio55",
0599 };
0600 static const char * const pll_reset_groups[] = {
0601     "gpio14",
0602 };
0603 static const char * const qup02_i2c_groups[] = {
0604     "gpio15", "gpio16",
0605 };
0606 static const char * const qup02_uart_groups[] = {
0607     "gpio15", "gpio16",
0608 };
0609 static const char * const cci_i2c_groups[] = {
0610     "gpio17", "gpio18", "gpio19", "gpio20", "gpio27", "gpio28",
0611 };
0612 static const char * const wlan1_adc0_groups[] = {
0613     "gpio17",
0614 };
0615 static const char * const atest_usb12_groups[] = {
0616     "gpio17",
0617 };
0618 static const char * const ddr_pxi1_groups[] = {
0619     "gpio17", "gpio44",
0620 };
0621 static const char * const atest_char_groups[] = {
0622     "gpio17",
0623 };
0624 static const char * const agera_pll_groups[] = {
0625     "gpio18",
0626 };
0627 static const char * const vsense_trigger_groups[] = {
0628     "gpio18",
0629 };
0630 static const char * const ddr_pxi0_groups[] = {
0631     "gpio18", "gpio27",
0632 };
0633 static const char * const atest_char3_groups[] = {
0634     "gpio18",
0635 };
0636 static const char * const atest_char2_groups[] = {
0637     "gpio19",
0638 };
0639 static const char * const atest_char1_groups[] = {
0640     "gpio20",
0641 };
0642 static const char * const cci_timer0_groups[] = {
0643     "gpio21",
0644 };
0645 static const char * const gcc_gp2_groups[] = {
0646     "gpio21",
0647 };
0648 static const char * const atest_char0_groups[] = {
0649     "gpio21",
0650 };
0651 static const char * const cci_timer1_groups[] = {
0652     "gpio22",
0653 };
0654 static const char * const gcc_gp3_groups[] = {
0655     "gpio22",
0656 };
0657 static const char * const cci_timer2_groups[] = {
0658     "gpio23",
0659 };
0660 static const char * const cci_timer3_groups[] = {
0661     "gpio24",
0662 };
0663 static const char * const cci_async_groups[] = {
0664     "gpio24", "gpio25", "gpio26",
0665 };
0666 static const char * const cci_timer4_groups[] = {
0667     "gpio25",
0668 };
0669 static const char * const qup05_groups[] = {
0670     "gpio25", "gpio26", "gpio27", "gpio28",
0671 };
0672 static const char * const atest_tsens_groups[] = {
0673     "gpio26",
0674 };
0675 static const char * const atest_usb11_groups[] = {
0676     "gpio26",
0677 };
0678 static const char * const PLL_BIST_groups[] = {
0679     "gpio27",
0680 };
0681 static const char * const sd_write_groups[] = {
0682     "gpio33",
0683 };
0684 static const char * const qup00_groups[] = {
0685     "gpio34", "gpio35", "gpio36", "gpio37",
0686 };
0687 static const char * const gp_pdm0_groups[] = {
0688     "gpio37", "gpio68",
0689 };
0690 static const char * const qup03_groups[] = {
0691     "gpio38", "gpio39", "gpio40", "gpio41",
0692 };
0693 static const char * const atest_tsens2_groups[] = {
0694     "gpio39",
0695 };
0696 static const char * const wlan2_adc1_groups[] = {
0697     "gpio39",
0698 };
0699 static const char * const atest_usb1_groups[] = {
0700     "gpio39",
0701 };
0702 static const char * const qup12_groups[] = {
0703     "gpio42", "gpio43", "gpio44", "gpio45",
0704 };
0705 static const char * const wlan1_adc1_groups[] = {
0706     "gpio44",
0707 };
0708 static const char * const atest_usb13_groups[] = {
0709     "gpio44",
0710 };
0711 static const char * const qup13_i2c_groups[] = {
0712     "gpio46", "gpio47",
0713 };
0714 static const char * const qup13_uart_groups[] = {
0715     "gpio46", "gpio47",
0716 };
0717 static const char * const gcc_gp1_groups[] = {
0718     "gpio48", "gpio56",
0719 };
0720 static const char * const mi2s_1_groups[] = {
0721     "gpio49", "gpio50", "gpio51", "gpio52",
0722 };
0723 static const char * const btfm_slimbus_groups[] = {
0724     "gpio49", "gpio50", "gpio51", "gpio52",
0725 };
0726 static const char * const atest_usb2_groups[] = {
0727     "gpio51",
0728 };
0729 static const char * const atest_usb23_groups[] = {
0730     "gpio52",
0731 };
0732 static const char * const mi2s_0_groups[] = {
0733     "gpio53", "gpio54", "gpio55", "gpio56",
0734 };
0735 static const char * const qup15_groups[] = {
0736     "gpio53", "gpio54", "gpio55", "gpio56",
0737 };
0738 static const char * const atest_usb22_groups[] = {
0739     "gpio53",
0740 };
0741 static const char * const atest_usb21_groups[] = {
0742     "gpio54",
0743 };
0744 static const char * const atest_usb20_groups[] = {
0745     "gpio55",
0746 };
0747 static const char * const lpass_ext_groups[] = {
0748     "gpio57", "gpio58",
0749 };
0750 static const char * const audio_ref_groups[] = {
0751     "gpio57",
0752 };
0753 static const char * const jitter_bist_groups[] = {
0754     "gpio57",
0755 };
0756 static const char * const gp_pdm2_groups[] = {
0757     "gpio57",
0758 };
0759 static const char * const qup10_groups[] = {
0760     "gpio59", "gpio60", "gpio61", "gpio62", "gpio68", "gpio72",
0761 };
0762 static const char * const tgu_ch3_groups[] = {
0763     "gpio62",
0764 };
0765 static const char * const qspi_clk_groups[] = {
0766     "gpio63",
0767 };
0768 static const char * const mdp_vsync0_groups[] = {
0769     "gpio63",
0770 };
0771 static const char * const mi2s_2_groups[] = {
0772     "gpio63", "gpio64", "gpio65", "gpio66",
0773 };
0774 static const char * const mdp_vsync1_groups[] = {
0775     "gpio63",
0776 };
0777 static const char * const mdp_vsync2_groups[] = {
0778     "gpio63",
0779 };
0780 static const char * const mdp_vsync3_groups[] = {
0781     "gpio63",
0782 };
0783 static const char * const tgu_ch0_groups[] = {
0784     "gpio63",
0785 };
0786 static const char * const qspi_data_groups[] = {
0787     "gpio64", "gpio65", "gpio66", "gpio67",
0788 };
0789 static const char * const tgu_ch1_groups[] = {
0790     "gpio64",
0791 };
0792 static const char * const vfr_1_groups[] = {
0793     "gpio65",
0794 };
0795 static const char * const tgu_ch2_groups[] = {
0796     "gpio65",
0797 };
0798 static const char * const qspi_cs_groups[] = {
0799     "gpio68", "gpio72",
0800 };
0801 static const char * const ldo_en_groups[] = {
0802     "gpio70",
0803 };
0804 static const char * const ldo_update_groups[] = {
0805     "gpio71",
0806 };
0807 static const char * const prng_rosc_groups[] = {
0808     "gpio72",
0809 };
0810 static const char * const uim2_groups[] = {
0811     "gpio75", "gpio76", "gpio77", "gpio78",
0812 };
0813 static const char * const uim1_groups[] = {
0814     "gpio79", "gpio80", "gpio81", "gpio82",
0815 };
0816 static const char * const _V_GPIO_groups[] = {
0817     "gpio83", "gpio84", "gpio107",
0818 };
0819 static const char * const _V_PPS_IN_groups[] = {
0820     "gpio83", "gpio84", "gpio107",
0821 };
0822 static const char * const _V_PPS_OUT_groups[] = {
0823     "gpio83", "gpio84", "gpio107",
0824 };
0825 static const char * const gps_tx_groups[] = {
0826     "gpio83", "gpio84", "gpio107", "gpio109",
0827 };
0828 static const char * const uim_batt_groups[] = {
0829     "gpio85",
0830 };
0831 static const char * const dp_hot_groups[] = {
0832     "gpio85", "gpio117",
0833 };
0834 static const char * const aoss_cti_groups[] = {
0835     "gpio85",
0836 };
0837 static const char * const qup14_groups[] = {
0838     "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
0839 };
0840 static const char * const adsp_ext_groups[] = {
0841     "gpio87",
0842 };
0843 static const char * const tsense_pwm1_groups[] = {
0844     "gpio88",
0845 };
0846 static const char * const tsense_pwm2_groups[] = {
0847     "gpio88",
0848 };
0849 static const char * const qlink_request_groups[] = {
0850     "gpio96",
0851 };
0852 static const char * const qlink_enable_groups[] = {
0853     "gpio97",
0854 };
0855 static const char * const pa_indicator_groups[] = {
0856     "gpio99",
0857 };
0858 static const char * const usb_phy_groups[] = {
0859     "gpio104",
0860 };
0861 static const char * const mss_lte_groups[] = {
0862     "gpio108", "gpio109",
0863 };
0864 static const char * const qup04_i2c_groups[] = {
0865     "gpio115", "gpio116",
0866 };
0867 static const char * const qup04_uart_groups[] = {
0868     "gpio115", "gpio116",
0869 };
0870 
0871 static const struct msm_function sc7180_functions[] = {
0872     FUNCTION(adsp_ext),
0873     FUNCTION(agera_pll),
0874     FUNCTION(aoss_cti),
0875     FUNCTION(atest_char),
0876     FUNCTION(atest_char0),
0877     FUNCTION(atest_char1),
0878     FUNCTION(atest_char2),
0879     FUNCTION(atest_char3),
0880     FUNCTION(atest_tsens),
0881     FUNCTION(atest_tsens2),
0882     FUNCTION(atest_usb1),
0883     FUNCTION(atest_usb2),
0884     FUNCTION(atest_usb10),
0885     FUNCTION(atest_usb11),
0886     FUNCTION(atest_usb12),
0887     FUNCTION(atest_usb13),
0888     FUNCTION(atest_usb20),
0889     FUNCTION(atest_usb21),
0890     FUNCTION(atest_usb22),
0891     FUNCTION(atest_usb23),
0892     FUNCTION(audio_ref),
0893     FUNCTION(btfm_slimbus),
0894     FUNCTION(cam_mclk),
0895     FUNCTION(cci_async),
0896     FUNCTION(cci_i2c),
0897     FUNCTION(cci_timer0),
0898     FUNCTION(cci_timer1),
0899     FUNCTION(cci_timer2),
0900     FUNCTION(cci_timer3),
0901     FUNCTION(cci_timer4),
0902     FUNCTION(cri_trng),
0903     FUNCTION(dbg_out),
0904     FUNCTION(ddr_bist),
0905     FUNCTION(ddr_pxi0),
0906     FUNCTION(ddr_pxi1),
0907     FUNCTION(ddr_pxi2),
0908     FUNCTION(ddr_pxi3),
0909     FUNCTION(dp_hot),
0910     FUNCTION(edp_lcd),
0911     FUNCTION(gcc_gp1),
0912     FUNCTION(gcc_gp2),
0913     FUNCTION(gcc_gp3),
0914     FUNCTION(gpio),
0915     FUNCTION(gp_pdm0),
0916     FUNCTION(gp_pdm1),
0917     FUNCTION(gp_pdm2),
0918     FUNCTION(gps_tx),
0919     FUNCTION(jitter_bist),
0920     FUNCTION(ldo_en),
0921     FUNCTION(ldo_update),
0922     FUNCTION(lpass_ext),
0923     FUNCTION(mdp_vsync),
0924     FUNCTION(mdp_vsync0),
0925     FUNCTION(mdp_vsync1),
0926     FUNCTION(mdp_vsync2),
0927     FUNCTION(mdp_vsync3),
0928     FUNCTION(mi2s_0),
0929     FUNCTION(mi2s_1),
0930     FUNCTION(mi2s_2),
0931     FUNCTION(mss_lte),
0932     FUNCTION(m_voc),
0933     FUNCTION(pa_indicator),
0934     FUNCTION(phase_flag),
0935     FUNCTION(PLL_BIST),
0936     FUNCTION(pll_bypassnl),
0937     FUNCTION(pll_reset),
0938     FUNCTION(prng_rosc),
0939     FUNCTION(qdss),
0940     FUNCTION(qdss_cti),
0941     FUNCTION(qlink_enable),
0942     FUNCTION(qlink_request),
0943     FUNCTION(qspi_clk),
0944     FUNCTION(qspi_cs),
0945     FUNCTION(qspi_data),
0946     FUNCTION(qup00),
0947     FUNCTION(qup01),
0948     FUNCTION(qup02_i2c),
0949     FUNCTION(qup02_uart),
0950     FUNCTION(qup03),
0951     FUNCTION(qup04_i2c),
0952     FUNCTION(qup04_uart),
0953     FUNCTION(qup05),
0954     FUNCTION(qup10),
0955     FUNCTION(qup11_i2c),
0956     FUNCTION(qup11_uart),
0957     FUNCTION(qup12),
0958     FUNCTION(qup13_i2c),
0959     FUNCTION(qup13_uart),
0960     FUNCTION(qup14),
0961     FUNCTION(qup15),
0962     FUNCTION(sdc1_tb),
0963     FUNCTION(sdc2_tb),
0964     FUNCTION(sd_write),
0965     FUNCTION(sp_cmu),
0966     FUNCTION(tgu_ch0),
0967     FUNCTION(tgu_ch1),
0968     FUNCTION(tgu_ch2),
0969     FUNCTION(tgu_ch3),
0970     FUNCTION(tsense_pwm1),
0971     FUNCTION(tsense_pwm2),
0972     FUNCTION(uim1),
0973     FUNCTION(uim2),
0974     FUNCTION(uim_batt),
0975     FUNCTION(usb_phy),
0976     FUNCTION(vfr_1),
0977     FUNCTION(_V_GPIO),
0978     FUNCTION(_V_PPS_IN),
0979     FUNCTION(_V_PPS_OUT),
0980     FUNCTION(vsense_trigger),
0981     FUNCTION(wlan1_adc0),
0982     FUNCTION(wlan1_adc1),
0983     FUNCTION(wlan2_adc0),
0984     FUNCTION(wlan2_adc1),
0985 };
0986 
0987 /* Every pin is maintained as a single group, and missing or non-existing pin
0988  * would be maintained as dummy group to synchronize pin group index with
0989  * pin descriptor registered with pinctrl core.
0990  * Clients would not be able to request these dummy pin groups.
0991  */
0992 static const struct msm_pingroup sc7180_groups[] = {
0993     [0] = PINGROUP(0, SOUTH, qup01, cri_trng, _, phase_flag, _, _, _, _, _),
0994     [1] = PINGROUP(1, SOUTH, qup01, cri_trng, _, phase_flag, _, _, _, _, _),
0995     [2] = PINGROUP(2, SOUTH, qup01, cri_trng, _, phase_flag, _, _, _, _, _),
0996     [3] = PINGROUP(3, SOUTH, qup01, sp_cmu, dbg_out, qdss_cti, _, _, _, _, _),
0997     [4] = PINGROUP(4, NORTH, sdc1_tb, _, qdss_cti, _, _, _, _, _, _),
0998     [5] = PINGROUP(5, NORTH, sdc2_tb, _, _, _, _, _, _, _, _),
0999     [6] = PINGROUP(6, NORTH, qup11_i2c, qup11_uart, _, _, _, _, _, _, _),
1000     [7] = PINGROUP(7, NORTH, qup11_i2c, qup11_uart, ddr_bist, _, _, _, _, _, _),
1001     [8] = PINGROUP(8, NORTH, gp_pdm1, ddr_bist, _, phase_flag, qdss_cti, _, _, _, _),
1002     [9] = PINGROUP(9, NORTH, ddr_bist, _, phase_flag, qdss_cti, _, _, _, _, _),
1003     [10] = PINGROUP(10, NORTH, mdp_vsync, ddr_bist, _, _, _, _, _, _, _),
1004     [11] = PINGROUP(11, NORTH, mdp_vsync, edp_lcd, _, phase_flag, ddr_pxi2, _, _, _, _),
1005     [12] = PINGROUP(12, SOUTH, mdp_vsync, m_voc, qup01, _, phase_flag, wlan2_adc0, atest_usb10, ddr_pxi3, _),
1006     [13] = PINGROUP(13, SOUTH, cam_mclk, pll_bypassnl, qdss, _, _, _, _, _, _),
1007     [14] = PINGROUP(14, SOUTH, cam_mclk, pll_reset, qdss, _, _, _, _, _, _),
1008     [15] = PINGROUP(15, SOUTH, cam_mclk, qup02_i2c, qup02_uart, qdss, _, _, _, _, _),
1009     [16] = PINGROUP(16, SOUTH, cam_mclk, qup02_i2c, qup02_uart, qdss, _, _, _, _, _),
1010     [17] = PINGROUP(17, SOUTH, cci_i2c, _, phase_flag, qdss, _, wlan1_adc0, atest_usb12, ddr_pxi1, atest_char),
1011     [18] = PINGROUP(18, SOUTH, cci_i2c, agera_pll, _, phase_flag, qdss, vsense_trigger, ddr_pxi0, atest_char3, _),
1012     [19] = PINGROUP(19, SOUTH, cci_i2c, _, phase_flag, qdss, atest_char2, _, _, _, _),
1013     [20] = PINGROUP(20, SOUTH, cci_i2c, _, phase_flag, qdss, atest_char1, _, _, _, _),
1014     [21] = PINGROUP(21, NORTH, cci_timer0, gcc_gp2, _, qdss, atest_char0, _, _, _, _),
1015     [22] = PINGROUP(22, NORTH, cci_timer1, gcc_gp3, _, qdss, _, _, _, _, _),
1016     [23] = PINGROUP(23, SOUTH, cci_timer2, cam_mclk, qdss, _, _, _, _, _, _),
1017     [24] = PINGROUP(24, SOUTH, cci_timer3, cci_async, qdss, _, _, _, _, _, _),
1018     [25] = PINGROUP(25, SOUTH, cci_timer4, cci_async, qup05, _, phase_flag, qdss, _, _, _),
1019     [26] = PINGROUP(26, SOUTH, cci_async, qup05, _, phase_flag, qdss, atest_tsens, atest_usb11, ddr_pxi2, _),
1020     [27] = PINGROUP(27, SOUTH, cci_i2c, qup05, PLL_BIST, _, phase_flag, qdss, ddr_pxi0, _, _),
1021     [28] = PINGROUP(28, SOUTH, cci_i2c, qup05, _, phase_flag, qdss, _, _, _, _),
1022     [29] = PINGROUP(29, NORTH, _, qdss, _, _, _, _, _, _, _),
1023     [30] = PINGROUP(30, SOUTH, qdss, _, _, _, _, _, _, _, _),
1024     [31] = PINGROUP(31, NORTH, _, qdss, _, _, _, _, _, _, _),
1025     [32] = PINGROUP(32, NORTH, _, phase_flag, _, _, _, _, _, _, _),
1026     [33] = PINGROUP(33, NORTH, sd_write, _, phase_flag, qdss_cti, _, _, _, _, _),
1027     [34] = PINGROUP(34, SOUTH, qup00, _, phase_flag, qdss, _, _, _, _, _),
1028     [35] = PINGROUP(35, SOUTH, qup00, _, phase_flag, qdss, _, _, _, _, _),
1029     [36] = PINGROUP(36, SOUTH, qup00, _, phase_flag, qdss, _, _, _, _, _),
1030     [37] = PINGROUP(37, SOUTH, qup00, gp_pdm0, _, phase_flag, qdss, _, _, _, _),
1031     [38] = PINGROUP(38, SOUTH, qup03, _, phase_flag, _, _, _, _, _, _),
1032     [39] = PINGROUP(39, SOUTH, qup03, _, phase_flag, atest_tsens2, wlan2_adc1, atest_usb1, _, _, _),
1033     [40] = PINGROUP(40, SOUTH, qup03, _, _, _, _, _, _, _, _),
1034     [41] = PINGROUP(41, SOUTH, qup03, _, _, _, _, _, _, _, _),
1035     [42] = PINGROUP(42, NORTH, qup12, _, phase_flag, _, _, _, _, _, _),
1036     [43] = PINGROUP(43, NORTH, qup12, _, _, _, _, _, _, _, _),
1037     [44] = PINGROUP(44, NORTH, qup12, _, phase_flag, qdss_cti, wlan1_adc1, atest_usb13, ddr_pxi1, _, _),
1038     [45] = PINGROUP(45, NORTH, qup12, qdss_cti, _, _, _, _, _, _, _),
1039     [46] = PINGROUP(46, NORTH, qup13_i2c, qup13_uart, _, _, _, _, _, _, _),
1040     [47] = PINGROUP(47, NORTH, qup13_i2c, qup13_uart, _, _, _, _, _, _, _),
1041     [48] = PINGROUP(48, NORTH, gcc_gp1, _, _, _, _, _, _, _, _),
1042     [49] = PINGROUP(49, WEST, mi2s_1, btfm_slimbus, _, _, _, _, _, _, _),
1043     [50] = PINGROUP(50, WEST, mi2s_1, btfm_slimbus, gp_pdm1, _, _, _, _, _, _),
1044     [51] = PINGROUP(51, WEST, mi2s_1, btfm_slimbus, atest_usb2, _, _, _, _, _, _),
1045     [52] = PINGROUP(52, WEST, mi2s_1, btfm_slimbus, atest_usb23, _, _, _, _, _, _),
1046     [53] = PINGROUP(53, WEST, mi2s_0, qup15, qdss, atest_usb22, _, _, _, _, _),
1047     [54] = PINGROUP(54, WEST, mi2s_0, qup15, qdss, atest_usb21, _, _, _, _, _),
1048     [55] = PINGROUP(55, WEST, mi2s_0, qup15, qdss, atest_usb20, _, _, _, _, _),
1049     [56] = PINGROUP(56, WEST, mi2s_0, qup15, gcc_gp1, _, phase_flag, qdss, _, _, _),
1050     [57] = PINGROUP(57, WEST, lpass_ext, audio_ref, jitter_bist, gp_pdm2, _, phase_flag, qdss, _, _),
1051     [58] = PINGROUP(58, WEST, lpass_ext, _, phase_flag, _, _, _, _, _, _),
1052     [59] = PINGROUP(59, NORTH, qup10, _, _, _, _, _, _, _, _),
1053     [60] = PINGROUP(60, NORTH, qup10, _, _, _, _, _, _, _, _),
1054     [61] = PINGROUP(61, NORTH, qup10, _, _, _, _, _, _, _, _),
1055     [62] = PINGROUP(62, NORTH, qup10, tgu_ch3, _, _, _, _, _, _, _),
1056     [63] = PINGROUP(63, NORTH, qspi_clk, mdp_vsync0, mi2s_2, mdp_vsync1, mdp_vsync2, mdp_vsync3, tgu_ch0, _, phase_flag),
1057     [64] = PINGROUP(64, NORTH, qspi_data, mi2s_2, tgu_ch1, _, phase_flag, _, _, _, _),
1058     [65] = PINGROUP(65, NORTH, qspi_data, mi2s_2, vfr_1, tgu_ch2, _, _, _, _, _),
1059     [66] = PINGROUP(66, NORTH, qspi_data, mi2s_2, _, _, _, _, _, _, _),
1060     [67] = PINGROUP(67, NORTH, qspi_data, _, _, _, _, _, _, _, _),
1061     [68] = PINGROUP(68, NORTH, qspi_cs, qup10, gp_pdm0, _, _, _, _, _, _),
1062     [69] = PINGROUP(69, WEST, _, _, _, _, _, _, _, _, _),
1063     [70] = PINGROUP(70, NORTH, _, _, mdp_vsync, ldo_en, _, _, _, _, _),
1064     [71] = PINGROUP(71, NORTH, _, mdp_vsync, ldo_update, _, _, _, _, _, _),
1065     [72] = PINGROUP(72, NORTH, qspi_cs, qup10, prng_rosc, _, qdss_cti, _, _, _, _),
1066     [73] = PINGROUP(73, WEST, _, _, _, _, _, _, _, _, _),
1067     [74] = PINGROUP(74, WEST, _, _, _, _, _, _, _, _, _),
1068     [75] = PINGROUP(75, WEST, uim2, _, _, _, _, _, _, _, _),
1069     [76] = PINGROUP(76, WEST, uim2, _, _, _, _, _, _, _, _),
1070     [77] = PINGROUP(77, WEST, uim2, _, _, _, _, _, _, _, _),
1071     [78] = PINGROUP(78, WEST, uim2, _, _, _, _, _, _, _, _),
1072     [79] = PINGROUP(79, WEST, uim1, _, _, _, _, _, _, _, _),
1073     [80] = PINGROUP(80, WEST, uim1, _, _, _, _, _, _, _, _),
1074     [81] = PINGROUP(81, WEST, uim1, _, _, _, _, _, _, _, _),
1075     [82] = PINGROUP(82, WEST, uim1, _, _, _, _, _, _, _, _),
1076     [83] = PINGROUP(83, WEST, _, _V_GPIO, _V_PPS_IN, _V_PPS_OUT, gps_tx, _, _, _, _),
1077     [84] = PINGROUP(84, WEST, _, _V_GPIO, _V_PPS_IN, _V_PPS_OUT, gps_tx, _, _, _, _),
1078     [85] = PINGROUP(85, WEST, uim_batt, dp_hot, aoss_cti, _, _, _, _, _, _),
1079     [86] = PINGROUP(86, NORTH, qup14, qdss, _, _, _, _, _, _, _),
1080     [87] = PINGROUP(87, NORTH, qup14, adsp_ext, qdss, _, _, _, _, _, _),
1081     [88] = PINGROUP(88, NORTH, qup14, qdss, tsense_pwm1, tsense_pwm2, _, _, _, _, _),
1082     [89] = PINGROUP(89, NORTH, qup14, qdss, _, _, _, _, _, _, _),
1083     [90] = PINGROUP(90, NORTH, qup14, qdss, _, _, _, _, _, _, _),
1084     [91] = PINGROUP(91, NORTH, qup14, qdss, _, _, _, _, _, _, _),
1085     [92] = PINGROUP(92, NORTH, _, _, _, _, _, _, _, _, _),
1086     [93] = PINGROUP(93, NORTH, qdss, _, _, _, _, _, _, _, _),
1087     [94] = PINGROUP(94, SOUTH, qup01, _, _, _, _, _, _, _, _),
1088     [95] = PINGROUP(95, WEST, _, _, _, _, _, _, _, _, _),
1089     [96] = PINGROUP(96, WEST, qlink_request, _, _, _, _, _, _, _, _),
1090     [97] = PINGROUP(97, WEST, qlink_enable, _, _, _, _, _, _, _, _),
1091     [98] = PINGROUP(98, WEST, _, _, _, _, _, _, _, _, _),
1092     [99] = PINGROUP(99, WEST, _, pa_indicator, _, _, _, _, _, _, _),
1093     [100] = PINGROUP(100, WEST, _, _, _, _, _, _, _, _, _),
1094     [101] = PINGROUP(101, NORTH, _, _, _, _, _, _, _, _, _),
1095     [102] = PINGROUP(102, NORTH, _, _, _, _, _, _, _, _, _),
1096     [103] = PINGROUP(103, NORTH, _, _, _, _, _, _, _, _, _),
1097     [104] = PINGROUP(104, WEST, usb_phy, _, qdss, _, _, _, _, _, _),
1098     [105] = PINGROUP(105, NORTH, _, _, _, _, _, _, _, _, _),
1099     [106] = PINGROUP(106, NORTH, _, _, _, _, _, _, _, _, _),
1100     [107] = PINGROUP(107, WEST, _, _V_GPIO, _V_PPS_IN, _V_PPS_OUT, gps_tx, _, _, _, _),
1101     [108] = PINGROUP(108, SOUTH, mss_lte, _, phase_flag, ddr_pxi3, _, _, _, _, _),
1102     [109] = PINGROUP(109, SOUTH, mss_lte, gps_tx, _, phase_flag, _, _, _, _, _),
1103     [110] = PINGROUP(110, NORTH, _, _, _, _, _, _, _, _, _),
1104     [111] = PINGROUP(111, NORTH, _, _, _, _, _, _, _, _, _),
1105     [112] = PINGROUP(112, NORTH, _, _, _, _, _, _, _, _, _),
1106     [113] = PINGROUP(113, NORTH, _, _, _, _, _, _, _, _, _),
1107     [114] = PINGROUP(114, NORTH, _, _, _, _, _, _, _, _, _),
1108     [115] = PINGROUP(115, WEST, qup04_i2c, qup04_uart, _, _, _, _, _, _, _),
1109     [116] = PINGROUP(116, WEST, qup04_i2c, qup04_uart, _, _, _, _, _, _, _),
1110     [117] = PINGROUP(117, WEST, dp_hot, _, _, _, _, _, _, _, _),
1111     [118] = PINGROUP(118, WEST, _, _, _, _, _, _, _, _, _),
1112     [119] = UFS_RESET(ufs_reset, 0x7f000),
1113     [120] = SDC_QDSD_PINGROUP(sdc1_rclk, 0x7a000, 15, 0),
1114     [121] = SDC_QDSD_PINGROUP(sdc1_clk, 0x7a000, 13, 6),
1115     [122] = SDC_QDSD_PINGROUP(sdc1_cmd, 0x7a000, 11, 3),
1116     [123] = SDC_QDSD_PINGROUP(sdc1_data, 0x7a000, 9, 0),
1117     [124] = SDC_QDSD_PINGROUP(sdc2_clk, 0x7b000, 14, 6),
1118     [125] = SDC_QDSD_PINGROUP(sdc2_cmd, 0x7b000, 11, 3),
1119     [126] = SDC_QDSD_PINGROUP(sdc2_data, 0x7b000, 9, 0),
1120 };
1121 
1122 static const struct msm_gpio_wakeirq_map sc7180_pdc_map[] = {
1123     {0, 40}, {3, 50}, {4, 42}, {5, 70}, {6, 41}, {9, 35},
1124     {10, 80}, {11, 51}, {16, 20}, {21, 55}, {22, 90}, {23, 21},
1125     {24, 61}, {26, 52}, {28, 36}, {30, 100}, {31, 33}, {32, 81},
1126     {33, 62}, {34, 43}, {36, 91}, {37, 53}, {38, 63}, {39, 72},
1127     {41, 101}, {42, 7}, {43, 34}, {45, 73}, {47, 82}, {49, 17},
1128     {52, 109}, {53, 102}, {55, 92}, {56, 56}, {57, 57}, {58, 83},
1129     {59, 37}, {62, 110}, {63, 111}, {64, 74}, {65, 44}, {66, 93},
1130     {67, 58}, {68, 112}, {69, 32}, {70, 54}, {72, 59}, {73, 64},
1131     {74, 71}, {78, 31}, {82, 30}, {85, 103}, {86, 38}, {87, 39},
1132     {88, 45}, {89, 46}, {90, 47}, {91, 48}, {92, 60}, {93, 49},
1133     {94, 84}, {95, 94}, {98, 65}, {101, 66}, {104, 67}, {109, 104},
1134     {110, 68}, {113, 69}, {114, 113}, {115, 108}, {116, 121},
1135     {117, 114}, {118, 119},
1136 };
1137 
1138 static const struct msm_pinctrl_soc_data sc7180_pinctrl = {
1139     .pins = sc7180_pins,
1140     .npins = ARRAY_SIZE(sc7180_pins),
1141     .functions = sc7180_functions,
1142     .nfunctions = ARRAY_SIZE(sc7180_functions),
1143     .groups = sc7180_groups,
1144     .ngroups = ARRAY_SIZE(sc7180_groups),
1145     .ngpios = 120,
1146     .tiles = sc7180_tiles,
1147     .ntiles = ARRAY_SIZE(sc7180_tiles),
1148     .wakeirq_map = sc7180_pdc_map,
1149     .nwakeirq_map = ARRAY_SIZE(sc7180_pdc_map),
1150     .wakeirq_dual_edge_errata = true,
1151 };
1152 
1153 static int sc7180_pinctrl_probe(struct platform_device *pdev)
1154 {
1155     return msm_pinctrl_probe(pdev, &sc7180_pinctrl);
1156 }
1157 
1158 static const struct of_device_id sc7180_pinctrl_of_match[] = {
1159     { .compatible = "qcom,sc7180-pinctrl", },
1160     { },
1161 };
1162 
1163 static struct platform_driver sc7180_pinctrl_driver = {
1164     .driver = {
1165         .name = "sc7180-pinctrl",
1166         .pm = &msm_pinctrl_dev_pm_ops,
1167         .of_match_table = sc7180_pinctrl_of_match,
1168     },
1169     .probe = sc7180_pinctrl_probe,
1170     .remove = msm_pinctrl_remove,
1171 };
1172 
1173 static int __init sc7180_pinctrl_init(void)
1174 {
1175     return platform_driver_register(&sc7180_pinctrl_driver);
1176 }
1177 arch_initcall(sc7180_pinctrl_init);
1178 
1179 static void __exit sc7180_pinctrl_exit(void)
1180 {
1181     platform_driver_unregister(&sc7180_pinctrl_driver);
1182 }
1183 module_exit(sc7180_pinctrl_exit);
1184 
1185 MODULE_DESCRIPTION("QTI sc7180 pinctrl driver");
1186 MODULE_LICENSE("GPL v2");
1187 MODULE_DEVICE_TABLE(of, sc7180_pinctrl_of_match);
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