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OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
0004  */
0005 
0006 #include <linux/module.h>
0007 #include <linux/of.h>
0008 #include <linux/platform_device.h>
0009 #include <linux/pinctrl/pinctrl.h>
0010 
0011 #include "pinctrl-msm.h"
0012 
0013 #define FUNCTION(fname)                 \
0014     [msm_mux_##fname] = {               \
0015         .name = #fname,             \
0016         .groups = fname##_groups,       \
0017         .ngroups = ARRAY_SIZE(fname##_groups),  \
0018     }
0019 
0020 #define REG_SIZE 0x1000
0021 
0022 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9)    \
0023     {                       \
0024         .name = "gpio" #id,         \
0025         .pins = gpio##id##_pins,        \
0026         .npins = (unsigned int)ARRAY_SIZE(gpio##id##_pins), \
0027         .funcs = (int[]){           \
0028             msm_mux_gpio, /* gpio mode */   \
0029             msm_mux_##f1,           \
0030             msm_mux_##f2,           \
0031             msm_mux_##f3,           \
0032             msm_mux_##f4,           \
0033             msm_mux_##f5,           \
0034             msm_mux_##f6,           \
0035             msm_mux_##f7,           \
0036             msm_mux_##f8,           \
0037             msm_mux_##f9            \
0038         },                  \
0039         .nfuncs = 10,               \
0040         .ctl_reg = REG_SIZE * id,       \
0041         .io_reg = 0x4 + REG_SIZE * id,      \
0042         .intr_cfg_reg = 0x8 + REG_SIZE * id,    \
0043         .intr_status_reg = 0xc + REG_SIZE * id, \
0044         .intr_target_reg = 0x8 + REG_SIZE * id, \
0045         .mux_bit = 2,           \
0046         .pull_bit = 0,          \
0047         .drv_bit = 6,           \
0048         .oe_bit = 9,            \
0049         .in_bit = 0,            \
0050         .out_bit = 1,           \
0051         .intr_enable_bit = 0,       \
0052         .intr_status_bit = 0,       \
0053         .intr_target_bit = 5,       \
0054         .intr_target_kpss_val = 3,  \
0055         .intr_raw_status_bit = 4,   \
0056         .intr_polarity_bit = 1,     \
0057         .intr_detection_bit = 2,    \
0058         .intr_detection_width = 2,  \
0059     }
0060 
0061 #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv)  \
0062     {                           \
0063         .name = #pg_name,           \
0064         .pins = pg_name##_pins,         \
0065         .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins),  \
0066         .ctl_reg = ctl,             \
0067         .io_reg = 0,                \
0068         .intr_cfg_reg = 0,          \
0069         .intr_status_reg = 0,           \
0070         .intr_target_reg = 0,           \
0071         .mux_bit = -1,              \
0072         .pull_bit = pull,           \
0073         .drv_bit = drv,             \
0074         .oe_bit = -1,               \
0075         .in_bit = -1,               \
0076         .out_bit = -1,              \
0077         .intr_enable_bit = -1,          \
0078         .intr_status_bit = -1,          \
0079         .intr_target_bit = -1,          \
0080         .intr_raw_status_bit = -1,      \
0081         .intr_polarity_bit = -1,        \
0082         .intr_detection_bit = -1,       \
0083         .intr_detection_width = -1,     \
0084     }
0085 
0086 #define UFS_RESET(pg_name, offset)              \
0087     {                           \
0088         .name = #pg_name,           \
0089         .pins = pg_name##_pins,         \
0090         .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins),  \
0091         .ctl_reg = offset,          \
0092         .io_reg = offset + 0x4,         \
0093         .intr_cfg_reg = 0,          \
0094         .intr_status_reg = 0,           \
0095         .intr_target_reg = 0,           \
0096         .mux_bit = -1,              \
0097         .pull_bit = 3,              \
0098         .drv_bit = 0,               \
0099         .oe_bit = -1,               \
0100         .in_bit = -1,               \
0101         .out_bit = 0,               \
0102         .intr_enable_bit = -1,          \
0103         .intr_status_bit = -1,          \
0104         .intr_target_bit = -1,          \
0105         .intr_raw_status_bit = -1,      \
0106         .intr_polarity_bit = -1,        \
0107         .intr_detection_bit = -1,       \
0108         .intr_detection_width = -1,     \
0109     }
0110 static const struct pinctrl_pin_desc qcm2290_pins[] = {
0111     PINCTRL_PIN(0, "GPIO_0"),
0112     PINCTRL_PIN(1, "GPIO_1"),
0113     PINCTRL_PIN(2, "GPIO_2"),
0114     PINCTRL_PIN(3, "GPIO_3"),
0115     PINCTRL_PIN(4, "GPIO_4"),
0116     PINCTRL_PIN(5, "GPIO_5"),
0117     PINCTRL_PIN(6, "GPIO_6"),
0118     PINCTRL_PIN(7, "GPIO_7"),
0119     PINCTRL_PIN(8, "GPIO_8"),
0120     PINCTRL_PIN(9, "GPIO_9"),
0121     PINCTRL_PIN(10, "GPIO_10"),
0122     PINCTRL_PIN(11, "GPIO_11"),
0123     PINCTRL_PIN(12, "GPIO_12"),
0124     PINCTRL_PIN(13, "GPIO_13"),
0125     PINCTRL_PIN(14, "GPIO_14"),
0126     PINCTRL_PIN(15, "GPIO_15"),
0127     PINCTRL_PIN(16, "GPIO_16"),
0128     PINCTRL_PIN(17, "GPIO_17"),
0129     PINCTRL_PIN(18, "GPIO_18"),
0130     PINCTRL_PIN(19, "GPIO_19"),
0131     PINCTRL_PIN(20, "GPIO_20"),
0132     PINCTRL_PIN(21, "GPIO_21"),
0133     PINCTRL_PIN(22, "GPIO_22"),
0134     PINCTRL_PIN(23, "GPIO_23"),
0135     PINCTRL_PIN(24, "GPIO_24"),
0136     PINCTRL_PIN(25, "GPIO_25"),
0137     PINCTRL_PIN(26, "GPIO_26"),
0138     PINCTRL_PIN(27, "GPIO_27"),
0139     PINCTRL_PIN(28, "GPIO_28"),
0140     PINCTRL_PIN(29, "GPIO_29"),
0141     PINCTRL_PIN(30, "GPIO_30"),
0142     PINCTRL_PIN(31, "GPIO_31"),
0143     PINCTRL_PIN(32, "GPIO_32"),
0144     PINCTRL_PIN(33, "GPIO_33"),
0145     PINCTRL_PIN(34, "GPIO_34"),
0146     PINCTRL_PIN(35, "GPIO_35"),
0147     PINCTRL_PIN(36, "GPIO_36"),
0148     PINCTRL_PIN(37, "GPIO_37"),
0149     PINCTRL_PIN(38, "GPIO_38"),
0150     PINCTRL_PIN(39, "GPIO_39"),
0151     PINCTRL_PIN(40, "GPIO_40"),
0152     PINCTRL_PIN(41, "GPIO_41"),
0153     PINCTRL_PIN(42, "GPIO_42"),
0154     PINCTRL_PIN(43, "GPIO_43"),
0155     PINCTRL_PIN(44, "GPIO_44"),
0156     PINCTRL_PIN(45, "GPIO_45"),
0157     PINCTRL_PIN(46, "GPIO_46"),
0158     PINCTRL_PIN(47, "GPIO_47"),
0159     PINCTRL_PIN(48, "GPIO_48"),
0160     PINCTRL_PIN(49, "GPIO_49"),
0161     PINCTRL_PIN(50, "GPIO_50"),
0162     PINCTRL_PIN(51, "GPIO_51"),
0163     PINCTRL_PIN(52, "GPIO_52"),
0164     PINCTRL_PIN(53, "GPIO_53"),
0165     PINCTRL_PIN(54, "GPIO_54"),
0166     PINCTRL_PIN(55, "GPIO_55"),
0167     PINCTRL_PIN(56, "GPIO_56"),
0168     PINCTRL_PIN(57, "GPIO_57"),
0169     PINCTRL_PIN(58, "GPIO_58"),
0170     PINCTRL_PIN(59, "GPIO_59"),
0171     PINCTRL_PIN(60, "GPIO_60"),
0172     PINCTRL_PIN(61, "GPIO_61"),
0173     PINCTRL_PIN(62, "GPIO_62"),
0174     PINCTRL_PIN(63, "GPIO_63"),
0175     PINCTRL_PIN(64, "GPIO_64"),
0176     PINCTRL_PIN(69, "GPIO_69"),
0177     PINCTRL_PIN(70, "GPIO_70"),
0178     PINCTRL_PIN(71, "GPIO_71"),
0179     PINCTRL_PIN(72, "GPIO_72"),
0180     PINCTRL_PIN(73, "GPIO_73"),
0181     PINCTRL_PIN(74, "GPIO_74"),
0182     PINCTRL_PIN(75, "GPIO_75"),
0183     PINCTRL_PIN(76, "GPIO_76"),
0184     PINCTRL_PIN(77, "GPIO_77"),
0185     PINCTRL_PIN(78, "GPIO_78"),
0186     PINCTRL_PIN(79, "GPIO_79"),
0187     PINCTRL_PIN(80, "GPIO_80"),
0188     PINCTRL_PIN(81, "GPIO_81"),
0189     PINCTRL_PIN(82, "GPIO_82"),
0190     PINCTRL_PIN(86, "GPIO_86"),
0191     PINCTRL_PIN(87, "GPIO_87"),
0192     PINCTRL_PIN(88, "GPIO_88"),
0193     PINCTRL_PIN(89, "GPIO_89"),
0194     PINCTRL_PIN(90, "GPIO_90"),
0195     PINCTRL_PIN(91, "GPIO_91"),
0196     PINCTRL_PIN(94, "GPIO_94"),
0197     PINCTRL_PIN(95, "GPIO_95"),
0198     PINCTRL_PIN(96, "GPIO_96"),
0199     PINCTRL_PIN(97, "GPIO_97"),
0200     PINCTRL_PIN(98, "GPIO_98"),
0201     PINCTRL_PIN(99, "GPIO_99"),
0202     PINCTRL_PIN(100, "GPIO_100"),
0203     PINCTRL_PIN(101, "GPIO_101"),
0204     PINCTRL_PIN(102, "GPIO_102"),
0205     PINCTRL_PIN(103, "GPIO_103"),
0206     PINCTRL_PIN(104, "GPIO_104"),
0207     PINCTRL_PIN(105, "GPIO_105"),
0208     PINCTRL_PIN(106, "GPIO_106"),
0209     PINCTRL_PIN(107, "GPIO_107"),
0210     PINCTRL_PIN(108, "GPIO_108"),
0211     PINCTRL_PIN(109, "GPIO_109"),
0212     PINCTRL_PIN(110, "GPIO_110"),
0213     PINCTRL_PIN(111, "GPIO_111"),
0214     PINCTRL_PIN(112, "GPIO_112"),
0215     PINCTRL_PIN(113, "GPIO_113"),
0216     PINCTRL_PIN(114, "GPIO_114"),
0217     PINCTRL_PIN(115, "GPIO_115"),
0218     PINCTRL_PIN(116, "GPIO_116"),
0219     PINCTRL_PIN(117, "GPIO_117"),
0220     PINCTRL_PIN(118, "GPIO_118"),
0221     PINCTRL_PIN(119, "GPIO_119"),
0222     PINCTRL_PIN(120, "GPIO_120"),
0223     PINCTRL_PIN(121, "GPIO_121"),
0224     PINCTRL_PIN(122, "GPIO_122"),
0225     PINCTRL_PIN(123, "GPIO_123"),
0226     PINCTRL_PIN(124, "GPIO_124"),
0227     PINCTRL_PIN(125, "GPIO_125"),
0228     PINCTRL_PIN(126, "GPIO_126"),
0229     PINCTRL_PIN(127, "SDC1_RCLK"),
0230     PINCTRL_PIN(128, "SDC1_CLK"),
0231     PINCTRL_PIN(129, "SDC1_CMD"),
0232     PINCTRL_PIN(130, "SDC1_DATA"),
0233     PINCTRL_PIN(131, "SDC2_CLK"),
0234     PINCTRL_PIN(132, "SDC2_CMD"),
0235     PINCTRL_PIN(133, "SDC2_DATA"),
0236 };
0237 
0238 #define DECLARE_MSM_GPIO_PINS(pin) \
0239     static const unsigned int gpio##pin##_pins[] = { pin }
0240 DECLARE_MSM_GPIO_PINS(0);
0241 DECLARE_MSM_GPIO_PINS(1);
0242 DECLARE_MSM_GPIO_PINS(2);
0243 DECLARE_MSM_GPIO_PINS(3);
0244 DECLARE_MSM_GPIO_PINS(4);
0245 DECLARE_MSM_GPIO_PINS(5);
0246 DECLARE_MSM_GPIO_PINS(6);
0247 DECLARE_MSM_GPIO_PINS(7);
0248 DECLARE_MSM_GPIO_PINS(8);
0249 DECLARE_MSM_GPIO_PINS(9);
0250 DECLARE_MSM_GPIO_PINS(10);
0251 DECLARE_MSM_GPIO_PINS(11);
0252 DECLARE_MSM_GPIO_PINS(12);
0253 DECLARE_MSM_GPIO_PINS(13);
0254 DECLARE_MSM_GPIO_PINS(14);
0255 DECLARE_MSM_GPIO_PINS(15);
0256 DECLARE_MSM_GPIO_PINS(16);
0257 DECLARE_MSM_GPIO_PINS(17);
0258 DECLARE_MSM_GPIO_PINS(18);
0259 DECLARE_MSM_GPIO_PINS(19);
0260 DECLARE_MSM_GPIO_PINS(20);
0261 DECLARE_MSM_GPIO_PINS(21);
0262 DECLARE_MSM_GPIO_PINS(22);
0263 DECLARE_MSM_GPIO_PINS(23);
0264 DECLARE_MSM_GPIO_PINS(24);
0265 DECLARE_MSM_GPIO_PINS(25);
0266 DECLARE_MSM_GPIO_PINS(26);
0267 DECLARE_MSM_GPIO_PINS(27);
0268 DECLARE_MSM_GPIO_PINS(28);
0269 DECLARE_MSM_GPIO_PINS(29);
0270 DECLARE_MSM_GPIO_PINS(30);
0271 DECLARE_MSM_GPIO_PINS(31);
0272 DECLARE_MSM_GPIO_PINS(32);
0273 DECLARE_MSM_GPIO_PINS(33);
0274 DECLARE_MSM_GPIO_PINS(34);
0275 DECLARE_MSM_GPIO_PINS(35);
0276 DECLARE_MSM_GPIO_PINS(36);
0277 DECLARE_MSM_GPIO_PINS(37);
0278 DECLARE_MSM_GPIO_PINS(38);
0279 DECLARE_MSM_GPIO_PINS(39);
0280 DECLARE_MSM_GPIO_PINS(40);
0281 DECLARE_MSM_GPIO_PINS(41);
0282 DECLARE_MSM_GPIO_PINS(42);
0283 DECLARE_MSM_GPIO_PINS(43);
0284 DECLARE_MSM_GPIO_PINS(44);
0285 DECLARE_MSM_GPIO_PINS(45);
0286 DECLARE_MSM_GPIO_PINS(46);
0287 DECLARE_MSM_GPIO_PINS(47);
0288 DECLARE_MSM_GPIO_PINS(48);
0289 DECLARE_MSM_GPIO_PINS(49);
0290 DECLARE_MSM_GPIO_PINS(50);
0291 DECLARE_MSM_GPIO_PINS(51);
0292 DECLARE_MSM_GPIO_PINS(52);
0293 DECLARE_MSM_GPIO_PINS(53);
0294 DECLARE_MSM_GPIO_PINS(54);
0295 DECLARE_MSM_GPIO_PINS(55);
0296 DECLARE_MSM_GPIO_PINS(56);
0297 DECLARE_MSM_GPIO_PINS(57);
0298 DECLARE_MSM_GPIO_PINS(58);
0299 DECLARE_MSM_GPIO_PINS(59);
0300 DECLARE_MSM_GPIO_PINS(60);
0301 DECLARE_MSM_GPIO_PINS(61);
0302 DECLARE_MSM_GPIO_PINS(62);
0303 DECLARE_MSM_GPIO_PINS(63);
0304 DECLARE_MSM_GPIO_PINS(64);
0305 DECLARE_MSM_GPIO_PINS(65);
0306 DECLARE_MSM_GPIO_PINS(66);
0307 DECLARE_MSM_GPIO_PINS(67);
0308 DECLARE_MSM_GPIO_PINS(68);
0309 DECLARE_MSM_GPIO_PINS(69);
0310 DECLARE_MSM_GPIO_PINS(70);
0311 DECLARE_MSM_GPIO_PINS(71);
0312 DECLARE_MSM_GPIO_PINS(72);
0313 DECLARE_MSM_GPIO_PINS(73);
0314 DECLARE_MSM_GPIO_PINS(74);
0315 DECLARE_MSM_GPIO_PINS(75);
0316 DECLARE_MSM_GPIO_PINS(76);
0317 DECLARE_MSM_GPIO_PINS(77);
0318 DECLARE_MSM_GPIO_PINS(78);
0319 DECLARE_MSM_GPIO_PINS(79);
0320 DECLARE_MSM_GPIO_PINS(80);
0321 DECLARE_MSM_GPIO_PINS(81);
0322 DECLARE_MSM_GPIO_PINS(82);
0323 DECLARE_MSM_GPIO_PINS(83);
0324 DECLARE_MSM_GPIO_PINS(84);
0325 DECLARE_MSM_GPIO_PINS(85);
0326 DECLARE_MSM_GPIO_PINS(86);
0327 DECLARE_MSM_GPIO_PINS(87);
0328 DECLARE_MSM_GPIO_PINS(88);
0329 DECLARE_MSM_GPIO_PINS(89);
0330 DECLARE_MSM_GPIO_PINS(90);
0331 DECLARE_MSM_GPIO_PINS(91);
0332 DECLARE_MSM_GPIO_PINS(92);
0333 DECLARE_MSM_GPIO_PINS(93);
0334 DECLARE_MSM_GPIO_PINS(94);
0335 DECLARE_MSM_GPIO_PINS(95);
0336 DECLARE_MSM_GPIO_PINS(96);
0337 DECLARE_MSM_GPIO_PINS(97);
0338 DECLARE_MSM_GPIO_PINS(98);
0339 DECLARE_MSM_GPIO_PINS(99);
0340 DECLARE_MSM_GPIO_PINS(100);
0341 DECLARE_MSM_GPIO_PINS(101);
0342 DECLARE_MSM_GPIO_PINS(102);
0343 DECLARE_MSM_GPIO_PINS(103);
0344 DECLARE_MSM_GPIO_PINS(104);
0345 DECLARE_MSM_GPIO_PINS(105);
0346 DECLARE_MSM_GPIO_PINS(106);
0347 DECLARE_MSM_GPIO_PINS(107);
0348 DECLARE_MSM_GPIO_PINS(108);
0349 DECLARE_MSM_GPIO_PINS(109);
0350 DECLARE_MSM_GPIO_PINS(110);
0351 DECLARE_MSM_GPIO_PINS(111);
0352 DECLARE_MSM_GPIO_PINS(112);
0353 DECLARE_MSM_GPIO_PINS(113);
0354 DECLARE_MSM_GPIO_PINS(114);
0355 DECLARE_MSM_GPIO_PINS(115);
0356 DECLARE_MSM_GPIO_PINS(116);
0357 DECLARE_MSM_GPIO_PINS(117);
0358 DECLARE_MSM_GPIO_PINS(118);
0359 DECLARE_MSM_GPIO_PINS(119);
0360 DECLARE_MSM_GPIO_PINS(120);
0361 DECLARE_MSM_GPIO_PINS(121);
0362 DECLARE_MSM_GPIO_PINS(122);
0363 DECLARE_MSM_GPIO_PINS(123);
0364 DECLARE_MSM_GPIO_PINS(124);
0365 DECLARE_MSM_GPIO_PINS(125);
0366 DECLARE_MSM_GPIO_PINS(126);
0367 
0368 static const unsigned int sdc1_rclk_pins[] = { 127 };
0369 static const unsigned int sdc1_clk_pins[] = { 128 };
0370 static const unsigned int sdc1_cmd_pins[] = { 129 };
0371 static const unsigned int sdc1_data_pins[] = { 130 };
0372 static const unsigned int sdc2_clk_pins[] = { 131 };
0373 static const unsigned int sdc2_cmd_pins[] = { 132 };
0374 static const unsigned int sdc2_data_pins[] = { 133 };
0375 
0376 enum qcm2290_functions {
0377     msm_mux_adsp_ext,
0378     msm_mux_agera_pll,
0379     msm_mux_atest,
0380     msm_mux_cam_mclk,
0381     msm_mux_cci_async,
0382     msm_mux_cci_i2c,
0383     msm_mux_cci_timer0,
0384     msm_mux_cci_timer1,
0385     msm_mux_cci_timer2,
0386     msm_mux_cci_timer3,
0387     msm_mux_char_exec,
0388     msm_mux_cri_trng,
0389     msm_mux_cri_trng0,
0390     msm_mux_cri_trng1,
0391     msm_mux_dac_calib,
0392     msm_mux_dbg_out,
0393     msm_mux_ddr_bist,
0394     msm_mux_ddr_pxi0,
0395     msm_mux_ddr_pxi1,
0396     msm_mux_ddr_pxi2,
0397     msm_mux_ddr_pxi3,
0398     msm_mux_gcc_gp1,
0399     msm_mux_gcc_gp2,
0400     msm_mux_gcc_gp3,
0401     msm_mux_gpio,
0402     msm_mux_gp_pdm0,
0403     msm_mux_gp_pdm1,
0404     msm_mux_gp_pdm2,
0405     msm_mux_gsm0_tx,
0406     msm_mux_gsm1_tx,
0407     msm_mux_jitter_bist,
0408     msm_mux_mdp_vsync,
0409     msm_mux_mdp_vsync_out_0,
0410     msm_mux_mdp_vsync_out_1,
0411     msm_mux_mpm_pwr,
0412     msm_mux_mss_lte,
0413     msm_mux_m_voc,
0414     msm_mux_nav_gpio,
0415     msm_mux_pa_indicator,
0416     msm_mux_pbs0,
0417     msm_mux_pbs1,
0418     msm_mux_pbs2,
0419     msm_mux_pbs3,
0420     msm_mux_pbs4,
0421     msm_mux_pbs5,
0422     msm_mux_pbs6,
0423     msm_mux_pbs7,
0424     msm_mux_pbs8,
0425     msm_mux_pbs9,
0426     msm_mux_pbs10,
0427     msm_mux_pbs11,
0428     msm_mux_pbs12,
0429     msm_mux_pbs13,
0430     msm_mux_pbs14,
0431     msm_mux_pbs15,
0432     msm_mux_pbs_out,
0433     msm_mux_phase_flag,
0434     msm_mux_pll_bist,
0435     msm_mux_pll_bypassnl,
0436     msm_mux_pll_reset,
0437     msm_mux_prng_rosc,
0438     msm_mux_pwm_0,
0439     msm_mux_pwm_1,
0440     msm_mux_pwm_2,
0441     msm_mux_pwm_3,
0442     msm_mux_pwm_4,
0443     msm_mux_pwm_5,
0444     msm_mux_pwm_6,
0445     msm_mux_pwm_7,
0446     msm_mux_pwm_8,
0447     msm_mux_pwm_9,
0448     msm_mux_qdss_cti,
0449     msm_mux_qdss_gpio,
0450     msm_mux_qup0,
0451     msm_mux_qup1,
0452     msm_mux_qup2,
0453     msm_mux_qup3,
0454     msm_mux_qup4,
0455     msm_mux_qup5,
0456     msm_mux_sdc1_tb,
0457     msm_mux_sdc2_tb,
0458     msm_mux_sd_write,
0459     msm_mux_ssbi_wtr1,
0460     msm_mux_tgu_ch0,
0461     msm_mux_tgu_ch1,
0462     msm_mux_tgu_ch2,
0463     msm_mux_tgu_ch3,
0464     msm_mux_tsense_pwm,
0465     msm_mux_uim1_clk,
0466     msm_mux_uim1_data,
0467     msm_mux_uim1_present,
0468     msm_mux_uim1_reset,
0469     msm_mux_uim2_clk,
0470     msm_mux_uim2_data,
0471     msm_mux_uim2_present,
0472     msm_mux_uim2_reset,
0473     msm_mux_usb_phy,
0474     msm_mux_vfr_1,
0475     msm_mux_vsense_trigger,
0476     msm_mux_wlan1_adc0,
0477     msm_mux_wlan1_adc1,
0478     msm_mux__,
0479 };
0480 
0481 static const char * const qup0_groups[] = {
0482     "gpio0", "gpio1", "gpio2", "gpio3", "gpio82", "gpio86",
0483 };
0484 static const char * const gpio_groups[] = {
0485     "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
0486     "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
0487     "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
0488     "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
0489     "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
0490     "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
0491     "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
0492     "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
0493     "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
0494     "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
0495     "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
0496     "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
0497     "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
0498     "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
0499     "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
0500     "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
0501     "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
0502     "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122",
0503     "gpio123", "gpio124", "gpio125", "gpio126",
0504 };
0505 static const char * const ddr_bist_groups[] = {
0506     "gpio0", "gpio1", "gpio2", "gpio3",
0507 };
0508 static const char * const phase_flag_groups[] = {
0509     "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6",
0510     "gpio14", "gpio15", "gpio16", "gpio17", "gpio22", "gpio23", "gpio24",
0511     "gpio25", "gpio26", "gpio29", "gpio30", "gpio31", "gpio32", "gpio33",
0512     "gpio35", "gpio36", "gpio43", "gpio44", "gpio45", "gpio63", "gpio64",
0513     "gpio102", "gpio103", "gpio104", "gpio105",
0514 };
0515 static const char * const qdss_gpio_groups[] = {
0516     "gpio0", "gpio1", "gpio2", "gpio3", "gpio8", "gpio9", "gpio10",
0517     "gpio11", "gpio14", "gpio15", "gpio16", "gpio17", "gpio18", "gpio19",
0518     "gpio20", "gpio21", "gpio22", "gpio23", "gpio24", "gpio25", "gpio26",
0519     "gpio47", "gpio48", "gpio69", "gpio70", "gpio87", "gpio90", "gpio91",
0520     "gpio94", "gpio95", "gpio104", "gpio105", "gpio106", "gpio107",
0521     "gpio109", "gpio110",
0522 };
0523 static const char * const atest_groups[] = {
0524     "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6",
0525     "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio29", "gpio30",
0526     "gpio31", "gpio32", "gpio33", "gpio86", "gpio89", "gpio100", "gpio101",
0527 };
0528 static const char * const mpm_pwr_groups[] = {
0529     "gpio1",
0530 };
0531 static const char * const m_voc_groups[] = {
0532     "gpio0",
0533 };
0534 static const char * const dac_calib_groups[] = {
0535     "gpio2",
0536     "gpio3",
0537     "gpio4",
0538     "gpio5",
0539     "gpio6",
0540     "gpio14",
0541     "gpio15",
0542     "gpio16",
0543     "gpio17",
0544     "gpio22",
0545     "gpio23",
0546     "gpio24",
0547     "gpio25",
0548     "gpio26",
0549     "gpio29",
0550     "gpio30",
0551     "gpio31",
0552     "gpio32",
0553     "gpio33",
0554     "gpio80",
0555     "gpio81",
0556     "gpio82",
0557     "gpio102",
0558     "gpio103",
0559     "gpio104",
0560     "gpio105",
0561 };
0562 static const char * const qup1_groups[] = {
0563     "gpio4", "gpio5", "gpio69", "gpio70",
0564 };
0565 static const char * const cri_trng0_groups[] = {
0566     "gpio4",
0567 };
0568 static const char * const cri_trng1_groups[] = {
0569     "gpio5",
0570 };
0571 static const char * const qup2_groups[] = {
0572     "gpio6", "gpio7", "gpio71", "gpio80",
0573 };
0574 static const char * const qup3_groups[] = {
0575     "gpio8", "gpio9", "gpio10", "gpio11",
0576 };
0577 static const char * const pbs_out_groups[] = {
0578     "gpio8", "gpio9", "gpio52",
0579 };
0580 static const char * const pll_bist_groups[] = {
0581     "gpio8", "gpio9",
0582 };
0583 static const char * const tsense_pwm_groups[] = {
0584     "gpio8",
0585 };
0586 static const char * const agera_pll_groups[] = {
0587     "gpio10", "gpio11",
0588 };
0589 static const char * const pbs0_groups[] = {
0590     "gpio10",
0591 };
0592 static const char * const pbs1_groups[] = {
0593     "gpio11",
0594 };
0595 static const char * const qup4_groups[] = {
0596     "gpio12", "gpio13", "gpio96", "gpio97",
0597 };
0598 static const char * const tgu_ch0_groups[] = {
0599     "gpio12",
0600 };
0601 static const char * const tgu_ch1_groups[] = {
0602     "gpio13",
0603 };
0604 static const char * const qup5_groups[] = {
0605     "gpio14", "gpio15", "gpio16", "gpio17",
0606 };
0607 static const char * const tgu_ch2_groups[] = {
0608     "gpio14",
0609 };
0610 static const char * const tgu_ch3_groups[] = {
0611     "gpio15",
0612 };
0613 static const char * const sdc2_tb_groups[] = {
0614     "gpio18",
0615 };
0616 static const char * const cri_trng_groups[] = {
0617     "gpio18",
0618 };
0619 static const char * const pbs2_groups[] = {
0620     "gpio18",
0621 };
0622 static const char * const pwm_0_groups[] = {
0623     "gpio18",
0624 };
0625 static const char * const sdc1_tb_groups[] = {
0626     "gpio19",
0627 };
0628 static const char * const pbs3_groups[] = {
0629     "gpio19",
0630 };
0631 static const char * const cam_mclk_groups[] = {
0632     "gpio20", "gpio21", "gpio27", "gpio28",
0633 };
0634 static const char * const pbs4_groups[] = {
0635     "gpio20",
0636 };
0637 static const char * const adsp_ext_groups[] = {
0638     "gpio21",
0639 };
0640 static const char * const pbs5_groups[] = {
0641     "gpio21",
0642 };
0643 static const char * const cci_i2c_groups[] = {
0644     "gpio22", "gpio23", "gpio29", "gpio30",
0645 };
0646 static const char * const prng_rosc_groups[] = {
0647     "gpio22", "gpio23",
0648 };
0649 static const char * const pbs6_groups[] = {
0650     "gpio22",
0651 };
0652 static const char * const pbs7_groups[] = {
0653     "gpio23",
0654 };
0655 static const char * const cci_timer1_groups[] = {
0656     "gpio24",
0657 };
0658 static const char * const gcc_gp1_groups[] = {
0659     "gpio24", "gpio86",
0660 };
0661 static const char * const pbs8_groups[] = {
0662     "gpio24",
0663 };
0664 static const char * const cci_async_groups[] = {
0665     "gpio25",
0666 };
0667 static const char * const cci_timer0_groups[] = {
0668     "gpio25",
0669 };
0670 static const char * const pbs9_groups[] = {
0671     "gpio25",
0672 };
0673 static const char * const pbs10_groups[] = {
0674     "gpio26",
0675 };
0676 static const char * const vsense_trigger_groups[] = {
0677     "gpio26",
0678 };
0679 static const char * const qdss_cti_groups[] = {
0680     "gpio27", "gpio28", "gpio72", "gpio73", "gpio96", "gpio97",
0681 };
0682 static const char * const cci_timer2_groups[] = {
0683     "gpio28",
0684 };
0685 static const char * const pwm_1_groups[] = {
0686     "gpio28",
0687 };
0688 static const char * const gp_pdm0_groups[] = {
0689     "gpio31", "gpio95",
0690 };
0691 static const char * const cci_timer3_groups[] = {
0692     "gpio32",
0693 };
0694 static const char * const gp_pdm1_groups[] = {
0695     "gpio32", "gpio96",
0696 };
0697 static const char * const gp_pdm2_groups[] = {
0698     "gpio33", "gpio97",
0699 };
0700 static const char * const char_exec_groups[] = {
0701     "gpio37", "gpio38",
0702 };
0703 static const char * const nav_gpio_groups[] = {
0704     "gpio42", "gpio47", "gpio52", "gpio95", "gpio96", "gpio97", "gpio106",
0705     "gpio107", "gpio108",
0706 };
0707 static const char * const pbs14_groups[] = {
0708     "gpio47",
0709 };
0710 static const char * const vfr_1_groups[] = {
0711     "gpio48",
0712 };
0713 static const char * const pbs15_groups[] = {
0714     "gpio48",
0715 };
0716 static const char * const pa_indicator_groups[] = {
0717     "gpio49",
0718 };
0719 static const char * const pwm_2_groups[] = {
0720     "gpio51",
0721 };
0722 static const char * const gsm1_tx_groups[] = {
0723     "gpio53",
0724 };
0725 static const char * const ssbi_wtr1_groups[] = {
0726     "gpio59", "gpio60",
0727 };
0728 static const char * const pll_bypassnl_groups[] = {
0729     "gpio62",
0730 };
0731 static const char * const pll_reset_groups[] = {
0732     "gpio63",
0733 };
0734 static const char * const ddr_pxi0_groups[] = {
0735     "gpio63", "gpio64",
0736 };
0737 static const char * const gsm0_tx_groups[] = {
0738     "gpio64",
0739 };
0740 static const char * const gcc_gp2_groups[] = {
0741     "gpio69", "gpio107",
0742 };
0743 static const char * const ddr_pxi1_groups[] = {
0744     "gpio69", "gpio70",
0745 };
0746 static const char * const gcc_gp3_groups[] = {
0747     "gpio70", "gpio106",
0748 };
0749 static const char * const dbg_out_groups[] = {
0750     "gpio71",
0751 };
0752 static const char * const uim2_data_groups[] = {
0753     "gpio72",
0754 };
0755 static const char * const pwm_3_groups[] = {
0756     "gpio72",
0757 };
0758 static const char * const uim2_clk_groups[] = {
0759     "gpio73",
0760 };
0761 static const char * const uim2_reset_groups[] = {
0762     "gpio74",
0763 };
0764 static const char * const pwm_4_groups[] = {
0765     "gpio74",
0766 };
0767 static const char * const uim2_present_groups[] = {
0768     "gpio75",
0769 };
0770 static const char * const pwm_5_groups[] = {
0771     "gpio75",
0772 };
0773 static const char * const uim1_data_groups[] = {
0774     "gpio76",
0775 };
0776 static const char * const uim1_clk_groups[] = {
0777     "gpio77",
0778 };
0779 static const char * const uim1_reset_groups[] = {
0780     "gpio78",
0781 };
0782 static const char * const uim1_present_groups[] = {
0783     "gpio79",
0784 };
0785 static const char * const mdp_vsync_groups[] = {
0786     "gpio81", "gpio96", "gpio97",
0787 };
0788 static const char * const mdp_vsync_out_0_groups[] = {
0789     "gpio81",
0790 };
0791 static const char * const mdp_vsync_out_1_groups[] = {
0792     "gpio81",
0793 };
0794 static const char * const pwm_6_groups[] = {
0795     "gpio82",
0796 };
0797 static const char * const pbs11_groups[] = {
0798     "gpio87",
0799 };
0800 static const char * const usb_phy_groups[] = {
0801     "gpio89",
0802 };
0803 static const char * const pwm_7_groups[] = {
0804     "gpio89",
0805 };
0806 static const char * const mss_lte_groups[] = {
0807     "gpio90", "gpio91",
0808 };
0809 static const char * const pbs12_groups[] = {
0810     "gpio90",
0811 };
0812 static const char * const pbs13_groups[] = {
0813     "gpio91",
0814 };
0815 static const char * const wlan1_adc0_groups[] = {
0816     "gpio94",
0817 };
0818 static const char * const wlan1_adc1_groups[] = {
0819     "gpio95",
0820 };
0821 static const char * const sd_write_groups[] = {
0822     "gpio96",
0823 };
0824 static const char * const jitter_bist_groups[] = {
0825     "gpio96", "gpio97",
0826 };
0827 static const char * const ddr_pxi2_groups[] = {
0828     "gpio102", "gpio103",
0829 };
0830 static const char * const ddr_pxi3_groups[] = {
0831     "gpio104", "gpio105",
0832 };
0833 static const char * const pwm_8_groups[] = {
0834     "gpio104",
0835 };
0836 static const char * const pwm_9_groups[] = {
0837     "gpio115",
0838 };
0839 
0840 static const struct msm_function qcm2290_functions[] = {
0841     FUNCTION(adsp_ext),
0842     FUNCTION(agera_pll),
0843     FUNCTION(atest),
0844     FUNCTION(cam_mclk),
0845     FUNCTION(cci_async),
0846     FUNCTION(cci_i2c),
0847     FUNCTION(cci_timer0),
0848     FUNCTION(cci_timer1),
0849     FUNCTION(cci_timer2),
0850     FUNCTION(cci_timer3),
0851     FUNCTION(char_exec),
0852     FUNCTION(cri_trng),
0853     FUNCTION(cri_trng0),
0854     FUNCTION(cri_trng1),
0855     FUNCTION(dac_calib),
0856     FUNCTION(dbg_out),
0857     FUNCTION(ddr_bist),
0858     FUNCTION(ddr_pxi0),
0859     FUNCTION(ddr_pxi1),
0860     FUNCTION(ddr_pxi2),
0861     FUNCTION(ddr_pxi3),
0862     FUNCTION(gcc_gp1),
0863     FUNCTION(gcc_gp2),
0864     FUNCTION(gcc_gp3),
0865     FUNCTION(gpio),
0866     FUNCTION(gp_pdm0),
0867     FUNCTION(gp_pdm1),
0868     FUNCTION(gp_pdm2),
0869     FUNCTION(gsm0_tx),
0870     FUNCTION(gsm1_tx),
0871     FUNCTION(jitter_bist),
0872     FUNCTION(mdp_vsync),
0873     FUNCTION(mdp_vsync_out_0),
0874     FUNCTION(mdp_vsync_out_1),
0875     FUNCTION(mpm_pwr),
0876     FUNCTION(mss_lte),
0877     FUNCTION(m_voc),
0878     FUNCTION(nav_gpio),
0879     FUNCTION(pa_indicator),
0880     FUNCTION(pbs0),
0881     FUNCTION(pbs1),
0882     FUNCTION(pbs2),
0883     FUNCTION(pbs3),
0884     FUNCTION(pbs4),
0885     FUNCTION(pbs5),
0886     FUNCTION(pbs6),
0887     FUNCTION(pbs7),
0888     FUNCTION(pbs8),
0889     FUNCTION(pbs9),
0890     FUNCTION(pbs10),
0891     FUNCTION(pbs11),
0892     FUNCTION(pbs12),
0893     FUNCTION(pbs13),
0894     FUNCTION(pbs14),
0895     FUNCTION(pbs15),
0896     FUNCTION(pbs_out),
0897     FUNCTION(phase_flag),
0898     FUNCTION(pll_bist),
0899     FUNCTION(pll_bypassnl),
0900     FUNCTION(pll_reset),
0901     FUNCTION(prng_rosc),
0902     FUNCTION(pwm_0),
0903     FUNCTION(pwm_1),
0904     FUNCTION(pwm_2),
0905     FUNCTION(pwm_3),
0906     FUNCTION(pwm_4),
0907     FUNCTION(pwm_5),
0908     FUNCTION(pwm_6),
0909     FUNCTION(pwm_7),
0910     FUNCTION(pwm_8),
0911     FUNCTION(pwm_9),
0912     FUNCTION(qdss_cti),
0913     FUNCTION(qdss_gpio),
0914     FUNCTION(qup0),
0915     FUNCTION(qup1),
0916     FUNCTION(qup2),
0917     FUNCTION(qup3),
0918     FUNCTION(qup4),
0919     FUNCTION(qup5),
0920     FUNCTION(sdc1_tb),
0921     FUNCTION(sdc2_tb),
0922     FUNCTION(sd_write),
0923     FUNCTION(ssbi_wtr1),
0924     FUNCTION(tgu_ch0),
0925     FUNCTION(tgu_ch1),
0926     FUNCTION(tgu_ch2),
0927     FUNCTION(tgu_ch3),
0928     FUNCTION(tsense_pwm),
0929     FUNCTION(uim1_clk),
0930     FUNCTION(uim1_data),
0931     FUNCTION(uim1_present),
0932     FUNCTION(uim1_reset),
0933     FUNCTION(uim2_clk),
0934     FUNCTION(uim2_data),
0935     FUNCTION(uim2_present),
0936     FUNCTION(uim2_reset),
0937     FUNCTION(usb_phy),
0938     FUNCTION(vfr_1),
0939     FUNCTION(vsense_trigger),
0940     FUNCTION(wlan1_adc0),
0941     FUNCTION(wlan1_adc1),
0942 };
0943 
0944 /* Every pin is maintained as a single group, and missing or non-existing pin
0945  * would be maintained as dummy group to synchronize pin group index with
0946  * pin descriptor registered with pinctrl core.
0947  * Clients would not be able to request these dummy pin groups.
0948  */
0949 static const struct msm_pingroup qcm2290_groups[] = {
0950     [0] = PINGROUP(0, qup0, m_voc, ddr_bist, _, phase_flag, qdss_gpio, atest, _, _),
0951     [1] = PINGROUP(1, qup0, mpm_pwr, ddr_bist, _, phase_flag, qdss_gpio, atest, _, _),
0952     [2] = PINGROUP(2, qup0, ddr_bist, _, phase_flag, qdss_gpio, dac_calib, atest, _, _),
0953     [3] = PINGROUP(3, qup0, ddr_bist, _, phase_flag, qdss_gpio, dac_calib, atest, _, _),
0954     [4] = PINGROUP(4, qup1, cri_trng0, _, phase_flag, dac_calib, atest, _, _, _),
0955     [5] = PINGROUP(5, qup1, cri_trng1, _, phase_flag, dac_calib, atest, _, _, _),
0956     [6] = PINGROUP(6, qup2, _, phase_flag, dac_calib, atest, _, _, _, _),
0957     [7] = PINGROUP(7, qup2, _, _, _, _, _, _, _, _),
0958     [8] = PINGROUP(8, qup3, pbs_out, pll_bist, _, qdss_gpio, _, tsense_pwm, _, _),
0959     [9] = PINGROUP(9, qup3, pbs_out, pll_bist, _, qdss_gpio, _, _, _, _),
0960     [10] = PINGROUP(10, qup3, agera_pll, _, pbs0, qdss_gpio, _, _, _, _),
0961     [11] = PINGROUP(11, qup3, agera_pll, _, pbs1, qdss_gpio, _, _, _, _),
0962     [12] = PINGROUP(12, qup4, tgu_ch0, _, _, _, _, _, _, _),
0963     [13] = PINGROUP(13, qup4, tgu_ch1, _, _, _, _, _, _, _),
0964     [14] = PINGROUP(14, qup5, tgu_ch2, _, phase_flag, qdss_gpio, dac_calib, _, _, _),
0965     [15] = PINGROUP(15, qup5, tgu_ch3, _, phase_flag, qdss_gpio, dac_calib, _, _, _),
0966     [16] = PINGROUP(16, qup5, _, phase_flag, qdss_gpio, dac_calib, _, _, _, _),
0967     [17] = PINGROUP(17, qup5, _, phase_flag, qdss_gpio, dac_calib, _, _, _, _),
0968     [18] = PINGROUP(18, sdc2_tb, cri_trng, pbs2, qdss_gpio, _, pwm_0, _, _, _),
0969     [19] = PINGROUP(19, sdc1_tb, pbs3, qdss_gpio, _, _, _, _, _, _),
0970     [20] = PINGROUP(20, cam_mclk, pbs4, qdss_gpio, _, _, _, _, _, _),
0971     [21] = PINGROUP(21, cam_mclk, adsp_ext, pbs5, qdss_gpio, _, _, _, _, _),
0972     [22] = PINGROUP(22, cci_i2c, prng_rosc, _, pbs6, phase_flag, qdss_gpio, dac_calib, atest, _),
0973     [23] = PINGROUP(23, cci_i2c, prng_rosc, _, pbs7, phase_flag, qdss_gpio, dac_calib, atest, _),
0974     [24] = PINGROUP(24, cci_timer1, gcc_gp1, _, pbs8, phase_flag, qdss_gpio, dac_calib, atest, _),
0975     [25] = PINGROUP(25, cci_async, cci_timer0, _, pbs9, phase_flag, qdss_gpio, dac_calib, atest, _),
0976     [26] = PINGROUP(26, _, pbs10, phase_flag, qdss_gpio, dac_calib, atest, vsense_trigger, _, _),
0977     [27] = PINGROUP(27, cam_mclk, qdss_cti, _, _, _, _, _, _, _),
0978     [28] = PINGROUP(28, cam_mclk, cci_timer2, qdss_cti, _, pwm_1, _, _, _, _),
0979     [29] = PINGROUP(29, cci_i2c, _, phase_flag, dac_calib, atest, _, _, _, _),
0980     [30] = PINGROUP(30, cci_i2c, _, phase_flag, dac_calib, atest, _, _, _, _),
0981     [31] = PINGROUP(31, gp_pdm0, _, phase_flag, dac_calib, atest, _, _, _, _),
0982     [32] = PINGROUP(32, cci_timer3, gp_pdm1, _, phase_flag, dac_calib, atest, _, _, _),
0983     [33] = PINGROUP(33, gp_pdm2, _, phase_flag, dac_calib, atest, _, _, _, _),
0984     [34] = PINGROUP(34, _, _, _, _, _, _, _, _, _),
0985     [35] = PINGROUP(35, _, phase_flag, _, _, _, _, _, _, _),
0986     [36] = PINGROUP(36, _, phase_flag, _, _, _, _, _, _, _),
0987     [37] = PINGROUP(37, _, _, char_exec, _, _, _, _, _, _),
0988     [38] = PINGROUP(38, _, _, _, char_exec, _, _, _, _, _),
0989     [39] = PINGROUP(39, _, _, _, _, _, _, _, _, _),
0990     [40] = PINGROUP(40, _, _, _, _, _, _, _, _, _),
0991     [41] = PINGROUP(41, _, _, _, _, _, _, _, _, _),
0992     [42] = PINGROUP(42, _, nav_gpio, _, _, _, _, _, _, _),
0993     [43] = PINGROUP(43, _, _, phase_flag, _, _, _, _, _, _),
0994     [44] = PINGROUP(44, _, _, phase_flag, _, _, _, _, _, _),
0995     [45] = PINGROUP(45, _, _, phase_flag, _, _, _, _, _, _),
0996     [46] = PINGROUP(46, _, _, _, _, _, _, _, _, _),
0997     [47] = PINGROUP(47, _, nav_gpio, pbs14, qdss_gpio, _, _, _, _, _),
0998     [48] = PINGROUP(48, _, vfr_1, _, pbs15, qdss_gpio, _, _, _, _),
0999     [49] = PINGROUP(49, _, pa_indicator, _, _, _, _, _, _, _),
1000     [50] = PINGROUP(50, _, _, _, _, _, _, _, _, _),
1001     [51] = PINGROUP(51, _, _, _, pwm_2, _, _, _, _, _),
1002     [52] = PINGROUP(52, _, nav_gpio, pbs_out, _, _, _, _, _, _),
1003     [53] = PINGROUP(53, _, gsm1_tx, _, _, _, _, _, _, _),
1004     [54] = PINGROUP(54, _, _, _, _, _, _, _, _, _),
1005     [55] = PINGROUP(55, _, _, _, _, _, _, _, _, _),
1006     [56] = PINGROUP(56, _, _, _, _, _, _, _, _, _),
1007     [57] = PINGROUP(57, _, _, _, _, _, _, _, _, _),
1008     [58] = PINGROUP(58, _, _, _, _, _, _, _, _, _),
1009     [59] = PINGROUP(59, _, ssbi_wtr1, _, _, _, _, _, _, _),
1010     [60] = PINGROUP(60, _, ssbi_wtr1, _, _, _, _, _, _, _),
1011     [61] = PINGROUP(61, _, _, _, _, _, _, _, _, _),
1012     [62] = PINGROUP(62, _, pll_bypassnl, _, _, _, _, _, _, _),
1013     [63] = PINGROUP(63, pll_reset, _, phase_flag, ddr_pxi0, _, _, _, _, _),
1014     [64] = PINGROUP(64, gsm0_tx, _, phase_flag, ddr_pxi0, _, _, _, _, _),
1015     [65] = PINGROUP(65, _, _, _, _, _, _, _, _, _),
1016     [66] = PINGROUP(66, _, _, _, _, _, _, _, _, _),
1017     [67] = PINGROUP(67, _, _, _, _, _, _, _, _, _),
1018     [68] = PINGROUP(68, _, _, _, _, _, _, _, _, _),
1019     [69] = PINGROUP(69, qup1, gcc_gp2, qdss_gpio, ddr_pxi1, _, _, _, _, _),
1020     [70] = PINGROUP(70, qup1, gcc_gp3, qdss_gpio, ddr_pxi1, _, _, _, _, _),
1021     [71] = PINGROUP(71, qup2, dbg_out, _, _, _, _, _, _, _),
1022     [72] = PINGROUP(72, uim2_data, qdss_cti, _, pwm_3, _, _, _, _, _),
1023     [73] = PINGROUP(73, uim2_clk, _, qdss_cti, _, _, _, _, _, _),
1024     [74] = PINGROUP(74, uim2_reset, _, _, pwm_4, _, _, _, _, _),
1025     [75] = PINGROUP(75, uim2_present, _, _, pwm_5, _, _, _, _, _),
1026     [76] = PINGROUP(76, uim1_data, _, _, _, _, _, _, _, _),
1027     [77] = PINGROUP(77, uim1_clk, _, _, _, _, _, _, _, _),
1028     [78] = PINGROUP(78, uim1_reset, _, _, _, _, _, _, _, _),
1029     [79] = PINGROUP(79, uim1_present, _, _, _, _, _, _, _, _),
1030     [80] = PINGROUP(80, qup2, dac_calib, _, _, _, _, _, _, _),
1031     [81] = PINGROUP(81, mdp_vsync_out_0, mdp_vsync_out_1, mdp_vsync, dac_calib, _, _, _, _, _),
1032     [82] = PINGROUP(82, qup0, dac_calib, _, pwm_6, _, _, _, _, _),
1033     [83] = PINGROUP(83, _, _, _, _, _, _, _, _, _),
1034     [84] = PINGROUP(84, _, _, _, _, _, _, _, _, _),
1035     [85] = PINGROUP(85, _, _, _, _, _, _, _, _, _),
1036     [86] = PINGROUP(86, qup0, gcc_gp1, atest, _, _, _, _, _, _),
1037     [87] = PINGROUP(87, pbs11, qdss_gpio, _, _, _, _, _, _, _),
1038     [88] = PINGROUP(88, _, _, _, _, _, _, _, _, _),
1039     [89] = PINGROUP(89, usb_phy, atest, _, pwm_7, _, _, _, _, _),
1040     [90] = PINGROUP(90, mss_lte, pbs12, qdss_gpio, _, _, _, _, _, _),
1041     [91] = PINGROUP(91, mss_lte, pbs13, qdss_gpio, _, _, _, _, _, _),
1042     [92] = PINGROUP(92, _, _, _, _, _, _, _, _, _),
1043     [93] = PINGROUP(93, _, _, _, _, _, _, _, _, _),
1044     [94] = PINGROUP(94, _, qdss_gpio, wlan1_adc0, _, _, _, _, _, _),
1045     [95] = PINGROUP(95, nav_gpio, gp_pdm0, qdss_gpio, wlan1_adc1, _, _, _, _, _),
1046     [96] = PINGROUP(96, qup4, nav_gpio, mdp_vsync, gp_pdm1, sd_write, jitter_bist, qdss_cti, qdss_cti, _),
1047     [97] = PINGROUP(97, qup4, nav_gpio, mdp_vsync, gp_pdm2, jitter_bist, qdss_cti, qdss_cti, _, _),
1048     [98] = PINGROUP(98, _, _, _, _, _, _, _, _, _),
1049     [99] = PINGROUP(99, _, _, _, _, _, _, _, _, _),
1050     [100] = PINGROUP(100, atest, _, _, _, _, _, _, _, _),
1051     [101] = PINGROUP(101, atest, _, _, _, _, _, _, _, _),
1052     [102] = PINGROUP(102, _, phase_flag, dac_calib, ddr_pxi2, _, _, _, _, _),
1053     [103] = PINGROUP(103, _, phase_flag, dac_calib, ddr_pxi2, _, _, _, _, _),
1054     [104] = PINGROUP(104, _, phase_flag, qdss_gpio, dac_calib, ddr_pxi3, _, pwm_8, _, _),
1055     [105] = PINGROUP(105, _, phase_flag, qdss_gpio, dac_calib, ddr_pxi3, _, _, _, _),
1056     [106] = PINGROUP(106, nav_gpio, gcc_gp3, qdss_gpio, _, _, _, _, _, _),
1057     [107] = PINGROUP(107, nav_gpio, gcc_gp2, qdss_gpio, _, _, _, _, _, _),
1058     [108] = PINGROUP(108, nav_gpio, _, _, _, _, _, _, _, _),
1059     [109] = PINGROUP(109, _, qdss_gpio, _, _, _, _, _, _, _),
1060     [110] = PINGROUP(110, _, qdss_gpio, _, _, _, _, _, _, _),
1061     [111] = PINGROUP(111, _, _, _, _, _, _, _, _, _),
1062     [112] = PINGROUP(112, _, _, _, _, _, _, _, _, _),
1063     [113] = PINGROUP(113, _, _, _, _, _, _, _, _, _),
1064     [114] = PINGROUP(114, _, _, _, _, _, _, _, _, _),
1065     [115] = PINGROUP(115, _, pwm_9, _, _, _, _, _, _, _),
1066     [116] = PINGROUP(116, _, _, _, _, _, _, _, _, _),
1067     [117] = PINGROUP(117, _, _, _, _, _, _, _, _, _),
1068     [118] = PINGROUP(118, _, _, _, _, _, _, _, _, _),
1069     [119] = PINGROUP(119, _, _, _, _, _, _, _, _, _),
1070     [120] = PINGROUP(120, _, _, _, _, _, _, _, _, _),
1071     [121] = PINGROUP(121, _, _, _, _, _, _, _, _, _),
1072     [122] = PINGROUP(122, _, _, _, _, _, _, _, _, _),
1073     [123] = PINGROUP(123, _, _, _, _, _, _, _, _, _),
1074     [124] = PINGROUP(124, _, _, _, _, _, _, _, _, _),
1075     [125] = PINGROUP(125, _, _, _, _, _, _, _, _, _),
1076     [126] = PINGROUP(126, _, _, _, _, _, _, _, _, _),
1077     [127] = SDC_QDSD_PINGROUP(sdc1_rclk, 0x84004, 0, 0),
1078     [128] = SDC_QDSD_PINGROUP(sdc1_clk, 0x84000, 13, 6),
1079     [129] = SDC_QDSD_PINGROUP(sdc1_cmd, 0x84000, 11, 3),
1080     [130] = SDC_QDSD_PINGROUP(sdc1_data, 0x84000, 9, 0),
1081     [131] = SDC_QDSD_PINGROUP(sdc2_clk, 0x86000, 14, 6),
1082     [132] = SDC_QDSD_PINGROUP(sdc2_cmd, 0x86000, 11, 3),
1083     [133] = SDC_QDSD_PINGROUP(sdc2_data, 0x86000, 9, 0),
1084 };
1085 
1086 static const struct msm_gpio_wakeirq_map qcm2290_mpm_map[] = {
1087     { 0, 84 }, { 3, 75 }, { 4, 16 }, { 6, 59 }, { 8, 63 }, { 11, 17 },
1088     { 13, 18 }, { 14, 51 }, { 17, 20 }, { 18, 52 }, { 19, 53 }, { 24, 6 },
1089     { 25, 71 }, { 27, 73 }, { 28, 41 }, { 31, 27 }, { 32, 54 }, { 33, 55 },
1090     { 34, 56 }, { 35, 57 }, { 36, 58 }, { 39, 28 }, { 46, 29 }, { 62, 60 },
1091     { 63, 61 }, { 64, 62 }, { 69, 33 }, { 70, 34 }, { 72, 72 }, { 75, 35 },
1092     { 79, 36 }, { 80, 21 }, { 81, 38 }, { 86, 19 }, { 87, 42 }, { 88, 43 },
1093     { 89, 45 }, { 91, 74 }, { 94, 47 }, { 95, 48 }, { 96, 49 }, { 97, 50 },
1094 };
1095 
1096 static const struct msm_pinctrl_soc_data qcm2290_pinctrl = {
1097     .pins = qcm2290_pins,
1098     .npins = ARRAY_SIZE(qcm2290_pins),
1099     .functions = qcm2290_functions,
1100     .nfunctions = ARRAY_SIZE(qcm2290_functions),
1101     .groups = qcm2290_groups,
1102     .ngroups = ARRAY_SIZE(qcm2290_groups),
1103     .ngpios = 127,
1104     .wakeirq_map = qcm2290_mpm_map,
1105     .nwakeirq_map = ARRAY_SIZE(qcm2290_mpm_map),
1106 };
1107 
1108 static int qcm2290_pinctrl_probe(struct platform_device *pdev)
1109 {
1110     return msm_pinctrl_probe(pdev, &qcm2290_pinctrl);
1111 }
1112 
1113 static const struct of_device_id qcm2290_pinctrl_of_match[] = {
1114     { .compatible = "qcom,qcm2290-tlmm", },
1115     { },
1116 };
1117 
1118 static struct platform_driver qcm2290_pinctrl_driver = {
1119     .driver = {
1120         .name = "qcm2290-pinctrl",
1121         .of_match_table = qcm2290_pinctrl_of_match,
1122     },
1123     .probe = qcm2290_pinctrl_probe,
1124     .remove = msm_pinctrl_remove,
1125 };
1126 
1127 static int __init qcm2290_pinctrl_init(void)
1128 {
1129     return platform_driver_register(&qcm2290_pinctrl_driver);
1130 }
1131 arch_initcall(qcm2290_pinctrl_init);
1132 
1133 static void __exit qcm2290_pinctrl_exit(void)
1134 {
1135     platform_driver_unregister(&qcm2290_pinctrl_driver);
1136 }
1137 module_exit(qcm2290_pinctrl_exit);
1138 
1139 MODULE_DESCRIPTION("QTI QCM2290 pinctrl driver");
1140 MODULE_LICENSE("GPL v2");
1141 MODULE_DEVICE_TABLE(of, qcm2290_pinctrl_of_match);
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