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0006 #include <linux/module.h>
0007 #include <linux/of.h>
0008 #include <linux/platform_device.h>
0009 #include <linux/pinctrl/pinctrl.h>
0010
0011 #include "pinctrl-msm.h"
0012
0013 static const struct pinctrl_pin_desc msm8x74_pins[] = {
0014 PINCTRL_PIN(0, "GPIO_0"),
0015 PINCTRL_PIN(1, "GPIO_1"),
0016 PINCTRL_PIN(2, "GPIO_2"),
0017 PINCTRL_PIN(3, "GPIO_3"),
0018 PINCTRL_PIN(4, "GPIO_4"),
0019 PINCTRL_PIN(5, "GPIO_5"),
0020 PINCTRL_PIN(6, "GPIO_6"),
0021 PINCTRL_PIN(7, "GPIO_7"),
0022 PINCTRL_PIN(8, "GPIO_8"),
0023 PINCTRL_PIN(9, "GPIO_9"),
0024 PINCTRL_PIN(10, "GPIO_10"),
0025 PINCTRL_PIN(11, "GPIO_11"),
0026 PINCTRL_PIN(12, "GPIO_12"),
0027 PINCTRL_PIN(13, "GPIO_13"),
0028 PINCTRL_PIN(14, "GPIO_14"),
0029 PINCTRL_PIN(15, "GPIO_15"),
0030 PINCTRL_PIN(16, "GPIO_16"),
0031 PINCTRL_PIN(17, "GPIO_17"),
0032 PINCTRL_PIN(18, "GPIO_18"),
0033 PINCTRL_PIN(19, "GPIO_19"),
0034 PINCTRL_PIN(20, "GPIO_20"),
0035 PINCTRL_PIN(21, "GPIO_21"),
0036 PINCTRL_PIN(22, "GPIO_22"),
0037 PINCTRL_PIN(23, "GPIO_23"),
0038 PINCTRL_PIN(24, "GPIO_24"),
0039 PINCTRL_PIN(25, "GPIO_25"),
0040 PINCTRL_PIN(26, "GPIO_26"),
0041 PINCTRL_PIN(27, "GPIO_27"),
0042 PINCTRL_PIN(28, "GPIO_28"),
0043 PINCTRL_PIN(29, "GPIO_29"),
0044 PINCTRL_PIN(30, "GPIO_30"),
0045 PINCTRL_PIN(31, "GPIO_31"),
0046 PINCTRL_PIN(32, "GPIO_32"),
0047 PINCTRL_PIN(33, "GPIO_33"),
0048 PINCTRL_PIN(34, "GPIO_34"),
0049 PINCTRL_PIN(35, "GPIO_35"),
0050 PINCTRL_PIN(36, "GPIO_36"),
0051 PINCTRL_PIN(37, "GPIO_37"),
0052 PINCTRL_PIN(38, "GPIO_38"),
0053 PINCTRL_PIN(39, "GPIO_39"),
0054 PINCTRL_PIN(40, "GPIO_40"),
0055 PINCTRL_PIN(41, "GPIO_41"),
0056 PINCTRL_PIN(42, "GPIO_42"),
0057 PINCTRL_PIN(43, "GPIO_43"),
0058 PINCTRL_PIN(44, "GPIO_44"),
0059 PINCTRL_PIN(45, "GPIO_45"),
0060 PINCTRL_PIN(46, "GPIO_46"),
0061 PINCTRL_PIN(47, "GPIO_47"),
0062 PINCTRL_PIN(48, "GPIO_48"),
0063 PINCTRL_PIN(49, "GPIO_49"),
0064 PINCTRL_PIN(50, "GPIO_50"),
0065 PINCTRL_PIN(51, "GPIO_51"),
0066 PINCTRL_PIN(52, "GPIO_52"),
0067 PINCTRL_PIN(53, "GPIO_53"),
0068 PINCTRL_PIN(54, "GPIO_54"),
0069 PINCTRL_PIN(55, "GPIO_55"),
0070 PINCTRL_PIN(56, "GPIO_56"),
0071 PINCTRL_PIN(57, "GPIO_57"),
0072 PINCTRL_PIN(58, "GPIO_58"),
0073 PINCTRL_PIN(59, "GPIO_59"),
0074 PINCTRL_PIN(60, "GPIO_60"),
0075 PINCTRL_PIN(61, "GPIO_61"),
0076 PINCTRL_PIN(62, "GPIO_62"),
0077 PINCTRL_PIN(63, "GPIO_63"),
0078 PINCTRL_PIN(64, "GPIO_64"),
0079 PINCTRL_PIN(65, "GPIO_65"),
0080 PINCTRL_PIN(66, "GPIO_66"),
0081 PINCTRL_PIN(67, "GPIO_67"),
0082 PINCTRL_PIN(68, "GPIO_68"),
0083 PINCTRL_PIN(69, "GPIO_69"),
0084 PINCTRL_PIN(70, "GPIO_70"),
0085 PINCTRL_PIN(71, "GPIO_71"),
0086 PINCTRL_PIN(72, "GPIO_72"),
0087 PINCTRL_PIN(73, "GPIO_73"),
0088 PINCTRL_PIN(74, "GPIO_74"),
0089 PINCTRL_PIN(75, "GPIO_75"),
0090 PINCTRL_PIN(76, "GPIO_76"),
0091 PINCTRL_PIN(77, "GPIO_77"),
0092 PINCTRL_PIN(78, "GPIO_78"),
0093 PINCTRL_PIN(79, "GPIO_79"),
0094 PINCTRL_PIN(80, "GPIO_80"),
0095 PINCTRL_PIN(81, "GPIO_81"),
0096 PINCTRL_PIN(82, "GPIO_82"),
0097 PINCTRL_PIN(83, "GPIO_83"),
0098 PINCTRL_PIN(84, "GPIO_84"),
0099 PINCTRL_PIN(85, "GPIO_85"),
0100 PINCTRL_PIN(86, "GPIO_86"),
0101 PINCTRL_PIN(87, "GPIO_87"),
0102 PINCTRL_PIN(88, "GPIO_88"),
0103 PINCTRL_PIN(89, "GPIO_89"),
0104 PINCTRL_PIN(90, "GPIO_90"),
0105 PINCTRL_PIN(91, "GPIO_91"),
0106 PINCTRL_PIN(92, "GPIO_92"),
0107 PINCTRL_PIN(93, "GPIO_93"),
0108 PINCTRL_PIN(94, "GPIO_94"),
0109 PINCTRL_PIN(95, "GPIO_95"),
0110 PINCTRL_PIN(96, "GPIO_96"),
0111 PINCTRL_PIN(97, "GPIO_97"),
0112 PINCTRL_PIN(98, "GPIO_98"),
0113 PINCTRL_PIN(99, "GPIO_99"),
0114 PINCTRL_PIN(100, "GPIO_100"),
0115 PINCTRL_PIN(101, "GPIO_101"),
0116 PINCTRL_PIN(102, "GPIO_102"),
0117 PINCTRL_PIN(103, "GPIO_103"),
0118 PINCTRL_PIN(104, "GPIO_104"),
0119 PINCTRL_PIN(105, "GPIO_105"),
0120 PINCTRL_PIN(106, "GPIO_106"),
0121 PINCTRL_PIN(107, "GPIO_107"),
0122 PINCTRL_PIN(108, "GPIO_108"),
0123 PINCTRL_PIN(109, "GPIO_109"),
0124 PINCTRL_PIN(110, "GPIO_110"),
0125 PINCTRL_PIN(111, "GPIO_111"),
0126 PINCTRL_PIN(112, "GPIO_112"),
0127 PINCTRL_PIN(113, "GPIO_113"),
0128 PINCTRL_PIN(114, "GPIO_114"),
0129 PINCTRL_PIN(115, "GPIO_115"),
0130 PINCTRL_PIN(116, "GPIO_116"),
0131 PINCTRL_PIN(117, "GPIO_117"),
0132 PINCTRL_PIN(118, "GPIO_118"),
0133 PINCTRL_PIN(119, "GPIO_119"),
0134 PINCTRL_PIN(120, "GPIO_120"),
0135 PINCTRL_PIN(121, "GPIO_121"),
0136 PINCTRL_PIN(122, "GPIO_122"),
0137 PINCTRL_PIN(123, "GPIO_123"),
0138 PINCTRL_PIN(124, "GPIO_124"),
0139 PINCTRL_PIN(125, "GPIO_125"),
0140 PINCTRL_PIN(126, "GPIO_126"),
0141 PINCTRL_PIN(127, "GPIO_127"),
0142 PINCTRL_PIN(128, "GPIO_128"),
0143 PINCTRL_PIN(129, "GPIO_129"),
0144 PINCTRL_PIN(130, "GPIO_130"),
0145 PINCTRL_PIN(131, "GPIO_131"),
0146 PINCTRL_PIN(132, "GPIO_132"),
0147 PINCTRL_PIN(133, "GPIO_133"),
0148 PINCTRL_PIN(134, "GPIO_134"),
0149 PINCTRL_PIN(135, "GPIO_135"),
0150 PINCTRL_PIN(136, "GPIO_136"),
0151 PINCTRL_PIN(137, "GPIO_137"),
0152 PINCTRL_PIN(138, "GPIO_138"),
0153 PINCTRL_PIN(139, "GPIO_139"),
0154 PINCTRL_PIN(140, "GPIO_140"),
0155 PINCTRL_PIN(141, "GPIO_141"),
0156 PINCTRL_PIN(142, "GPIO_142"),
0157 PINCTRL_PIN(143, "GPIO_143"),
0158 PINCTRL_PIN(144, "GPIO_144"),
0159 PINCTRL_PIN(145, "GPIO_145"),
0160
0161 PINCTRL_PIN(146, "SDC1_CLK"),
0162 PINCTRL_PIN(147, "SDC1_CMD"),
0163 PINCTRL_PIN(148, "SDC1_DATA"),
0164 PINCTRL_PIN(149, "SDC2_CLK"),
0165 PINCTRL_PIN(150, "SDC2_CMD"),
0166 PINCTRL_PIN(151, "SDC2_DATA"),
0167 PINCTRL_PIN(152, "HSIC_STROBE"),
0168 PINCTRL_PIN(153, "HSIC_DATA"),
0169 };
0170
0171 #define DECLARE_MSM_GPIO_PINS(pin) static const unsigned int gpio##pin##_pins[] = { pin }
0172 DECLARE_MSM_GPIO_PINS(0);
0173 DECLARE_MSM_GPIO_PINS(1);
0174 DECLARE_MSM_GPIO_PINS(2);
0175 DECLARE_MSM_GPIO_PINS(3);
0176 DECLARE_MSM_GPIO_PINS(4);
0177 DECLARE_MSM_GPIO_PINS(5);
0178 DECLARE_MSM_GPIO_PINS(6);
0179 DECLARE_MSM_GPIO_PINS(7);
0180 DECLARE_MSM_GPIO_PINS(8);
0181 DECLARE_MSM_GPIO_PINS(9);
0182 DECLARE_MSM_GPIO_PINS(10);
0183 DECLARE_MSM_GPIO_PINS(11);
0184 DECLARE_MSM_GPIO_PINS(12);
0185 DECLARE_MSM_GPIO_PINS(13);
0186 DECLARE_MSM_GPIO_PINS(14);
0187 DECLARE_MSM_GPIO_PINS(15);
0188 DECLARE_MSM_GPIO_PINS(16);
0189 DECLARE_MSM_GPIO_PINS(17);
0190 DECLARE_MSM_GPIO_PINS(18);
0191 DECLARE_MSM_GPIO_PINS(19);
0192 DECLARE_MSM_GPIO_PINS(20);
0193 DECLARE_MSM_GPIO_PINS(21);
0194 DECLARE_MSM_GPIO_PINS(22);
0195 DECLARE_MSM_GPIO_PINS(23);
0196 DECLARE_MSM_GPIO_PINS(24);
0197 DECLARE_MSM_GPIO_PINS(25);
0198 DECLARE_MSM_GPIO_PINS(26);
0199 DECLARE_MSM_GPIO_PINS(27);
0200 DECLARE_MSM_GPIO_PINS(28);
0201 DECLARE_MSM_GPIO_PINS(29);
0202 DECLARE_MSM_GPIO_PINS(30);
0203 DECLARE_MSM_GPIO_PINS(31);
0204 DECLARE_MSM_GPIO_PINS(32);
0205 DECLARE_MSM_GPIO_PINS(33);
0206 DECLARE_MSM_GPIO_PINS(34);
0207 DECLARE_MSM_GPIO_PINS(35);
0208 DECLARE_MSM_GPIO_PINS(36);
0209 DECLARE_MSM_GPIO_PINS(37);
0210 DECLARE_MSM_GPIO_PINS(38);
0211 DECLARE_MSM_GPIO_PINS(39);
0212 DECLARE_MSM_GPIO_PINS(40);
0213 DECLARE_MSM_GPIO_PINS(41);
0214 DECLARE_MSM_GPIO_PINS(42);
0215 DECLARE_MSM_GPIO_PINS(43);
0216 DECLARE_MSM_GPIO_PINS(44);
0217 DECLARE_MSM_GPIO_PINS(45);
0218 DECLARE_MSM_GPIO_PINS(46);
0219 DECLARE_MSM_GPIO_PINS(47);
0220 DECLARE_MSM_GPIO_PINS(48);
0221 DECLARE_MSM_GPIO_PINS(49);
0222 DECLARE_MSM_GPIO_PINS(50);
0223 DECLARE_MSM_GPIO_PINS(51);
0224 DECLARE_MSM_GPIO_PINS(52);
0225 DECLARE_MSM_GPIO_PINS(53);
0226 DECLARE_MSM_GPIO_PINS(54);
0227 DECLARE_MSM_GPIO_PINS(55);
0228 DECLARE_MSM_GPIO_PINS(56);
0229 DECLARE_MSM_GPIO_PINS(57);
0230 DECLARE_MSM_GPIO_PINS(58);
0231 DECLARE_MSM_GPIO_PINS(59);
0232 DECLARE_MSM_GPIO_PINS(60);
0233 DECLARE_MSM_GPIO_PINS(61);
0234 DECLARE_MSM_GPIO_PINS(62);
0235 DECLARE_MSM_GPIO_PINS(63);
0236 DECLARE_MSM_GPIO_PINS(64);
0237 DECLARE_MSM_GPIO_PINS(65);
0238 DECLARE_MSM_GPIO_PINS(66);
0239 DECLARE_MSM_GPIO_PINS(67);
0240 DECLARE_MSM_GPIO_PINS(68);
0241 DECLARE_MSM_GPIO_PINS(69);
0242 DECLARE_MSM_GPIO_PINS(70);
0243 DECLARE_MSM_GPIO_PINS(71);
0244 DECLARE_MSM_GPIO_PINS(72);
0245 DECLARE_MSM_GPIO_PINS(73);
0246 DECLARE_MSM_GPIO_PINS(74);
0247 DECLARE_MSM_GPIO_PINS(75);
0248 DECLARE_MSM_GPIO_PINS(76);
0249 DECLARE_MSM_GPIO_PINS(77);
0250 DECLARE_MSM_GPIO_PINS(78);
0251 DECLARE_MSM_GPIO_PINS(79);
0252 DECLARE_MSM_GPIO_PINS(80);
0253 DECLARE_MSM_GPIO_PINS(81);
0254 DECLARE_MSM_GPIO_PINS(82);
0255 DECLARE_MSM_GPIO_PINS(83);
0256 DECLARE_MSM_GPIO_PINS(84);
0257 DECLARE_MSM_GPIO_PINS(85);
0258 DECLARE_MSM_GPIO_PINS(86);
0259 DECLARE_MSM_GPIO_PINS(87);
0260 DECLARE_MSM_GPIO_PINS(88);
0261 DECLARE_MSM_GPIO_PINS(89);
0262 DECLARE_MSM_GPIO_PINS(90);
0263 DECLARE_MSM_GPIO_PINS(91);
0264 DECLARE_MSM_GPIO_PINS(92);
0265 DECLARE_MSM_GPIO_PINS(93);
0266 DECLARE_MSM_GPIO_PINS(94);
0267 DECLARE_MSM_GPIO_PINS(95);
0268 DECLARE_MSM_GPIO_PINS(96);
0269 DECLARE_MSM_GPIO_PINS(97);
0270 DECLARE_MSM_GPIO_PINS(98);
0271 DECLARE_MSM_GPIO_PINS(99);
0272 DECLARE_MSM_GPIO_PINS(100);
0273 DECLARE_MSM_GPIO_PINS(101);
0274 DECLARE_MSM_GPIO_PINS(102);
0275 DECLARE_MSM_GPIO_PINS(103);
0276 DECLARE_MSM_GPIO_PINS(104);
0277 DECLARE_MSM_GPIO_PINS(105);
0278 DECLARE_MSM_GPIO_PINS(106);
0279 DECLARE_MSM_GPIO_PINS(107);
0280 DECLARE_MSM_GPIO_PINS(108);
0281 DECLARE_MSM_GPIO_PINS(109);
0282 DECLARE_MSM_GPIO_PINS(110);
0283 DECLARE_MSM_GPIO_PINS(111);
0284 DECLARE_MSM_GPIO_PINS(112);
0285 DECLARE_MSM_GPIO_PINS(113);
0286 DECLARE_MSM_GPIO_PINS(114);
0287 DECLARE_MSM_GPIO_PINS(115);
0288 DECLARE_MSM_GPIO_PINS(116);
0289 DECLARE_MSM_GPIO_PINS(117);
0290 DECLARE_MSM_GPIO_PINS(118);
0291 DECLARE_MSM_GPIO_PINS(119);
0292 DECLARE_MSM_GPIO_PINS(120);
0293 DECLARE_MSM_GPIO_PINS(121);
0294 DECLARE_MSM_GPIO_PINS(122);
0295 DECLARE_MSM_GPIO_PINS(123);
0296 DECLARE_MSM_GPIO_PINS(124);
0297 DECLARE_MSM_GPIO_PINS(125);
0298 DECLARE_MSM_GPIO_PINS(126);
0299 DECLARE_MSM_GPIO_PINS(127);
0300 DECLARE_MSM_GPIO_PINS(128);
0301 DECLARE_MSM_GPIO_PINS(129);
0302 DECLARE_MSM_GPIO_PINS(130);
0303 DECLARE_MSM_GPIO_PINS(131);
0304 DECLARE_MSM_GPIO_PINS(132);
0305 DECLARE_MSM_GPIO_PINS(133);
0306 DECLARE_MSM_GPIO_PINS(134);
0307 DECLARE_MSM_GPIO_PINS(135);
0308 DECLARE_MSM_GPIO_PINS(136);
0309 DECLARE_MSM_GPIO_PINS(137);
0310 DECLARE_MSM_GPIO_PINS(138);
0311 DECLARE_MSM_GPIO_PINS(139);
0312 DECLARE_MSM_GPIO_PINS(140);
0313 DECLARE_MSM_GPIO_PINS(141);
0314 DECLARE_MSM_GPIO_PINS(142);
0315 DECLARE_MSM_GPIO_PINS(143);
0316 DECLARE_MSM_GPIO_PINS(144);
0317 DECLARE_MSM_GPIO_PINS(145);
0318
0319 static const unsigned int sdc1_clk_pins[] = { 146 };
0320 static const unsigned int sdc1_cmd_pins[] = { 147 };
0321 static const unsigned int sdc1_data_pins[] = { 148 };
0322 static const unsigned int sdc2_clk_pins[] = { 149 };
0323 static const unsigned int sdc2_cmd_pins[] = { 150 };
0324 static const unsigned int sdc2_data_pins[] = { 151 };
0325 static const unsigned int hsic_strobe_pins[] = { 152 };
0326 static const unsigned int hsic_data_pins[] = { 153 };
0327
0328 #define FUNCTION(fname) \
0329 [MSM_MUX_##fname] = { \
0330 .name = #fname, \
0331 .groups = fname##_groups, \
0332 .ngroups = ARRAY_SIZE(fname##_groups), \
0333 }
0334
0335 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7) \
0336 { \
0337 .name = "gpio" #id, \
0338 .pins = gpio##id##_pins, \
0339 .npins = ARRAY_SIZE(gpio##id##_pins), \
0340 .funcs = (int[]){ \
0341 MSM_MUX_gpio, \
0342 MSM_MUX_##f1, \
0343 MSM_MUX_##f2, \
0344 MSM_MUX_##f3, \
0345 MSM_MUX_##f4, \
0346 MSM_MUX_##f5, \
0347 MSM_MUX_##f6, \
0348 MSM_MUX_##f7 \
0349 }, \
0350 .nfuncs = 8, \
0351 .ctl_reg = 0x1000 + 0x10 * id, \
0352 .io_reg = 0x1004 + 0x10 * id, \
0353 .intr_cfg_reg = 0x1008 + 0x10 * id, \
0354 .intr_status_reg = 0x100c + 0x10 * id, \
0355 .intr_target_reg = 0x1008 + 0x10 * id, \
0356 .mux_bit = 2, \
0357 .pull_bit = 0, \
0358 .drv_bit = 6, \
0359 .oe_bit = 9, \
0360 .in_bit = 0, \
0361 .out_bit = 1, \
0362 .intr_enable_bit = 0, \
0363 .intr_status_bit = 0, \
0364 .intr_target_bit = 5, \
0365 .intr_target_kpss_val = 4, \
0366 .intr_raw_status_bit = 4, \
0367 .intr_polarity_bit = 1, \
0368 .intr_detection_bit = 2, \
0369 .intr_detection_width = 2, \
0370 }
0371
0372 #define SDC_PINGROUP(pg_name, ctl, pull, drv) \
0373 { \
0374 .name = #pg_name, \
0375 .pins = pg_name##_pins, \
0376 .npins = ARRAY_SIZE(pg_name##_pins), \
0377 .ctl_reg = ctl, \
0378 .io_reg = 0, \
0379 .intr_cfg_reg = 0, \
0380 .intr_status_reg = 0, \
0381 .intr_target_reg = 0, \
0382 .mux_bit = -1, \
0383 .pull_bit = pull, \
0384 .drv_bit = drv, \
0385 .oe_bit = -1, \
0386 .in_bit = -1, \
0387 .out_bit = -1, \
0388 .intr_enable_bit = -1, \
0389 .intr_status_bit = -1, \
0390 .intr_target_bit = -1, \
0391 .intr_target_kpss_val = -1, \
0392 .intr_raw_status_bit = -1, \
0393 .intr_polarity_bit = -1, \
0394 .intr_detection_bit = -1, \
0395 .intr_detection_width = -1, \
0396 }
0397
0398 #define HSIC_PINGROUP(pg_name, ctl) \
0399 { \
0400 .name = #pg_name, \
0401 .pins = pg_name##_pins, \
0402 .npins = ARRAY_SIZE(pg_name##_pins), \
0403 .funcs = (int[]){ \
0404 MSM_MUX_gpio, \
0405 MSM_MUX_hsic_ctl, \
0406 }, \
0407 .nfuncs = 2, \
0408 .ctl_reg = ctl, \
0409 .io_reg = 0, \
0410 .intr_cfg_reg = 0, \
0411 .intr_status_reg = 0, \
0412 .intr_target_reg = 0, \
0413 .mux_bit = 25, \
0414 .pull_bit = -1, \
0415 .drv_bit = -1, \
0416 .oe_bit = -1, \
0417 .in_bit = -1, \
0418 .out_bit = -1, \
0419 .intr_enable_bit = -1, \
0420 .intr_status_bit = -1, \
0421 .intr_target_bit = -1, \
0422 .intr_target_kpss_val = -1, \
0423 .intr_raw_status_bit = -1, \
0424 .intr_polarity_bit = -1, \
0425 .intr_detection_bit = -1, \
0426 .intr_detection_width = -1, \
0427 }
0428
0429
0430
0431
0432
0433 enum msm8x74_functions {
0434 MSM_MUX_gpio,
0435 MSM_MUX_cci_i2c0,
0436 MSM_MUX_cci_i2c1,
0437 MSM_MUX_blsp_i2c1,
0438 MSM_MUX_blsp_i2c2,
0439 MSM_MUX_blsp_i2c3,
0440 MSM_MUX_blsp_i2c4,
0441 MSM_MUX_blsp_i2c5,
0442 MSM_MUX_blsp_i2c6,
0443 MSM_MUX_blsp_i2c7,
0444 MSM_MUX_blsp_i2c8,
0445 MSM_MUX_blsp_i2c9,
0446 MSM_MUX_blsp_i2c10,
0447 MSM_MUX_blsp_i2c11,
0448 MSM_MUX_blsp_i2c12,
0449 MSM_MUX_blsp_spi1,
0450 MSM_MUX_blsp_spi1_cs1,
0451 MSM_MUX_blsp_spi1_cs2,
0452 MSM_MUX_blsp_spi1_cs3,
0453 MSM_MUX_blsp_spi2,
0454 MSM_MUX_blsp_spi2_cs1,
0455 MSM_MUX_blsp_spi2_cs2,
0456 MSM_MUX_blsp_spi2_cs3,
0457 MSM_MUX_blsp_spi3,
0458 MSM_MUX_blsp_spi4,
0459 MSM_MUX_blsp_spi5,
0460 MSM_MUX_blsp_spi6,
0461 MSM_MUX_blsp_spi7,
0462 MSM_MUX_blsp_spi8,
0463 MSM_MUX_blsp_spi9,
0464 MSM_MUX_blsp_spi10,
0465 MSM_MUX_blsp_spi10_cs1,
0466 MSM_MUX_blsp_spi10_cs2,
0467 MSM_MUX_blsp_spi10_cs3,
0468 MSM_MUX_blsp_spi11,
0469 MSM_MUX_blsp_spi12,
0470 MSM_MUX_blsp_uart1,
0471 MSM_MUX_blsp_uart2,
0472 MSM_MUX_blsp_uart3,
0473 MSM_MUX_blsp_uart4,
0474 MSM_MUX_blsp_uart5,
0475 MSM_MUX_blsp_uart6,
0476 MSM_MUX_blsp_uart7,
0477 MSM_MUX_blsp_uart8,
0478 MSM_MUX_blsp_uart9,
0479 MSM_MUX_blsp_uart10,
0480 MSM_MUX_blsp_uart11,
0481 MSM_MUX_blsp_uart12,
0482 MSM_MUX_blsp_uim1,
0483 MSM_MUX_blsp_uim2,
0484 MSM_MUX_blsp_uim3,
0485 MSM_MUX_blsp_uim4,
0486 MSM_MUX_blsp_uim5,
0487 MSM_MUX_blsp_uim6,
0488 MSM_MUX_blsp_uim7,
0489 MSM_MUX_blsp_uim8,
0490 MSM_MUX_blsp_uim9,
0491 MSM_MUX_blsp_uim10,
0492 MSM_MUX_blsp_uim11,
0493 MSM_MUX_blsp_uim12,
0494 MSM_MUX_uim1,
0495 MSM_MUX_uim2,
0496 MSM_MUX_uim_batt_alarm,
0497 MSM_MUX_sdc3,
0498 MSM_MUX_sdc4,
0499 MSM_MUX_gcc_gp_clk1,
0500 MSM_MUX_gcc_gp_clk2,
0501 MSM_MUX_gcc_gp_clk3,
0502 MSM_MUX_qua_mi2s,
0503 MSM_MUX_pri_mi2s,
0504 MSM_MUX_spkr_mi2s,
0505 MSM_MUX_ter_mi2s,
0506 MSM_MUX_sec_mi2s,
0507 MSM_MUX_hdmi_cec,
0508 MSM_MUX_hdmi_ddc,
0509 MSM_MUX_hdmi_hpd,
0510 MSM_MUX_edp_hpd,
0511 MSM_MUX_mdp_vsync,
0512 MSM_MUX_cam_mclk0,
0513 MSM_MUX_cam_mclk1,
0514 MSM_MUX_cam_mclk2,
0515 MSM_MUX_cam_mclk3,
0516 MSM_MUX_cci_timer0,
0517 MSM_MUX_cci_timer1,
0518 MSM_MUX_cci_timer2,
0519 MSM_MUX_cci_timer3,
0520 MSM_MUX_cci_timer4,
0521 MSM_MUX_cci_async_in0,
0522 MSM_MUX_cci_async_in1,
0523 MSM_MUX_cci_async_in2,
0524 MSM_MUX_gp_pdm0,
0525 MSM_MUX_gp_pdm1,
0526 MSM_MUX_gp_pdm2,
0527 MSM_MUX_gp0_clk,
0528 MSM_MUX_gp1_clk,
0529 MSM_MUX_gp_mn,
0530 MSM_MUX_tsif1,
0531 MSM_MUX_tsif2,
0532 MSM_MUX_hsic,
0533 MSM_MUX_grfc,
0534 MSM_MUX_audio_ref_clk,
0535 MSM_MUX_bt,
0536 MSM_MUX_fm,
0537 MSM_MUX_wlan,
0538 MSM_MUX_slimbus,
0539 MSM_MUX_hsic_ctl,
0540 MSM_MUX_NA,
0541 };
0542
0543 static const char * const gpio_groups[] = {
0544 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
0545 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
0546 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
0547 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
0548 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
0549 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
0550 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
0551 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
0552 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
0553 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
0554 "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
0555 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
0556 "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
0557 "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
0558 "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
0559 "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
0560 "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
0561 "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122",
0562 "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", "gpio128",
0563 "gpio129", "gpio130", "gpio131", "gpio132", "gpio133", "gpio134",
0564 "gpio135", "gpio136", "gpio137", "gpio138", "gpio139", "gpio140",
0565 "gpio141", "gpio142", "gpio143", "gpio144", "gpio145", "hsic_data",
0566 "hsic_strobe",
0567 };
0568
0569 static const char * const blsp_uart1_groups[] = {
0570 "gpio0", "gpio1", "gpio2", "gpio3"
0571 };
0572 static const char * const blsp_uim1_groups[] = { "gpio0", "gpio1" };
0573 static const char * const blsp_i2c1_groups[] = { "gpio2", "gpio3" };
0574 static const char * const blsp_spi1_groups[] = {
0575 "gpio0", "gpio1", "gpio2", "gpio3"
0576 };
0577 static const char * const blsp_spi1_cs1_groups[] = { "gpio8" };
0578 static const char * const blsp_spi1_cs2_groups[] = { "gpio9", "gpio11" };
0579 static const char * const blsp_spi1_cs3_groups[] = { "gpio10" };
0580
0581 static const char * const blsp_uart2_groups[] = {
0582 "gpio4", "gpio5", "gpio6", "gpio7"
0583 };
0584 static const char * const blsp_uim2_groups[] = { "gpio4", "gpio5" };
0585 static const char * const blsp_i2c2_groups[] = { "gpio6", "gpio7" };
0586 static const char * const blsp_spi2_groups[] = {
0587 "gpio4", "gpio5", "gpio6", "gpio7"
0588 };
0589 static const char * const blsp_spi2_cs1_groups[] = { "gpio53", "gpio62" };
0590 static const char * const blsp_spi2_cs2_groups[] = { "gpio54", "gpio63" };
0591 static const char * const blsp_spi2_cs3_groups[] = { "gpio66" };
0592
0593 static const char * const blsp_uart3_groups[] = {
0594 "gpio8", "gpio9", "gpio10", "gpio11"
0595 };
0596 static const char * const blsp_uim3_groups[] = { "gpio8", "gpio9" };
0597 static const char * const blsp_i2c3_groups[] = { "gpio10", "gpio11" };
0598 static const char * const blsp_spi3_groups[] = {
0599 "gpio8", "gpio9", "gpio10", "gpio11"
0600 };
0601
0602 static const char * const cci_i2c0_groups[] = { "gpio19", "gpio20" };
0603 static const char * const cci_i2c1_groups[] = { "gpio21", "gpio22" };
0604
0605 static const char * const blsp_uart4_groups[] = {
0606 "gpio19", "gpio20", "gpio21", "gpio22"
0607 };
0608 static const char * const blsp_uim4_groups[] = { "gpio19", "gpio20" };
0609 static const char * const blsp_i2c4_groups[] = { "gpio21", "gpio22" };
0610 static const char * const blsp_spi4_groups[] = {
0611 "gpio19", "gpio20", "gpio21", "gpio22"
0612 };
0613
0614 static const char * const blsp_uart5_groups[] = {
0615 "gpio23", "gpio24", "gpio25", "gpio26"
0616 };
0617 static const char * const blsp_uim5_groups[] = { "gpio23", "gpio24" };
0618 static const char * const blsp_i2c5_groups[] = { "gpio25", "gpio26" };
0619 static const char * const blsp_spi5_groups[] = {
0620 "gpio23", "gpio24", "gpio25", "gpio26"
0621 };
0622
0623 static const char * const blsp_uart6_groups[] = {
0624 "gpio27", "gpio28", "gpio29", "gpio30"
0625 };
0626 static const char * const blsp_uim6_groups[] = { "gpio27", "gpio28" };
0627 static const char * const blsp_i2c6_groups[] = { "gpio29", "gpio30" };
0628 static const char * const blsp_spi6_groups[] = {
0629 "gpio27", "gpio28", "gpio29", "gpio30"
0630 };
0631
0632 static const char * const blsp_uart7_groups[] = {
0633 "gpio41", "gpio42", "gpio43", "gpio44"
0634 };
0635 static const char * const blsp_uim7_groups[] = { "gpio41", "gpio42" };
0636 static const char * const blsp_i2c7_groups[] = { "gpio43", "gpio44" };
0637 static const char * const blsp_spi7_groups[] = {
0638 "gpio41", "gpio42", "gpio43", "gpio44"
0639 };
0640
0641 static const char * const blsp_uart8_groups[] = {
0642 "gpio45", "gpio46", "gpio47", "gpio48"
0643 };
0644 static const char * const blsp_uim8_groups[] = { "gpio45", "gpio46" };
0645 static const char * const blsp_i2c8_groups[] = { "gpio47", "gpio48" };
0646 static const char * const blsp_spi8_groups[] = {
0647 "gpio45", "gpio46", "gpio47", "gpio48"
0648 };
0649
0650 static const char * const blsp_uart9_groups[] = {
0651 "gpio49", "gpio50", "gpio51", "gpio52"
0652 };
0653 static const char * const blsp_uim9_groups[] = { "gpio49", "gpio50" };
0654 static const char * const blsp_i2c9_groups[] = { "gpio51", "gpio52" };
0655 static const char * const blsp_spi9_groups[] = {
0656 "gpio49", "gpio50", "gpio51", "gpio52"
0657 };
0658
0659 static const char * const blsp_uart10_groups[] = {
0660 "gpio53", "gpio54", "gpio55", "gpio56"
0661 };
0662 static const char * const blsp_uim10_groups[] = { "gpio53", "gpio54" };
0663 static const char * const blsp_i2c10_groups[] = { "gpio55", "gpio56" };
0664 static const char * const blsp_spi10_groups[] = {
0665 "gpio53", "gpio54", "gpio55", "gpio56"
0666 };
0667 static const char * const blsp_spi10_cs1_groups[] = { "gpio47", "gpio67" };
0668 static const char * const blsp_spi10_cs2_groups[] = { "gpio48", "gpio68" };
0669 static const char * const blsp_spi10_cs3_groups[] = { "gpio90" };
0670
0671 static const char * const blsp_uart11_groups[] = {
0672 "gpio81", "gpio82", "gpio83", "gpio84"
0673 };
0674 static const char * const blsp_uim11_groups[] = { "gpio81", "gpio82" };
0675 static const char * const blsp_i2c11_groups[] = { "gpio83", "gpio84" };
0676 static const char * const blsp_spi11_groups[] = {
0677 "gpio81", "gpio82", "gpio83", "gpio84"
0678 };
0679
0680 static const char * const blsp_uart12_groups[] = {
0681 "gpio85", "gpio86", "gpio87", "gpio88"
0682 };
0683 static const char * const blsp_uim12_groups[] = { "gpio85", "gpio86" };
0684 static const char * const blsp_i2c12_groups[] = { "gpio87", "gpio88" };
0685 static const char * const blsp_spi12_groups[] = {
0686 "gpio85", "gpio86", "gpio87", "gpio88"
0687 };
0688
0689 static const char * const uim1_groups[] = {
0690 "gpio97", "gpio98", "gpio99", "gpio100"
0691 };
0692
0693 static const char * const uim2_groups[] = {
0694 "gpio49", "gpio50", "gpio51", "gpio52"
0695 };
0696
0697 static const char * const uim_batt_alarm_groups[] = { "gpio101" };
0698
0699 static const char * const sdc3_groups[] = {
0700 "gpio35", "gpio36", "gpio37", "gpio38", "gpio39", "gpio40"
0701 };
0702
0703 static const char * const sdc4_groups[] = {
0704 "gpio91", "gpio92", "gpio93", "gpio94", "gpio95", "gpio96"
0705 };
0706
0707 static const char * const gp0_clk_groups[] = { "gpio26" };
0708 static const char * const gp1_clk_groups[] = { "gpio27", "gpio57", "gpio78" };
0709 static const char * const gp_mn_groups[] = { "gpio29" };
0710 static const char * const gcc_gp_clk1_groups[] = { "gpio57", "gpio78" };
0711 static const char * const gcc_gp_clk2_groups[] = { "gpio58", "gpio81" };
0712 static const char * const gcc_gp_clk3_groups[] = { "gpio59", "gpio82" };
0713
0714 static const char * const qua_mi2s_groups[] = {
0715 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
0716 };
0717
0718 static const char * const pri_mi2s_groups[] = {
0719 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68"
0720 };
0721
0722 static const char * const spkr_mi2s_groups[] = {
0723 "gpio69", "gpio70", "gpio71", "gpio72"
0724 };
0725
0726 static const char * const ter_mi2s_groups[] = {
0727 "gpio73", "gpio74", "gpio75", "gpio76", "gpio77"
0728 };
0729
0730 static const char * const sec_mi2s_groups[] = {
0731 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82"
0732 };
0733
0734 static const char * const hdmi_cec_groups[] = { "gpio31" };
0735 static const char * const hdmi_ddc_groups[] = { "gpio32", "gpio33" };
0736 static const char * const hdmi_hpd_groups[] = { "gpio34" };
0737 static const char * const edp_hpd_groups[] = { "gpio102" };
0738
0739 static const char * const mdp_vsync_groups[] = { "gpio12", "gpio13", "gpio14" };
0740 static const char * const cam_mclk0_groups[] = { "gpio15" };
0741 static const char * const cam_mclk1_groups[] = { "gpio16" };
0742 static const char * const cam_mclk2_groups[] = { "gpio17" };
0743 static const char * const cam_mclk3_groups[] = { "gpio18" };
0744
0745 static const char * const cci_timer0_groups[] = { "gpio23" };
0746 static const char * const cci_timer1_groups[] = { "gpio24" };
0747 static const char * const cci_timer2_groups[] = { "gpio25" };
0748 static const char * const cci_timer3_groups[] = { "gpio26" };
0749 static const char * const cci_timer4_groups[] = { "gpio27" };
0750 static const char * const cci_async_in0_groups[] = { "gpio28" };
0751 static const char * const cci_async_in1_groups[] = { "gpio26" };
0752 static const char * const cci_async_in2_groups[] = { "gpio27" };
0753
0754 static const char * const gp_pdm0_groups[] = { "gpio54", "gpio68" };
0755 static const char * const gp_pdm1_groups[] = { "gpio74", "gpio86" };
0756 static const char * const gp_pdm2_groups[] = { "gpio63", "gpio79" };
0757
0758 static const char * const tsif1_groups[] = {
0759 "gpio89", "gpio90", "gpio91", "gpio92"
0760 };
0761
0762 static const char * const tsif2_groups[] = {
0763 "gpio93", "gpio94", "gpio95", "gpio96"
0764 };
0765
0766 static const char * const hsic_groups[] = { "gpio144", "gpio145" };
0767 static const char * const grfc_groups[] = {
0768 "gpio104", "gpio105", "gpio106", "gpio107", "gpio108", "gpio109",
0769 "gpio110", "gpio111", "gpio112", "gpio113", "gpio114", "gpio115",
0770 "gpio116", "gpio117", "gpio118", "gpio119", "gpio120", "gpio121",
0771 "gpio122", "gpio123", "gpio124", "gpio125", "gpio126", "gpio127",
0772 "gpio128", "gpio136", "gpio137", "gpio141", "gpio143"
0773 };
0774
0775 static const char * const audio_ref_clk_groups[] = { "gpio69" };
0776
0777 static const char * const bt_groups[] = { "gpio35", "gpio43", "gpio44" };
0778
0779 static const char * const fm_groups[] = { "gpio41", "gpio42" };
0780
0781 static const char * const wlan_groups[] = {
0782 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40"
0783 };
0784
0785 static const char * const slimbus_groups[] = { "gpio70", "gpio71" };
0786 static const char * const hsic_ctl_groups[] = { "hsic_strobe", "hsic_data" };
0787
0788 static const struct msm_function msm8x74_functions[] = {
0789 FUNCTION(gpio),
0790 FUNCTION(cci_i2c0),
0791 FUNCTION(cci_i2c1),
0792 FUNCTION(uim1),
0793 FUNCTION(uim2),
0794 FUNCTION(uim_batt_alarm),
0795 FUNCTION(blsp_uim1),
0796 FUNCTION(blsp_uim2),
0797 FUNCTION(blsp_uim3),
0798 FUNCTION(blsp_uim4),
0799 FUNCTION(blsp_uim5),
0800 FUNCTION(blsp_uim6),
0801 FUNCTION(blsp_uim7),
0802 FUNCTION(blsp_uim8),
0803 FUNCTION(blsp_uim9),
0804 FUNCTION(blsp_uim10),
0805 FUNCTION(blsp_uim11),
0806 FUNCTION(blsp_uim12),
0807 FUNCTION(blsp_i2c1),
0808 FUNCTION(blsp_i2c2),
0809 FUNCTION(blsp_i2c3),
0810 FUNCTION(blsp_i2c4),
0811 FUNCTION(blsp_i2c5),
0812 FUNCTION(blsp_i2c6),
0813 FUNCTION(blsp_i2c7),
0814 FUNCTION(blsp_i2c8),
0815 FUNCTION(blsp_i2c9),
0816 FUNCTION(blsp_i2c10),
0817 FUNCTION(blsp_i2c11),
0818 FUNCTION(blsp_i2c12),
0819 FUNCTION(blsp_spi1),
0820 FUNCTION(blsp_spi1_cs1),
0821 FUNCTION(blsp_spi1_cs2),
0822 FUNCTION(blsp_spi1_cs3),
0823 FUNCTION(blsp_spi2),
0824 FUNCTION(blsp_spi2_cs1),
0825 FUNCTION(blsp_spi2_cs2),
0826 FUNCTION(blsp_spi2_cs3),
0827 FUNCTION(blsp_spi3),
0828 FUNCTION(blsp_spi4),
0829 FUNCTION(blsp_spi5),
0830 FUNCTION(blsp_spi6),
0831 FUNCTION(blsp_spi7),
0832 FUNCTION(blsp_spi8),
0833 FUNCTION(blsp_spi9),
0834 FUNCTION(blsp_spi10),
0835 FUNCTION(blsp_spi10_cs1),
0836 FUNCTION(blsp_spi10_cs2),
0837 FUNCTION(blsp_spi10_cs3),
0838 FUNCTION(blsp_spi11),
0839 FUNCTION(blsp_spi12),
0840 FUNCTION(blsp_uart1),
0841 FUNCTION(blsp_uart2),
0842 FUNCTION(blsp_uart3),
0843 FUNCTION(blsp_uart4),
0844 FUNCTION(blsp_uart5),
0845 FUNCTION(blsp_uart6),
0846 FUNCTION(blsp_uart7),
0847 FUNCTION(blsp_uart8),
0848 FUNCTION(blsp_uart9),
0849 FUNCTION(blsp_uart10),
0850 FUNCTION(blsp_uart11),
0851 FUNCTION(blsp_uart12),
0852 FUNCTION(sdc3),
0853 FUNCTION(sdc4),
0854 FUNCTION(gcc_gp_clk1),
0855 FUNCTION(gcc_gp_clk2),
0856 FUNCTION(gcc_gp_clk3),
0857 FUNCTION(qua_mi2s),
0858 FUNCTION(pri_mi2s),
0859 FUNCTION(spkr_mi2s),
0860 FUNCTION(ter_mi2s),
0861 FUNCTION(sec_mi2s),
0862 FUNCTION(mdp_vsync),
0863 FUNCTION(cam_mclk0),
0864 FUNCTION(cam_mclk1),
0865 FUNCTION(cam_mclk2),
0866 FUNCTION(cam_mclk3),
0867 FUNCTION(cci_timer0),
0868 FUNCTION(cci_timer1),
0869 FUNCTION(cci_timer2),
0870 FUNCTION(cci_timer3),
0871 FUNCTION(cci_timer4),
0872 FUNCTION(cci_async_in0),
0873 FUNCTION(cci_async_in1),
0874 FUNCTION(cci_async_in2),
0875 FUNCTION(hdmi_cec),
0876 FUNCTION(hdmi_ddc),
0877 FUNCTION(hdmi_hpd),
0878 FUNCTION(edp_hpd),
0879 FUNCTION(gp_pdm0),
0880 FUNCTION(gp_pdm1),
0881 FUNCTION(gp_pdm2),
0882 FUNCTION(gp0_clk),
0883 FUNCTION(gp1_clk),
0884 FUNCTION(gp_mn),
0885 FUNCTION(tsif1),
0886 FUNCTION(tsif2),
0887 FUNCTION(hsic),
0888 FUNCTION(grfc),
0889 FUNCTION(audio_ref_clk),
0890 FUNCTION(bt),
0891 FUNCTION(fm),
0892 FUNCTION(wlan),
0893 FUNCTION(slimbus),
0894 FUNCTION(hsic_ctl),
0895 };
0896
0897 static const struct msm_pingroup msm8x74_groups[] = {
0898 PINGROUP(0, blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA),
0899 PINGROUP(1, blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA),
0900 PINGROUP(2, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA),
0901 PINGROUP(3, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA),
0902 PINGROUP(4, blsp_spi2, blsp_uart2, blsp_uim2, NA, NA, NA, NA),
0903 PINGROUP(5, blsp_spi2, blsp_uart2, blsp_uim2, NA, NA, NA, NA),
0904 PINGROUP(6, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA),
0905 PINGROUP(7, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA),
0906 PINGROUP(8, blsp_spi3, blsp_uart3, blsp_uim3, blsp_spi1_cs1, NA, NA, NA),
0907 PINGROUP(9, blsp_spi3, blsp_uart3, blsp_uim3, blsp_spi1_cs2, NA, NA, NA),
0908 PINGROUP(10, blsp_spi3, blsp_uart3, blsp_i2c3, blsp_spi1_cs3, NA, NA, NA),
0909 PINGROUP(11, blsp_spi3, blsp_uart3, blsp_i2c3, blsp_spi1_cs2, NA, NA, NA),
0910 PINGROUP(12, mdp_vsync, NA, NA, NA, NA, NA, NA),
0911 PINGROUP(13, mdp_vsync, NA, NA, NA, NA, NA, NA),
0912 PINGROUP(14, mdp_vsync, NA, NA, NA, NA, NA, NA),
0913 PINGROUP(15, cam_mclk0, NA, NA, NA, NA, NA, NA),
0914 PINGROUP(16, cam_mclk1, NA, NA, NA, NA, NA, NA),
0915 PINGROUP(17, cam_mclk2, NA, NA, NA, NA, NA, NA),
0916 PINGROUP(18, cam_mclk3, NA, NA, NA, NA, NA, NA),
0917 PINGROUP(19, cci_i2c0, blsp_spi4, blsp_uart4, blsp_uim4, NA, NA, NA),
0918 PINGROUP(20, cci_i2c0, blsp_spi4, blsp_uart4, blsp_uim4, NA, NA, NA),
0919 PINGROUP(21, cci_i2c1, blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA),
0920 PINGROUP(22, cci_i2c1, blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA),
0921 PINGROUP(23, cci_timer0, blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA),
0922 PINGROUP(24, cci_timer1, blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA),
0923 PINGROUP(25, cci_timer2, blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA),
0924 PINGROUP(26, cci_timer3, cci_async_in1, blsp_spi5, blsp_uart5, blsp_i2c5, gp0_clk, NA),
0925 PINGROUP(27, cci_timer4, cci_async_in2, blsp_spi6, blsp_uart6, blsp_i2c6, gp1_clk, NA),
0926 PINGROUP(28, cci_async_in0, blsp_spi6, blsp_uart6, blsp_uim6, NA, NA, NA),
0927 PINGROUP(29, blsp_spi6, blsp_uart6, blsp_i2c6, gp_mn, NA, NA, NA),
0928 PINGROUP(30, blsp_spi6, blsp_uart6, blsp_i2c6, NA, NA, NA, NA),
0929 PINGROUP(31, hdmi_cec, NA, NA, NA, NA, NA, NA),
0930 PINGROUP(32, hdmi_ddc, NA, NA, NA, NA, NA, NA),
0931 PINGROUP(33, hdmi_ddc, NA, NA, NA, NA, NA, NA),
0932 PINGROUP(34, hdmi_hpd, NA, NA, NA, NA, NA, NA),
0933 PINGROUP(35, bt, sdc3, NA, NA, NA, NA, NA),
0934 PINGROUP(36, wlan, sdc3, NA, NA, NA, NA, NA),
0935 PINGROUP(37, wlan, sdc3, NA, NA, NA, NA, NA),
0936 PINGROUP(38, wlan, sdc3, NA, NA, NA, NA, NA),
0937 PINGROUP(39, wlan, sdc3, NA, NA, NA, NA, NA),
0938 PINGROUP(40, wlan, sdc3, NA, NA, NA, NA, NA),
0939 PINGROUP(41, fm, blsp_spi7, blsp_uart7, blsp_uim7, NA, NA, NA),
0940 PINGROUP(42, fm, blsp_spi7, blsp_uart7, blsp_uim7, NA, NA, NA),
0941 PINGROUP(43, bt, blsp_spi7, blsp_uart7, blsp_i2c7, NA, NA, NA),
0942 PINGROUP(44, bt, blsp_spi7, blsp_uart7, blsp_i2c7, NA, NA, NA),
0943 PINGROUP(45, blsp_spi8, blsp_uart8, blsp_uim8, NA, NA, NA, NA),
0944 PINGROUP(46, blsp_spi8, blsp_uart8, blsp_uim8, NA, NA, NA, NA),
0945 PINGROUP(47, blsp_spi8, blsp_uart8, blsp_i2c8, blsp_spi10_cs1, NA, NA, NA),
0946 PINGROUP(48, blsp_spi8, blsp_uart8, blsp_i2c8, blsp_spi10_cs2, NA, NA, NA),
0947 PINGROUP(49, uim2, blsp_spi9, blsp_uart9, blsp_uim9, NA, NA, NA),
0948 PINGROUP(50, uim2, blsp_spi9, blsp_uart9, blsp_uim9, NA, NA, NA),
0949 PINGROUP(51, uim2, blsp_spi9, blsp_uart9, blsp_i2c9, NA, NA, NA),
0950 PINGROUP(52, uim2, blsp_spi9, blsp_uart9, blsp_i2c9, NA, NA, NA),
0951 PINGROUP(53, blsp_spi10, blsp_uart10, blsp_uim10, blsp_spi2_cs1, NA, NA, NA),
0952 PINGROUP(54, blsp_spi10, blsp_uart10, blsp_uim10, blsp_spi2_cs2, gp_pdm0, NA, NA),
0953 PINGROUP(55, blsp_spi10, blsp_uart10, blsp_i2c10, NA, NA, NA, NA),
0954 PINGROUP(56, blsp_spi10, blsp_uart10, blsp_i2c10, NA, NA, NA, NA),
0955 PINGROUP(57, qua_mi2s, gcc_gp_clk1, NA, NA, NA, NA, NA),
0956 PINGROUP(58, qua_mi2s, gcc_gp_clk2, NA, NA, NA, NA, NA),
0957 PINGROUP(59, qua_mi2s, gcc_gp_clk3, NA, NA, NA, NA, NA),
0958 PINGROUP(60, qua_mi2s, NA, NA, NA, NA, NA, NA),
0959 PINGROUP(61, qua_mi2s, NA, NA, NA, NA, NA, NA),
0960 PINGROUP(62, qua_mi2s, blsp_spi2_cs1, NA, NA, NA, NA, NA),
0961 PINGROUP(63, qua_mi2s, blsp_spi2_cs2, gp_pdm2, NA, NA, NA, NA),
0962 PINGROUP(64, pri_mi2s, NA, NA, NA, NA, NA, NA),
0963 PINGROUP(65, pri_mi2s, NA, NA, NA, NA, NA, NA),
0964 PINGROUP(66, pri_mi2s, blsp_spi2_cs3, NA, NA, NA, NA, NA),
0965 PINGROUP(67, pri_mi2s, blsp_spi10_cs1, NA, NA, NA, NA, NA),
0966 PINGROUP(68, pri_mi2s, blsp_spi10_cs2, gp_pdm0, NA, NA, NA, NA),
0967 PINGROUP(69, spkr_mi2s, audio_ref_clk, NA, NA, NA, NA, NA),
0968 PINGROUP(70, slimbus, spkr_mi2s, NA, NA, NA, NA, NA),
0969 PINGROUP(71, slimbus, spkr_mi2s, NA, NA, NA, NA, NA),
0970 PINGROUP(72, spkr_mi2s, NA, NA, NA, NA, NA, NA),
0971 PINGROUP(73, ter_mi2s, NA, NA, NA, NA, NA, NA),
0972 PINGROUP(74, ter_mi2s, gp_pdm1, NA, NA, NA, NA, NA),
0973 PINGROUP(75, ter_mi2s, NA, NA, NA, NA, NA, NA),
0974 PINGROUP(76, ter_mi2s, NA, NA, NA, NA, NA, NA),
0975 PINGROUP(77, ter_mi2s, NA, NA, NA, NA, NA, NA),
0976 PINGROUP(78, sec_mi2s, gcc_gp_clk1, NA, NA, NA, NA, NA),
0977 PINGROUP(79, sec_mi2s, gp_pdm2, NA, NA, NA, NA, NA),
0978 PINGROUP(80, sec_mi2s, NA, NA, NA, NA, NA, NA),
0979 PINGROUP(81, sec_mi2s, blsp_spi11, blsp_uart11, blsp_uim11, gcc_gp_clk2, NA, NA),
0980 PINGROUP(82, sec_mi2s, blsp_spi11, blsp_uart11, blsp_uim11, gcc_gp_clk3, NA, NA),
0981 PINGROUP(83, blsp_spi11, blsp_uart11, blsp_i2c11, NA, NA, NA, NA),
0982 PINGROUP(84, blsp_spi11, blsp_uart11, blsp_i2c11, NA, NA, NA, NA),
0983 PINGROUP(85, blsp_spi12, blsp_uart12, blsp_uim12, NA, NA, NA, NA),
0984 PINGROUP(86, blsp_spi12, blsp_uart12, blsp_uim12, gp_pdm1, NA, NA, NA),
0985 PINGROUP(87, blsp_spi12, blsp_uart12, blsp_i2c12, NA, NA, NA, NA),
0986 PINGROUP(88, blsp_spi12, blsp_uart12, blsp_i2c12, NA, NA, NA, NA),
0987 PINGROUP(89, tsif1, NA, NA, NA, NA, NA, NA),
0988 PINGROUP(90, tsif1, blsp_spi10_cs3, NA, NA, NA, NA, NA),
0989 PINGROUP(91, tsif1, sdc4, NA, NA, NA, NA, NA),
0990 PINGROUP(92, tsif1, sdc4, NA, NA, NA, NA, NA),
0991 PINGROUP(93, tsif2, sdc4, NA, NA, NA, NA, NA),
0992 PINGROUP(94, tsif2, sdc4, NA, NA, NA, NA, NA),
0993 PINGROUP(95, tsif2, sdc4, NA, NA, NA, NA, NA),
0994 PINGROUP(96, tsif2, sdc4, NA, NA, NA, NA, NA),
0995 PINGROUP(97, uim1, NA, NA, NA, NA, NA, NA),
0996 PINGROUP(98, uim1, NA, NA, NA, NA, NA, NA),
0997 PINGROUP(99, uim1, NA, NA, NA, NA, NA, NA),
0998 PINGROUP(100, uim1, NA, NA, NA, NA, NA, NA),
0999 PINGROUP(101, uim_batt_alarm, NA, NA, NA, NA, NA, NA),
1000 PINGROUP(102, edp_hpd, NA, NA, NA, NA, NA, NA),
1001 PINGROUP(103, NA, NA, NA, NA, NA, NA, NA),
1002 PINGROUP(104, grfc, NA, NA, NA, NA, NA, NA),
1003 PINGROUP(105, grfc, NA, NA, NA, NA, NA, NA),
1004 PINGROUP(106, grfc, NA, NA, NA, NA, NA, NA),
1005 PINGROUP(107, grfc, NA, NA, NA, NA, NA, NA),
1006 PINGROUP(108, grfc, NA, NA, NA, NA, NA, NA),
1007 PINGROUP(109, grfc, NA, NA, NA, NA, NA, NA),
1008 PINGROUP(110, grfc, NA, NA, NA, NA, NA, NA),
1009 PINGROUP(111, grfc, NA, NA, NA, NA, NA, NA),
1010 PINGROUP(112, grfc, NA, NA, NA, NA, NA, NA),
1011 PINGROUP(113, grfc, NA, NA, NA, NA, NA, NA),
1012 PINGROUP(114, grfc, NA, NA, NA, NA, NA, NA),
1013 PINGROUP(115, grfc, NA, NA, NA, NA, NA, NA),
1014 PINGROUP(116, grfc, NA, NA, NA, NA, NA, NA),
1015 PINGROUP(117, grfc, NA, NA, NA, NA, NA, NA),
1016 PINGROUP(118, grfc, NA, NA, NA, NA, NA, NA),
1017 PINGROUP(119, grfc, NA, NA, NA, NA, NA, NA),
1018 PINGROUP(120, grfc, NA, NA, NA, NA, NA, NA),
1019 PINGROUP(121, grfc, NA, NA, NA, NA, NA, NA),
1020 PINGROUP(122, grfc, NA, NA, NA, NA, NA, NA),
1021 PINGROUP(123, grfc, NA, NA, NA, NA, NA, NA),
1022 PINGROUP(124, grfc, NA, NA, NA, NA, NA, NA),
1023 PINGROUP(125, grfc, NA, NA, NA, NA, NA, NA),
1024 PINGROUP(126, grfc, NA, NA, NA, NA, NA, NA),
1025 PINGROUP(127, grfc, NA, NA, NA, NA, NA, NA),
1026 PINGROUP(128, NA, grfc, NA, NA, NA, NA, NA),
1027 PINGROUP(129, NA, NA, NA, NA, NA, NA, NA),
1028 PINGROUP(130, NA, NA, NA, NA, NA, NA, NA),
1029 PINGROUP(131, NA, NA, NA, NA, NA, NA, NA),
1030 PINGROUP(132, NA, NA, NA, NA, NA, NA, NA),
1031 PINGROUP(133, NA, NA, NA, NA, NA, NA, NA),
1032 PINGROUP(134, NA, NA, NA, NA, NA, NA, NA),
1033 PINGROUP(135, NA, NA, NA, NA, NA, NA, NA),
1034 PINGROUP(136, NA, grfc, NA, NA, NA, NA, NA),
1035 PINGROUP(137, NA, grfc, NA, NA, NA, NA, NA),
1036 PINGROUP(138, NA, NA, NA, NA, NA, NA, NA),
1037 PINGROUP(139, NA, NA, NA, NA, NA, NA, NA),
1038 PINGROUP(140, NA, NA, NA, NA, NA, NA, NA),
1039 PINGROUP(141, NA, grfc, NA, NA, NA, NA, NA),
1040 PINGROUP(142, NA, NA, NA, NA, NA, NA, NA),
1041 PINGROUP(143, NA, grfc, NA, NA, NA, NA, NA),
1042 PINGROUP(144, hsic, NA, NA, NA, NA, NA, NA),
1043 PINGROUP(145, hsic, NA, NA, NA, NA, NA, NA),
1044 SDC_PINGROUP(sdc1_clk, 0x2044, 13, 6),
1045 SDC_PINGROUP(sdc1_cmd, 0x2044, 11, 3),
1046 SDC_PINGROUP(sdc1_data, 0x2044, 9, 0),
1047 SDC_PINGROUP(sdc2_clk, 0x2048, 14, 6),
1048 SDC_PINGROUP(sdc2_cmd, 0x2048, 11, 3),
1049 SDC_PINGROUP(sdc2_data, 0x2048, 9, 0),
1050 HSIC_PINGROUP(hsic_strobe, 0x2050),
1051 HSIC_PINGROUP(hsic_data, 0x2054),
1052 };
1053
1054 #define NUM_GPIO_PINGROUPS 146
1055
1056 static const struct msm_pinctrl_soc_data msm8x74_pinctrl = {
1057 .pins = msm8x74_pins,
1058 .npins = ARRAY_SIZE(msm8x74_pins),
1059 .functions = msm8x74_functions,
1060 .nfunctions = ARRAY_SIZE(msm8x74_functions),
1061 .groups = msm8x74_groups,
1062 .ngroups = ARRAY_SIZE(msm8x74_groups),
1063 .ngpios = NUM_GPIO_PINGROUPS,
1064 };
1065
1066 static int msm8x74_pinctrl_probe(struct platform_device *pdev)
1067 {
1068 return msm_pinctrl_probe(pdev, &msm8x74_pinctrl);
1069 }
1070
1071 static const struct of_device_id msm8x74_pinctrl_of_match[] = {
1072 { .compatible = "qcom,msm8974-pinctrl", },
1073 { },
1074 };
1075
1076 static struct platform_driver msm8x74_pinctrl_driver = {
1077 .driver = {
1078 .name = "msm8x74-pinctrl",
1079 .of_match_table = msm8x74_pinctrl_of_match,
1080 },
1081 .probe = msm8x74_pinctrl_probe,
1082 .remove = msm_pinctrl_remove,
1083 };
1084
1085 static int __init msm8x74_pinctrl_init(void)
1086 {
1087 return platform_driver_register(&msm8x74_pinctrl_driver);
1088 }
1089 arch_initcall(msm8x74_pinctrl_init);
1090
1091 static void __exit msm8x74_pinctrl_exit(void)
1092 {
1093 platform_driver_unregister(&msm8x74_pinctrl_driver);
1094 }
1095 module_exit(msm8x74_pinctrl_exit);
1096
1097 MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>");
1098 MODULE_DESCRIPTION("Qualcomm MSM8x74 pinctrl driver");
1099 MODULE_LICENSE("GPL v2");
1100 MODULE_DEVICE_TABLE(of, msm8x74_pinctrl_of_match);
1101