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0006 #include <linux/module.h>
0007 #include <linux/of.h>
0008 #include <linux/platform_device.h>
0009 #include <linux/pinctrl/pinctrl.h>
0010
0011 #include "pinctrl-msm.h"
0012
0013 #define NORTH 0x500000
0014 #define WEST 0x100000
0015 #define EAST 0x900000
0016
0017 #define FUNCTION(fname) \
0018 [msm_mux_##fname] = { \
0019 .name = #fname, \
0020 .groups = fname##_groups, \
0021 .ngroups = ARRAY_SIZE(fname##_groups), \
0022 }
0023
0024 #define PINGROUP(id, base, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
0025 { \
0026 .name = "gpio" #id, \
0027 .pins = gpio##id##_pins, \
0028 .npins = ARRAY_SIZE(gpio##id##_pins), \
0029 .funcs = (int[]){ \
0030 msm_mux_gpio, \
0031 msm_mux_##f1, \
0032 msm_mux_##f2, \
0033 msm_mux_##f3, \
0034 msm_mux_##f4, \
0035 msm_mux_##f5, \
0036 msm_mux_##f6, \
0037 msm_mux_##f7, \
0038 msm_mux_##f8, \
0039 msm_mux_##f9 \
0040 }, \
0041 .nfuncs = 10, \
0042 .ctl_reg = base + 0x1000 * id, \
0043 .io_reg = base + 0x4 + 0x1000 * id, \
0044 .intr_cfg_reg = base + 0x8 + 0x1000 * id, \
0045 .intr_status_reg = base + 0xc + 0x1000 * id, \
0046 .intr_target_reg = base + 0x8 + 0x1000 * id, \
0047 .mux_bit = 2, \
0048 .pull_bit = 0, \
0049 .drv_bit = 6, \
0050 .oe_bit = 9, \
0051 .in_bit = 0, \
0052 .out_bit = 1, \
0053 .intr_enable_bit = 0, \
0054 .intr_status_bit = 0, \
0055 .intr_target_bit = 5, \
0056 .intr_target_kpss_val = 3, \
0057 .intr_raw_status_bit = 4, \
0058 .intr_polarity_bit = 1, \
0059 .intr_detection_bit = 2, \
0060 .intr_detection_width = 2, \
0061 }
0062
0063 #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \
0064 { \
0065 .name = #pg_name, \
0066 .pins = pg_name##_pins, \
0067 .npins = ARRAY_SIZE(pg_name##_pins), \
0068 .ctl_reg = ctl, \
0069 .io_reg = 0, \
0070 .intr_cfg_reg = 0, \
0071 .intr_status_reg = 0, \
0072 .intr_target_reg = 0, \
0073 .mux_bit = -1, \
0074 .pull_bit = pull, \
0075 .drv_bit = drv, \
0076 .oe_bit = -1, \
0077 .in_bit = -1, \
0078 .out_bit = -1, \
0079 .intr_enable_bit = -1, \
0080 .intr_status_bit = -1, \
0081 .intr_target_bit = -1, \
0082 .intr_raw_status_bit = -1, \
0083 .intr_polarity_bit = -1, \
0084 .intr_detection_bit = -1, \
0085 .intr_detection_width = -1, \
0086 }
0087
0088 #define UFS_RESET(pg_name, offset) \
0089 { \
0090 .name = #pg_name, \
0091 .pins = pg_name##_pins, \
0092 .npins = ARRAY_SIZE(pg_name##_pins), \
0093 .ctl_reg = offset, \
0094 .io_reg = offset + 0x4, \
0095 .intr_cfg_reg = 0, \
0096 .intr_status_reg = 0, \
0097 .intr_target_reg = 0, \
0098 .mux_bit = -1, \
0099 .pull_bit = 3, \
0100 .drv_bit = 0, \
0101 .oe_bit = -1, \
0102 .in_bit = -1, \
0103 .out_bit = 0, \
0104 .intr_enable_bit = -1, \
0105 .intr_status_bit = -1, \
0106 .intr_target_bit = -1, \
0107 .intr_raw_status_bit = -1, \
0108 .intr_polarity_bit = -1, \
0109 .intr_detection_bit = -1, \
0110 .intr_detection_width = -1, \
0111 }
0112
0113 static const struct pinctrl_pin_desc msm8998_pins[] = {
0114 PINCTRL_PIN(0, "GPIO_0"),
0115 PINCTRL_PIN(1, "GPIO_1"),
0116 PINCTRL_PIN(2, "GPIO_2"),
0117 PINCTRL_PIN(3, "GPIO_3"),
0118 PINCTRL_PIN(4, "GPIO_4"),
0119 PINCTRL_PIN(5, "GPIO_5"),
0120 PINCTRL_PIN(6, "GPIO_6"),
0121 PINCTRL_PIN(7, "GPIO_7"),
0122 PINCTRL_PIN(8, "GPIO_8"),
0123 PINCTRL_PIN(9, "GPIO_9"),
0124 PINCTRL_PIN(10, "GPIO_10"),
0125 PINCTRL_PIN(11, "GPIO_11"),
0126 PINCTRL_PIN(12, "GPIO_12"),
0127 PINCTRL_PIN(13, "GPIO_13"),
0128 PINCTRL_PIN(14, "GPIO_14"),
0129 PINCTRL_PIN(15, "GPIO_15"),
0130 PINCTRL_PIN(16, "GPIO_16"),
0131 PINCTRL_PIN(17, "GPIO_17"),
0132 PINCTRL_PIN(18, "GPIO_18"),
0133 PINCTRL_PIN(19, "GPIO_19"),
0134 PINCTRL_PIN(20, "GPIO_20"),
0135 PINCTRL_PIN(21, "GPIO_21"),
0136 PINCTRL_PIN(22, "GPIO_22"),
0137 PINCTRL_PIN(23, "GPIO_23"),
0138 PINCTRL_PIN(24, "GPIO_24"),
0139 PINCTRL_PIN(25, "GPIO_25"),
0140 PINCTRL_PIN(26, "GPIO_26"),
0141 PINCTRL_PIN(27, "GPIO_27"),
0142 PINCTRL_PIN(28, "GPIO_28"),
0143 PINCTRL_PIN(29, "GPIO_29"),
0144 PINCTRL_PIN(30, "GPIO_30"),
0145 PINCTRL_PIN(31, "GPIO_31"),
0146 PINCTRL_PIN(32, "GPIO_32"),
0147 PINCTRL_PIN(33, "GPIO_33"),
0148 PINCTRL_PIN(34, "GPIO_34"),
0149 PINCTRL_PIN(35, "GPIO_35"),
0150 PINCTRL_PIN(36, "GPIO_36"),
0151 PINCTRL_PIN(37, "GPIO_37"),
0152 PINCTRL_PIN(38, "GPIO_38"),
0153 PINCTRL_PIN(39, "GPIO_39"),
0154 PINCTRL_PIN(40, "GPIO_40"),
0155 PINCTRL_PIN(41, "GPIO_41"),
0156 PINCTRL_PIN(42, "GPIO_42"),
0157 PINCTRL_PIN(43, "GPIO_43"),
0158 PINCTRL_PIN(44, "GPIO_44"),
0159 PINCTRL_PIN(45, "GPIO_45"),
0160 PINCTRL_PIN(46, "GPIO_46"),
0161 PINCTRL_PIN(47, "GPIO_47"),
0162 PINCTRL_PIN(48, "GPIO_48"),
0163 PINCTRL_PIN(49, "GPIO_49"),
0164 PINCTRL_PIN(50, "GPIO_50"),
0165 PINCTRL_PIN(51, "GPIO_51"),
0166 PINCTRL_PIN(52, "GPIO_52"),
0167 PINCTRL_PIN(53, "GPIO_53"),
0168 PINCTRL_PIN(54, "GPIO_54"),
0169 PINCTRL_PIN(55, "GPIO_55"),
0170 PINCTRL_PIN(56, "GPIO_56"),
0171 PINCTRL_PIN(57, "GPIO_57"),
0172 PINCTRL_PIN(58, "GPIO_58"),
0173 PINCTRL_PIN(59, "GPIO_59"),
0174 PINCTRL_PIN(60, "GPIO_60"),
0175 PINCTRL_PIN(61, "GPIO_61"),
0176 PINCTRL_PIN(62, "GPIO_62"),
0177 PINCTRL_PIN(63, "GPIO_63"),
0178 PINCTRL_PIN(64, "GPIO_64"),
0179 PINCTRL_PIN(65, "GPIO_65"),
0180 PINCTRL_PIN(66, "GPIO_66"),
0181 PINCTRL_PIN(67, "GPIO_67"),
0182 PINCTRL_PIN(68, "GPIO_68"),
0183 PINCTRL_PIN(69, "GPIO_69"),
0184 PINCTRL_PIN(70, "GPIO_70"),
0185 PINCTRL_PIN(71, "GPIO_71"),
0186 PINCTRL_PIN(72, "GPIO_72"),
0187 PINCTRL_PIN(73, "GPIO_73"),
0188 PINCTRL_PIN(74, "GPIO_74"),
0189 PINCTRL_PIN(75, "GPIO_75"),
0190 PINCTRL_PIN(76, "GPIO_76"),
0191 PINCTRL_PIN(77, "GPIO_77"),
0192 PINCTRL_PIN(78, "GPIO_78"),
0193 PINCTRL_PIN(79, "GPIO_79"),
0194 PINCTRL_PIN(80, "GPIO_80"),
0195 PINCTRL_PIN(81, "GPIO_81"),
0196 PINCTRL_PIN(82, "GPIO_82"),
0197 PINCTRL_PIN(83, "GPIO_83"),
0198 PINCTRL_PIN(84, "GPIO_84"),
0199 PINCTRL_PIN(85, "GPIO_85"),
0200 PINCTRL_PIN(86, "GPIO_86"),
0201 PINCTRL_PIN(87, "GPIO_87"),
0202 PINCTRL_PIN(88, "GPIO_88"),
0203 PINCTRL_PIN(89, "GPIO_89"),
0204 PINCTRL_PIN(90, "GPIO_90"),
0205 PINCTRL_PIN(91, "GPIO_91"),
0206 PINCTRL_PIN(92, "GPIO_92"),
0207 PINCTRL_PIN(93, "GPIO_93"),
0208 PINCTRL_PIN(94, "GPIO_94"),
0209 PINCTRL_PIN(95, "GPIO_95"),
0210 PINCTRL_PIN(96, "GPIO_96"),
0211 PINCTRL_PIN(97, "GPIO_97"),
0212 PINCTRL_PIN(98, "GPIO_98"),
0213 PINCTRL_PIN(99, "GPIO_99"),
0214 PINCTRL_PIN(100, "GPIO_100"),
0215 PINCTRL_PIN(101, "GPIO_101"),
0216 PINCTRL_PIN(102, "GPIO_102"),
0217 PINCTRL_PIN(103, "GPIO_103"),
0218 PINCTRL_PIN(104, "GPIO_104"),
0219 PINCTRL_PIN(105, "GPIO_105"),
0220 PINCTRL_PIN(106, "GPIO_106"),
0221 PINCTRL_PIN(107, "GPIO_107"),
0222 PINCTRL_PIN(108, "GPIO_108"),
0223 PINCTRL_PIN(109, "GPIO_109"),
0224 PINCTRL_PIN(110, "GPIO_110"),
0225 PINCTRL_PIN(111, "GPIO_111"),
0226 PINCTRL_PIN(112, "GPIO_112"),
0227 PINCTRL_PIN(113, "GPIO_113"),
0228 PINCTRL_PIN(114, "GPIO_114"),
0229 PINCTRL_PIN(115, "GPIO_115"),
0230 PINCTRL_PIN(116, "GPIO_116"),
0231 PINCTRL_PIN(117, "GPIO_117"),
0232 PINCTRL_PIN(118, "GPIO_118"),
0233 PINCTRL_PIN(119, "GPIO_119"),
0234 PINCTRL_PIN(120, "GPIO_120"),
0235 PINCTRL_PIN(121, "GPIO_121"),
0236 PINCTRL_PIN(122, "GPIO_122"),
0237 PINCTRL_PIN(123, "GPIO_123"),
0238 PINCTRL_PIN(124, "GPIO_124"),
0239 PINCTRL_PIN(125, "GPIO_125"),
0240 PINCTRL_PIN(126, "GPIO_126"),
0241 PINCTRL_PIN(127, "GPIO_127"),
0242 PINCTRL_PIN(128, "GPIO_128"),
0243 PINCTRL_PIN(129, "GPIO_129"),
0244 PINCTRL_PIN(130, "GPIO_130"),
0245 PINCTRL_PIN(131, "GPIO_131"),
0246 PINCTRL_PIN(132, "GPIO_132"),
0247 PINCTRL_PIN(133, "GPIO_133"),
0248 PINCTRL_PIN(134, "GPIO_134"),
0249 PINCTRL_PIN(135, "GPIO_135"),
0250 PINCTRL_PIN(136, "GPIO_136"),
0251 PINCTRL_PIN(137, "GPIO_137"),
0252 PINCTRL_PIN(138, "GPIO_138"),
0253 PINCTRL_PIN(139, "GPIO_139"),
0254 PINCTRL_PIN(140, "GPIO_140"),
0255 PINCTRL_PIN(141, "GPIO_141"),
0256 PINCTRL_PIN(142, "GPIO_142"),
0257 PINCTRL_PIN(143, "GPIO_143"),
0258 PINCTRL_PIN(144, "GPIO_144"),
0259 PINCTRL_PIN(145, "GPIO_145"),
0260 PINCTRL_PIN(146, "GPIO_146"),
0261 PINCTRL_PIN(147, "GPIO_147"),
0262 PINCTRL_PIN(148, "GPIO_148"),
0263 PINCTRL_PIN(149, "GPIO_149"),
0264 PINCTRL_PIN(150, "SDC2_CLK"),
0265 PINCTRL_PIN(151, "SDC2_CMD"),
0266 PINCTRL_PIN(152, "SDC2_DATA"),
0267 PINCTRL_PIN(153, "UFS_RESET"),
0268 };
0269
0270 #define DECLARE_MSM_GPIO_PINS(pin) \
0271 static const unsigned int gpio##pin##_pins[] = { pin }
0272 DECLARE_MSM_GPIO_PINS(0);
0273 DECLARE_MSM_GPIO_PINS(1);
0274 DECLARE_MSM_GPIO_PINS(2);
0275 DECLARE_MSM_GPIO_PINS(3);
0276 DECLARE_MSM_GPIO_PINS(4);
0277 DECLARE_MSM_GPIO_PINS(5);
0278 DECLARE_MSM_GPIO_PINS(6);
0279 DECLARE_MSM_GPIO_PINS(7);
0280 DECLARE_MSM_GPIO_PINS(8);
0281 DECLARE_MSM_GPIO_PINS(9);
0282 DECLARE_MSM_GPIO_PINS(10);
0283 DECLARE_MSM_GPIO_PINS(11);
0284 DECLARE_MSM_GPIO_PINS(12);
0285 DECLARE_MSM_GPIO_PINS(13);
0286 DECLARE_MSM_GPIO_PINS(14);
0287 DECLARE_MSM_GPIO_PINS(15);
0288 DECLARE_MSM_GPIO_PINS(16);
0289 DECLARE_MSM_GPIO_PINS(17);
0290 DECLARE_MSM_GPIO_PINS(18);
0291 DECLARE_MSM_GPIO_PINS(19);
0292 DECLARE_MSM_GPIO_PINS(20);
0293 DECLARE_MSM_GPIO_PINS(21);
0294 DECLARE_MSM_GPIO_PINS(22);
0295 DECLARE_MSM_GPIO_PINS(23);
0296 DECLARE_MSM_GPIO_PINS(24);
0297 DECLARE_MSM_GPIO_PINS(25);
0298 DECLARE_MSM_GPIO_PINS(26);
0299 DECLARE_MSM_GPIO_PINS(27);
0300 DECLARE_MSM_GPIO_PINS(28);
0301 DECLARE_MSM_GPIO_PINS(29);
0302 DECLARE_MSM_GPIO_PINS(30);
0303 DECLARE_MSM_GPIO_PINS(31);
0304 DECLARE_MSM_GPIO_PINS(32);
0305 DECLARE_MSM_GPIO_PINS(33);
0306 DECLARE_MSM_GPIO_PINS(34);
0307 DECLARE_MSM_GPIO_PINS(35);
0308 DECLARE_MSM_GPIO_PINS(36);
0309 DECLARE_MSM_GPIO_PINS(37);
0310 DECLARE_MSM_GPIO_PINS(38);
0311 DECLARE_MSM_GPIO_PINS(39);
0312 DECLARE_MSM_GPIO_PINS(40);
0313 DECLARE_MSM_GPIO_PINS(41);
0314 DECLARE_MSM_GPIO_PINS(42);
0315 DECLARE_MSM_GPIO_PINS(43);
0316 DECLARE_MSM_GPIO_PINS(44);
0317 DECLARE_MSM_GPIO_PINS(45);
0318 DECLARE_MSM_GPIO_PINS(46);
0319 DECLARE_MSM_GPIO_PINS(47);
0320 DECLARE_MSM_GPIO_PINS(48);
0321 DECLARE_MSM_GPIO_PINS(49);
0322 DECLARE_MSM_GPIO_PINS(50);
0323 DECLARE_MSM_GPIO_PINS(51);
0324 DECLARE_MSM_GPIO_PINS(52);
0325 DECLARE_MSM_GPIO_PINS(53);
0326 DECLARE_MSM_GPIO_PINS(54);
0327 DECLARE_MSM_GPIO_PINS(55);
0328 DECLARE_MSM_GPIO_PINS(56);
0329 DECLARE_MSM_GPIO_PINS(57);
0330 DECLARE_MSM_GPIO_PINS(58);
0331 DECLARE_MSM_GPIO_PINS(59);
0332 DECLARE_MSM_GPIO_PINS(60);
0333 DECLARE_MSM_GPIO_PINS(61);
0334 DECLARE_MSM_GPIO_PINS(62);
0335 DECLARE_MSM_GPIO_PINS(63);
0336 DECLARE_MSM_GPIO_PINS(64);
0337 DECLARE_MSM_GPIO_PINS(65);
0338 DECLARE_MSM_GPIO_PINS(66);
0339 DECLARE_MSM_GPIO_PINS(67);
0340 DECLARE_MSM_GPIO_PINS(68);
0341 DECLARE_MSM_GPIO_PINS(69);
0342 DECLARE_MSM_GPIO_PINS(70);
0343 DECLARE_MSM_GPIO_PINS(71);
0344 DECLARE_MSM_GPIO_PINS(72);
0345 DECLARE_MSM_GPIO_PINS(73);
0346 DECLARE_MSM_GPIO_PINS(74);
0347 DECLARE_MSM_GPIO_PINS(75);
0348 DECLARE_MSM_GPIO_PINS(76);
0349 DECLARE_MSM_GPIO_PINS(77);
0350 DECLARE_MSM_GPIO_PINS(78);
0351 DECLARE_MSM_GPIO_PINS(79);
0352 DECLARE_MSM_GPIO_PINS(80);
0353 DECLARE_MSM_GPIO_PINS(81);
0354 DECLARE_MSM_GPIO_PINS(82);
0355 DECLARE_MSM_GPIO_PINS(83);
0356 DECLARE_MSM_GPIO_PINS(84);
0357 DECLARE_MSM_GPIO_PINS(85);
0358 DECLARE_MSM_GPIO_PINS(86);
0359 DECLARE_MSM_GPIO_PINS(87);
0360 DECLARE_MSM_GPIO_PINS(88);
0361 DECLARE_MSM_GPIO_PINS(89);
0362 DECLARE_MSM_GPIO_PINS(90);
0363 DECLARE_MSM_GPIO_PINS(91);
0364 DECLARE_MSM_GPIO_PINS(92);
0365 DECLARE_MSM_GPIO_PINS(93);
0366 DECLARE_MSM_GPIO_PINS(94);
0367 DECLARE_MSM_GPIO_PINS(95);
0368 DECLARE_MSM_GPIO_PINS(96);
0369 DECLARE_MSM_GPIO_PINS(97);
0370 DECLARE_MSM_GPIO_PINS(98);
0371 DECLARE_MSM_GPIO_PINS(99);
0372 DECLARE_MSM_GPIO_PINS(100);
0373 DECLARE_MSM_GPIO_PINS(101);
0374 DECLARE_MSM_GPIO_PINS(102);
0375 DECLARE_MSM_GPIO_PINS(103);
0376 DECLARE_MSM_GPIO_PINS(104);
0377 DECLARE_MSM_GPIO_PINS(105);
0378 DECLARE_MSM_GPIO_PINS(106);
0379 DECLARE_MSM_GPIO_PINS(107);
0380 DECLARE_MSM_GPIO_PINS(108);
0381 DECLARE_MSM_GPIO_PINS(109);
0382 DECLARE_MSM_GPIO_PINS(110);
0383 DECLARE_MSM_GPIO_PINS(111);
0384 DECLARE_MSM_GPIO_PINS(112);
0385 DECLARE_MSM_GPIO_PINS(113);
0386 DECLARE_MSM_GPIO_PINS(114);
0387 DECLARE_MSM_GPIO_PINS(115);
0388 DECLARE_MSM_GPIO_PINS(116);
0389 DECLARE_MSM_GPIO_PINS(117);
0390 DECLARE_MSM_GPIO_PINS(118);
0391 DECLARE_MSM_GPIO_PINS(119);
0392 DECLARE_MSM_GPIO_PINS(120);
0393 DECLARE_MSM_GPIO_PINS(121);
0394 DECLARE_MSM_GPIO_PINS(122);
0395 DECLARE_MSM_GPIO_PINS(123);
0396 DECLARE_MSM_GPIO_PINS(124);
0397 DECLARE_MSM_GPIO_PINS(125);
0398 DECLARE_MSM_GPIO_PINS(126);
0399 DECLARE_MSM_GPIO_PINS(127);
0400 DECLARE_MSM_GPIO_PINS(128);
0401 DECLARE_MSM_GPIO_PINS(129);
0402 DECLARE_MSM_GPIO_PINS(130);
0403 DECLARE_MSM_GPIO_PINS(131);
0404 DECLARE_MSM_GPIO_PINS(132);
0405 DECLARE_MSM_GPIO_PINS(133);
0406 DECLARE_MSM_GPIO_PINS(134);
0407 DECLARE_MSM_GPIO_PINS(135);
0408 DECLARE_MSM_GPIO_PINS(136);
0409 DECLARE_MSM_GPIO_PINS(137);
0410 DECLARE_MSM_GPIO_PINS(138);
0411 DECLARE_MSM_GPIO_PINS(139);
0412 DECLARE_MSM_GPIO_PINS(140);
0413 DECLARE_MSM_GPIO_PINS(141);
0414 DECLARE_MSM_GPIO_PINS(142);
0415 DECLARE_MSM_GPIO_PINS(143);
0416 DECLARE_MSM_GPIO_PINS(144);
0417 DECLARE_MSM_GPIO_PINS(145);
0418 DECLARE_MSM_GPIO_PINS(146);
0419 DECLARE_MSM_GPIO_PINS(147);
0420 DECLARE_MSM_GPIO_PINS(148);
0421 DECLARE_MSM_GPIO_PINS(149);
0422
0423 static const unsigned int sdc2_clk_pins[] = { 150 };
0424 static const unsigned int sdc2_cmd_pins[] = { 151 };
0425 static const unsigned int sdc2_data_pins[] = { 152 };
0426 static const unsigned int ufs_reset_pins[] = { 153 };
0427
0428 enum msm8998_functions {
0429 msm_mux_adsp_ext,
0430 msm_mux_agera_pll,
0431 msm_mux_atest_char,
0432 msm_mux_atest_gpsadc0,
0433 msm_mux_atest_gpsadc1,
0434 msm_mux_atest_tsens,
0435 msm_mux_atest_tsens2,
0436 msm_mux_atest_usb1,
0437 msm_mux_atest_usb10,
0438 msm_mux_atest_usb11,
0439 msm_mux_atest_usb12,
0440 msm_mux_atest_usb13,
0441 msm_mux_audio_ref,
0442 msm_mux_bimc_dte0,
0443 msm_mux_bimc_dte1,
0444 msm_mux_blsp10_spi,
0445 msm_mux_blsp10_spi_a,
0446 msm_mux_blsp10_spi_b,
0447 msm_mux_blsp11_i2c,
0448 msm_mux_blsp1_spi,
0449 msm_mux_blsp1_spi_a,
0450 msm_mux_blsp1_spi_b,
0451 msm_mux_blsp2_spi,
0452 msm_mux_blsp9_spi,
0453 msm_mux_blsp_i2c1,
0454 msm_mux_blsp_i2c10,
0455 msm_mux_blsp_i2c11,
0456 msm_mux_blsp_i2c12,
0457 msm_mux_blsp_i2c2,
0458 msm_mux_blsp_i2c3,
0459 msm_mux_blsp_i2c4,
0460 msm_mux_blsp_i2c5,
0461 msm_mux_blsp_i2c6,
0462 msm_mux_blsp_i2c7,
0463 msm_mux_blsp_i2c8,
0464 msm_mux_blsp_i2c9,
0465 msm_mux_blsp_spi1,
0466 msm_mux_blsp_spi10,
0467 msm_mux_blsp_spi11,
0468 msm_mux_blsp_spi12,
0469 msm_mux_blsp_spi2,
0470 msm_mux_blsp_spi3,
0471 msm_mux_blsp_spi4,
0472 msm_mux_blsp_spi5,
0473 msm_mux_blsp_spi6,
0474 msm_mux_blsp_spi7,
0475 msm_mux_blsp_spi8,
0476 msm_mux_blsp_spi9,
0477 msm_mux_blsp_uart1_a,
0478 msm_mux_blsp_uart1_b,
0479 msm_mux_blsp_uart2_a,
0480 msm_mux_blsp_uart2_b,
0481 msm_mux_blsp_uart3_a,
0482 msm_mux_blsp_uart3_b,
0483 msm_mux_blsp_uart7_a,
0484 msm_mux_blsp_uart7_b,
0485 msm_mux_blsp_uart8,
0486 msm_mux_blsp_uart8_a,
0487 msm_mux_blsp_uart8_b,
0488 msm_mux_blsp_uart9_a,
0489 msm_mux_blsp_uart9_b,
0490 msm_mux_blsp_uim1_a,
0491 msm_mux_blsp_uim1_b,
0492 msm_mux_blsp_uim2_a,
0493 msm_mux_blsp_uim2_b,
0494 msm_mux_blsp_uim3_a,
0495 msm_mux_blsp_uim3_b,
0496 msm_mux_blsp_uim7_a,
0497 msm_mux_blsp_uim7_b,
0498 msm_mux_blsp_uim8_a,
0499 msm_mux_blsp_uim8_b,
0500 msm_mux_blsp_uim9_a,
0501 msm_mux_blsp_uim9_b,
0502 msm_mux_bt_reset,
0503 msm_mux_btfm_slimbus,
0504 msm_mux_cam_mclk,
0505 msm_mux_cci_async,
0506 msm_mux_cci_i2c,
0507 msm_mux_cci_timer0,
0508 msm_mux_cci_timer1,
0509 msm_mux_cci_timer2,
0510 msm_mux_cci_timer3,
0511 msm_mux_cci_timer4,
0512 msm_mux_cri_trng,
0513 msm_mux_cri_trng0,
0514 msm_mux_cri_trng1,
0515 msm_mux_dbg_out,
0516 msm_mux_ddr_bist,
0517 msm_mux_edp_hot,
0518 msm_mux_edp_lcd,
0519 msm_mux_gcc_gp1_a,
0520 msm_mux_gcc_gp1_b,
0521 msm_mux_gcc_gp2_a,
0522 msm_mux_gcc_gp2_b,
0523 msm_mux_gcc_gp3_a,
0524 msm_mux_gcc_gp3_b,
0525 msm_mux_gpio,
0526 msm_mux_hdmi_cec,
0527 msm_mux_hdmi_ddc,
0528 msm_mux_hdmi_hot,
0529 msm_mux_hdmi_rcv,
0530 msm_mux_isense_dbg,
0531 msm_mux_jitter_bist,
0532 msm_mux_ldo_en,
0533 msm_mux_ldo_update,
0534 msm_mux_lpass_slimbus,
0535 msm_mux_m_voc,
0536 msm_mux_mdp_vsync,
0537 msm_mux_mdp_vsync0,
0538 msm_mux_mdp_vsync1,
0539 msm_mux_mdp_vsync2,
0540 msm_mux_mdp_vsync3,
0541 msm_mux_mdp_vsync_a,
0542 msm_mux_mdp_vsync_b,
0543 msm_mux_modem_tsync,
0544 msm_mux_mss_lte,
0545 msm_mux_nav_dr,
0546 msm_mux_nav_pps,
0547 msm_mux_pa_indicator,
0548 msm_mux_pci_e0,
0549 msm_mux_phase_flag,
0550 msm_mux_pll_bypassnl,
0551 msm_mux_pll_reset,
0552 msm_mux_pri_mi2s,
0553 msm_mux_pri_mi2s_ws,
0554 msm_mux_prng_rosc,
0555 msm_mux_pwr_crypto,
0556 msm_mux_pwr_modem,
0557 msm_mux_pwr_nav,
0558 msm_mux_qdss_cti0_a,
0559 msm_mux_qdss_cti0_b,
0560 msm_mux_qdss_cti1_a,
0561 msm_mux_qdss_cti1_b,
0562 msm_mux_qdss,
0563 msm_mux_qlink_enable,
0564 msm_mux_qlink_request,
0565 msm_mux_qua_mi2s,
0566 msm_mux_sd_card,
0567 msm_mux_sd_write,
0568 msm_mux_sdc40,
0569 msm_mux_sdc41,
0570 msm_mux_sdc42,
0571 msm_mux_sdc43,
0572 msm_mux_sdc4_clk,
0573 msm_mux_sdc4_cmd,
0574 msm_mux_sec_mi2s,
0575 msm_mux_sp_cmu,
0576 msm_mux_spkr_i2s,
0577 msm_mux_ssbi1,
0578 msm_mux_ssc_irq,
0579 msm_mux_ter_mi2s,
0580 msm_mux_tgu_ch0,
0581 msm_mux_tgu_ch1,
0582 msm_mux_tsense_pwm1,
0583 msm_mux_tsense_pwm2,
0584 msm_mux_tsif0,
0585 msm_mux_tsif1,
0586 msm_mux_uim1_clk,
0587 msm_mux_uim1_data,
0588 msm_mux_uim1_present,
0589 msm_mux_uim1_reset,
0590 msm_mux_uim2_clk,
0591 msm_mux_uim2_data,
0592 msm_mux_uim2_present,
0593 msm_mux_uim2_reset,
0594 msm_mux_uim_batt,
0595 msm_mux_usb_phy,
0596 msm_mux_vfr_1,
0597 msm_mux_vsense_clkout,
0598 msm_mux_vsense_data0,
0599 msm_mux_vsense_data1,
0600 msm_mux_vsense_mode,
0601 msm_mux_wlan1_adc0,
0602 msm_mux_wlan1_adc1,
0603 msm_mux_wlan2_adc0,
0604 msm_mux_wlan2_adc1,
0605 msm_mux__,
0606 };
0607
0608 static const char * const gpio_groups[] = {
0609 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
0610 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
0611 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
0612 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
0613 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
0614 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
0615 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
0616 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
0617 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
0618 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
0619 "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
0620 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
0621 "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
0622 "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
0623 "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
0624 "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
0625 "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
0626 "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122",
0627 "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", "gpio128",
0628 "gpio129", "gpio130", "gpio131", "gpio132", "gpio133", "gpio134",
0629 "gpio135", "gpio136", "gpio137", "gpio138", "gpio139", "gpio140",
0630 "gpio141", "gpio142", "gpio143", "gpio144", "gpio145", "gpio146",
0631 "gpio147", "gpio148", "gpio149",
0632 };
0633 static const char * const blsp_spi1_groups[] = {
0634 "gpio0", "gpio1", "gpio2", "gpio3",
0635 };
0636 static const char * const blsp_uim1_a_groups[] = {
0637 "gpio0", "gpio1",
0638 };
0639 static const char * const blsp_uart1_a_groups[] = {
0640 "gpio0", "gpio1", "gpio2", "gpio3",
0641 };
0642 static const char * const blsp_i2c1_groups[] = {
0643 "gpio2", "gpio3",
0644 };
0645 static const char * const blsp_spi8_groups[] = {
0646 "gpio4", "gpio5", "gpio6", "gpio7",
0647 };
0648 static const char * const blsp_uart8_a_groups[] = {
0649 "gpio4", "gpio5", "gpio6", "gpio7",
0650 };
0651 static const char * const blsp_uim8_a_groups[] = {
0652 "gpio4", "gpio5",
0653 };
0654 static const char * const qdss_cti0_b_groups[] = {
0655 "gpio4", "gpio5",
0656 };
0657 static const char * const blsp_i2c8_groups[] = {
0658 "gpio6", "gpio7",
0659 };
0660 static const char * const ddr_bist_groups[] = {
0661 "gpio7", "gpio8", "gpio9", "gpio10",
0662 };
0663 static const char * const atest_tsens2_groups[] = {
0664 "gpio7",
0665 };
0666 static const char * const atest_usb1_groups[] = {
0667 "gpio7",
0668 };
0669 static const char * const blsp_spi4_groups[] = {
0670 "gpio8", "gpio9", "gpio10", "gpio11",
0671 };
0672 static const char * const blsp_uart1_b_groups[] = {
0673 "gpio8", "gpio9", "gpio10", "gpio11",
0674 };
0675 static const char * const blsp_uim1_b_groups[] = {
0676 "gpio8", "gpio9",
0677 };
0678 static const char * const wlan1_adc1_groups[] = {
0679 "gpio8",
0680 };
0681 static const char * const atest_usb13_groups[] = {
0682 "gpio8",
0683 };
0684 static const char * const bimc_dte1_groups[] = {
0685 "gpio8", "gpio10",
0686 };
0687 static const char * const wlan1_adc0_groups[] = {
0688 "gpio9",
0689 };
0690 static const char * const atest_usb12_groups[] = {
0691 "gpio9",
0692 };
0693 static const char * const bimc_dte0_groups[] = {
0694 "gpio9", "gpio11",
0695 };
0696 static const char * const mdp_vsync_a_groups[] = {
0697 "gpio10", "gpio11",
0698 };
0699 static const char * const blsp_i2c4_groups[] = {
0700 "gpio10", "gpio11",
0701 };
0702 static const char * const atest_gpsadc1_groups[] = {
0703 "gpio10",
0704 };
0705 static const char * const wlan2_adc1_groups[] = {
0706 "gpio10",
0707 };
0708 static const char * const atest_usb11_groups[] = {
0709 "gpio10",
0710 };
0711 static const char * const edp_lcd_groups[] = {
0712 "gpio11",
0713 };
0714 static const char * const dbg_out_groups[] = {
0715 "gpio11",
0716 };
0717 static const char * const atest_gpsadc0_groups[] = {
0718 "gpio11",
0719 };
0720 static const char * const wlan2_adc0_groups[] = {
0721 "gpio11",
0722 };
0723 static const char * const atest_usb10_groups[] = {
0724 "gpio11",
0725 };
0726 static const char * const mdp_vsync_groups[] = {
0727 "gpio12",
0728 };
0729 static const char * const m_voc_groups[] = {
0730 "gpio12",
0731 };
0732 static const char * const cam_mclk_groups[] = {
0733 "gpio13", "gpio14", "gpio15", "gpio16",
0734 };
0735 static const char * const pll_bypassnl_groups[] = {
0736 "gpio13",
0737 };
0738 static const char * const qdss_groups[] = {
0739 "gpio13", "gpio14", "gpio15", "gpio16", "gpio17", "gpio18", "gpio19",
0740 "gpio20", "gpio21", "gpio22", "gpio23", "gpio24", "gpio25", "gpio26",
0741 "gpio27", "gpio28", "gpio29", "gpio30", "gpio41", "gpio42", "gpio43",
0742 "gpio44", "gpio75", "gpio76", "gpio77", "gpio79", "gpio80", "gpio93",
0743 "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122",
0744 "gpio123", "gpio124",
0745 };
0746 static const char * const pll_reset_groups[] = {
0747 "gpio14",
0748 };
0749 static const char * const cci_i2c_groups[] = {
0750 "gpio17", "gpio18", "gpio19", "gpio20",
0751 };
0752 static const char * const phase_flag_groups[] = {
0753 "gpio18", "gpio19", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
0754 "gpio89", "gpio91", "gpio92", "gpio96", "gpio114", "gpio115",
0755 "gpio116", "gpio117", "gpio118", "gpio119", "gpio120", "gpio121",
0756 "gpio122", "gpio123", "gpio124", "gpio125", "gpio126", "gpio128",
0757 "gpio129", "gpio130", "gpio131", "gpio132", "gpio133", "gpio134",
0758 };
0759 static const char * const cci_timer4_groups[] = {
0760 "gpio25",
0761 };
0762 static const char * const blsp2_spi_groups[] = {
0763 "gpio25", "gpio29", "gpio30",
0764 };
0765 static const char * const cci_timer0_groups[] = {
0766 "gpio21",
0767 };
0768 static const char * const vsense_data0_groups[] = {
0769 "gpio21",
0770 };
0771 static const char * const cci_timer1_groups[] = {
0772 "gpio22",
0773 };
0774 static const char * const vsense_data1_groups[] = {
0775 "gpio22",
0776 };
0777 static const char * const cci_timer2_groups[] = {
0778 "gpio23",
0779 };
0780 static const char * const blsp1_spi_b_groups[] = {
0781 "gpio23", "gpio28",
0782 };
0783 static const char * const vsense_mode_groups[] = {
0784 "gpio23",
0785 };
0786 static const char * const cci_timer3_groups[] = {
0787 "gpio24",
0788 };
0789 static const char * const cci_async_groups[] = {
0790 "gpio24", "gpio25", "gpio26",
0791 };
0792 static const char * const blsp1_spi_a_groups[] = {
0793 "gpio24", "gpio27",
0794 };
0795 static const char * const vsense_clkout_groups[] = {
0796 "gpio24",
0797 };
0798 static const char * const hdmi_rcv_groups[] = {
0799 "gpio30",
0800 };
0801 static const char * const hdmi_cec_groups[] = {
0802 "gpio31",
0803 };
0804 static const char * const blsp_spi2_groups[] = {
0805 "gpio31", "gpio32", "gpio33", "gpio34",
0806 };
0807 static const char * const blsp_uart2_a_groups[] = {
0808 "gpio31", "gpio32", "gpio33", "gpio34",
0809 };
0810 static const char * const blsp_uim2_a_groups[] = {
0811 "gpio31", "gpio34",
0812 };
0813 static const char * const pwr_modem_groups[] = {
0814 "gpio31",
0815 };
0816 static const char * const hdmi_ddc_groups[] = {
0817 "gpio32", "gpio33",
0818 };
0819 static const char * const blsp_i2c2_groups[] = {
0820 "gpio32", "gpio33",
0821 };
0822 static const char * const pwr_nav_groups[] = {
0823 "gpio32",
0824 };
0825 static const char * const pwr_crypto_groups[] = {
0826 "gpio33",
0827 };
0828 static const char * const hdmi_hot_groups[] = {
0829 "gpio34",
0830 };
0831 static const char * const edp_hot_groups[] = {
0832 "gpio34",
0833 };
0834 static const char * const pci_e0_groups[] = {
0835 "gpio35", "gpio36", "gpio37",
0836 };
0837 static const char * const jitter_bist_groups[] = {
0838 "gpio35",
0839 };
0840 static const char * const agera_pll_groups[] = {
0841 "gpio36", "gpio37",
0842 };
0843 static const char * const atest_tsens_groups[] = {
0844 "gpio36",
0845 };
0846 static const char * const usb_phy_groups[] = {
0847 "gpio38",
0848 };
0849 static const char * const lpass_slimbus_groups[] = {
0850 "gpio39", "gpio70", "gpio71", "gpio72",
0851 };
0852 static const char * const sd_write_groups[] = {
0853 "gpio40",
0854 };
0855 static const char * const blsp_spi6_groups[] = {
0856 "gpio41", "gpio42", "gpio43", "gpio44",
0857 };
0858 static const char * const blsp_uart3_b_groups[] = {
0859 "gpio41", "gpio42", "gpio43", "gpio44",
0860 };
0861 static const char * const blsp_uim3_b_groups[] = {
0862 "gpio41", "gpio42",
0863 };
0864 static const char * const blsp_i2c6_groups[] = {
0865 "gpio43", "gpio44",
0866 };
0867 static const char * const bt_reset_groups[] = {
0868 "gpio45",
0869 };
0870 static const char * const blsp_spi3_groups[] = {
0871 "gpio45", "gpio46", "gpio47", "gpio48",
0872 };
0873 static const char * const blsp_uart3_a_groups[] = {
0874 "gpio45", "gpio46", "gpio47", "gpio48",
0875 };
0876 static const char * const blsp_uim3_a_groups[] = {
0877 "gpio45", "gpio46",
0878 };
0879 static const char * const blsp_i2c3_groups[] = {
0880 "gpio47", "gpio48",
0881 };
0882 static const char * const blsp_spi9_groups[] = {
0883 "gpio49", "gpio50", "gpio51", "gpio52",
0884 };
0885 static const char * const blsp_uart9_a_groups[] = {
0886 "gpio49", "gpio50", "gpio51", "gpio52",
0887 };
0888 static const char * const blsp_uim9_a_groups[] = {
0889 "gpio49", "gpio50",
0890 };
0891 static const char * const blsp10_spi_b_groups[] = {
0892 "gpio49", "gpio50",
0893 };
0894 static const char * const qdss_cti0_a_groups[] = {
0895 "gpio49", "gpio50",
0896 };
0897 static const char * const blsp_i2c9_groups[] = {
0898 "gpio51", "gpio52",
0899 };
0900 static const char * const blsp10_spi_a_groups[] = {
0901 "gpio51", "gpio52",
0902 };
0903 static const char * const blsp_spi7_groups[] = {
0904 "gpio53", "gpio54", "gpio55", "gpio56",
0905 };
0906 static const char * const blsp_uart7_a_groups[] = {
0907 "gpio53", "gpio54", "gpio55", "gpio56",
0908 };
0909 static const char * const blsp_uim7_a_groups[] = {
0910 "gpio53", "gpio54",
0911 };
0912 static const char * const blsp_i2c7_groups[] = {
0913 "gpio55", "gpio56",
0914 };
0915 static const char * const qua_mi2s_groups[] = {
0916 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
0917 };
0918 static const char * const blsp10_spi_groups[] = {
0919 "gpio57",
0920 };
0921 static const char * const gcc_gp1_a_groups[] = {
0922 "gpio57",
0923 };
0924 static const char * const ssc_irq_groups[] = {
0925 "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", "gpio78",
0926 "gpio79", "gpio80", "gpio117", "gpio118", "gpio119", "gpio120",
0927 "gpio121", "gpio122", "gpio123", "gpio124", "gpio125",
0928 };
0929 static const char * const blsp_spi11_groups[] = {
0930 "gpio58", "gpio59", "gpio60", "gpio61",
0931 };
0932 static const char * const blsp_uart8_b_groups[] = {
0933 "gpio58", "gpio59", "gpio60", "gpio61",
0934 };
0935 static const char * const blsp_uim8_b_groups[] = {
0936 "gpio58", "gpio59",
0937 };
0938 static const char * const gcc_gp2_a_groups[] = {
0939 "gpio58",
0940 };
0941 static const char * const qdss_cti1_a_groups[] = {
0942 "gpio58", "gpio59",
0943 };
0944 static const char * const gcc_gp3_a_groups[] = {
0945 "gpio59",
0946 };
0947 static const char * const blsp_i2c11_groups[] = {
0948 "gpio60", "gpio61",
0949 };
0950 static const char * const cri_trng0_groups[] = {
0951 "gpio60",
0952 };
0953 static const char * const cri_trng1_groups[] = {
0954 "gpio61",
0955 };
0956 static const char * const cri_trng_groups[] = {
0957 "gpio62",
0958 };
0959 static const char * const pri_mi2s_groups[] = {
0960 "gpio64", "gpio65", "gpio67", "gpio68",
0961 };
0962 static const char * const sp_cmu_groups[] = {
0963 "gpio64",
0964 };
0965 static const char * const blsp_spi10_groups[] = {
0966 "gpio65", "gpio66", "gpio67", "gpio68",
0967 };
0968 static const char * const blsp_uart7_b_groups[] = {
0969 "gpio65", "gpio66", "gpio67", "gpio68",
0970 };
0971 static const char * const blsp_uim7_b_groups[] = {
0972 "gpio65", "gpio66",
0973 };
0974 static const char * const pri_mi2s_ws_groups[] = {
0975 "gpio66",
0976 };
0977 static const char * const blsp_i2c10_groups[] = {
0978 "gpio67", "gpio68",
0979 };
0980 static const char * const spkr_i2s_groups[] = {
0981 "gpio69", "gpio70", "gpio71", "gpio72",
0982 };
0983 static const char * const audio_ref_groups[] = {
0984 "gpio69",
0985 };
0986 static const char * const blsp9_spi_groups[] = {
0987 "gpio70", "gpio71", "gpio72",
0988 };
0989 static const char * const tsense_pwm1_groups[] = {
0990 "gpio71",
0991 };
0992 static const char * const tsense_pwm2_groups[] = {
0993 "gpio71",
0994 };
0995 static const char * const btfm_slimbus_groups[] = {
0996 "gpio73", "gpio74",
0997 };
0998 static const char * const ter_mi2s_groups[] = {
0999 "gpio74", "gpio75", "gpio76", "gpio77", "gpio78",
1000 };
1001 static const char * const gcc_gp1_b_groups[] = {
1002 "gpio78",
1003 };
1004 static const char * const sec_mi2s_groups[] = {
1005 "gpio79", "gpio80", "gpio81", "gpio82", "gpio83",
1006 };
1007 static const char * const blsp_spi12_groups[] = {
1008 "gpio81", "gpio82", "gpio83", "gpio84",
1009 };
1010 static const char * const blsp_uart9_b_groups[] = {
1011 "gpio81", "gpio82", "gpio83", "gpio84",
1012 };
1013 static const char * const blsp_uim9_b_groups[] = {
1014 "gpio81", "gpio82",
1015 };
1016 static const char * const gcc_gp2_b_groups[] = {
1017 "gpio81",
1018 };
1019 static const char * const gcc_gp3_b_groups[] = {
1020 "gpio82",
1021 };
1022 static const char * const blsp_i2c12_groups[] = {
1023 "gpio83", "gpio84",
1024 };
1025 static const char * const blsp_spi5_groups[] = {
1026 "gpio85", "gpio86", "gpio87", "gpio88",
1027 };
1028 static const char * const blsp_uart2_b_groups[] = {
1029 "gpio85", "gpio86", "gpio87", "gpio88",
1030 };
1031 static const char * const blsp_uim2_b_groups[] = {
1032 "gpio85", "gpio86",
1033 };
1034 static const char * const blsp_i2c5_groups[] = {
1035 "gpio87", "gpio88",
1036 };
1037 static const char * const tsif0_groups[] = {
1038 "gpio9", "gpio40", "gpio89", "gpio90", "gpio91",
1039 };
1040 static const char * const mdp_vsync0_groups[] = {
1041 "gpio90",
1042 };
1043 static const char * const mdp_vsync1_groups[] = {
1044 "gpio90",
1045 };
1046 static const char * const mdp_vsync2_groups[] = {
1047 "gpio90",
1048 };
1049 static const char * const mdp_vsync3_groups[] = {
1050 "gpio90",
1051 };
1052 static const char * const blsp1_spi_groups[] = {
1053 "gpio90",
1054 };
1055 static const char * const tgu_ch0_groups[] = {
1056 "gpio90",
1057 };
1058 static const char * const qdss_cti1_b_groups[] = {
1059 "gpio90", "gpio91",
1060 };
1061 static const char * const sdc4_cmd_groups[] = {
1062 "gpio91",
1063 };
1064 static const char * const tgu_ch1_groups[] = {
1065 "gpio91",
1066 };
1067 static const char * const tsif1_groups[] = {
1068 "gpio92", "gpio93", "gpio94", "gpio95", "gpio96",
1069 };
1070 static const char * const sdc43_groups[] = {
1071 "gpio92",
1072 };
1073 static const char * const vfr_1_groups[] = {
1074 "gpio92",
1075 };
1076 static const char * const sdc4_clk_groups[] = {
1077 "gpio93",
1078 };
1079 static const char * const sdc42_groups[] = {
1080 "gpio94",
1081 };
1082 static const char * const sd_card_groups[] = {
1083 "gpio95",
1084 };
1085 static const char * const sdc41_groups[] = {
1086 "gpio95",
1087 };
1088 static const char * const sdc40_groups[] = {
1089 "gpio96",
1090 };
1091 static const char * const mdp_vsync_b_groups[] = {
1092 "gpio97", "gpio98",
1093 };
1094 static const char * const ldo_en_groups[] = {
1095 "gpio97",
1096 };
1097 static const char * const ldo_update_groups[] = {
1098 "gpio98",
1099 };
1100 static const char * const blsp_uart8_groups[] = {
1101 "gpio100", "gpio101",
1102 };
1103 static const char * const blsp11_i2c_groups[] = {
1104 "gpio102", "gpio103",
1105 };
1106 static const char * const prng_rosc_groups[] = {
1107 "gpio102",
1108 };
1109 static const char * const uim2_data_groups[] = {
1110 "gpio105",
1111 };
1112 static const char * const uim2_clk_groups[] = {
1113 "gpio106",
1114 };
1115 static const char * const uim2_reset_groups[] = {
1116 "gpio107",
1117 };
1118 static const char * const uim2_present_groups[] = {
1119 "gpio108",
1120 };
1121 static const char * const uim1_data_groups[] = {
1122 "gpio109",
1123 };
1124 static const char * const uim1_clk_groups[] = {
1125 "gpio110",
1126 };
1127 static const char * const uim1_reset_groups[] = {
1128 "gpio111",
1129 };
1130 static const char * const uim1_present_groups[] = {
1131 "gpio112",
1132 };
1133 static const char * const uim_batt_groups[] = {
1134 "gpio113",
1135 };
1136 static const char * const nav_dr_groups[] = {
1137 "gpio115",
1138 };
1139 static const char * const atest_char_groups[] = {
1140 "gpio117", "gpio118", "gpio119", "gpio120", "gpio121",
1141 };
1142 static const char * const adsp_ext_groups[] = {
1143 "gpio118",
1144 };
1145 static const char * const modem_tsync_groups[] = {
1146 "gpio128",
1147 };
1148 static const char * const nav_pps_groups[] = {
1149 "gpio128",
1150 };
1151 static const char * const qlink_request_groups[] = {
1152 "gpio130",
1153 };
1154 static const char * const qlink_enable_groups[] = {
1155 "gpio131",
1156 };
1157 static const char * const pa_indicator_groups[] = {
1158 "gpio135",
1159 };
1160 static const char * const ssbi1_groups[] = {
1161 "gpio142",
1162 };
1163 static const char * const isense_dbg_groups[] = {
1164 "gpio143",
1165 };
1166 static const char * const mss_lte_groups[] = {
1167 "gpio144", "gpio145",
1168 };
1169
1170 static const struct msm_function msm8998_functions[] = {
1171 FUNCTION(gpio),
1172 FUNCTION(adsp_ext),
1173 FUNCTION(agera_pll),
1174 FUNCTION(atest_char),
1175 FUNCTION(atest_gpsadc0),
1176 FUNCTION(atest_gpsadc1),
1177 FUNCTION(atest_tsens),
1178 FUNCTION(atest_tsens2),
1179 FUNCTION(atest_usb1),
1180 FUNCTION(atest_usb10),
1181 FUNCTION(atest_usb11),
1182 FUNCTION(atest_usb12),
1183 FUNCTION(atest_usb13),
1184 FUNCTION(audio_ref),
1185 FUNCTION(bimc_dte0),
1186 FUNCTION(bimc_dte1),
1187 FUNCTION(blsp10_spi),
1188 FUNCTION(blsp10_spi_a),
1189 FUNCTION(blsp10_spi_b),
1190 FUNCTION(blsp11_i2c),
1191 FUNCTION(blsp1_spi),
1192 FUNCTION(blsp1_spi_a),
1193 FUNCTION(blsp1_spi_b),
1194 FUNCTION(blsp2_spi),
1195 FUNCTION(blsp9_spi),
1196 FUNCTION(blsp_i2c1),
1197 FUNCTION(blsp_i2c2),
1198 FUNCTION(blsp_i2c3),
1199 FUNCTION(blsp_i2c4),
1200 FUNCTION(blsp_i2c5),
1201 FUNCTION(blsp_i2c6),
1202 FUNCTION(blsp_i2c7),
1203 FUNCTION(blsp_i2c8),
1204 FUNCTION(blsp_i2c9),
1205 FUNCTION(blsp_i2c10),
1206 FUNCTION(blsp_i2c11),
1207 FUNCTION(blsp_i2c12),
1208 FUNCTION(blsp_spi1),
1209 FUNCTION(blsp_spi2),
1210 FUNCTION(blsp_spi3),
1211 FUNCTION(blsp_spi4),
1212 FUNCTION(blsp_spi5),
1213 FUNCTION(blsp_spi6),
1214 FUNCTION(blsp_spi7),
1215 FUNCTION(blsp_spi8),
1216 FUNCTION(blsp_spi9),
1217 FUNCTION(blsp_spi10),
1218 FUNCTION(blsp_spi11),
1219 FUNCTION(blsp_spi12),
1220 FUNCTION(blsp_uart1_a),
1221 FUNCTION(blsp_uart1_b),
1222 FUNCTION(blsp_uart2_a),
1223 FUNCTION(blsp_uart2_b),
1224 FUNCTION(blsp_uart3_a),
1225 FUNCTION(blsp_uart3_b),
1226 FUNCTION(blsp_uart7_a),
1227 FUNCTION(blsp_uart7_b),
1228 FUNCTION(blsp_uart8),
1229 FUNCTION(blsp_uart8_a),
1230 FUNCTION(blsp_uart8_b),
1231 FUNCTION(blsp_uart9_a),
1232 FUNCTION(blsp_uart9_b),
1233 FUNCTION(blsp_uim1_a),
1234 FUNCTION(blsp_uim1_b),
1235 FUNCTION(blsp_uim2_a),
1236 FUNCTION(blsp_uim2_b),
1237 FUNCTION(blsp_uim3_a),
1238 FUNCTION(blsp_uim3_b),
1239 FUNCTION(blsp_uim7_a),
1240 FUNCTION(blsp_uim7_b),
1241 FUNCTION(blsp_uim8_a),
1242 FUNCTION(blsp_uim8_b),
1243 FUNCTION(blsp_uim9_a),
1244 FUNCTION(blsp_uim9_b),
1245 FUNCTION(bt_reset),
1246 FUNCTION(btfm_slimbus),
1247 FUNCTION(cam_mclk),
1248 FUNCTION(cci_async),
1249 FUNCTION(cci_i2c),
1250 FUNCTION(cci_timer0),
1251 FUNCTION(cci_timer1),
1252 FUNCTION(cci_timer2),
1253 FUNCTION(cci_timer3),
1254 FUNCTION(cci_timer4),
1255 FUNCTION(cri_trng),
1256 FUNCTION(cri_trng0),
1257 FUNCTION(cri_trng1),
1258 FUNCTION(dbg_out),
1259 FUNCTION(ddr_bist),
1260 FUNCTION(edp_hot),
1261 FUNCTION(edp_lcd),
1262 FUNCTION(gcc_gp1_a),
1263 FUNCTION(gcc_gp1_b),
1264 FUNCTION(gcc_gp2_a),
1265 FUNCTION(gcc_gp2_b),
1266 FUNCTION(gcc_gp3_a),
1267 FUNCTION(gcc_gp3_b),
1268 FUNCTION(hdmi_cec),
1269 FUNCTION(hdmi_ddc),
1270 FUNCTION(hdmi_hot),
1271 FUNCTION(hdmi_rcv),
1272 FUNCTION(isense_dbg),
1273 FUNCTION(jitter_bist),
1274 FUNCTION(ldo_en),
1275 FUNCTION(ldo_update),
1276 FUNCTION(lpass_slimbus),
1277 FUNCTION(m_voc),
1278 FUNCTION(mdp_vsync),
1279 FUNCTION(mdp_vsync0),
1280 FUNCTION(mdp_vsync1),
1281 FUNCTION(mdp_vsync2),
1282 FUNCTION(mdp_vsync3),
1283 FUNCTION(mdp_vsync_a),
1284 FUNCTION(mdp_vsync_b),
1285 FUNCTION(modem_tsync),
1286 FUNCTION(mss_lte),
1287 FUNCTION(nav_dr),
1288 FUNCTION(nav_pps),
1289 FUNCTION(pa_indicator),
1290 FUNCTION(pci_e0),
1291 FUNCTION(phase_flag),
1292 FUNCTION(pll_bypassnl),
1293 FUNCTION(pll_reset),
1294 FUNCTION(pri_mi2s),
1295 FUNCTION(pri_mi2s_ws),
1296 FUNCTION(prng_rosc),
1297 FUNCTION(pwr_crypto),
1298 FUNCTION(pwr_modem),
1299 FUNCTION(pwr_nav),
1300 FUNCTION(qdss_cti0_a),
1301 FUNCTION(qdss_cti0_b),
1302 FUNCTION(qdss_cti1_a),
1303 FUNCTION(qdss_cti1_b),
1304 FUNCTION(qdss),
1305 FUNCTION(qlink_enable),
1306 FUNCTION(qlink_request),
1307 FUNCTION(qua_mi2s),
1308 FUNCTION(sd_card),
1309 FUNCTION(sd_write),
1310 FUNCTION(sdc40),
1311 FUNCTION(sdc41),
1312 FUNCTION(sdc42),
1313 FUNCTION(sdc43),
1314 FUNCTION(sdc4_clk),
1315 FUNCTION(sdc4_cmd),
1316 FUNCTION(sec_mi2s),
1317 FUNCTION(sp_cmu),
1318 FUNCTION(spkr_i2s),
1319 FUNCTION(ssbi1),
1320 FUNCTION(ssc_irq),
1321 FUNCTION(ter_mi2s),
1322 FUNCTION(tgu_ch0),
1323 FUNCTION(tgu_ch1),
1324 FUNCTION(tsense_pwm1),
1325 FUNCTION(tsense_pwm2),
1326 FUNCTION(tsif0),
1327 FUNCTION(tsif1),
1328 FUNCTION(uim1_clk),
1329 FUNCTION(uim1_data),
1330 FUNCTION(uim1_present),
1331 FUNCTION(uim1_reset),
1332 FUNCTION(uim2_clk),
1333 FUNCTION(uim2_data),
1334 FUNCTION(uim2_present),
1335 FUNCTION(uim2_reset),
1336 FUNCTION(uim_batt),
1337 FUNCTION(usb_phy),
1338 FUNCTION(vfr_1),
1339 FUNCTION(vsense_clkout),
1340 FUNCTION(vsense_data0),
1341 FUNCTION(vsense_data1),
1342 FUNCTION(vsense_mode),
1343 FUNCTION(wlan1_adc0),
1344 FUNCTION(wlan1_adc1),
1345 FUNCTION(wlan2_adc0),
1346 FUNCTION(wlan2_adc1),
1347 };
1348
1349 static const struct msm_pingroup msm8998_groups[] = {
1350 PINGROUP(0, EAST, blsp_spi1, blsp_uart1_a, blsp_uim1_a, _, _, _, _, _, _),
1351 PINGROUP(1, EAST, blsp_spi1, blsp_uart1_a, blsp_uim1_a, _, _, _, _, _, _),
1352 PINGROUP(2, EAST, blsp_spi1, blsp_uart1_a, blsp_i2c1, _, _, _, _, _, _),
1353 PINGROUP(3, EAST, blsp_spi1, blsp_uart1_a, blsp_i2c1, _, _, _, _, _, _),
1354 PINGROUP(4, WEST, blsp_spi8, blsp_uart8_a, blsp_uim8_a, _, qdss_cti0_b, _, _, _, _),
1355 PINGROUP(5, WEST, blsp_spi8, blsp_uart8_a, blsp_uim8_a, _, qdss_cti0_b, _, _, _, _),
1356 PINGROUP(6, WEST, blsp_spi8, blsp_uart8_a, blsp_i2c8, _, _, _, _, _, _),
1357 PINGROUP(7, WEST, blsp_spi8, blsp_uart8_a, blsp_i2c8, ddr_bist, _, atest_tsens2, atest_usb1, _, _),
1358 PINGROUP(8, EAST, blsp_spi4, blsp_uart1_b, blsp_uim1_b, _, ddr_bist, _, wlan1_adc1, atest_usb13, bimc_dte1),
1359 PINGROUP(9, EAST, blsp_spi4, blsp_uart1_b, blsp_uim1_b, tsif0, ddr_bist, _, wlan1_adc0, atest_usb12, bimc_dte0),
1360 PINGROUP(10, EAST, mdp_vsync_a, blsp_spi4, blsp_uart1_b, blsp_i2c4, ddr_bist, atest_gpsadc1, wlan2_adc1, atest_usb11, bimc_dte1),
1361 PINGROUP(11, EAST, mdp_vsync_a, edp_lcd, blsp_spi4, blsp_uart1_b, blsp_i2c4, dbg_out, atest_gpsadc0, wlan2_adc0, atest_usb10),
1362 PINGROUP(12, EAST, mdp_vsync, m_voc, _, _, _, _, _, _, _),
1363 PINGROUP(13, EAST, cam_mclk, pll_bypassnl, qdss, _, _, _, _, _, _),
1364 PINGROUP(14, EAST, cam_mclk, pll_reset, qdss, _, _, _, _, _, _),
1365 PINGROUP(15, EAST, cam_mclk, qdss, _, _, _, _, _, _, _),
1366 PINGROUP(16, EAST, cam_mclk, qdss, _, _, _, _, _, _, _),
1367 PINGROUP(17, EAST, cci_i2c, qdss, _, _, _, _, _, _, _),
1368 PINGROUP(18, EAST, cci_i2c, phase_flag, qdss, _, _, _, _, _, _),
1369 PINGROUP(19, EAST, cci_i2c, phase_flag, qdss, _, _, _, _, _, _),
1370 PINGROUP(20, EAST, cci_i2c, qdss, _, _, _, _, _, _, _),
1371 PINGROUP(21, EAST, cci_timer0, _, qdss, vsense_data0, _, _, _, _, _),
1372 PINGROUP(22, EAST, cci_timer1, _, qdss, vsense_data1, _, _, _, _, _),
1373 PINGROUP(23, EAST, cci_timer2, blsp1_spi_b, qdss, vsense_mode, _, _, _, _, _),
1374 PINGROUP(24, EAST, cci_timer3, cci_async, blsp1_spi_a, _, qdss, vsense_clkout, _, _, _),
1375 PINGROUP(25, EAST, cci_timer4, cci_async, blsp2_spi, _, qdss, _, _, _, _),
1376 PINGROUP(26, EAST, cci_async, qdss, _, _, _, _, _, _, _),
1377 PINGROUP(27, EAST, blsp1_spi_a, qdss, _, _, _, _, _, _, _),
1378 PINGROUP(28, EAST, blsp1_spi_b, qdss, _, _, _, _, _, _, _),
1379 PINGROUP(29, EAST, blsp2_spi, _, qdss, _, _, _, _, _, _),
1380 PINGROUP(30, EAST, hdmi_rcv, blsp2_spi, qdss, _, _, _, _, _, _),
1381 PINGROUP(31, EAST, hdmi_cec, blsp_spi2, blsp_uart2_a, blsp_uim2_a, pwr_modem, _, _, _, _),
1382 PINGROUP(32, EAST, hdmi_ddc, blsp_spi2, blsp_uart2_a, blsp_i2c2, pwr_nav, _, _, _, _),
1383 PINGROUP(33, EAST, hdmi_ddc, blsp_spi2, blsp_uart2_a, blsp_i2c2, pwr_crypto, _, _, _, _),
1384 PINGROUP(34, EAST, hdmi_hot, edp_hot, blsp_spi2, blsp_uart2_a, blsp_uim2_a, _, _, _, _),
1385 PINGROUP(35, NORTH, pci_e0, jitter_bist, _, _, _, _, _, _, _),
1386 PINGROUP(36, NORTH, pci_e0, agera_pll, _, atest_tsens, _, _, _, _, _),
1387 PINGROUP(37, NORTH, agera_pll, _, _, _, _, _, _, _, _),
1388 PINGROUP(38, WEST, usb_phy, _, _, _, _, _, _, _, _),
1389 PINGROUP(39, WEST, lpass_slimbus, _, _, _, _, _, _, _, _),
1390 PINGROUP(40, EAST, sd_write, tsif0, _, _, _, _, _, _, _),
1391 PINGROUP(41, EAST, blsp_spi6, blsp_uart3_b, blsp_uim3_b, _, qdss, _, _, _, _),
1392 PINGROUP(42, EAST, blsp_spi6, blsp_uart3_b, blsp_uim3_b, _, qdss, _, _, _, _),
1393 PINGROUP(43, EAST, blsp_spi6, blsp_uart3_b, blsp_i2c6, _, qdss, _, _, _, _),
1394 PINGROUP(44, EAST, blsp_spi6, blsp_uart3_b, blsp_i2c6, _, qdss, _, _, _, _),
1395 PINGROUP(45, EAST, blsp_spi3, blsp_uart3_a, blsp_uim3_a, _, _, _, _, _, _),
1396 PINGROUP(46, EAST, blsp_spi3, blsp_uart3_a, blsp_uim3_a, _, _, _, _, _, _),
1397 PINGROUP(47, EAST, blsp_spi3, blsp_uart3_a, blsp_i2c3, _, _, _, _, _, _),
1398 PINGROUP(48, EAST, blsp_spi3, blsp_uart3_a, blsp_i2c3, _, _, _, _, _, _),
1399 PINGROUP(49, NORTH, blsp_spi9, blsp_uart9_a, blsp_uim9_a, blsp10_spi_b, qdss_cti0_a, _, _, _, _),
1400 PINGROUP(50, NORTH, blsp_spi9, blsp_uart9_a, blsp_uim9_a, blsp10_spi_b, qdss_cti0_a, _, _, _, _),
1401 PINGROUP(51, NORTH, blsp_spi9, blsp_uart9_a, blsp_i2c9, blsp10_spi_a, _, _, _, _, _),
1402 PINGROUP(52, NORTH, blsp_spi9, blsp_uart9_a, blsp_i2c9, blsp10_spi_a, _, _, _, _, _),
1403 PINGROUP(53, WEST, blsp_spi7, blsp_uart7_a, blsp_uim7_a, _, _, _, _, _, _),
1404 PINGROUP(54, WEST, blsp_spi7, blsp_uart7_a, blsp_uim7_a, _, _, _, _, _, _),
1405 PINGROUP(55, WEST, blsp_spi7, blsp_uart7_a, blsp_i2c7, _, _, _, _, _, _),
1406 PINGROUP(56, WEST, blsp_spi7, blsp_uart7_a, blsp_i2c7, _, _, _, _, _, _),
1407 PINGROUP(57, WEST, qua_mi2s, blsp10_spi, gcc_gp1_a, _, _, _, _, _, _),
1408 PINGROUP(58, WEST, qua_mi2s, blsp_spi11, blsp_uart8_b, blsp_uim8_b, gcc_gp2_a, _, qdss_cti1_a, _, _),
1409 PINGROUP(59, WEST, qua_mi2s, blsp_spi11, blsp_uart8_b, blsp_uim8_b, gcc_gp3_a, _, qdss_cti1_a, _, _),
1410 PINGROUP(60, WEST, qua_mi2s, blsp_spi11, blsp_uart8_b, blsp_i2c11, cri_trng0, _, _, _, _),
1411 PINGROUP(61, WEST, qua_mi2s, blsp_spi11, blsp_uart8_b, blsp_i2c11, cri_trng1, _, _, _, _),
1412 PINGROUP(62, WEST, qua_mi2s, cri_trng, _, _, _, _, _, _, _),
1413 PINGROUP(63, WEST, qua_mi2s, _, _, _, _, _, _, _, _),
1414 PINGROUP(64, WEST, pri_mi2s, sp_cmu, _, _, _, _, _, _, _),
1415 PINGROUP(65, WEST, pri_mi2s, blsp_spi10, blsp_uart7_b, blsp_uim7_b, _, _, _, _, _),
1416 PINGROUP(66, WEST, pri_mi2s_ws, blsp_spi10, blsp_uart7_b, blsp_uim7_b, _, _, _, _, _),
1417 PINGROUP(67, WEST, pri_mi2s, blsp_spi10, blsp_uart7_b, blsp_i2c10, _, _, _, _, _),
1418 PINGROUP(68, WEST, pri_mi2s, blsp_spi10, blsp_uart7_b, blsp_i2c10, _, _, _, _, _),
1419 PINGROUP(69, WEST, spkr_i2s, audio_ref, _, _, _, _, _, _, _),
1420 PINGROUP(70, WEST, lpass_slimbus, spkr_i2s, blsp9_spi, _, _, _, _, _, _),
1421 PINGROUP(71, WEST, lpass_slimbus, spkr_i2s, blsp9_spi, tsense_pwm1, tsense_pwm2, _, _, _, _),
1422 PINGROUP(72, WEST, lpass_slimbus, spkr_i2s, blsp9_spi, _, _, _, _, _, _),
1423 PINGROUP(73, WEST, btfm_slimbus, phase_flag, _, _, _, _, _, _, _),
1424 PINGROUP(74, WEST, btfm_slimbus, ter_mi2s, phase_flag, _, _, _, _, _, _),
1425 PINGROUP(75, WEST, ter_mi2s, phase_flag, qdss, _, _, _, _, _, _),
1426 PINGROUP(76, WEST, ter_mi2s, phase_flag, qdss, _, _, _, _, _, _),
1427 PINGROUP(77, WEST, ter_mi2s, phase_flag, qdss, _, _, _, _, _, _),
1428 PINGROUP(78, WEST, ter_mi2s, gcc_gp1_b, _, _, _, _, _, _, _),
1429 PINGROUP(79, WEST, sec_mi2s, _, qdss, _, _, _, _, _, _),
1430 PINGROUP(80, WEST, sec_mi2s, _, qdss, _, _, _, _, _, _),
1431 PINGROUP(81, WEST, sec_mi2s, blsp_spi12, blsp_uart9_b, blsp_uim9_b, gcc_gp2_b, _, _, _, _),
1432 PINGROUP(82, WEST, sec_mi2s, blsp_spi12, blsp_uart9_b, blsp_uim9_b, gcc_gp3_b, _, _, _, _),
1433 PINGROUP(83, WEST, sec_mi2s, blsp_spi12, blsp_uart9_b, blsp_i2c12, _, _, _, _, _),
1434 PINGROUP(84, WEST, blsp_spi12, blsp_uart9_b, blsp_i2c12, _, _, _, _, _, _),
1435 PINGROUP(85, EAST, blsp_spi5, blsp_uart2_b, blsp_uim2_b, _, _, _, _, _, _),
1436 PINGROUP(86, EAST, blsp_spi5, blsp_uart2_b, blsp_uim2_b, _, _, _, _, _, _),
1437 PINGROUP(87, EAST, blsp_spi5, blsp_uart2_b, blsp_i2c5, _, _, _, _, _, _),
1438 PINGROUP(88, EAST, blsp_spi5, blsp_uart2_b, blsp_i2c5, _, _, _, _, _, _),
1439 PINGROUP(89, EAST, tsif0, phase_flag, _, _, _, _, _, _, _),
1440 PINGROUP(90, EAST, tsif0, mdp_vsync0, mdp_vsync1, mdp_vsync2, mdp_vsync3, blsp1_spi, tgu_ch0, qdss_cti1_b, _),
1441 PINGROUP(91, EAST, tsif0, sdc4_cmd, tgu_ch1, phase_flag, qdss_cti1_b, _, _, _, _),
1442 PINGROUP(92, EAST, tsif1, sdc43, vfr_1, phase_flag, _, _, _, _, _),
1443 PINGROUP(93, EAST, tsif1, sdc4_clk, _, qdss, _, _, _, _, _),
1444 PINGROUP(94, EAST, tsif1, sdc42, _, _, _, _, _, _, _),
1445 PINGROUP(95, EAST, tsif1, sdc41, _, _, _, _, _, _, _),
1446 PINGROUP(96, EAST, tsif1, sdc40, phase_flag, _, _, _, _, _, _),
1447 PINGROUP(97, WEST, _, mdp_vsync_b, ldo_en, _, _, _, _, _, _),
1448 PINGROUP(98, WEST, _, mdp_vsync_b, ldo_update, _, _, _, _, _, _),
1449 PINGROUP(99, WEST, _, _, _, _, _, _, _, _, _),
1450 PINGROUP(100, WEST, _, _, blsp_uart8, _, _, _, _, _, _),
1451 PINGROUP(101, WEST, _, blsp_uart8, _, _, _, _, _, _, _),
1452 PINGROUP(102, WEST, _, blsp11_i2c, prng_rosc, _, _, _, _, _, _),
1453 PINGROUP(103, WEST, _, blsp11_i2c, phase_flag, _, _, _, _, _, _),
1454 PINGROUP(104, WEST, _, _, _, _, _, _, _, _, _),
1455 PINGROUP(105, NORTH, uim2_data, _, _, _, _, _, _, _, _),
1456 PINGROUP(106, NORTH, uim2_clk, _, _, _, _, _, _, _, _),
1457 PINGROUP(107, NORTH, uim2_reset, _, _, _, _, _, _, _, _),
1458 PINGROUP(108, NORTH, uim2_present, _, _, _, _, _, _, _, _),
1459 PINGROUP(109, NORTH, uim1_data, _, _, _, _, _, _, _, _),
1460 PINGROUP(110, NORTH, uim1_clk, _, _, _, _, _, _, _, _),
1461 PINGROUP(111, NORTH, uim1_reset, _, _, _, _, _, _, _, _),
1462 PINGROUP(112, NORTH, uim1_present, _, _, _, _, _, _, _, _),
1463 PINGROUP(113, NORTH, uim_batt, _, _, _, _, _, _, _, _),
1464 PINGROUP(114, WEST, _, _, phase_flag, _, _, _, _, _, _),
1465 PINGROUP(115, WEST, _, nav_dr, phase_flag, _, _, _, _, _, _),
1466 PINGROUP(116, WEST, phase_flag, _, _, _, _, _, _, _, _),
1467 PINGROUP(117, EAST, phase_flag, qdss, atest_char, _, _, _, _, _, _),
1468 PINGROUP(118, EAST, adsp_ext, phase_flag, qdss, atest_char, _, _, _, _, _),
1469 PINGROUP(119, EAST, phase_flag, qdss, atest_char, _, _, _, _, _, _),
1470 PINGROUP(120, EAST, phase_flag, qdss, atest_char, _, _, _, _, _, _),
1471 PINGROUP(121, EAST, phase_flag, qdss, atest_char, _, _, _, _, _, _),
1472 PINGROUP(122, EAST, phase_flag, qdss, _, _, _, _, _, _, _),
1473 PINGROUP(123, EAST, phase_flag, qdss, _, _, _, _, _, _, _),
1474 PINGROUP(124, EAST, phase_flag, qdss, _, _, _, _, _, _, _),
1475 PINGROUP(125, EAST, phase_flag, _, _, _, _, _, _, _, _),
1476 PINGROUP(126, EAST, phase_flag, _, _, _, _, _, _, _, _),
1477 PINGROUP(127, WEST, _, _, _, _, _, _, _, _, _),
1478 PINGROUP(128, WEST, modem_tsync, nav_pps, phase_flag, _, _, _, _, _, _),
1479 PINGROUP(129, WEST, phase_flag, _, _, _, _, _, _, _, _),
1480 PINGROUP(130, NORTH, qlink_request, phase_flag, _, _, _, _, _, _, _),
1481 PINGROUP(131, NORTH, qlink_enable, phase_flag, _, _, _, _, _, _, _),
1482 PINGROUP(132, WEST, _, phase_flag, _, _, _, _, _, _, _),
1483 PINGROUP(133, WEST, phase_flag, _, _, _, _, _, _, _, _),
1484 PINGROUP(134, WEST, phase_flag, _, _, _, _, _, _, _, _),
1485 PINGROUP(135, WEST, _, pa_indicator, _, _, _, _, _, _, _),
1486 PINGROUP(136, WEST, _, _, _, _, _, _, _, _, _),
1487 PINGROUP(137, WEST, _, _, _, _, _, _, _, _, _),
1488 PINGROUP(138, WEST, _, _, _, _, _, _, _, _, _),
1489 PINGROUP(139, WEST, _, _, _, _, _, _, _, _, _),
1490 PINGROUP(140, WEST, _, _, _, _, _, _, _, _, _),
1491 PINGROUP(141, WEST, _, _, _, _, _, _, _, _, _),
1492 PINGROUP(142, WEST, _, ssbi1, _, _, _, _, _, _, _),
1493 PINGROUP(143, WEST, isense_dbg, _, _, _, _, _, _, _, _),
1494 PINGROUP(144, WEST, mss_lte, _, _, _, _, _, _, _, _),
1495 PINGROUP(145, WEST, mss_lte, _, _, _, _, _, _, _, _),
1496 PINGROUP(146, WEST, _, _, _, _, _, _, _, _, _),
1497 PINGROUP(147, WEST, _, _, _, _, _, _, _, _, _),
1498 PINGROUP(148, WEST, _, _, _, _, _, _, _, _, _),
1499 PINGROUP(149, WEST, _, _, _, _, _, _, _, _, _),
1500 SDC_QDSD_PINGROUP(sdc2_clk, 0x999000, 14, 6),
1501 SDC_QDSD_PINGROUP(sdc2_cmd, 0x999000, 11, 3),
1502 SDC_QDSD_PINGROUP(sdc2_data, 0x999000, 9, 0),
1503 UFS_RESET(ufs_reset, 0x19d000),
1504 };
1505
1506 static const struct msm_pinctrl_soc_data msm8998_pinctrl = {
1507 .pins = msm8998_pins,
1508 .npins = ARRAY_SIZE(msm8998_pins),
1509 .functions = msm8998_functions,
1510 .nfunctions = ARRAY_SIZE(msm8998_functions),
1511 .groups = msm8998_groups,
1512 .ngroups = ARRAY_SIZE(msm8998_groups),
1513 .ngpios = 150,
1514 };
1515
1516 static int msm8998_pinctrl_probe(struct platform_device *pdev)
1517 {
1518 return msm_pinctrl_probe(pdev, &msm8998_pinctrl);
1519 }
1520
1521 static const struct of_device_id msm8998_pinctrl_of_match[] = {
1522 { .compatible = "qcom,msm8998-pinctrl", },
1523 { },
1524 };
1525
1526 static struct platform_driver msm8998_pinctrl_driver = {
1527 .driver = {
1528 .name = "msm8998-pinctrl",
1529 .of_match_table = msm8998_pinctrl_of_match,
1530 },
1531 .probe = msm8998_pinctrl_probe,
1532 .remove = msm_pinctrl_remove,
1533 };
1534
1535 static int __init msm8998_pinctrl_init(void)
1536 {
1537 return platform_driver_register(&msm8998_pinctrl_driver);
1538 }
1539 arch_initcall(msm8998_pinctrl_init);
1540
1541 static void __exit msm8998_pinctrl_exit(void)
1542 {
1543 platform_driver_unregister(&msm8998_pinctrl_driver);
1544 }
1545 module_exit(msm8998_pinctrl_exit);
1546
1547 MODULE_DESCRIPTION("QTI msm8998 pinctrl driver");
1548 MODULE_LICENSE("GPL v2");
1549 MODULE_DEVICE_TABLE(of, msm8998_pinctrl_of_match);
