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0006 #include <linux/module.h>
0007 #include <linux/of.h>
0008 #include <linux/platform_device.h>
0009 #include <linux/pinctrl/pinctrl.h>
0010
0011 #include "pinctrl-msm.h"
0012
0013 #define FUNCTION(fname) \
0014 [MSM_MUX_##fname] = { \
0015 .name = #fname, \
0016 .groups = fname##_groups, \
0017 .ngroups = ARRAY_SIZE(fname##_groups), \
0018 }
0019
0020 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \
0021 { \
0022 .name = "gpio" #id, \
0023 .pins = gpio##id##_pins, \
0024 .npins = ARRAY_SIZE(gpio##id##_pins), \
0025 .funcs = (int[]){ \
0026 MSM_MUX_gpio, \
0027 MSM_MUX_##f1, \
0028 MSM_MUX_##f2, \
0029 MSM_MUX_##f3, \
0030 MSM_MUX_##f4, \
0031 MSM_MUX_##f5, \
0032 MSM_MUX_##f6, \
0033 MSM_MUX_##f7, \
0034 MSM_MUX_##f8, \
0035 MSM_MUX_##f9, \
0036 MSM_MUX_##f10, \
0037 MSM_MUX_##f11 \
0038 }, \
0039 .nfuncs = 12, \
0040 .ctl_reg = 0x1000 + 0x10 * id, \
0041 .io_reg = 0x1004 + 0x10 * id, \
0042 .intr_cfg_reg = 0x1008 + 0x10 * id, \
0043 .intr_status_reg = 0x100c + 0x10 * id, \
0044 .intr_target_reg = 0x1008 + 0x10 * id, \
0045 .mux_bit = 2, \
0046 .pull_bit = 0, \
0047 .drv_bit = 6, \
0048 .oe_bit = 9, \
0049 .in_bit = 0, \
0050 .out_bit = 1, \
0051 .intr_enable_bit = 0, \
0052 .intr_status_bit = 0, \
0053 .intr_target_bit = 5, \
0054 .intr_target_kpss_val = 4, \
0055 .intr_raw_status_bit = 4, \
0056 .intr_polarity_bit = 1, \
0057 .intr_detection_bit = 2, \
0058 .intr_detection_width = 2, \
0059 }
0060
0061 #define SDC_PINGROUP(pg_name, ctl, pull, drv) \
0062 { \
0063 .name = #pg_name, \
0064 .pins = pg_name##_pins, \
0065 .npins = ARRAY_SIZE(pg_name##_pins), \
0066 .ctl_reg = ctl, \
0067 .io_reg = 0, \
0068 .intr_cfg_reg = 0, \
0069 .intr_status_reg = 0, \
0070 .intr_target_reg = 0, \
0071 .mux_bit = -1, \
0072 .pull_bit = pull, \
0073 .drv_bit = drv, \
0074 .oe_bit = -1, \
0075 .in_bit = -1, \
0076 .out_bit = -1, \
0077 .intr_enable_bit = -1, \
0078 .intr_status_bit = -1, \
0079 .intr_target_bit = -1, \
0080 .intr_target_kpss_val = -1, \
0081 .intr_raw_status_bit = -1, \
0082 .intr_polarity_bit = -1, \
0083 .intr_detection_bit = -1, \
0084 .intr_detection_width = -1, \
0085 }
0086 static const struct pinctrl_pin_desc msm8994_pins[] = {
0087 PINCTRL_PIN(0, "GPIO_0"),
0088 PINCTRL_PIN(1, "GPIO_1"),
0089 PINCTRL_PIN(2, "GPIO_2"),
0090 PINCTRL_PIN(3, "GPIO_3"),
0091 PINCTRL_PIN(4, "GPIO_4"),
0092 PINCTRL_PIN(5, "GPIO_5"),
0093 PINCTRL_PIN(6, "GPIO_6"),
0094 PINCTRL_PIN(7, "GPIO_7"),
0095 PINCTRL_PIN(8, "GPIO_8"),
0096 PINCTRL_PIN(9, "GPIO_9"),
0097 PINCTRL_PIN(10, "GPIO_10"),
0098 PINCTRL_PIN(11, "GPIO_11"),
0099 PINCTRL_PIN(12, "GPIO_12"),
0100 PINCTRL_PIN(13, "GPIO_13"),
0101 PINCTRL_PIN(14, "GPIO_14"),
0102 PINCTRL_PIN(15, "GPIO_15"),
0103 PINCTRL_PIN(16, "GPIO_16"),
0104 PINCTRL_PIN(17, "GPIO_17"),
0105 PINCTRL_PIN(18, "GPIO_18"),
0106 PINCTRL_PIN(19, "GPIO_19"),
0107 PINCTRL_PIN(20, "GPIO_20"),
0108 PINCTRL_PIN(21, "GPIO_21"),
0109 PINCTRL_PIN(22, "GPIO_22"),
0110 PINCTRL_PIN(23, "GPIO_23"),
0111 PINCTRL_PIN(24, "GPIO_24"),
0112 PINCTRL_PIN(25, "GPIO_25"),
0113 PINCTRL_PIN(26, "GPIO_26"),
0114 PINCTRL_PIN(27, "GPIO_27"),
0115 PINCTRL_PIN(28, "GPIO_28"),
0116 PINCTRL_PIN(29, "GPIO_29"),
0117 PINCTRL_PIN(30, "GPIO_30"),
0118 PINCTRL_PIN(31, "GPIO_31"),
0119 PINCTRL_PIN(32, "GPIO_32"),
0120 PINCTRL_PIN(33, "GPIO_33"),
0121 PINCTRL_PIN(34, "GPIO_34"),
0122 PINCTRL_PIN(35, "GPIO_35"),
0123 PINCTRL_PIN(36, "GPIO_36"),
0124 PINCTRL_PIN(37, "GPIO_37"),
0125 PINCTRL_PIN(38, "GPIO_38"),
0126 PINCTRL_PIN(39, "GPIO_39"),
0127 PINCTRL_PIN(40, "GPIO_40"),
0128 PINCTRL_PIN(41, "GPIO_41"),
0129 PINCTRL_PIN(42, "GPIO_42"),
0130 PINCTRL_PIN(43, "GPIO_43"),
0131 PINCTRL_PIN(44, "GPIO_44"),
0132 PINCTRL_PIN(45, "GPIO_45"),
0133 PINCTRL_PIN(46, "GPIO_46"),
0134 PINCTRL_PIN(47, "GPIO_47"),
0135 PINCTRL_PIN(48, "GPIO_48"),
0136 PINCTRL_PIN(49, "GPIO_49"),
0137 PINCTRL_PIN(50, "GPIO_50"),
0138 PINCTRL_PIN(51, "GPIO_51"),
0139 PINCTRL_PIN(52, "GPIO_52"),
0140 PINCTRL_PIN(53, "GPIO_53"),
0141 PINCTRL_PIN(54, "GPIO_54"),
0142 PINCTRL_PIN(55, "GPIO_55"),
0143 PINCTRL_PIN(56, "GPIO_56"),
0144 PINCTRL_PIN(57, "GPIO_57"),
0145 PINCTRL_PIN(58, "GPIO_58"),
0146 PINCTRL_PIN(59, "GPIO_59"),
0147 PINCTRL_PIN(60, "GPIO_60"),
0148 PINCTRL_PIN(61, "GPIO_61"),
0149 PINCTRL_PIN(62, "GPIO_62"),
0150 PINCTRL_PIN(63, "GPIO_63"),
0151 PINCTRL_PIN(64, "GPIO_64"),
0152 PINCTRL_PIN(65, "GPIO_65"),
0153 PINCTRL_PIN(66, "GPIO_66"),
0154 PINCTRL_PIN(67, "GPIO_67"),
0155 PINCTRL_PIN(68, "GPIO_68"),
0156 PINCTRL_PIN(69, "GPIO_69"),
0157 PINCTRL_PIN(70, "GPIO_70"),
0158 PINCTRL_PIN(71, "GPIO_71"),
0159 PINCTRL_PIN(72, "GPIO_72"),
0160 PINCTRL_PIN(73, "GPIO_73"),
0161 PINCTRL_PIN(74, "GPIO_74"),
0162 PINCTRL_PIN(75, "GPIO_75"),
0163 PINCTRL_PIN(76, "GPIO_76"),
0164 PINCTRL_PIN(77, "GPIO_77"),
0165 PINCTRL_PIN(78, "GPIO_78"),
0166 PINCTRL_PIN(79, "GPIO_79"),
0167 PINCTRL_PIN(80, "GPIO_80"),
0168 PINCTRL_PIN(81, "GPIO_81"),
0169 PINCTRL_PIN(82, "GPIO_82"),
0170 PINCTRL_PIN(83, "GPIO_83"),
0171 PINCTRL_PIN(84, "GPIO_84"),
0172 PINCTRL_PIN(85, "GPIO_85"),
0173 PINCTRL_PIN(86, "GPIO_86"),
0174 PINCTRL_PIN(87, "GPIO_87"),
0175 PINCTRL_PIN(88, "GPIO_88"),
0176 PINCTRL_PIN(89, "GPIO_89"),
0177 PINCTRL_PIN(90, "GPIO_90"),
0178 PINCTRL_PIN(91, "GPIO_91"),
0179 PINCTRL_PIN(92, "GPIO_92"),
0180 PINCTRL_PIN(93, "GPIO_93"),
0181 PINCTRL_PIN(94, "GPIO_94"),
0182 PINCTRL_PIN(95, "GPIO_95"),
0183 PINCTRL_PIN(96, "GPIO_96"),
0184 PINCTRL_PIN(97, "GPIO_97"),
0185 PINCTRL_PIN(98, "GPIO_98"),
0186 PINCTRL_PIN(99, "GPIO_99"),
0187 PINCTRL_PIN(100, "GPIO_100"),
0188 PINCTRL_PIN(101, "GPIO_101"),
0189 PINCTRL_PIN(102, "GPIO_102"),
0190 PINCTRL_PIN(103, "GPIO_103"),
0191 PINCTRL_PIN(104, "GPIO_104"),
0192 PINCTRL_PIN(105, "GPIO_105"),
0193 PINCTRL_PIN(106, "GPIO_106"),
0194 PINCTRL_PIN(107, "GPIO_107"),
0195 PINCTRL_PIN(108, "GPIO_108"),
0196 PINCTRL_PIN(109, "GPIO_109"),
0197 PINCTRL_PIN(110, "GPIO_110"),
0198 PINCTRL_PIN(111, "GPIO_111"),
0199 PINCTRL_PIN(112, "GPIO_112"),
0200 PINCTRL_PIN(113, "GPIO_113"),
0201 PINCTRL_PIN(114, "GPIO_114"),
0202 PINCTRL_PIN(115, "GPIO_115"),
0203 PINCTRL_PIN(116, "GPIO_116"),
0204 PINCTRL_PIN(117, "GPIO_117"),
0205 PINCTRL_PIN(118, "GPIO_118"),
0206 PINCTRL_PIN(119, "GPIO_119"),
0207 PINCTRL_PIN(120, "GPIO_120"),
0208 PINCTRL_PIN(121, "GPIO_121"),
0209 PINCTRL_PIN(122, "GPIO_122"),
0210 PINCTRL_PIN(123, "GPIO_123"),
0211 PINCTRL_PIN(124, "GPIO_124"),
0212 PINCTRL_PIN(125, "GPIO_125"),
0213 PINCTRL_PIN(126, "GPIO_126"),
0214 PINCTRL_PIN(127, "GPIO_127"),
0215 PINCTRL_PIN(128, "GPIO_128"),
0216 PINCTRL_PIN(129, "GPIO_129"),
0217 PINCTRL_PIN(130, "GPIO_130"),
0218 PINCTRL_PIN(131, "GPIO_131"),
0219 PINCTRL_PIN(132, "GPIO_132"),
0220 PINCTRL_PIN(133, "GPIO_133"),
0221 PINCTRL_PIN(134, "GPIO_134"),
0222 PINCTRL_PIN(135, "GPIO_135"),
0223 PINCTRL_PIN(136, "GPIO_136"),
0224 PINCTRL_PIN(137, "GPIO_137"),
0225 PINCTRL_PIN(138, "GPIO_138"),
0226 PINCTRL_PIN(139, "GPIO_139"),
0227 PINCTRL_PIN(140, "GPIO_140"),
0228 PINCTRL_PIN(141, "GPIO_141"),
0229 PINCTRL_PIN(142, "GPIO_142"),
0230 PINCTRL_PIN(143, "GPIO_143"),
0231 PINCTRL_PIN(144, "GPIO_144"),
0232 PINCTRL_PIN(145, "GPIO_145"),
0233 PINCTRL_PIN(146, "SDC1_RCLK"),
0234 PINCTRL_PIN(147, "SDC1_CLK"),
0235 PINCTRL_PIN(148, "SDC1_CMD"),
0236 PINCTRL_PIN(149, "SDC1_DATA"),
0237 PINCTRL_PIN(150, "SDC2_CLK"),
0238 PINCTRL_PIN(151, "SDC2_CMD"),
0239 PINCTRL_PIN(152, "SDC2_DATA"),
0240 PINCTRL_PIN(153, "SDC3_CLK"),
0241 PINCTRL_PIN(154, "SDC3_CMD"),
0242 PINCTRL_PIN(155, "SDC3_DATA"),
0243 };
0244
0245 #define DECLARE_MSM_GPIO_PINS(pin) \
0246 static const unsigned int gpio##pin##_pins[] = { pin }
0247 DECLARE_MSM_GPIO_PINS(0);
0248 DECLARE_MSM_GPIO_PINS(1);
0249 DECLARE_MSM_GPIO_PINS(2);
0250 DECLARE_MSM_GPIO_PINS(3);
0251 DECLARE_MSM_GPIO_PINS(4);
0252 DECLARE_MSM_GPIO_PINS(5);
0253 DECLARE_MSM_GPIO_PINS(6);
0254 DECLARE_MSM_GPIO_PINS(7);
0255 DECLARE_MSM_GPIO_PINS(8);
0256 DECLARE_MSM_GPIO_PINS(9);
0257 DECLARE_MSM_GPIO_PINS(10);
0258 DECLARE_MSM_GPIO_PINS(11);
0259 DECLARE_MSM_GPIO_PINS(12);
0260 DECLARE_MSM_GPIO_PINS(13);
0261 DECLARE_MSM_GPIO_PINS(14);
0262 DECLARE_MSM_GPIO_PINS(15);
0263 DECLARE_MSM_GPIO_PINS(16);
0264 DECLARE_MSM_GPIO_PINS(17);
0265 DECLARE_MSM_GPIO_PINS(18);
0266 DECLARE_MSM_GPIO_PINS(19);
0267 DECLARE_MSM_GPIO_PINS(20);
0268 DECLARE_MSM_GPIO_PINS(21);
0269 DECLARE_MSM_GPIO_PINS(22);
0270 DECLARE_MSM_GPIO_PINS(23);
0271 DECLARE_MSM_GPIO_PINS(24);
0272 DECLARE_MSM_GPIO_PINS(25);
0273 DECLARE_MSM_GPIO_PINS(26);
0274 DECLARE_MSM_GPIO_PINS(27);
0275 DECLARE_MSM_GPIO_PINS(28);
0276 DECLARE_MSM_GPIO_PINS(29);
0277 DECLARE_MSM_GPIO_PINS(30);
0278 DECLARE_MSM_GPIO_PINS(31);
0279 DECLARE_MSM_GPIO_PINS(32);
0280 DECLARE_MSM_GPIO_PINS(33);
0281 DECLARE_MSM_GPIO_PINS(34);
0282 DECLARE_MSM_GPIO_PINS(35);
0283 DECLARE_MSM_GPIO_PINS(36);
0284 DECLARE_MSM_GPIO_PINS(37);
0285 DECLARE_MSM_GPIO_PINS(38);
0286 DECLARE_MSM_GPIO_PINS(39);
0287 DECLARE_MSM_GPIO_PINS(40);
0288 DECLARE_MSM_GPIO_PINS(41);
0289 DECLARE_MSM_GPIO_PINS(42);
0290 DECLARE_MSM_GPIO_PINS(43);
0291 DECLARE_MSM_GPIO_PINS(44);
0292 DECLARE_MSM_GPIO_PINS(45);
0293 DECLARE_MSM_GPIO_PINS(46);
0294 DECLARE_MSM_GPIO_PINS(47);
0295 DECLARE_MSM_GPIO_PINS(48);
0296 DECLARE_MSM_GPIO_PINS(49);
0297 DECLARE_MSM_GPIO_PINS(50);
0298 DECLARE_MSM_GPIO_PINS(51);
0299 DECLARE_MSM_GPIO_PINS(52);
0300 DECLARE_MSM_GPIO_PINS(53);
0301 DECLARE_MSM_GPIO_PINS(54);
0302 DECLARE_MSM_GPIO_PINS(55);
0303 DECLARE_MSM_GPIO_PINS(56);
0304 DECLARE_MSM_GPIO_PINS(57);
0305 DECLARE_MSM_GPIO_PINS(58);
0306 DECLARE_MSM_GPIO_PINS(59);
0307 DECLARE_MSM_GPIO_PINS(60);
0308 DECLARE_MSM_GPIO_PINS(61);
0309 DECLARE_MSM_GPIO_PINS(62);
0310 DECLARE_MSM_GPIO_PINS(63);
0311 DECLARE_MSM_GPIO_PINS(64);
0312 DECLARE_MSM_GPIO_PINS(65);
0313 DECLARE_MSM_GPIO_PINS(66);
0314 DECLARE_MSM_GPIO_PINS(67);
0315 DECLARE_MSM_GPIO_PINS(68);
0316 DECLARE_MSM_GPIO_PINS(69);
0317 DECLARE_MSM_GPIO_PINS(70);
0318 DECLARE_MSM_GPIO_PINS(71);
0319 DECLARE_MSM_GPIO_PINS(72);
0320 DECLARE_MSM_GPIO_PINS(73);
0321 DECLARE_MSM_GPIO_PINS(74);
0322 DECLARE_MSM_GPIO_PINS(75);
0323 DECLARE_MSM_GPIO_PINS(76);
0324 DECLARE_MSM_GPIO_PINS(77);
0325 DECLARE_MSM_GPIO_PINS(78);
0326 DECLARE_MSM_GPIO_PINS(79);
0327 DECLARE_MSM_GPIO_PINS(80);
0328 DECLARE_MSM_GPIO_PINS(81);
0329 DECLARE_MSM_GPIO_PINS(82);
0330 DECLARE_MSM_GPIO_PINS(83);
0331 DECLARE_MSM_GPIO_PINS(84);
0332 DECLARE_MSM_GPIO_PINS(85);
0333 DECLARE_MSM_GPIO_PINS(86);
0334 DECLARE_MSM_GPIO_PINS(87);
0335 DECLARE_MSM_GPIO_PINS(88);
0336 DECLARE_MSM_GPIO_PINS(89);
0337 DECLARE_MSM_GPIO_PINS(90);
0338 DECLARE_MSM_GPIO_PINS(91);
0339 DECLARE_MSM_GPIO_PINS(92);
0340 DECLARE_MSM_GPIO_PINS(93);
0341 DECLARE_MSM_GPIO_PINS(94);
0342 DECLARE_MSM_GPIO_PINS(95);
0343 DECLARE_MSM_GPIO_PINS(96);
0344 DECLARE_MSM_GPIO_PINS(97);
0345 DECLARE_MSM_GPIO_PINS(98);
0346 DECLARE_MSM_GPIO_PINS(99);
0347 DECLARE_MSM_GPIO_PINS(100);
0348 DECLARE_MSM_GPIO_PINS(101);
0349 DECLARE_MSM_GPIO_PINS(102);
0350 DECLARE_MSM_GPIO_PINS(103);
0351 DECLARE_MSM_GPIO_PINS(104);
0352 DECLARE_MSM_GPIO_PINS(105);
0353 DECLARE_MSM_GPIO_PINS(106);
0354 DECLARE_MSM_GPIO_PINS(107);
0355 DECLARE_MSM_GPIO_PINS(108);
0356 DECLARE_MSM_GPIO_PINS(109);
0357 DECLARE_MSM_GPIO_PINS(110);
0358 DECLARE_MSM_GPIO_PINS(111);
0359 DECLARE_MSM_GPIO_PINS(112);
0360 DECLARE_MSM_GPIO_PINS(113);
0361 DECLARE_MSM_GPIO_PINS(114);
0362 DECLARE_MSM_GPIO_PINS(115);
0363 DECLARE_MSM_GPIO_PINS(116);
0364 DECLARE_MSM_GPIO_PINS(117);
0365 DECLARE_MSM_GPIO_PINS(118);
0366 DECLARE_MSM_GPIO_PINS(119);
0367 DECLARE_MSM_GPIO_PINS(120);
0368 DECLARE_MSM_GPIO_PINS(121);
0369 DECLARE_MSM_GPIO_PINS(122);
0370 DECLARE_MSM_GPIO_PINS(123);
0371 DECLARE_MSM_GPIO_PINS(124);
0372 DECLARE_MSM_GPIO_PINS(125);
0373 DECLARE_MSM_GPIO_PINS(126);
0374 DECLARE_MSM_GPIO_PINS(127);
0375 DECLARE_MSM_GPIO_PINS(128);
0376 DECLARE_MSM_GPIO_PINS(129);
0377 DECLARE_MSM_GPIO_PINS(130);
0378 DECLARE_MSM_GPIO_PINS(131);
0379 DECLARE_MSM_GPIO_PINS(132);
0380 DECLARE_MSM_GPIO_PINS(133);
0381 DECLARE_MSM_GPIO_PINS(134);
0382 DECLARE_MSM_GPIO_PINS(135);
0383 DECLARE_MSM_GPIO_PINS(136);
0384 DECLARE_MSM_GPIO_PINS(137);
0385 DECLARE_MSM_GPIO_PINS(138);
0386 DECLARE_MSM_GPIO_PINS(139);
0387 DECLARE_MSM_GPIO_PINS(140);
0388 DECLARE_MSM_GPIO_PINS(141);
0389 DECLARE_MSM_GPIO_PINS(142);
0390 DECLARE_MSM_GPIO_PINS(143);
0391 DECLARE_MSM_GPIO_PINS(144);
0392 DECLARE_MSM_GPIO_PINS(145);
0393
0394 static const unsigned int sdc1_rclk_pins[] = { 146 };
0395 static const unsigned int sdc1_clk_pins[] = { 147 };
0396 static const unsigned int sdc1_cmd_pins[] = { 148 };
0397 static const unsigned int sdc1_data_pins[] = { 149 };
0398 static const unsigned int sdc2_clk_pins[] = { 150 };
0399 static const unsigned int sdc2_cmd_pins[] = { 151 };
0400 static const unsigned int sdc2_data_pins[] = { 152 };
0401 static const unsigned int sdc3_clk_pins[] = { 153 };
0402 static const unsigned int sdc3_cmd_pins[] = { 154 };
0403 static const unsigned int sdc3_data_pins[] = { 155 };
0404
0405 enum msm8994_functions {
0406 MSM_MUX_audio_ref_clk,
0407 MSM_MUX_blsp_i2c1,
0408 MSM_MUX_blsp_i2c2,
0409 MSM_MUX_blsp_i2c3,
0410 MSM_MUX_blsp_i2c4,
0411 MSM_MUX_blsp_i2c5,
0412 MSM_MUX_blsp_i2c6,
0413 MSM_MUX_blsp_i2c7,
0414 MSM_MUX_blsp_i2c8,
0415 MSM_MUX_blsp_i2c9,
0416 MSM_MUX_blsp_i2c10,
0417 MSM_MUX_blsp_i2c11,
0418 MSM_MUX_blsp_i2c12,
0419 MSM_MUX_blsp_spi1,
0420 MSM_MUX_blsp_spi1_cs1,
0421 MSM_MUX_blsp_spi1_cs2,
0422 MSM_MUX_blsp_spi1_cs3,
0423 MSM_MUX_blsp_spi2,
0424 MSM_MUX_blsp_spi2_cs1,
0425 MSM_MUX_blsp_spi2_cs2,
0426 MSM_MUX_blsp_spi2_cs3,
0427 MSM_MUX_blsp_spi3,
0428 MSM_MUX_blsp_spi4,
0429 MSM_MUX_blsp_spi5,
0430 MSM_MUX_blsp_spi6,
0431 MSM_MUX_blsp_spi7,
0432 MSM_MUX_blsp_spi8,
0433 MSM_MUX_blsp_spi9,
0434 MSM_MUX_blsp_spi10,
0435 MSM_MUX_blsp_spi10_cs1,
0436 MSM_MUX_blsp_spi10_cs2,
0437 MSM_MUX_blsp_spi10_cs3,
0438 MSM_MUX_blsp_spi11,
0439 MSM_MUX_blsp_spi12,
0440 MSM_MUX_blsp_uart1,
0441 MSM_MUX_blsp_uart2,
0442 MSM_MUX_blsp_uart3,
0443 MSM_MUX_blsp_uart4,
0444 MSM_MUX_blsp_uart5,
0445 MSM_MUX_blsp_uart6,
0446 MSM_MUX_blsp_uart7,
0447 MSM_MUX_blsp_uart8,
0448 MSM_MUX_blsp_uart9,
0449 MSM_MUX_blsp_uart10,
0450 MSM_MUX_blsp_uart11,
0451 MSM_MUX_blsp_uart12,
0452 MSM_MUX_blsp_uim1,
0453 MSM_MUX_blsp_uim2,
0454 MSM_MUX_blsp_uim3,
0455 MSM_MUX_blsp_uim4,
0456 MSM_MUX_blsp_uim5,
0457 MSM_MUX_blsp_uim6,
0458 MSM_MUX_blsp_uim7,
0459 MSM_MUX_blsp_uim8,
0460 MSM_MUX_blsp_uim9,
0461 MSM_MUX_blsp_uim10,
0462 MSM_MUX_blsp_uim11,
0463 MSM_MUX_blsp_uim12,
0464 MSM_MUX_blsp11_i2c_scl_b,
0465 MSM_MUX_blsp11_i2c_sda_b,
0466 MSM_MUX_blsp11_uart_rx_b,
0467 MSM_MUX_blsp11_uart_tx_b,
0468 MSM_MUX_cam_mclk0,
0469 MSM_MUX_cam_mclk1,
0470 MSM_MUX_cam_mclk2,
0471 MSM_MUX_cam_mclk3,
0472 MSM_MUX_cci_async_in0,
0473 MSM_MUX_cci_async_in1,
0474 MSM_MUX_cci_async_in2,
0475 MSM_MUX_cci_i2c0,
0476 MSM_MUX_cci_i2c1,
0477 MSM_MUX_cci_timer0,
0478 MSM_MUX_cci_timer1,
0479 MSM_MUX_cci_timer2,
0480 MSM_MUX_cci_timer3,
0481 MSM_MUX_cci_timer4,
0482 MSM_MUX_gcc_gp1_clk_a,
0483 MSM_MUX_gcc_gp1_clk_b,
0484 MSM_MUX_gcc_gp2_clk_a,
0485 MSM_MUX_gcc_gp2_clk_b,
0486 MSM_MUX_gcc_gp3_clk_a,
0487 MSM_MUX_gcc_gp3_clk_b,
0488 MSM_MUX_gp_mn,
0489 MSM_MUX_gp_pdm0,
0490 MSM_MUX_gp_pdm1,
0491 MSM_MUX_gp_pdm2,
0492 MSM_MUX_gp0_clk,
0493 MSM_MUX_gp1_clk,
0494 MSM_MUX_gps_tx,
0495 MSM_MUX_gsm_tx,
0496 MSM_MUX_hdmi_cec,
0497 MSM_MUX_hdmi_ddc,
0498 MSM_MUX_hdmi_hpd,
0499 MSM_MUX_hdmi_rcv,
0500 MSM_MUX_mdp_vsync,
0501 MSM_MUX_mss_lte,
0502 MSM_MUX_nav_pps,
0503 MSM_MUX_nav_tsync,
0504 MSM_MUX_qdss_cti_trig_in_a,
0505 MSM_MUX_qdss_cti_trig_in_b,
0506 MSM_MUX_qdss_cti_trig_in_c,
0507 MSM_MUX_qdss_cti_trig_in_d,
0508 MSM_MUX_qdss_cti_trig_out_a,
0509 MSM_MUX_qdss_cti_trig_out_b,
0510 MSM_MUX_qdss_cti_trig_out_c,
0511 MSM_MUX_qdss_cti_trig_out_d,
0512 MSM_MUX_qdss_traceclk_a,
0513 MSM_MUX_qdss_traceclk_b,
0514 MSM_MUX_qdss_tracectl_a,
0515 MSM_MUX_qdss_tracectl_b,
0516 MSM_MUX_qdss_tracedata_a,
0517 MSM_MUX_qdss_tracedata_b,
0518 MSM_MUX_qua_mi2s,
0519 MSM_MUX_pci_e0,
0520 MSM_MUX_pci_e1,
0521 MSM_MUX_pri_mi2s,
0522 MSM_MUX_sdc4,
0523 MSM_MUX_sec_mi2s,
0524 MSM_MUX_slimbus,
0525 MSM_MUX_spkr_i2s,
0526 MSM_MUX_ter_mi2s,
0527 MSM_MUX_tsif1,
0528 MSM_MUX_tsif2,
0529 MSM_MUX_uim1,
0530 MSM_MUX_uim2,
0531 MSM_MUX_uim3,
0532 MSM_MUX_uim4,
0533 MSM_MUX_uim_batt_alarm,
0534 MSM_MUX_gpio,
0535 MSM_MUX_NA,
0536 };
0537
0538 static const char * const gpio_groups[] = {
0539 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
0540 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
0541 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
0542 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
0543 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
0544 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
0545 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
0546 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
0547 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
0548 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
0549 "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
0550 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
0551 "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
0552 "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
0553 "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
0554 "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
0555 "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
0556 "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122",
0557 "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", "gpio128",
0558 "gpio129", "gpio130", "gpio131", "gpio132", "gpio133", "gpio134",
0559 "gpio135", "gpio136", "gpio137", "gpio138", "gpio139", "gpio140",
0560 "gpio141", "gpio142", "gpio143", "gpio144", "gpio145",
0561 };
0562
0563 static const char * const blsp_spi1_groups[] = {
0564 "gpio0", "gpio1", "gpio2", "gpio3"
0565 };
0566 static const char * const blsp_uart1_groups[] = {
0567 "gpio0", "gpio1", "gpio2", "gpio3"
0568 };
0569 static const char * const blsp_uim1_groups[] = {
0570 "gpio0", "gpio1"
0571 };
0572 static const char * const hdmi_rcv_groups[] = {
0573 "gpio0"
0574 };
0575 static const char * const blsp_i2c1_groups[] = {
0576 "gpio2", "gpio3"
0577 };
0578 static const char * const blsp_spi2_groups[] = {
0579 "gpio4", "gpio5", "gpio6", "gpio7"
0580 };
0581 static const char * const blsp_uart2_groups[] = {
0582 "gpio4", "gpio5", "gpio6", "gpio7"
0583 };
0584 static const char * const blsp_uim2_groups[] = {
0585 "gpio4", "gpio5"
0586 };
0587 static const char * const qdss_cti_trig_out_b_groups[] = {
0588 "gpio4",
0589 };
0590 static const char * const qdss_cti_trig_in_b_groups[] = {
0591 "gpio5",
0592 };
0593 static const char * const blsp_i2c2_groups[] = {
0594 "gpio6", "gpio7"
0595 };
0596 static const char * const blsp_spi3_groups[] = {
0597 "gpio8", "gpio9", "gpio10", "gpio11"
0598 };
0599 static const char * const blsp_uart3_groups[] = {
0600 "gpio8", "gpio9", "gpio10", "gpio11"
0601 };
0602 static const char * const blsp_uim3_groups[] = {
0603 "gpio8", "gpio9"
0604 };
0605 static const char * const blsp_spi1_cs1_groups[] = {
0606 "gpio8"
0607 };
0608 static const char * const blsp_spi1_cs2_groups[] = {
0609 "gpio9", "gpio11"
0610 };
0611 static const char * const mdp_vsync_groups[] = {
0612 "gpio10", "gpio11", "gpio12"
0613 };
0614 static const char * const blsp_i2c3_groups[] = {
0615 "gpio10", "gpio11"
0616 };
0617 static const char * const blsp_spi1_cs3_groups[] = {
0618 "gpio10"
0619 };
0620 static const char * const qdss_tracedata_b_groups[] = {
0621 "gpio13", "gpio14", "gpio15", "gpio16", "gpio17", "gpio18",
0622 "gpio19", "gpio21", "gpio22", "gpio23", "gpio25", "gpio26",
0623 "gpio57", "gpio58", "gpio92", "gpio93",
0624 };
0625 static const char * const cam_mclk0_groups[] = {
0626 "gpio13"
0627 };
0628 static const char * const cam_mclk1_groups[] = {
0629 "gpio14"
0630 };
0631 static const char * const cam_mclk2_groups[] = {
0632 "gpio15"
0633 };
0634 static const char * const cam_mclk3_groups[] = {
0635 "gpio16"
0636 };
0637 static const char * const cci_i2c0_groups[] = {
0638 "gpio17", "gpio18"
0639 };
0640 static const char * const blsp_spi4_groups[] = {
0641 "gpio17", "gpio18", "gpio19", "gpio20"
0642 };
0643 static const char * const blsp_uart4_groups[] = {
0644 "gpio17", "gpio18", "gpio19", "gpio20"
0645 };
0646 static const char * const blsp_uim4_groups[] = {
0647 "gpio17", "gpio18"
0648 };
0649 static const char * const cci_i2c1_groups[] = {
0650 "gpio19", "gpio20"
0651 };
0652 static const char * const blsp_i2c4_groups[] = {
0653 "gpio19", "gpio20"
0654 };
0655 static const char * const cci_timer0_groups[] = {
0656 "gpio21"
0657 };
0658 static const char * const blsp_spi5_groups[] = {
0659 "gpio21", "gpio22", "gpio23", "gpio24"
0660 };
0661 static const char * const blsp_uart5_groups[] = {
0662 "gpio21", "gpio22", "gpio23", "gpio24"
0663 };
0664 static const char * const blsp_uim5_groups[] = {
0665 "gpio21", "gpio22"
0666 };
0667 static const char * const cci_timer1_groups[] = {
0668 "gpio22"
0669 };
0670 static const char * const cci_timer2_groups[] = {
0671 "gpio23"
0672 };
0673 static const char * const blsp_i2c5_groups[] = {
0674 "gpio23", "gpio24"
0675 };
0676 static const char * const cci_timer3_groups[] = {
0677 "gpio24"
0678 };
0679 static const char * const cci_async_in1_groups[] = {
0680 "gpio24"
0681 };
0682 static const char * const cci_timer4_groups[] = {
0683 "gpio25"
0684 };
0685 static const char * const cci_async_in2_groups[] = {
0686 "gpio25"
0687 };
0688 static const char * const blsp_spi6_groups[] = {
0689 "gpio25", "gpio26", "gpio27", "gpio28"
0690 };
0691 static const char * const blsp_uart6_groups[] = {
0692 "gpio25", "gpio26", "gpio27", "gpio28"
0693 };
0694 static const char * const blsp_uim6_groups[] = {
0695 "gpio25", "gpio26"
0696 };
0697 static const char * const cci_async_in0_groups[] = {
0698 "gpio26"
0699 };
0700 static const char * const gp0_clk_groups[] = {
0701 "gpio26"
0702 };
0703 static const char * const gp1_clk_groups[] = {
0704 "gpio27", "gpio57", "gpio78"
0705 };
0706 static const char * const blsp_i2c6_groups[] = {
0707 "gpio27", "gpio28"
0708 };
0709 static const char * const qdss_tracectl_a_groups[] = {
0710 "gpio27",
0711 };
0712 static const char * const qdss_traceclk_a_groups[] = {
0713 "gpio28",
0714 };
0715 static const char * const gp_mn_groups[] = {
0716 "gpio29"
0717 };
0718 static const char * const hdmi_cec_groups[] = {
0719 "gpio31"
0720 };
0721 static const char * const hdmi_ddc_groups[] = {
0722 "gpio32", "gpio33"
0723 };
0724 static const char * const hdmi_hpd_groups[] = {
0725 "gpio34"
0726 };
0727 static const char * const uim3_groups[] = {
0728 "gpio35", "gpio36", "gpio37", "gpio38"
0729 };
0730 static const char * const pci_e1_groups[] = {
0731 "gpio35", "gpio36",
0732 };
0733 static const char * const blsp_spi7_groups[] = {
0734 "gpio41", "gpio42", "gpio43", "gpio44"
0735 };
0736 static const char * const blsp_uart7_groups[] = {
0737 "gpio41", "gpio42", "gpio43", "gpio44"
0738 };
0739 static const char * const blsp_uim7_groups[] = {
0740 "gpio41", "gpio42"
0741 };
0742 static const char * const qdss_cti_trig_out_c_groups[] = {
0743 "gpio41",
0744 };
0745 static const char * const qdss_cti_trig_in_c_groups[] = {
0746 "gpio42",
0747 };
0748 static const char * const blsp_i2c7_groups[] = {
0749 "gpio43", "gpio44"
0750 };
0751 static const char * const blsp_spi8_groups[] = {
0752 "gpio45", "gpio46", "gpio47", "gpio48"
0753 };
0754 static const char * const blsp_uart8_groups[] = {
0755 "gpio45", "gpio46", "gpio47", "gpio48"
0756 };
0757 static const char * const blsp_uim8_groups[] = {
0758 "gpio45", "gpio46"
0759 };
0760 static const char * const blsp_i2c8_groups[] = {
0761 "gpio47", "gpio48"
0762 };
0763 static const char * const blsp_spi10_cs1_groups[] = {
0764 "gpio47", "gpio67"
0765 };
0766 static const char * const blsp_spi10_cs2_groups[] = {
0767 "gpio48", "gpio68"
0768 };
0769 static const char * const uim2_groups[] = {
0770 "gpio49", "gpio50", "gpio51", "gpio52"
0771 };
0772 static const char * const blsp_spi9_groups[] = {
0773 "gpio49", "gpio50", "gpio51", "gpio52"
0774 };
0775 static const char * const blsp_uart9_groups[] = {
0776 "gpio49", "gpio50", "gpio51", "gpio52"
0777 };
0778 static const char * const blsp_uim9_groups[] = {
0779 "gpio49", "gpio50"
0780 };
0781 static const char * const blsp_i2c9_groups[] = {
0782 "gpio51", "gpio52"
0783 };
0784 static const char * const pci_e0_groups[] = {
0785 "gpio53", "gpio54",
0786 };
0787 static const char * const uim4_groups[] = {
0788 "gpio53", "gpio54", "gpio55", "gpio56"
0789 };
0790 static const char * const blsp_spi10_groups[] = {
0791 "gpio53", "gpio54", "gpio55", "gpio56"
0792 };
0793 static const char * const blsp_uart10_groups[] = {
0794 "gpio53", "gpio54", "gpio55", "gpio56"
0795 };
0796 static const char * const blsp_uim10_groups[] = {
0797 "gpio53", "gpio54"
0798 };
0799 static const char * const qdss_tracedata_a_groups[] = {
0800 "gpio53", "gpio54", "gpio63", "gpio64", "gpio65",
0801 "gpio66", "gpio67", "gpio74", "gpio75", "gpio76",
0802 "gpio77", "gpio85", "gpio86", "gpio87", "gpio89",
0803 "gpio90"
0804 };
0805 static const char * const gp_pdm0_groups[] = {
0806 "gpio54", "gpio95"
0807 };
0808 static const char * const blsp_i2c10_groups[] = {
0809 "gpio55", "gpio56"
0810 };
0811 static const char * const qdss_cti_trig_in_a_groups[] = {
0812 "gpio55",
0813 };
0814 static const char * const qdss_cti_trig_out_a_groups[] = {
0815 "gpio56",
0816 };
0817 static const char * const qua_mi2s_groups[] = {
0818 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
0819 };
0820 static const char * const gcc_gp1_clk_a_groups[] = {
0821 "gpio57"
0822 };
0823 static const char * const gcc_gp2_clk_a_groups[] = {
0824 "gpio58"
0825 };
0826 static const char * const gcc_gp3_clk_a_groups[] = {
0827 "gpio59"
0828 };
0829 static const char * const blsp_spi2_cs1_groups[] = {
0830 "gpio62"
0831 };
0832 static const char * const blsp_spi2_cs2_groups[] = {
0833 "gpio63"
0834 };
0835 static const char * const gp_pdm2_groups[] = {
0836 "gpio63", "gpio79"
0837 };
0838 static const char * const pri_mi2s_groups[] = {
0839 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68"
0840 };
0841 static const char * const blsp_spi2_cs3_groups[] = {
0842 "gpio66"
0843 };
0844 static const char * const spkr_i2s_groups[] = {
0845 "gpio69", "gpio70", "gpio71", "gpio72"
0846 };
0847 static const char * const audio_ref_clk_groups[] = {
0848 "gpio69"
0849 };
0850 static const char * const slimbus_groups[] = {
0851 "gpio70", "gpio71"
0852 };
0853 static const char * const ter_mi2s_groups[] = {
0854 "gpio73", "gpio74", "gpio75", "gpio76", "gpio77"
0855 };
0856 static const char * const gp_pdm1_groups[] = {
0857 "gpio74", "gpio86"
0858 };
0859 static const char * const sec_mi2s_groups[] = {
0860 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82"
0861 };
0862 static const char * const gcc_gp1_clk_b_groups[] = {
0863 "gpio78"
0864 };
0865 static const char * const blsp_spi11_groups[] = {
0866 "gpio81", "gpio82", "gpio83", "gpio84"
0867 };
0868 static const char * const blsp_uart11_groups[] = {
0869 "gpio81", "gpio82", "gpio83", "gpio84"
0870 };
0871 static const char * const blsp_uim11_groups[] = {
0872 "gpio81", "gpio82"
0873 };
0874 static const char * const gcc_gp2_clk_b_groups[] = {
0875 "gpio81"
0876 };
0877 static const char * const gcc_gp3_clk_b_groups[] = {
0878 "gpio82"
0879 };
0880 static const char * const blsp_i2c11_groups[] = {
0881 "gpio83", "gpio84"
0882 };
0883 static const char * const blsp_uart12_groups[] = {
0884 "gpio85", "gpio86", "gpio87", "gpio88"
0885 };
0886 static const char * const blsp_uim12_groups[] = {
0887 "gpio85", "gpio86"
0888 };
0889 static const char * const blsp_i2c12_groups[] = {
0890 "gpio87", "gpio88"
0891 };
0892 static const char * const blsp_spi12_groups[] = {
0893 "gpio85", "gpio86", "gpio87", "gpio88"
0894 };
0895 static const char * const tsif1_groups[] = {
0896 "gpio89", "gpio90", "gpio91", "gpio110", "gpio111"
0897 };
0898 static const char * const blsp_spi10_cs3_groups[] = {
0899 "gpio90"
0900 };
0901 static const char * const sdc4_groups[] = {
0902 "gpio91", "gpio92", "gpio93", "gpio94", "gpio95", "gpio96"
0903 };
0904 static const char * const qdss_traceclk_b_groups[] = {
0905 "gpio91",
0906 };
0907 static const char * const tsif2_groups[] = {
0908 "gpio92", "gpio93", "gpio94", "gpio95", "gpio96"
0909 };
0910 static const char * const qdss_tracectl_b_groups[] = {
0911 "gpio94",
0912 };
0913 static const char * const qdss_cti_trig_out_d_groups[] = {
0914 "gpio95",
0915 };
0916 static const char * const qdss_cti_trig_in_d_groups[] = {
0917 "gpio96",
0918 };
0919 static const char * const uim1_groups[] = {
0920 "gpio97", "gpio98", "gpio99", "gpio100"
0921 };
0922 static const char * const uim_batt_alarm_groups[] = {
0923 "gpio101"
0924 };
0925 static const char * const blsp11_uart_tx_b_groups[] = {
0926 "gpio111"
0927 };
0928 static const char * const blsp11_uart_rx_b_groups[] = {
0929 "gpio112"
0930 };
0931 static const char * const blsp11_i2c_sda_b_groups[] = {
0932 "gpio113"
0933 };
0934 static const char * const blsp11_i2c_scl_b_groups[] = {
0935 "gpio114"
0936 };
0937 static const char * const gsm_tx_groups[] = {
0938 "gpio126", "gpio131", "gpio132", "gpio133"
0939 };
0940 static const char * const nav_tsync_groups[] = {
0941 "gpio127"
0942 };
0943 static const char * const nav_pps_groups[] = {
0944 "gpio127"
0945 };
0946 static const char * const gps_tx_groups[] = {
0947 "gpio130"
0948 };
0949 static const char * const mss_lte_groups[] = {
0950 "gpio134", "gpio135"
0951 };
0952
0953 static const struct msm_function msm8994_functions[] = {
0954 FUNCTION(audio_ref_clk),
0955 FUNCTION(blsp_i2c1),
0956 FUNCTION(blsp_i2c2),
0957 FUNCTION(blsp_i2c3),
0958 FUNCTION(blsp_i2c4),
0959 FUNCTION(blsp_i2c5),
0960 FUNCTION(blsp_i2c6),
0961 FUNCTION(blsp_i2c7),
0962 FUNCTION(blsp_i2c8),
0963 FUNCTION(blsp_i2c9),
0964 FUNCTION(blsp_i2c10),
0965 FUNCTION(blsp_i2c11),
0966 FUNCTION(blsp_i2c12),
0967 FUNCTION(blsp_spi1),
0968 FUNCTION(blsp_spi1_cs1),
0969 FUNCTION(blsp_spi1_cs2),
0970 FUNCTION(blsp_spi1_cs3),
0971 FUNCTION(blsp_spi2),
0972 FUNCTION(blsp_spi2_cs1),
0973 FUNCTION(blsp_spi2_cs2),
0974 FUNCTION(blsp_spi2_cs3),
0975 FUNCTION(blsp_spi3),
0976 FUNCTION(blsp_spi4),
0977 FUNCTION(blsp_spi5),
0978 FUNCTION(blsp_spi6),
0979 FUNCTION(blsp_spi7),
0980 FUNCTION(blsp_spi8),
0981 FUNCTION(blsp_spi9),
0982 FUNCTION(blsp_spi10),
0983 FUNCTION(blsp_spi10_cs1),
0984 FUNCTION(blsp_spi10_cs2),
0985 FUNCTION(blsp_spi10_cs3),
0986 FUNCTION(blsp_spi11),
0987 FUNCTION(blsp_spi12),
0988 FUNCTION(blsp_uart1),
0989 FUNCTION(blsp_uart2),
0990 FUNCTION(blsp_uart3),
0991 FUNCTION(blsp_uart4),
0992 FUNCTION(blsp_uart5),
0993 FUNCTION(blsp_uart6),
0994 FUNCTION(blsp_uart7),
0995 FUNCTION(blsp_uart8),
0996 FUNCTION(blsp_uart9),
0997 FUNCTION(blsp_uart10),
0998 FUNCTION(blsp_uart11),
0999 FUNCTION(blsp_uart12),
1000 FUNCTION(blsp_uim1),
1001 FUNCTION(blsp_uim2),
1002 FUNCTION(blsp_uim3),
1003 FUNCTION(blsp_uim4),
1004 FUNCTION(blsp_uim5),
1005 FUNCTION(blsp_uim6),
1006 FUNCTION(blsp_uim7),
1007 FUNCTION(blsp_uim8),
1008 FUNCTION(blsp_uim9),
1009 FUNCTION(blsp_uim10),
1010 FUNCTION(blsp_uim11),
1011 FUNCTION(blsp_uim12),
1012 FUNCTION(blsp11_i2c_scl_b),
1013 FUNCTION(blsp11_i2c_sda_b),
1014 FUNCTION(blsp11_uart_rx_b),
1015 FUNCTION(blsp11_uart_tx_b),
1016 FUNCTION(cam_mclk0),
1017 FUNCTION(cam_mclk1),
1018 FUNCTION(cam_mclk2),
1019 FUNCTION(cam_mclk3),
1020 FUNCTION(cci_async_in0),
1021 FUNCTION(cci_async_in1),
1022 FUNCTION(cci_async_in2),
1023 FUNCTION(cci_i2c0),
1024 FUNCTION(cci_i2c1),
1025 FUNCTION(cci_timer0),
1026 FUNCTION(cci_timer1),
1027 FUNCTION(cci_timer2),
1028 FUNCTION(cci_timer3),
1029 FUNCTION(cci_timer4),
1030 FUNCTION(gcc_gp1_clk_a),
1031 FUNCTION(gcc_gp1_clk_b),
1032 FUNCTION(gcc_gp2_clk_a),
1033 FUNCTION(gcc_gp2_clk_b),
1034 FUNCTION(gcc_gp3_clk_a),
1035 FUNCTION(gcc_gp3_clk_b),
1036 FUNCTION(gp_mn),
1037 FUNCTION(gp_pdm0),
1038 FUNCTION(gp_pdm1),
1039 FUNCTION(gp_pdm2),
1040 FUNCTION(gp0_clk),
1041 FUNCTION(gp1_clk),
1042 FUNCTION(gps_tx),
1043 FUNCTION(gsm_tx),
1044 FUNCTION(hdmi_cec),
1045 FUNCTION(hdmi_ddc),
1046 FUNCTION(hdmi_hpd),
1047 FUNCTION(hdmi_rcv),
1048 FUNCTION(mdp_vsync),
1049 FUNCTION(mss_lte),
1050 FUNCTION(nav_pps),
1051 FUNCTION(nav_tsync),
1052 FUNCTION(qdss_cti_trig_in_a),
1053 FUNCTION(qdss_cti_trig_in_b),
1054 FUNCTION(qdss_cti_trig_in_c),
1055 FUNCTION(qdss_cti_trig_in_d),
1056 FUNCTION(qdss_cti_trig_out_a),
1057 FUNCTION(qdss_cti_trig_out_b),
1058 FUNCTION(qdss_cti_trig_out_c),
1059 FUNCTION(qdss_cti_trig_out_d),
1060 FUNCTION(qdss_traceclk_a),
1061 FUNCTION(qdss_traceclk_b),
1062 FUNCTION(qdss_tracectl_a),
1063 FUNCTION(qdss_tracectl_b),
1064 FUNCTION(qdss_tracedata_a),
1065 FUNCTION(qdss_tracedata_b),
1066 FUNCTION(qua_mi2s),
1067 FUNCTION(pci_e0),
1068 FUNCTION(pci_e1),
1069 FUNCTION(pri_mi2s),
1070 FUNCTION(sdc4),
1071 FUNCTION(sec_mi2s),
1072 FUNCTION(slimbus),
1073 FUNCTION(spkr_i2s),
1074 FUNCTION(ter_mi2s),
1075 FUNCTION(tsif1),
1076 FUNCTION(tsif2),
1077 FUNCTION(uim_batt_alarm),
1078 FUNCTION(uim1),
1079 FUNCTION(uim2),
1080 FUNCTION(uim3),
1081 FUNCTION(uim4),
1082 FUNCTION(gpio),
1083 };
1084
1085 static const struct msm_pingroup msm8994_groups[] = {
1086 PINGROUP(0, blsp_spi1, blsp_uart1, blsp_uim1, hdmi_rcv, NA, NA, NA,
1087 NA, NA, NA, NA),
1088 PINGROUP(1, blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA, NA, NA,
1089 NA, NA),
1090 PINGROUP(2, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA, NA, NA,
1091 NA, NA),
1092 PINGROUP(3, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA, NA, NA,
1093 NA, NA),
1094 PINGROUP(4, blsp_spi2, blsp_uart2, blsp_uim2, NA, qdss_cti_trig_out_b,
1095 NA, NA, NA, NA, NA, NA),
1096 PINGROUP(5, blsp_spi2, blsp_uart2, blsp_uim2, NA, qdss_cti_trig_in_b,
1097 NA, NA, NA, NA, NA, NA),
1098 PINGROUP(6, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA, NA, NA,
1099 NA, NA),
1100 PINGROUP(7, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA, NA, NA,
1101 NA, NA),
1102 PINGROUP(8, blsp_spi3, blsp_uart3, blsp_uim3, blsp_spi1_cs1, NA, NA,
1103 NA, NA, NA, NA, NA),
1104 PINGROUP(9, blsp_spi3, blsp_uart3, blsp_uim3, blsp_spi1_cs2, NA, NA,
1105 NA, NA, NA, NA, NA),
1106 PINGROUP(10, mdp_vsync, blsp_spi3, blsp_uart3, blsp_i2c3,
1107 blsp_spi1_cs3, NA, NA, NA, NA, NA, NA),
1108 PINGROUP(11, mdp_vsync, blsp_spi3, blsp_uart3, blsp_i2c3,
1109 blsp_spi1_cs2, NA, NA, NA, NA, NA, NA),
1110 PINGROUP(12, mdp_vsync, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1111 PINGROUP(13, cam_mclk0, NA, NA, qdss_tracedata_b, NA, NA, NA, NA, NA,
1112 NA, NA),
1113 PINGROUP(14, cam_mclk1, NA, NA, qdss_tracedata_b, NA, NA, NA, NA, NA,
1114 NA, NA),
1115 PINGROUP(15, cam_mclk2, NA, qdss_tracedata_b, NA, NA, NA, NA, NA, NA,
1116 NA, NA),
1117 PINGROUP(16, cam_mclk3, NA, qdss_tracedata_b, NA, NA, NA, NA, NA, NA,
1118 NA, NA),
1119 PINGROUP(17, cci_i2c0, blsp_spi4, blsp_uart4, blsp_uim4, NA,
1120 qdss_tracedata_b, NA, NA, NA, NA, NA),
1121 PINGROUP(18, cci_i2c0, blsp_spi4, blsp_uart4, blsp_uim4, NA,
1122 qdss_tracedata_b, NA, NA, NA, NA, NA),
1123 PINGROUP(19, cci_i2c1, blsp_spi4, blsp_uart4, blsp_i2c4, NA,
1124 qdss_tracedata_b, NA, NA, NA, NA, NA),
1125 PINGROUP(20, cci_i2c1, blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA,
1126 NA, NA, NA, NA),
1127 PINGROUP(21, cci_timer0, blsp_spi5, blsp_uart5, blsp_uim5, NA,
1128 qdss_tracedata_b, NA, NA, NA, NA, NA),
1129 PINGROUP(22, cci_timer1, blsp_spi5, blsp_uart5, blsp_uim5, NA,
1130 qdss_tracedata_b, NA, NA, NA, NA, NA),
1131 PINGROUP(23, cci_timer2, blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA,
1132 qdss_tracedata_b, NA, NA, NA, NA),
1133 PINGROUP(24, cci_timer3, cci_async_in1, blsp_spi5, blsp_uart5,
1134 blsp_i2c5, NA, NA, NA, NA, NA, NA),
1135 PINGROUP(25, cci_timer4, cci_async_in2, blsp_spi6, blsp_uart6,
1136 blsp_uim6, NA, NA, qdss_tracedata_b, NA, NA, NA),
1137 PINGROUP(26, cci_async_in0, blsp_spi6, blsp_uart6, blsp_uim6, gp0_clk,
1138 NA, qdss_tracedata_b, NA, NA, NA, NA),
1139 PINGROUP(27, blsp_spi6, blsp_uart6, blsp_i2c6, gp1_clk,
1140 qdss_tracectl_a, NA, NA, NA, NA, NA, NA),
1141 PINGROUP(28, blsp_spi6, blsp_uart6, blsp_i2c6, qdss_traceclk_a, NA,
1142 NA, NA, NA, NA, NA, NA),
1143 PINGROUP(29, gp_mn, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1144 PINGROUP(30, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1145 PINGROUP(31, hdmi_cec, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1146 PINGROUP(32, hdmi_ddc, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1147 PINGROUP(33, hdmi_ddc, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1148 PINGROUP(34, hdmi_hpd, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1149 PINGROUP(35, uim3, pci_e1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1150 PINGROUP(36, uim3, pci_e1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1151 PINGROUP(37, uim3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1152 PINGROUP(38, uim3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1153 PINGROUP(39, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1154 PINGROUP(40, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1155 PINGROUP(41, blsp_spi7, blsp_uart7, blsp_uim7, qdss_cti_trig_out_c,
1156 NA, NA, NA, NA, NA, NA, NA),
1157 PINGROUP(42, blsp_spi7, blsp_uart7, blsp_uim7, qdss_cti_trig_in_c, NA,
1158 NA, NA, NA, NA, NA, NA),
1159 PINGROUP(43, blsp_spi7, blsp_uart7, blsp_i2c7, NA, NA, NA, NA, NA, NA,
1160 NA, NA),
1161 PINGROUP(44, blsp_spi7, blsp_uart7, blsp_i2c7, NA, NA, NA, NA, NA, NA,
1162 NA, NA),
1163 PINGROUP(45, blsp_spi8, blsp_uart8, blsp_uim8, NA, NA, NA, NA, NA, NA,
1164 NA, NA),
1165 PINGROUP(46, blsp_spi8, blsp_uart8, blsp_uim8, NA, NA, NA, NA, NA, NA,
1166 NA, NA),
1167 PINGROUP(47, blsp_spi8, blsp_uart8, blsp_i2c8, blsp_spi10_cs1, NA, NA,
1168 NA, NA, NA, NA, NA),
1169 PINGROUP(48, blsp_spi8, blsp_uart8, blsp_i2c8, blsp_spi10_cs2, NA, NA,
1170 NA, NA, NA, NA, NA),
1171 PINGROUP(49, uim2, blsp_spi9, blsp_uart9, blsp_uim9, NA, NA, NA, NA,
1172 NA, NA, NA),
1173 PINGROUP(50, uim2, blsp_spi9, blsp_uart9, blsp_uim9, NA, NA, NA, NA,
1174 NA, NA, NA),
1175 PINGROUP(51, uim2, blsp_spi9, blsp_uart9, blsp_i2c9, NA, NA, NA, NA,
1176 NA, NA, NA),
1177 PINGROUP(52, uim2, blsp_spi9, blsp_uart9, blsp_i2c9, NA, NA, NA, NA,
1178 NA, NA, NA),
1179 PINGROUP(53, uim4, pci_e0, blsp_spi10, blsp_uart10, blsp_uim10, NA,
1180 NA, qdss_tracedata_a, NA, NA, NA),
1181 PINGROUP(54, uim4, pci_e0, blsp_spi10, blsp_uart10, blsp_uim10,
1182 gp_pdm0, NA, NA, qdss_tracedata_a, NA, NA),
1183 PINGROUP(55, uim4, blsp_spi10, blsp_uart10, blsp_i2c10, NA, NA, NA,
1184 qdss_cti_trig_in_a, NA, NA, NA),
1185 PINGROUP(56, uim4, blsp_spi10, blsp_uart10, blsp_i2c10, NA, NA,
1186 qdss_cti_trig_out_a, NA, NA, NA, NA),
1187 PINGROUP(57, qua_mi2s, gcc_gp1_clk_a, NA, NA, qdss_tracedata_b, NA, NA,
1188 NA, NA, NA, NA),
1189 PINGROUP(58, qua_mi2s, gcc_gp2_clk_a, NA, NA, qdss_tracedata_b, NA, NA,
1190 NA, NA, NA, NA),
1191 PINGROUP(59, qua_mi2s, gcc_gp3_clk_a, NA, NA, NA, NA, NA, NA, NA, NA,
1192 NA),
1193 PINGROUP(60, qua_mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1194 PINGROUP(61, qua_mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1195 PINGROUP(62, qua_mi2s, blsp_spi2_cs1, NA, NA, NA, NA, NA, NA, NA, NA,
1196 NA),
1197 PINGROUP(63, qua_mi2s, blsp_spi2_cs2, gp_pdm2, NA, NA, NA, NA, NA,
1198 qdss_tracedata_a, NA, NA),
1199 PINGROUP(64, pri_mi2s, NA, NA, NA, qdss_tracedata_a, NA, NA, NA, NA,
1200 NA, NA),
1201 PINGROUP(65, pri_mi2s, NA, NA, NA, qdss_tracedata_a, NA, NA, NA, NA,
1202 NA, NA),
1203 PINGROUP(66, pri_mi2s, blsp_spi2_cs3, NA, NA, NA, qdss_tracedata_a,
1204 NA, NA, NA, NA, NA),
1205 PINGROUP(67, pri_mi2s, blsp_spi10_cs1, NA, NA, NA, qdss_tracedata_a,
1206 NA, NA, NA, NA, NA),
1207 PINGROUP(68, pri_mi2s, blsp_spi10_cs2, NA, NA, NA, NA, NA, NA, NA, NA,
1208 NA),
1209 PINGROUP(69, spkr_i2s, audio_ref_clk, NA, NA, NA, NA, NA, NA, NA, NA,
1210 NA),
1211 PINGROUP(70, slimbus, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1212 PINGROUP(71, slimbus, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1213 PINGROUP(72, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1214 PINGROUP(73, ter_mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1215 PINGROUP(74, ter_mi2s, gp_pdm1, NA, NA, NA, qdss_tracedata_a, NA, NA,
1216 NA, NA, NA),
1217 PINGROUP(75, ter_mi2s, NA, NA, qdss_tracedata_a, NA, NA, NA, NA, NA,
1218 NA, NA),
1219 PINGROUP(76, ter_mi2s, NA, NA, qdss_tracedata_a, NA, NA, NA, NA, NA,
1220 NA, NA),
1221 PINGROUP(77, ter_mi2s, NA, NA, qdss_tracedata_a, NA, NA, NA, NA, NA,
1222 NA, NA),
1223 PINGROUP(78, sec_mi2s, gcc_gp1_clk_b, NA, NA, NA, NA, NA, NA, NA, NA,
1224 NA),
1225 PINGROUP(79, sec_mi2s, gp_pdm2, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1226 PINGROUP(80, sec_mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1227 PINGROUP(81, sec_mi2s, blsp_spi11, blsp_uart11, blsp_uim11,
1228 gcc_gp2_clk_b, NA, NA, NA, NA, NA, NA),
1229 PINGROUP(82, sec_mi2s, blsp_spi11, blsp_uart11, blsp_uim11,
1230 gcc_gp3_clk_b, NA, NA, NA, NA, NA, NA),
1231 PINGROUP(83, blsp_spi11, blsp_uart11, blsp_i2c11, NA, NA, NA, NA, NA,
1232 NA, NA, NA),
1233 PINGROUP(84, blsp_spi11, blsp_uart11, blsp_i2c11, NA, NA, NA, NA, NA,
1234 NA, NA, NA),
1235 PINGROUP(85, blsp_spi12, blsp_uart12, blsp_uim12, NA, NA,
1236 qdss_tracedata_a, NA, NA, NA, NA, NA),
1237 PINGROUP(86, blsp_spi12, blsp_uart12, blsp_uim12, gp_pdm1, NA,
1238 qdss_tracedata_a, NA, NA, NA, NA, NA),
1239 PINGROUP(87, blsp_spi12, blsp_uart12, blsp_i2c12, NA,
1240 qdss_tracedata_a, NA, NA, NA, NA, NA, NA),
1241 PINGROUP(88, blsp_spi12, blsp_uart12, blsp_i2c12, NA, NA, NA, NA, NA,
1242 NA, NA, NA),
1243 PINGROUP(89, tsif1, NA, qdss_tracedata_a, NA, NA, NA, NA, NA, NA, NA,
1244 NA),
1245 PINGROUP(90, tsif1, blsp_spi10_cs3, qdss_tracedata_a, NA, NA, NA, NA,
1246 NA, NA, NA, NA),
1247 PINGROUP(91, tsif1, sdc4, NA, NA, NA, NA, qdss_traceclk_b, NA, NA, NA,
1248 NA),
1249 PINGROUP(92, tsif2, sdc4, NA, NA, qdss_tracedata_b, NA, NA, NA, NA,
1250 NA, NA),
1251 PINGROUP(93, tsif2, sdc4, NA, NA, NA, NA, qdss_tracedata_b, NA, NA,
1252 NA, NA),
1253 PINGROUP(94, tsif2, sdc4, NA, NA, NA, NA, qdss_tracectl_b, NA, NA, NA,
1254 NA),
1255 PINGROUP(95, tsif2, sdc4, gp_pdm0, NA, NA, NA, qdss_cti_trig_out_d,
1256 NA, NA, NA, NA),
1257 PINGROUP(96, tsif2, sdc4, qdss_cti_trig_in_d, NA, NA, NA, NA, NA, NA,
1258 NA, NA),
1259 PINGROUP(97, uim1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1260 PINGROUP(98, uim1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1261 PINGROUP(99, uim1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1262 PINGROUP(100, uim1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1263 PINGROUP(101, uim_batt_alarm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1264 PINGROUP(102, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1265 PINGROUP(103, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1266 PINGROUP(104, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1267 PINGROUP(105, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1268 PINGROUP(106, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1269 PINGROUP(107, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1270 PINGROUP(108, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1271 PINGROUP(109, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1272 PINGROUP(110, tsif1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1273 PINGROUP(111, tsif1, blsp11_uart_tx_b, NA, NA, NA, NA, NA, NA, NA, NA,
1274 NA),
1275 PINGROUP(112, blsp11_uart_rx_b, NA, NA, NA, NA, NA, NA, NA, NA, NA,
1276 NA),
1277 PINGROUP(113, blsp11_i2c_sda_b, NA, NA, NA, NA, NA, NA, NA, NA, NA,
1278 NA),
1279 PINGROUP(114, blsp11_i2c_scl_b, NA, NA, NA, NA, NA, NA, NA, NA, NA,
1280 NA),
1281 PINGROUP(115, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1282 PINGROUP(116, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1283 PINGROUP(117, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1284 PINGROUP(118, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1285 PINGROUP(119, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1286 PINGROUP(120, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1287 PINGROUP(121, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1288 PINGROUP(122, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1289 PINGROUP(123, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1290 PINGROUP(124, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1291 PINGROUP(125, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1292 PINGROUP(126, NA, gsm_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1293 PINGROUP(127, NA, nav_tsync, nav_pps, NA, NA, NA, NA, NA, NA, NA,
1294 NA),
1295 PINGROUP(128, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1296 PINGROUP(129, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1297 PINGROUP(130, gps_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1298 PINGROUP(131, gsm_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1299 PINGROUP(132, gsm_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1300 PINGROUP(133, gsm_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1301 PINGROUP(134, mss_lte, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1302 PINGROUP(135, mss_lte, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1303 PINGROUP(136, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1304 PINGROUP(137, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1305 PINGROUP(138, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1306 PINGROUP(139, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1307 PINGROUP(140, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1308 PINGROUP(141, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1309 PINGROUP(142, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1310 PINGROUP(143, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1311 PINGROUP(144, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1312 PINGROUP(145, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1313 SDC_PINGROUP(sdc1_rclk, 0x2044, 15, 0),
1314 SDC_PINGROUP(sdc1_clk, 0x2044, 13, 6),
1315 SDC_PINGROUP(sdc1_cmd, 0x2044, 11, 3),
1316 SDC_PINGROUP(sdc1_data, 0x2044, 9, 0),
1317 SDC_PINGROUP(sdc2_clk, 0x2048, 14, 6),
1318 SDC_PINGROUP(sdc2_cmd, 0x2048, 11, 3),
1319 SDC_PINGROUP(sdc2_data, 0x2048, 9, 0),
1320 SDC_PINGROUP(sdc3_clk, 0x206c, 14, 6),
1321 SDC_PINGROUP(sdc3_cmd, 0x206c, 11, 3),
1322 SDC_PINGROUP(sdc3_data, 0x206c, 9, 0),
1323 };
1324
1325 #define NUM_GPIO_PINGROUPS 146
1326
1327 static const struct msm_pinctrl_soc_data msm8994_pinctrl = {
1328 .pins = msm8994_pins,
1329 .npins = ARRAY_SIZE(msm8994_pins),
1330 .functions = msm8994_functions,
1331 .nfunctions = ARRAY_SIZE(msm8994_functions),
1332 .groups = msm8994_groups,
1333 .ngroups = ARRAY_SIZE(msm8994_groups),
1334 .ngpios = NUM_GPIO_PINGROUPS,
1335 };
1336
1337 static int msm8994_pinctrl_probe(struct platform_device *pdev)
1338 {
1339 return msm_pinctrl_probe(pdev, &msm8994_pinctrl);
1340 }
1341
1342 static const struct of_device_id msm8994_pinctrl_of_match[] = {
1343 { .compatible = "qcom,msm8992-pinctrl", },
1344 { .compatible = "qcom,msm8994-pinctrl", },
1345 { }
1346 };
1347
1348 static struct platform_driver msm8994_pinctrl_driver = {
1349 .driver = {
1350 .name = "msm8994-pinctrl",
1351 .of_match_table = msm8994_pinctrl_of_match,
1352 },
1353 .probe = msm8994_pinctrl_probe,
1354 .remove = msm_pinctrl_remove,
1355 };
1356
1357 static int __init msm8994_pinctrl_init(void)
1358 {
1359 return platform_driver_register(&msm8994_pinctrl_driver);
1360 }
1361 arch_initcall(msm8994_pinctrl_init);
1362
1363 static void __exit msm8994_pinctrl_exit(void)
1364 {
1365 platform_driver_unregister(&msm8994_pinctrl_driver);
1366 }
1367 module_exit(msm8994_pinctrl_exit);
1368
1369 MODULE_DESCRIPTION("Qualcomm MSM8994 pinctrl driver");
1370 MODULE_LICENSE("GPL v2");
1371 MODULE_DEVICE_TABLE(of, msm8994_pinctrl_of_match);
