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0008 #include <linux/module.h>
0009 #include <linux/of.h>
0010 #include <linux/platform_device.h>
0011 #include <linux/pinctrl/pinctrl.h>
0012 #include <linux/pinctrl/pinmux.h>
0013
0014 #include "pinctrl-msm.h"
0015
0016 static const struct pinctrl_pin_desc mdm9615_pins[] = {
0017 PINCTRL_PIN(0, "GPIO_0"),
0018 PINCTRL_PIN(1, "GPIO_1"),
0019 PINCTRL_PIN(2, "GPIO_2"),
0020 PINCTRL_PIN(3, "GPIO_3"),
0021 PINCTRL_PIN(4, "GPIO_4"),
0022 PINCTRL_PIN(5, "GPIO_5"),
0023 PINCTRL_PIN(6, "GPIO_6"),
0024 PINCTRL_PIN(7, "GPIO_7"),
0025 PINCTRL_PIN(8, "GPIO_8"),
0026 PINCTRL_PIN(9, "GPIO_9"),
0027 PINCTRL_PIN(10, "GPIO_10"),
0028 PINCTRL_PIN(11, "GPIO_11"),
0029 PINCTRL_PIN(12, "GPIO_12"),
0030 PINCTRL_PIN(13, "GPIO_13"),
0031 PINCTRL_PIN(14, "GPIO_14"),
0032 PINCTRL_PIN(15, "GPIO_15"),
0033 PINCTRL_PIN(16, "GPIO_16"),
0034 PINCTRL_PIN(17, "GPIO_17"),
0035 PINCTRL_PIN(18, "GPIO_18"),
0036 PINCTRL_PIN(19, "GPIO_19"),
0037 PINCTRL_PIN(20, "GPIO_20"),
0038 PINCTRL_PIN(21, "GPIO_21"),
0039 PINCTRL_PIN(22, "GPIO_22"),
0040 PINCTRL_PIN(23, "GPIO_23"),
0041 PINCTRL_PIN(24, "GPIO_24"),
0042 PINCTRL_PIN(25, "GPIO_25"),
0043 PINCTRL_PIN(26, "GPIO_26"),
0044 PINCTRL_PIN(27, "GPIO_27"),
0045 PINCTRL_PIN(28, "GPIO_28"),
0046 PINCTRL_PIN(29, "GPIO_29"),
0047 PINCTRL_PIN(30, "GPIO_30"),
0048 PINCTRL_PIN(31, "GPIO_31"),
0049 PINCTRL_PIN(32, "GPIO_32"),
0050 PINCTRL_PIN(33, "GPIO_33"),
0051 PINCTRL_PIN(34, "GPIO_34"),
0052 PINCTRL_PIN(35, "GPIO_35"),
0053 PINCTRL_PIN(36, "GPIO_36"),
0054 PINCTRL_PIN(37, "GPIO_37"),
0055 PINCTRL_PIN(38, "GPIO_38"),
0056 PINCTRL_PIN(39, "GPIO_39"),
0057 PINCTRL_PIN(40, "GPIO_40"),
0058 PINCTRL_PIN(41, "GPIO_41"),
0059 PINCTRL_PIN(42, "GPIO_42"),
0060 PINCTRL_PIN(43, "GPIO_43"),
0061 PINCTRL_PIN(44, "GPIO_44"),
0062 PINCTRL_PIN(45, "GPIO_45"),
0063 PINCTRL_PIN(46, "GPIO_46"),
0064 PINCTRL_PIN(47, "GPIO_47"),
0065 PINCTRL_PIN(48, "GPIO_48"),
0066 PINCTRL_PIN(49, "GPIO_49"),
0067 PINCTRL_PIN(50, "GPIO_50"),
0068 PINCTRL_PIN(51, "GPIO_51"),
0069 PINCTRL_PIN(52, "GPIO_52"),
0070 PINCTRL_PIN(53, "GPIO_53"),
0071 PINCTRL_PIN(54, "GPIO_54"),
0072 PINCTRL_PIN(55, "GPIO_55"),
0073 PINCTRL_PIN(56, "GPIO_56"),
0074 PINCTRL_PIN(57, "GPIO_57"),
0075 PINCTRL_PIN(58, "GPIO_58"),
0076 PINCTRL_PIN(59, "GPIO_59"),
0077 PINCTRL_PIN(60, "GPIO_60"),
0078 PINCTRL_PIN(61, "GPIO_61"),
0079 PINCTRL_PIN(62, "GPIO_62"),
0080 PINCTRL_PIN(63, "GPIO_63"),
0081 PINCTRL_PIN(64, "GPIO_64"),
0082 PINCTRL_PIN(65, "GPIO_65"),
0083 PINCTRL_PIN(66, "GPIO_66"),
0084 PINCTRL_PIN(67, "GPIO_67"),
0085 PINCTRL_PIN(68, "GPIO_68"),
0086 PINCTRL_PIN(69, "GPIO_69"),
0087 PINCTRL_PIN(70, "GPIO_70"),
0088 PINCTRL_PIN(71, "GPIO_71"),
0089 PINCTRL_PIN(72, "GPIO_72"),
0090 PINCTRL_PIN(73, "GPIO_73"),
0091 PINCTRL_PIN(74, "GPIO_74"),
0092 PINCTRL_PIN(75, "GPIO_75"),
0093 PINCTRL_PIN(76, "GPIO_76"),
0094 PINCTRL_PIN(77, "GPIO_77"),
0095 PINCTRL_PIN(78, "GPIO_78"),
0096 PINCTRL_PIN(79, "GPIO_79"),
0097 PINCTRL_PIN(80, "GPIO_80"),
0098 PINCTRL_PIN(81, "GPIO_81"),
0099 PINCTRL_PIN(82, "GPIO_82"),
0100 PINCTRL_PIN(83, "GPIO_83"),
0101 PINCTRL_PIN(84, "GPIO_84"),
0102 PINCTRL_PIN(85, "GPIO_85"),
0103 PINCTRL_PIN(86, "GPIO_86"),
0104 PINCTRL_PIN(87, "GPIO_87"),
0105 };
0106
0107 #define DECLARE_MSM_GPIO_PINS(pin) \
0108 static const unsigned int gpio##pin##_pins[] = { pin }
0109 DECLARE_MSM_GPIO_PINS(0);
0110 DECLARE_MSM_GPIO_PINS(1);
0111 DECLARE_MSM_GPIO_PINS(2);
0112 DECLARE_MSM_GPIO_PINS(3);
0113 DECLARE_MSM_GPIO_PINS(4);
0114 DECLARE_MSM_GPIO_PINS(5);
0115 DECLARE_MSM_GPIO_PINS(6);
0116 DECLARE_MSM_GPIO_PINS(7);
0117 DECLARE_MSM_GPIO_PINS(8);
0118 DECLARE_MSM_GPIO_PINS(9);
0119 DECLARE_MSM_GPIO_PINS(10);
0120 DECLARE_MSM_GPIO_PINS(11);
0121 DECLARE_MSM_GPIO_PINS(12);
0122 DECLARE_MSM_GPIO_PINS(13);
0123 DECLARE_MSM_GPIO_PINS(14);
0124 DECLARE_MSM_GPIO_PINS(15);
0125 DECLARE_MSM_GPIO_PINS(16);
0126 DECLARE_MSM_GPIO_PINS(17);
0127 DECLARE_MSM_GPIO_PINS(18);
0128 DECLARE_MSM_GPIO_PINS(19);
0129 DECLARE_MSM_GPIO_PINS(20);
0130 DECLARE_MSM_GPIO_PINS(21);
0131 DECLARE_MSM_GPIO_PINS(22);
0132 DECLARE_MSM_GPIO_PINS(23);
0133 DECLARE_MSM_GPIO_PINS(24);
0134 DECLARE_MSM_GPIO_PINS(25);
0135 DECLARE_MSM_GPIO_PINS(26);
0136 DECLARE_MSM_GPIO_PINS(27);
0137 DECLARE_MSM_GPIO_PINS(28);
0138 DECLARE_MSM_GPIO_PINS(29);
0139 DECLARE_MSM_GPIO_PINS(30);
0140 DECLARE_MSM_GPIO_PINS(31);
0141 DECLARE_MSM_GPIO_PINS(32);
0142 DECLARE_MSM_GPIO_PINS(33);
0143 DECLARE_MSM_GPIO_PINS(34);
0144 DECLARE_MSM_GPIO_PINS(35);
0145 DECLARE_MSM_GPIO_PINS(36);
0146 DECLARE_MSM_GPIO_PINS(37);
0147 DECLARE_MSM_GPIO_PINS(38);
0148 DECLARE_MSM_GPIO_PINS(39);
0149 DECLARE_MSM_GPIO_PINS(40);
0150 DECLARE_MSM_GPIO_PINS(41);
0151 DECLARE_MSM_GPIO_PINS(42);
0152 DECLARE_MSM_GPIO_PINS(43);
0153 DECLARE_MSM_GPIO_PINS(44);
0154 DECLARE_MSM_GPIO_PINS(45);
0155 DECLARE_MSM_GPIO_PINS(46);
0156 DECLARE_MSM_GPIO_PINS(47);
0157 DECLARE_MSM_GPIO_PINS(48);
0158 DECLARE_MSM_GPIO_PINS(49);
0159 DECLARE_MSM_GPIO_PINS(50);
0160 DECLARE_MSM_GPIO_PINS(51);
0161 DECLARE_MSM_GPIO_PINS(52);
0162 DECLARE_MSM_GPIO_PINS(53);
0163 DECLARE_MSM_GPIO_PINS(54);
0164 DECLARE_MSM_GPIO_PINS(55);
0165 DECLARE_MSM_GPIO_PINS(56);
0166 DECLARE_MSM_GPIO_PINS(57);
0167 DECLARE_MSM_GPIO_PINS(58);
0168 DECLARE_MSM_GPIO_PINS(59);
0169 DECLARE_MSM_GPIO_PINS(60);
0170 DECLARE_MSM_GPIO_PINS(61);
0171 DECLARE_MSM_GPIO_PINS(62);
0172 DECLARE_MSM_GPIO_PINS(63);
0173 DECLARE_MSM_GPIO_PINS(64);
0174 DECLARE_MSM_GPIO_PINS(65);
0175 DECLARE_MSM_GPIO_PINS(66);
0176 DECLARE_MSM_GPIO_PINS(67);
0177 DECLARE_MSM_GPIO_PINS(68);
0178 DECLARE_MSM_GPIO_PINS(69);
0179 DECLARE_MSM_GPIO_PINS(70);
0180 DECLARE_MSM_GPIO_PINS(71);
0181 DECLARE_MSM_GPIO_PINS(72);
0182 DECLARE_MSM_GPIO_PINS(73);
0183 DECLARE_MSM_GPIO_PINS(74);
0184 DECLARE_MSM_GPIO_PINS(75);
0185 DECLARE_MSM_GPIO_PINS(76);
0186 DECLARE_MSM_GPIO_PINS(77);
0187 DECLARE_MSM_GPIO_PINS(78);
0188 DECLARE_MSM_GPIO_PINS(79);
0189 DECLARE_MSM_GPIO_PINS(80);
0190 DECLARE_MSM_GPIO_PINS(81);
0191 DECLARE_MSM_GPIO_PINS(82);
0192 DECLARE_MSM_GPIO_PINS(83);
0193 DECLARE_MSM_GPIO_PINS(84);
0194 DECLARE_MSM_GPIO_PINS(85);
0195 DECLARE_MSM_GPIO_PINS(86);
0196 DECLARE_MSM_GPIO_PINS(87);
0197
0198 #define FUNCTION(fname) \
0199 [MSM_MUX_##fname] = { \
0200 .name = #fname, \
0201 .groups = fname##_groups, \
0202 .ngroups = ARRAY_SIZE(fname##_groups), \
0203 }
0204
0205 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \
0206 { \
0207 .name = "gpio" #id, \
0208 .pins = gpio##id##_pins, \
0209 .npins = ARRAY_SIZE(gpio##id##_pins), \
0210 .funcs = (int[]){ \
0211 MSM_MUX_gpio, \
0212 MSM_MUX_##f1, \
0213 MSM_MUX_##f2, \
0214 MSM_MUX_##f3, \
0215 MSM_MUX_##f4, \
0216 MSM_MUX_##f5, \
0217 MSM_MUX_##f6, \
0218 MSM_MUX_##f7, \
0219 MSM_MUX_##f8, \
0220 MSM_MUX_##f9, \
0221 MSM_MUX_##f10, \
0222 MSM_MUX_##f11 \
0223 }, \
0224 .nfuncs = 12, \
0225 .ctl_reg = 0x1000 + 0x10 * id, \
0226 .io_reg = 0x1004 + 0x10 * id, \
0227 .intr_cfg_reg = 0x1008 + 0x10 * id, \
0228 .intr_status_reg = 0x100c + 0x10 * id, \
0229 .intr_target_reg = 0x400 + 0x4 * id, \
0230 .mux_bit = 2, \
0231 .pull_bit = 0, \
0232 .drv_bit = 6, \
0233 .oe_bit = 9, \
0234 .in_bit = 0, \
0235 .out_bit = 1, \
0236 .intr_enable_bit = 0, \
0237 .intr_status_bit = 0, \
0238 .intr_ack_high = 1, \
0239 .intr_target_bit = 0, \
0240 .intr_target_kpss_val = 4, \
0241 .intr_raw_status_bit = 3, \
0242 .intr_polarity_bit = 1, \
0243 .intr_detection_bit = 2, \
0244 .intr_detection_width = 1, \
0245 }
0246
0247 enum mdm9615_functions {
0248 MSM_MUX_gpio,
0249 MSM_MUX_gsbi2_i2c,
0250 MSM_MUX_gsbi3,
0251 MSM_MUX_gsbi4,
0252 MSM_MUX_gsbi5_i2c,
0253 MSM_MUX_gsbi5_uart,
0254 MSM_MUX_sdc2,
0255 MSM_MUX_ebi2_lcdc,
0256 MSM_MUX_ps_hold,
0257 MSM_MUX_prim_audio,
0258 MSM_MUX_sec_audio,
0259 MSM_MUX_cdc_mclk,
0260 MSM_MUX_NA,
0261 };
0262
0263 static const char * const gpio_groups[] = {
0264 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
0265 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
0266 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
0267 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
0268 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
0269 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
0270 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
0271 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
0272 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
0273 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
0274 "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
0275 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
0276 "gpio85", "gpio86", "gpio87"
0277 };
0278
0279 static const char * const gsbi2_i2c_groups[] = {
0280 "gpio4", "gpio5"
0281 };
0282
0283 static const char * const gsbi3_groups[] = {
0284 "gpio8", "gpio9", "gpio10", "gpio11"
0285 };
0286
0287 static const char * const gsbi4_groups[] = {
0288 "gpio12", "gpio13", "gpio14", "gpio15"
0289 };
0290
0291 static const char * const gsbi5_i2c_groups[] = {
0292 "gpio16", "gpio17"
0293 };
0294
0295 static const char * const gsbi5_uart_groups[] = {
0296 "gpio18", "gpio19"
0297 };
0298
0299 static const char * const sdc2_groups[] = {
0300 "gpio25", "gpio26", "gpio27", "gpio28", "gpio29", "gpio30",
0301 };
0302
0303 static const char * const ebi2_lcdc_groups[] = {
0304 "gpio21", "gpio22", "gpio24",
0305 };
0306
0307 static const char * const ps_hold_groups[] = {
0308 "gpio83",
0309 };
0310
0311 static const char * const prim_audio_groups[] = {
0312 "gpio20", "gpio21", "gpio22", "gpio23",
0313 };
0314
0315 static const char * const sec_audio_groups[] = {
0316 "gpio25", "gpio26", "gpio27", "gpio28",
0317 };
0318
0319 static const char * const cdc_mclk_groups[] = {
0320 "gpio24",
0321 };
0322
0323 static const struct msm_function mdm9615_functions[] = {
0324 FUNCTION(gpio),
0325 FUNCTION(gsbi2_i2c),
0326 FUNCTION(gsbi3),
0327 FUNCTION(gsbi4),
0328 FUNCTION(gsbi5_i2c),
0329 FUNCTION(gsbi5_uart),
0330 FUNCTION(sdc2),
0331 FUNCTION(ebi2_lcdc),
0332 FUNCTION(ps_hold),
0333 FUNCTION(prim_audio),
0334 FUNCTION(sec_audio),
0335 FUNCTION(cdc_mclk),
0336 };
0337
0338 static const struct msm_pingroup mdm9615_groups[] = {
0339 PINGROUP(0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0340 PINGROUP(1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0341 PINGROUP(2, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0342 PINGROUP(3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0343 PINGROUP(4, gsbi2_i2c, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0344 PINGROUP(5, gsbi2_i2c, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0345 PINGROUP(6, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0346 PINGROUP(7, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0347 PINGROUP(8, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0348 PINGROUP(9, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0349 PINGROUP(10, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0350 PINGROUP(11, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0351 PINGROUP(12, gsbi4, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0352 PINGROUP(13, gsbi4, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0353 PINGROUP(14, gsbi4, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0354 PINGROUP(15, gsbi4, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0355 PINGROUP(16, gsbi5_i2c, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0356 PINGROUP(17, gsbi5_i2c, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0357 PINGROUP(18, gsbi5_uart, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0358 PINGROUP(19, gsbi5_uart, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0359 PINGROUP(20, prim_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0360 PINGROUP(21, prim_audio, ebi2_lcdc, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0361 PINGROUP(22, prim_audio, ebi2_lcdc, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0362 PINGROUP(23, prim_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0363 PINGROUP(24, cdc_mclk, NA, ebi2_lcdc, NA, NA, NA, NA, NA, NA, NA, NA),
0364 PINGROUP(25, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0365 PINGROUP(26, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0366 PINGROUP(27, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0367 PINGROUP(28, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0368 PINGROUP(29, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0369 PINGROUP(30, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0370 PINGROUP(31, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0371 PINGROUP(32, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0372 PINGROUP(33, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0373 PINGROUP(34, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0374 PINGROUP(35, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0375 PINGROUP(36, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0376 PINGROUP(37, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0377 PINGROUP(38, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0378 PINGROUP(39, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0379 PINGROUP(40, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0380 PINGROUP(41, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0381 PINGROUP(42, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0382 PINGROUP(43, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0383 PINGROUP(44, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0384 PINGROUP(45, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0385 PINGROUP(46, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0386 PINGROUP(47, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0387 PINGROUP(48, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0388 PINGROUP(49, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0389 PINGROUP(50, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0390 PINGROUP(51, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0391 PINGROUP(52, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0392 PINGROUP(53, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0393 PINGROUP(54, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0394 PINGROUP(55, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0395 PINGROUP(56, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0396 PINGROUP(57, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0397 PINGROUP(58, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0398 PINGROUP(59, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0399 PINGROUP(60, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0400 PINGROUP(61, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0401 PINGROUP(62, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0402 PINGROUP(63, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0403 PINGROUP(64, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0404 PINGROUP(65, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0405 PINGROUP(66, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0406 PINGROUP(67, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0407 PINGROUP(68, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0408 PINGROUP(69, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0409 PINGROUP(70, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0410 PINGROUP(71, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0411 PINGROUP(72, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0412 PINGROUP(73, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0413 PINGROUP(74, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0414 PINGROUP(75, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0415 PINGROUP(76, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0416 PINGROUP(77, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0417 PINGROUP(78, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0418 PINGROUP(79, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0419 PINGROUP(80, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0420 PINGROUP(81, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0421 PINGROUP(82, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0422 PINGROUP(83, ps_hold, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0423 PINGROUP(84, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0424 PINGROUP(85, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0425 PINGROUP(86, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0426 PINGROUP(87, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0427 };
0428
0429 #define NUM_GPIO_PINGROUPS 88
0430
0431 static const struct msm_pinctrl_soc_data mdm9615_pinctrl = {
0432 .pins = mdm9615_pins,
0433 .npins = ARRAY_SIZE(mdm9615_pins),
0434 .functions = mdm9615_functions,
0435 .nfunctions = ARRAY_SIZE(mdm9615_functions),
0436 .groups = mdm9615_groups,
0437 .ngroups = ARRAY_SIZE(mdm9615_groups),
0438 .ngpios = NUM_GPIO_PINGROUPS,
0439 };
0440
0441 static int mdm9615_pinctrl_probe(struct platform_device *pdev)
0442 {
0443 return msm_pinctrl_probe(pdev, &mdm9615_pinctrl);
0444 }
0445
0446 static const struct of_device_id mdm9615_pinctrl_of_match[] = {
0447 { .compatible = "qcom,mdm9615-pinctrl", },
0448 { },
0449 };
0450
0451 static struct platform_driver mdm9615_pinctrl_driver = {
0452 .driver = {
0453 .name = "mdm9615-pinctrl",
0454 .of_match_table = mdm9615_pinctrl_of_match,
0455 },
0456 .probe = mdm9615_pinctrl_probe,
0457 .remove = msm_pinctrl_remove,
0458 };
0459
0460 static int __init mdm9615_pinctrl_init(void)
0461 {
0462 return platform_driver_register(&mdm9615_pinctrl_driver);
0463 }
0464 arch_initcall(mdm9615_pinctrl_init);
0465
0466 static void __exit mdm9615_pinctrl_exit(void)
0467 {
0468 platform_driver_unregister(&mdm9615_pinctrl_driver);
0469 }
0470 module_exit(mdm9615_pinctrl_exit);
0471
0472 MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
0473 MODULE_DESCRIPTION("Qualcomm MDM9615 pinctrl driver");
0474 MODULE_LICENSE("GPL v2");
0475 MODULE_DEVICE_TABLE(of, mdm9615_pinctrl_of_match);