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0008 #include <linux/module.h>
0009 #include <linux/of.h>
0010 #include <linux/platform_device.h>
0011 #include <linux/pinctrl/pinctrl.h>
0012
0013 #include "pinctrl-msm.h"
0014
0015 static const struct pinctrl_pin_desc mdm9607_pins[] = {
0016 PINCTRL_PIN(0, "GPIO_0"),
0017 PINCTRL_PIN(1, "GPIO_1"),
0018 PINCTRL_PIN(2, "GPIO_2"),
0019 PINCTRL_PIN(3, "GPIO_3"),
0020 PINCTRL_PIN(4, "GPIO_4"),
0021 PINCTRL_PIN(5, "GPIO_5"),
0022 PINCTRL_PIN(6, "GPIO_6"),
0023 PINCTRL_PIN(7, "GPIO_7"),
0024 PINCTRL_PIN(8, "GPIO_8"),
0025 PINCTRL_PIN(9, "GPIO_9"),
0026 PINCTRL_PIN(10, "GPIO_10"),
0027 PINCTRL_PIN(11, "GPIO_11"),
0028 PINCTRL_PIN(12, "GPIO_12"),
0029 PINCTRL_PIN(13, "GPIO_13"),
0030 PINCTRL_PIN(14, "GPIO_14"),
0031 PINCTRL_PIN(15, "GPIO_15"),
0032 PINCTRL_PIN(16, "GPIO_16"),
0033 PINCTRL_PIN(17, "GPIO_17"),
0034 PINCTRL_PIN(18, "GPIO_18"),
0035 PINCTRL_PIN(19, "GPIO_19"),
0036 PINCTRL_PIN(20, "GPIO_20"),
0037 PINCTRL_PIN(21, "GPIO_21"),
0038 PINCTRL_PIN(22, "GPIO_22"),
0039 PINCTRL_PIN(23, "GPIO_23"),
0040 PINCTRL_PIN(24, "GPIO_24"),
0041 PINCTRL_PIN(25, "GPIO_25"),
0042 PINCTRL_PIN(26, "GPIO_26"),
0043 PINCTRL_PIN(27, "GPIO_27"),
0044 PINCTRL_PIN(28, "GPIO_28"),
0045 PINCTRL_PIN(29, "GPIO_29"),
0046 PINCTRL_PIN(30, "GPIO_30"),
0047 PINCTRL_PIN(31, "GPIO_31"),
0048 PINCTRL_PIN(32, "GPIO_32"),
0049 PINCTRL_PIN(33, "GPIO_33"),
0050 PINCTRL_PIN(34, "GPIO_34"),
0051 PINCTRL_PIN(35, "GPIO_35"),
0052 PINCTRL_PIN(36, "GPIO_36"),
0053 PINCTRL_PIN(37, "GPIO_37"),
0054 PINCTRL_PIN(38, "GPIO_38"),
0055 PINCTRL_PIN(39, "GPIO_39"),
0056 PINCTRL_PIN(40, "GPIO_40"),
0057 PINCTRL_PIN(41, "GPIO_41"),
0058 PINCTRL_PIN(42, "GPIO_42"),
0059 PINCTRL_PIN(43, "GPIO_43"),
0060 PINCTRL_PIN(44, "GPIO_44"),
0061 PINCTRL_PIN(45, "GPIO_45"),
0062 PINCTRL_PIN(46, "GPIO_46"),
0063 PINCTRL_PIN(47, "GPIO_47"),
0064 PINCTRL_PIN(48, "GPIO_48"),
0065 PINCTRL_PIN(49, "GPIO_49"),
0066 PINCTRL_PIN(50, "GPIO_50"),
0067 PINCTRL_PIN(51, "GPIO_51"),
0068 PINCTRL_PIN(52, "GPIO_52"),
0069 PINCTRL_PIN(53, "GPIO_53"),
0070 PINCTRL_PIN(54, "GPIO_54"),
0071 PINCTRL_PIN(55, "GPIO_55"),
0072 PINCTRL_PIN(56, "GPIO_56"),
0073 PINCTRL_PIN(57, "GPIO_57"),
0074 PINCTRL_PIN(58, "GPIO_58"),
0075 PINCTRL_PIN(59, "GPIO_59"),
0076 PINCTRL_PIN(60, "GPIO_60"),
0077 PINCTRL_PIN(61, "GPIO_61"),
0078 PINCTRL_PIN(62, "GPIO_62"),
0079 PINCTRL_PIN(63, "GPIO_63"),
0080 PINCTRL_PIN(64, "GPIO_64"),
0081 PINCTRL_PIN(65, "GPIO_65"),
0082 PINCTRL_PIN(66, "GPIO_66"),
0083 PINCTRL_PIN(67, "GPIO_67"),
0084 PINCTRL_PIN(68, "GPIO_68"),
0085 PINCTRL_PIN(69, "GPIO_69"),
0086 PINCTRL_PIN(70, "GPIO_70"),
0087 PINCTRL_PIN(71, "GPIO_71"),
0088 PINCTRL_PIN(72, "GPIO_72"),
0089 PINCTRL_PIN(73, "GPIO_73"),
0090 PINCTRL_PIN(74, "GPIO_74"),
0091 PINCTRL_PIN(75, "GPIO_75"),
0092 PINCTRL_PIN(76, "GPIO_76"),
0093 PINCTRL_PIN(77, "GPIO_77"),
0094 PINCTRL_PIN(78, "GPIO_78"),
0095 PINCTRL_PIN(79, "GPIO_79"),
0096 PINCTRL_PIN(80, "SDC1_CLK"),
0097 PINCTRL_PIN(81, "SDC1_CMD"),
0098 PINCTRL_PIN(82, "SDC1_DATA"),
0099 PINCTRL_PIN(83, "SDC2_CLK"),
0100 PINCTRL_PIN(84, "SDC2_CMD"),
0101 PINCTRL_PIN(85, "SDC2_DATA"),
0102 PINCTRL_PIN(86, "QDSD_CLK"),
0103 PINCTRL_PIN(87, "QDSD_CMD"),
0104 PINCTRL_PIN(88, "QDSD_DATA0"),
0105 PINCTRL_PIN(89, "QDSD_DATA1"),
0106 PINCTRL_PIN(90, "QDSD_DATA2"),
0107 PINCTRL_PIN(91, "QDSD_DATA3"),
0108 };
0109
0110 #define DECLARE_MSM_GPIO_PINS(pin) \
0111 static const unsigned int gpio##pin##_pins[] = { pin }
0112
0113 DECLARE_MSM_GPIO_PINS(0);
0114 DECLARE_MSM_GPIO_PINS(1);
0115 DECLARE_MSM_GPIO_PINS(2);
0116 DECLARE_MSM_GPIO_PINS(3);
0117 DECLARE_MSM_GPIO_PINS(4);
0118 DECLARE_MSM_GPIO_PINS(5);
0119 DECLARE_MSM_GPIO_PINS(6);
0120 DECLARE_MSM_GPIO_PINS(7);
0121 DECLARE_MSM_GPIO_PINS(8);
0122 DECLARE_MSM_GPIO_PINS(9);
0123 DECLARE_MSM_GPIO_PINS(10);
0124 DECLARE_MSM_GPIO_PINS(11);
0125 DECLARE_MSM_GPIO_PINS(12);
0126 DECLARE_MSM_GPIO_PINS(13);
0127 DECLARE_MSM_GPIO_PINS(14);
0128 DECLARE_MSM_GPIO_PINS(15);
0129 DECLARE_MSM_GPIO_PINS(16);
0130 DECLARE_MSM_GPIO_PINS(17);
0131 DECLARE_MSM_GPIO_PINS(18);
0132 DECLARE_MSM_GPIO_PINS(19);
0133 DECLARE_MSM_GPIO_PINS(20);
0134 DECLARE_MSM_GPIO_PINS(21);
0135 DECLARE_MSM_GPIO_PINS(22);
0136 DECLARE_MSM_GPIO_PINS(23);
0137 DECLARE_MSM_GPIO_PINS(24);
0138 DECLARE_MSM_GPIO_PINS(25);
0139 DECLARE_MSM_GPIO_PINS(26);
0140 DECLARE_MSM_GPIO_PINS(27);
0141 DECLARE_MSM_GPIO_PINS(28);
0142 DECLARE_MSM_GPIO_PINS(29);
0143 DECLARE_MSM_GPIO_PINS(30);
0144 DECLARE_MSM_GPIO_PINS(31);
0145 DECLARE_MSM_GPIO_PINS(32);
0146 DECLARE_MSM_GPIO_PINS(33);
0147 DECLARE_MSM_GPIO_PINS(34);
0148 DECLARE_MSM_GPIO_PINS(35);
0149 DECLARE_MSM_GPIO_PINS(36);
0150 DECLARE_MSM_GPIO_PINS(37);
0151 DECLARE_MSM_GPIO_PINS(38);
0152 DECLARE_MSM_GPIO_PINS(39);
0153 DECLARE_MSM_GPIO_PINS(40);
0154 DECLARE_MSM_GPIO_PINS(41);
0155 DECLARE_MSM_GPIO_PINS(42);
0156 DECLARE_MSM_GPIO_PINS(43);
0157 DECLARE_MSM_GPIO_PINS(44);
0158 DECLARE_MSM_GPIO_PINS(45);
0159 DECLARE_MSM_GPIO_PINS(46);
0160 DECLARE_MSM_GPIO_PINS(47);
0161 DECLARE_MSM_GPIO_PINS(48);
0162 DECLARE_MSM_GPIO_PINS(49);
0163 DECLARE_MSM_GPIO_PINS(50);
0164 DECLARE_MSM_GPIO_PINS(51);
0165 DECLARE_MSM_GPIO_PINS(52);
0166 DECLARE_MSM_GPIO_PINS(53);
0167 DECLARE_MSM_GPIO_PINS(54);
0168 DECLARE_MSM_GPIO_PINS(55);
0169 DECLARE_MSM_GPIO_PINS(56);
0170 DECLARE_MSM_GPIO_PINS(57);
0171 DECLARE_MSM_GPIO_PINS(58);
0172 DECLARE_MSM_GPIO_PINS(59);
0173 DECLARE_MSM_GPIO_PINS(60);
0174 DECLARE_MSM_GPIO_PINS(61);
0175 DECLARE_MSM_GPIO_PINS(62);
0176 DECLARE_MSM_GPIO_PINS(63);
0177 DECLARE_MSM_GPIO_PINS(64);
0178 DECLARE_MSM_GPIO_PINS(65);
0179 DECLARE_MSM_GPIO_PINS(66);
0180 DECLARE_MSM_GPIO_PINS(67);
0181 DECLARE_MSM_GPIO_PINS(68);
0182 DECLARE_MSM_GPIO_PINS(69);
0183 DECLARE_MSM_GPIO_PINS(70);
0184 DECLARE_MSM_GPIO_PINS(71);
0185 DECLARE_MSM_GPIO_PINS(72);
0186 DECLARE_MSM_GPIO_PINS(73);
0187 DECLARE_MSM_GPIO_PINS(74);
0188 DECLARE_MSM_GPIO_PINS(75);
0189 DECLARE_MSM_GPIO_PINS(76);
0190 DECLARE_MSM_GPIO_PINS(77);
0191 DECLARE_MSM_GPIO_PINS(78);
0192 DECLARE_MSM_GPIO_PINS(79);
0193
0194 static const unsigned int sdc1_clk_pins[] = { 80 };
0195 static const unsigned int sdc1_cmd_pins[] = { 81 };
0196 static const unsigned int sdc1_data_pins[] = { 82 };
0197 static const unsigned int sdc2_clk_pins[] = { 83 };
0198 static const unsigned int sdc2_cmd_pins[] = { 84 };
0199 static const unsigned int sdc2_data_pins[] = { 85 };
0200 static const unsigned int qdsd_clk_pins[] = { 86 };
0201 static const unsigned int qdsd_cmd_pins[] = { 87 };
0202 static const unsigned int qdsd_data0_pins[] = { 88 };
0203 static const unsigned int qdsd_data1_pins[] = { 89 };
0204 static const unsigned int qdsd_data2_pins[] = { 90 };
0205 static const unsigned int qdsd_data3_pins[] = { 91 };
0206
0207 #define FUNCTION(fname) \
0208 [msm_mux_##fname] = { \
0209 .name = #fname, \
0210 .groups = fname##_groups, \
0211 .ngroups = ARRAY_SIZE(fname##_groups), \
0212 }
0213
0214 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
0215 { \
0216 .name = "gpio" #id, \
0217 .pins = gpio##id##_pins, \
0218 .npins = ARRAY_SIZE(gpio##id##_pins), \
0219 .funcs = (int[]){ \
0220 msm_mux_gpio, \
0221 msm_mux_##f1, \
0222 msm_mux_##f2, \
0223 msm_mux_##f3, \
0224 msm_mux_##f4, \
0225 msm_mux_##f5, \
0226 msm_mux_##f6, \
0227 msm_mux_##f7, \
0228 msm_mux_##f8, \
0229 msm_mux_##f9 \
0230 }, \
0231 .nfuncs = 10, \
0232 .ctl_reg = 0x1000 * id, \
0233 .io_reg = 0x4 + 0x1000 * id, \
0234 .intr_cfg_reg = 0x8 + 0x1000 * id, \
0235 .intr_status_reg = 0xc + 0x1000 * id, \
0236 .intr_target_reg = 0x8 + 0x1000 * id, \
0237 .mux_bit = 2, \
0238 .pull_bit = 0, \
0239 .drv_bit = 6, \
0240 .oe_bit = 9, \
0241 .in_bit = 0, \
0242 .out_bit = 1, \
0243 .intr_enable_bit = 0, \
0244 .intr_status_bit = 0, \
0245 .intr_target_bit = 5, \
0246 .intr_target_kpss_val = 4, \
0247 .intr_raw_status_bit = 4, \
0248 .intr_polarity_bit = 1, \
0249 .intr_detection_bit = 2, \
0250 .intr_detection_width = 2, \
0251 }
0252
0253 #define SDC_PINGROUP(pg_name, ctl, pull, drv) \
0254 { \
0255 .name = #pg_name, \
0256 .pins = pg_name##_pins, \
0257 .npins = ARRAY_SIZE(pg_name##_pins), \
0258 .ctl_reg = ctl, \
0259 .io_reg = 0, \
0260 .intr_cfg_reg = 0, \
0261 .intr_status_reg = 0, \
0262 .intr_target_reg = 0, \
0263 .mux_bit = -1, \
0264 .pull_bit = pull, \
0265 .drv_bit = drv, \
0266 .oe_bit = -1, \
0267 .in_bit = -1, \
0268 .out_bit = -1, \
0269 .intr_enable_bit = -1, \
0270 .intr_status_bit = -1, \
0271 .intr_target_bit = -1, \
0272 .intr_target_kpss_val = -1, \
0273 .intr_raw_status_bit = -1, \
0274 .intr_polarity_bit = -1, \
0275 .intr_detection_bit = -1, \
0276 .intr_detection_width = -1, \
0277 }
0278
0279 enum mdm9607_functions {
0280 msm_mux_adsp_ext,
0281 msm_mux_atest_bbrx0,
0282 msm_mux_atest_bbrx1,
0283 msm_mux_atest_char,
0284 msm_mux_atest_char0,
0285 msm_mux_atest_char1,
0286 msm_mux_atest_char2,
0287 msm_mux_atest_char3,
0288 msm_mux_atest_combodac_to_gpio_native,
0289 msm_mux_atest_gpsadc_dtest0_native,
0290 msm_mux_atest_gpsadc_dtest1_native,
0291 msm_mux_atest_tsens,
0292 msm_mux_backlight_en_b,
0293 msm_mux_bimc_dte0,
0294 msm_mux_bimc_dte1,
0295 msm_mux_blsp1_spi,
0296 msm_mux_blsp2_spi,
0297 msm_mux_blsp3_spi,
0298 msm_mux_blsp_i2c1,
0299 msm_mux_blsp_i2c2,
0300 msm_mux_blsp_i2c3,
0301 msm_mux_blsp_i2c4,
0302 msm_mux_blsp_i2c5,
0303 msm_mux_blsp_i2c6,
0304 msm_mux_blsp_spi1,
0305 msm_mux_blsp_spi2,
0306 msm_mux_blsp_spi3,
0307 msm_mux_blsp_spi4,
0308 msm_mux_blsp_spi5,
0309 msm_mux_blsp_spi6,
0310 msm_mux_blsp_uart1,
0311 msm_mux_blsp_uart2,
0312 msm_mux_blsp_uart3,
0313 msm_mux_blsp_uart4,
0314 msm_mux_blsp_uart5,
0315 msm_mux_blsp_uart6,
0316 msm_mux_blsp_uim1,
0317 msm_mux_blsp_uim2,
0318 msm_mux_codec_int,
0319 msm_mux_codec_rst,
0320 msm_mux_coex_uart,
0321 msm_mux_cri_trng,
0322 msm_mux_cri_trng0,
0323 msm_mux_cri_trng1,
0324 msm_mux_dbg_out,
0325 msm_mux_ebi0_wrcdc,
0326 msm_mux_ebi2_a,
0327 msm_mux_ebi2_a_d_8_b,
0328 msm_mux_ebi2_lcd,
0329 msm_mux_ebi2_lcd_cs_n_b,
0330 msm_mux_ebi2_lcd_te_b,
0331 msm_mux_eth_irq,
0332 msm_mux_eth_rst,
0333 msm_mux_gcc_gp1_clk_a,
0334 msm_mux_gcc_gp1_clk_b,
0335 msm_mux_gcc_gp2_clk_a,
0336 msm_mux_gcc_gp2_clk_b,
0337 msm_mux_gcc_gp3_clk_a,
0338 msm_mux_gcc_gp3_clk_b,
0339 msm_mux_gcc_plltest,
0340 msm_mux_gcc_tlmm,
0341 msm_mux_gmac_mdio,
0342 msm_mux_gpio,
0343 msm_mux_gsm0_tx,
0344 msm_mux_lcd_rst,
0345 msm_mux_ldo_en,
0346 msm_mux_ldo_update,
0347 msm_mux_m_voc,
0348 msm_mux_modem_tsync,
0349 msm_mux_nav_ptp_pps_in_a,
0350 msm_mux_nav_ptp_pps_in_b,
0351 msm_mux_nav_tsync_out_a,
0352 msm_mux_nav_tsync_out_b,
0353 msm_mux_pa_indicator,
0354 msm_mux_pbs0,
0355 msm_mux_pbs1,
0356 msm_mux_pbs2,
0357 msm_mux_pri_mi2s_data0_a,
0358 msm_mux_pri_mi2s_data1_a,
0359 msm_mux_pri_mi2s_mclk_a,
0360 msm_mux_pri_mi2s_sck_a,
0361 msm_mux_pri_mi2s_ws_a,
0362 msm_mux_prng_rosc,
0363 msm_mux_ptp_pps_out_a,
0364 msm_mux_ptp_pps_out_b,
0365 msm_mux_pwr_crypto_enabled_a,
0366 msm_mux_pwr_crypto_enabled_b,
0367 msm_mux_pwr_modem_enabled_a,
0368 msm_mux_pwr_modem_enabled_b,
0369 msm_mux_pwr_nav_enabled_a,
0370 msm_mux_pwr_nav_enabled_b,
0371 msm_mux_qdss_cti_trig_in_a0,
0372 msm_mux_qdss_cti_trig_in_a1,
0373 msm_mux_qdss_cti_trig_in_b0,
0374 msm_mux_qdss_cti_trig_in_b1,
0375 msm_mux_qdss_cti_trig_out_a0,
0376 msm_mux_qdss_cti_trig_out_a1,
0377 msm_mux_qdss_cti_trig_out_b0,
0378 msm_mux_qdss_cti_trig_out_b1,
0379 msm_mux_qdss_traceclk_a,
0380 msm_mux_qdss_traceclk_b,
0381 msm_mux_qdss_tracectl_a,
0382 msm_mux_qdss_tracectl_b,
0383 msm_mux_qdss_tracedata_a,
0384 msm_mux_qdss_tracedata_b,
0385 msm_mux_rcm_marker1,
0386 msm_mux_rcm_marker2,
0387 msm_mux_sd_write,
0388 msm_mux_sec_mi2s,
0389 msm_mux_sensor_en,
0390 msm_mux_sensor_int2,
0391 msm_mux_sensor_int3,
0392 msm_mux_sensor_rst,
0393 msm_mux_ssbi1,
0394 msm_mux_ssbi2,
0395 msm_mux_touch_rst,
0396 msm_mux_ts_int,
0397 msm_mux_uim1_clk,
0398 msm_mux_uim1_data,
0399 msm_mux_uim1_present,
0400 msm_mux_uim1_reset,
0401 msm_mux_uim2_clk,
0402 msm_mux_uim2_data,
0403 msm_mux_uim2_present,
0404 msm_mux_uim2_reset,
0405 msm_mux_uim_batt,
0406 msm_mux_wlan_en1,
0407 msm_mux__,
0408 };
0409
0410 static const char * const gpio_groups[] = {
0411 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
0412 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
0413 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
0414 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
0415 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
0416 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
0417 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
0418 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
0419 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
0420 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
0421 "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
0422 "gpio78", "gpio79",
0423 };
0424 static const char * const blsp_spi3_groups[] = {
0425 "gpio0", "gpio1", "gpio2", "gpio3",
0426 };
0427 static const char * const blsp_uart3_groups[] = {
0428 "gpio0", "gpio1", "gpio2", "gpio3",
0429 };
0430 static const char * const qdss_tracedata_a_groups[] = {
0431 "gpio0", "gpio1", "gpio4", "gpio5", "gpio20", "gpio21", "gpio22",
0432 "gpio23", "gpio24", "gpio25", "gpio26", "gpio75", "gpio76", "gpio77",
0433 "gpio78", "gpio79",
0434 };
0435 static const char * const bimc_dte1_groups[] = {
0436 "gpio1", "gpio24",
0437 };
0438 static const char * const blsp_i2c3_groups[] = {
0439 "gpio2", "gpio3",
0440 };
0441 static const char * const qdss_traceclk_a_groups[] = {
0442 "gpio2",
0443 };
0444 static const char * const bimc_dte0_groups[] = {
0445 "gpio2", "gpio15",
0446 };
0447 static const char * const qdss_cti_trig_in_a1_groups[] = {
0448 "gpio3",
0449 };
0450 static const char * const blsp_spi2_groups[] = {
0451 "gpio4", "gpio5", "gpio6", "gpio7",
0452 };
0453 static const char * const blsp_uart2_groups[] = {
0454 "gpio4", "gpio5", "gpio6", "gpio7",
0455 };
0456 static const char * const blsp_uim2_groups[] = {
0457 "gpio4", "gpio5",
0458 };
0459 static const char * const blsp_i2c2_groups[] = {
0460 "gpio6", "gpio7",
0461 };
0462 static const char * const qdss_tracectl_a_groups[] = {
0463 "gpio6",
0464 };
0465 static const char * const sensor_int2_groups[] = {
0466 "gpio8",
0467 };
0468 static const char * const blsp_spi5_groups[] = {
0469 "gpio8", "gpio9", "gpio10", "gpio11",
0470 };
0471 static const char * const blsp_uart5_groups[] = {
0472 "gpio8", "gpio9", "gpio10", "gpio11",
0473 };
0474 static const char * const ebi2_lcd_groups[] = {
0475 "gpio8", "gpio11", "gpio74", "gpio78",
0476 };
0477 static const char * const m_voc_groups[] = {
0478 "gpio8", "gpio78",
0479 };
0480 static const char * const sensor_int3_groups[] = {
0481 "gpio9",
0482 };
0483 static const char * const sensor_en_groups[] = {
0484 "gpio10",
0485 };
0486 static const char * const blsp_i2c5_groups[] = {
0487 "gpio10", "gpio11",
0488 };
0489 static const char * const ebi2_a_groups[] = {
0490 "gpio10",
0491 };
0492 static const char * const qdss_tracedata_b_groups[] = {
0493 "gpio10", "gpio39", "gpio40", "gpio41", "gpio42", "gpio43", "gpio46",
0494 "gpio47", "gpio48", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55",
0495 "gpio58", "gpio59",
0496 };
0497 static const char * const sensor_rst_groups[] = {
0498 "gpio11",
0499 };
0500 static const char * const blsp2_spi_groups[] = {
0501 "gpio11", "gpio13", "gpio77",
0502 };
0503 static const char * const blsp_spi1_groups[] = {
0504 "gpio12", "gpio13", "gpio14", "gpio15",
0505 };
0506 static const char * const blsp_uart1_groups[] = {
0507 "gpio12", "gpio13", "gpio14", "gpio15",
0508 };
0509 static const char * const blsp_uim1_groups[] = {
0510 "gpio12", "gpio13",
0511 };
0512 static const char * const blsp3_spi_groups[] = {
0513 "gpio12", "gpio26", "gpio76",
0514 };
0515 static const char * const gcc_gp2_clk_b_groups[] = {
0516 "gpio12",
0517 };
0518 static const char * const gcc_gp3_clk_b_groups[] = {
0519 "gpio13",
0520 };
0521 static const char * const blsp_i2c1_groups[] = {
0522 "gpio14", "gpio15",
0523 };
0524 static const char * const gcc_gp1_clk_b_groups[] = {
0525 "gpio14",
0526 };
0527 static const char * const blsp_spi4_groups[] = {
0528 "gpio16", "gpio17", "gpio18", "gpio19",
0529 };
0530 static const char * const blsp_uart4_groups[] = {
0531 "gpio16", "gpio17", "gpio18", "gpio19",
0532 };
0533 static const char * const rcm_marker1_groups[] = {
0534 "gpio18",
0535 };
0536 static const char * const blsp_i2c4_groups[] = {
0537 "gpio18", "gpio19",
0538 };
0539 static const char * const qdss_cti_trig_out_a1_groups[] = {
0540 "gpio18",
0541 };
0542 static const char * const rcm_marker2_groups[] = {
0543 "gpio19",
0544 };
0545 static const char * const qdss_cti_trig_out_a0_groups[] = {
0546 "gpio19",
0547 };
0548 static const char * const blsp_spi6_groups[] = {
0549 "gpio20", "gpio21", "gpio22", "gpio23",
0550 };
0551 static const char * const blsp_uart6_groups[] = {
0552 "gpio20", "gpio21", "gpio22", "gpio23",
0553 };
0554 static const char * const pri_mi2s_ws_a_groups[] = {
0555 "gpio20",
0556 };
0557 static const char * const ebi2_lcd_te_b_groups[] = {
0558 "gpio20",
0559 };
0560 static const char * const blsp1_spi_groups[] = {
0561 "gpio20", "gpio21", "gpio78",
0562 };
0563 static const char * const backlight_en_b_groups[] = {
0564 "gpio21",
0565 };
0566 static const char * const pri_mi2s_data0_a_groups[] = {
0567 "gpio21",
0568 };
0569 static const char * const pri_mi2s_data1_a_groups[] = {
0570 "gpio22",
0571 };
0572 static const char * const blsp_i2c6_groups[] = {
0573 "gpio22", "gpio23",
0574 };
0575 static const char * const ebi2_a_d_8_b_groups[] = {
0576 "gpio22",
0577 };
0578 static const char * const pri_mi2s_sck_a_groups[] = {
0579 "gpio23",
0580 };
0581 static const char * const ebi2_lcd_cs_n_b_groups[] = {
0582 "gpio23",
0583 };
0584 static const char * const touch_rst_groups[] = {
0585 "gpio24",
0586 };
0587 static const char * const pri_mi2s_mclk_a_groups[] = {
0588 "gpio24",
0589 };
0590 static const char * const pwr_nav_enabled_a_groups[] = {
0591 "gpio24",
0592 };
0593 static const char * const ts_int_groups[] = {
0594 "gpio25",
0595 };
0596 static const char * const sd_write_groups[] = {
0597 "gpio25",
0598 };
0599 static const char * const pwr_crypto_enabled_a_groups[] = {
0600 "gpio25",
0601 };
0602 static const char * const codec_rst_groups[] = {
0603 "gpio26",
0604 };
0605 static const char * const adsp_ext_groups[] = {
0606 "gpio26",
0607 };
0608 static const char * const atest_combodac_to_gpio_native_groups[] = {
0609 "gpio26", "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
0610 "gpio33", "gpio34", "gpio35", "gpio41", "gpio45", "gpio49", "gpio50",
0611 "gpio51", "gpio52", "gpio54", "gpio55", "gpio57", "gpio59",
0612 };
0613 static const char * const uim2_data_groups[] = {
0614 "gpio27",
0615 };
0616 static const char * const gmac_mdio_groups[] = {
0617 "gpio27", "gpio28",
0618 };
0619 static const char * const gcc_gp1_clk_a_groups[] = {
0620 "gpio27",
0621 };
0622 static const char * const uim2_clk_groups[] = {
0623 "gpio28",
0624 };
0625 static const char * const gcc_gp2_clk_a_groups[] = {
0626 "gpio28",
0627 };
0628 static const char * const eth_irq_groups[] = {
0629 "gpio29",
0630 };
0631 static const char * const uim2_reset_groups[] = {
0632 "gpio29",
0633 };
0634 static const char * const gcc_gp3_clk_a_groups[] = {
0635 "gpio29",
0636 };
0637 static const char * const eth_rst_groups[] = {
0638 "gpio30",
0639 };
0640 static const char * const uim2_present_groups[] = {
0641 "gpio30",
0642 };
0643 static const char * const prng_rosc_groups[] = {
0644 "gpio30",
0645 };
0646 static const char * const uim1_data_groups[] = {
0647 "gpio31",
0648 };
0649 static const char * const uim1_clk_groups[] = {
0650 "gpio32",
0651 };
0652 static const char * const uim1_reset_groups[] = {
0653 "gpio33",
0654 };
0655 static const char * const uim1_present_groups[] = {
0656 "gpio34",
0657 };
0658 static const char * const gcc_plltest_groups[] = {
0659 "gpio34", "gpio35",
0660 };
0661 static const char * const uim_batt_groups[] = {
0662 "gpio35",
0663 };
0664 static const char * const coex_uart_groups[] = {
0665 "gpio36", "gpio37",
0666 };
0667 static const char * const codec_int_groups[] = {
0668 "gpio38",
0669 };
0670 static const char * const qdss_cti_trig_in_a0_groups[] = {
0671 "gpio38",
0672 };
0673 static const char * const atest_bbrx1_groups[] = {
0674 "gpio39",
0675 };
0676 static const char * const cri_trng0_groups[] = {
0677 "gpio40",
0678 };
0679 static const char * const atest_bbrx0_groups[] = {
0680 "gpio40",
0681 };
0682 static const char * const cri_trng_groups[] = {
0683 "gpio42",
0684 };
0685 static const char * const qdss_cti_trig_in_b0_groups[] = {
0686 "gpio44",
0687 };
0688 static const char * const atest_gpsadc_dtest0_native_groups[] = {
0689 "gpio44",
0690 };
0691 static const char * const qdss_cti_trig_out_b0_groups[] = {
0692 "gpio45",
0693 };
0694 static const char * const qdss_tracectl_b_groups[] = {
0695 "gpio49",
0696 };
0697 static const char * const qdss_traceclk_b_groups[] = {
0698 "gpio50",
0699 };
0700 static const char * const pa_indicator_groups[] = {
0701 "gpio51",
0702 };
0703 static const char * const modem_tsync_groups[] = {
0704 "gpio53",
0705 };
0706 static const char * const nav_tsync_out_a_groups[] = {
0707 "gpio53",
0708 };
0709 static const char * const nav_ptp_pps_in_a_groups[] = {
0710 "gpio53",
0711 };
0712 static const char * const ptp_pps_out_a_groups[] = {
0713 "gpio53",
0714 };
0715 static const char * const gsm0_tx_groups[] = {
0716 "gpio55",
0717 };
0718 static const char * const qdss_cti_trig_in_b1_groups[] = {
0719 "gpio56",
0720 };
0721 static const char * const cri_trng1_groups[] = {
0722 "gpio57",
0723 };
0724 static const char * const qdss_cti_trig_out_b1_groups[] = {
0725 "gpio57",
0726 };
0727 static const char * const ssbi1_groups[] = {
0728 "gpio58",
0729 };
0730 static const char * const atest_gpsadc_dtest1_native_groups[] = {
0731 "gpio58",
0732 };
0733 static const char * const ssbi2_groups[] = {
0734 "gpio59",
0735 };
0736 static const char * const atest_char3_groups[] = {
0737 "gpio60",
0738 };
0739 static const char * const atest_char2_groups[] = {
0740 "gpio61",
0741 };
0742 static const char * const atest_char1_groups[] = {
0743 "gpio62",
0744 };
0745 static const char * const atest_char0_groups[] = {
0746 "gpio63",
0747 };
0748 static const char * const atest_char_groups[] = {
0749 "gpio64",
0750 };
0751 static const char * const ebi0_wrcdc_groups[] = {
0752 "gpio70",
0753 };
0754 static const char * const ldo_update_groups[] = {
0755 "gpio72",
0756 };
0757 static const char * const gcc_tlmm_groups[] = {
0758 "gpio72",
0759 };
0760 static const char * const ldo_en_groups[] = {
0761 "gpio73",
0762 };
0763 static const char * const dbg_out_groups[] = {
0764 "gpio73",
0765 };
0766 static const char * const atest_tsens_groups[] = {
0767 "gpio73",
0768 };
0769 static const char * const lcd_rst_groups[] = {
0770 "gpio74",
0771 };
0772 static const char * const wlan_en1_groups[] = {
0773 "gpio75",
0774 };
0775 static const char * const nav_tsync_out_b_groups[] = {
0776 "gpio75",
0777 };
0778 static const char * const nav_ptp_pps_in_b_groups[] = {
0779 "gpio75",
0780 };
0781 static const char * const ptp_pps_out_b_groups[] = {
0782 "gpio75",
0783 };
0784 static const char * const pbs0_groups[] = {
0785 "gpio76",
0786 };
0787 static const char * const sec_mi2s_groups[] = {
0788 "gpio76", "gpio77", "gpio78", "gpio79",
0789 };
0790 static const char * const pwr_modem_enabled_a_groups[] = {
0791 "gpio76",
0792 };
0793 static const char * const pbs1_groups[] = {
0794 "gpio77",
0795 };
0796 static const char * const pwr_modem_enabled_b_groups[] = {
0797 "gpio77",
0798 };
0799 static const char * const pbs2_groups[] = {
0800 "gpio78",
0801 };
0802 static const char * const pwr_nav_enabled_b_groups[] = {
0803 "gpio78",
0804 };
0805 static const char * const pwr_crypto_enabled_b_groups[] = {
0806 "gpio79",
0807 };
0808
0809 static const struct msm_function mdm9607_functions[] = {
0810 FUNCTION(adsp_ext),
0811 FUNCTION(atest_bbrx0),
0812 FUNCTION(atest_bbrx1),
0813 FUNCTION(atest_char),
0814 FUNCTION(atest_char0),
0815 FUNCTION(atest_char1),
0816 FUNCTION(atest_char2),
0817 FUNCTION(atest_char3),
0818 FUNCTION(atest_combodac_to_gpio_native),
0819 FUNCTION(atest_gpsadc_dtest0_native),
0820 FUNCTION(atest_gpsadc_dtest1_native),
0821 FUNCTION(atest_tsens),
0822 FUNCTION(backlight_en_b),
0823 FUNCTION(bimc_dte0),
0824 FUNCTION(bimc_dte1),
0825 FUNCTION(blsp1_spi),
0826 FUNCTION(blsp2_spi),
0827 FUNCTION(blsp3_spi),
0828 FUNCTION(blsp_i2c1),
0829 FUNCTION(blsp_i2c2),
0830 FUNCTION(blsp_i2c3),
0831 FUNCTION(blsp_i2c4),
0832 FUNCTION(blsp_i2c5),
0833 FUNCTION(blsp_i2c6),
0834 FUNCTION(blsp_spi1),
0835 FUNCTION(blsp_spi2),
0836 FUNCTION(blsp_spi3),
0837 FUNCTION(blsp_spi4),
0838 FUNCTION(blsp_spi5),
0839 FUNCTION(blsp_spi6),
0840 FUNCTION(blsp_uart1),
0841 FUNCTION(blsp_uart2),
0842 FUNCTION(blsp_uart3),
0843 FUNCTION(blsp_uart4),
0844 FUNCTION(blsp_uart5),
0845 FUNCTION(blsp_uart6),
0846 FUNCTION(blsp_uim1),
0847 FUNCTION(blsp_uim2),
0848 FUNCTION(codec_int),
0849 FUNCTION(codec_rst),
0850 FUNCTION(coex_uart),
0851 FUNCTION(cri_trng),
0852 FUNCTION(cri_trng0),
0853 FUNCTION(cri_trng1),
0854 FUNCTION(dbg_out),
0855 FUNCTION(ebi0_wrcdc),
0856 FUNCTION(ebi2_a),
0857 FUNCTION(ebi2_a_d_8_b),
0858 FUNCTION(ebi2_lcd),
0859 FUNCTION(ebi2_lcd_cs_n_b),
0860 FUNCTION(ebi2_lcd_te_b),
0861 FUNCTION(eth_irq),
0862 FUNCTION(eth_rst),
0863 FUNCTION(gcc_gp1_clk_a),
0864 FUNCTION(gcc_gp1_clk_b),
0865 FUNCTION(gcc_gp2_clk_a),
0866 FUNCTION(gcc_gp2_clk_b),
0867 FUNCTION(gcc_gp3_clk_a),
0868 FUNCTION(gcc_gp3_clk_b),
0869 FUNCTION(gcc_plltest),
0870 FUNCTION(gcc_tlmm),
0871 FUNCTION(gmac_mdio),
0872 FUNCTION(gpio),
0873 FUNCTION(gsm0_tx),
0874 FUNCTION(lcd_rst),
0875 FUNCTION(ldo_en),
0876 FUNCTION(ldo_update),
0877 FUNCTION(m_voc),
0878 FUNCTION(modem_tsync),
0879 FUNCTION(nav_ptp_pps_in_a),
0880 FUNCTION(nav_ptp_pps_in_b),
0881 FUNCTION(nav_tsync_out_a),
0882 FUNCTION(nav_tsync_out_b),
0883 FUNCTION(pa_indicator),
0884 FUNCTION(pbs0),
0885 FUNCTION(pbs1),
0886 FUNCTION(pbs2),
0887 FUNCTION(pri_mi2s_data0_a),
0888 FUNCTION(pri_mi2s_data1_a),
0889 FUNCTION(pri_mi2s_mclk_a),
0890 FUNCTION(pri_mi2s_sck_a),
0891 FUNCTION(pri_mi2s_ws_a),
0892 FUNCTION(prng_rosc),
0893 FUNCTION(ptp_pps_out_a),
0894 FUNCTION(ptp_pps_out_b),
0895 FUNCTION(pwr_crypto_enabled_a),
0896 FUNCTION(pwr_crypto_enabled_b),
0897 FUNCTION(pwr_modem_enabled_a),
0898 FUNCTION(pwr_modem_enabled_b),
0899 FUNCTION(pwr_nav_enabled_a),
0900 FUNCTION(pwr_nav_enabled_b),
0901 FUNCTION(qdss_cti_trig_in_a0),
0902 FUNCTION(qdss_cti_trig_in_a1),
0903 FUNCTION(qdss_cti_trig_in_b0),
0904 FUNCTION(qdss_cti_trig_in_b1),
0905 FUNCTION(qdss_cti_trig_out_a0),
0906 FUNCTION(qdss_cti_trig_out_a1),
0907 FUNCTION(qdss_cti_trig_out_b0),
0908 FUNCTION(qdss_cti_trig_out_b1),
0909 FUNCTION(qdss_traceclk_a),
0910 FUNCTION(qdss_traceclk_b),
0911 FUNCTION(qdss_tracectl_a),
0912 FUNCTION(qdss_tracectl_b),
0913 FUNCTION(qdss_tracedata_a),
0914 FUNCTION(qdss_tracedata_b),
0915 FUNCTION(rcm_marker1),
0916 FUNCTION(rcm_marker2),
0917 FUNCTION(sd_write),
0918 FUNCTION(sec_mi2s),
0919 FUNCTION(sensor_en),
0920 FUNCTION(sensor_int2),
0921 FUNCTION(sensor_int3),
0922 FUNCTION(sensor_rst),
0923 FUNCTION(ssbi1),
0924 FUNCTION(ssbi2),
0925 FUNCTION(touch_rst),
0926 FUNCTION(ts_int),
0927 FUNCTION(uim1_clk),
0928 FUNCTION(uim1_data),
0929 FUNCTION(uim1_present),
0930 FUNCTION(uim1_reset),
0931 FUNCTION(uim2_clk),
0932 FUNCTION(uim2_data),
0933 FUNCTION(uim2_present),
0934 FUNCTION(uim2_reset),
0935 FUNCTION(uim_batt),
0936 FUNCTION(wlan_en1)
0937 };
0938
0939 static const struct msm_pingroup mdm9607_groups[] = {
0940 PINGROUP(0, blsp_uart3, blsp_spi3, _, _, _, _, _, qdss_tracedata_a, _),
0941 PINGROUP(1, blsp_uart3, blsp_spi3, _, _, _, _, _, qdss_tracedata_a, bimc_dte1),
0942 PINGROUP(2, blsp_uart3, blsp_i2c3, blsp_spi3, _, _, _, _, _, qdss_traceclk_a),
0943 PINGROUP(3, blsp_uart3, blsp_i2c3, blsp_spi3, _, _, _, _, _, _),
0944 PINGROUP(4, blsp_spi2, blsp_uart2, blsp_uim2, _, _, _, _, qdss_tracedata_a, _),
0945 PINGROUP(5, blsp_spi2, blsp_uart2, blsp_uim2, _, _, _, _, qdss_tracedata_a, _),
0946 PINGROUP(6, blsp_spi2, blsp_uart2, blsp_i2c2, _, _, _, _, _, _),
0947 PINGROUP(7, blsp_spi2, blsp_uart2, blsp_i2c2, _, _, _, _, _, _),
0948 PINGROUP(8, blsp_spi5, blsp_uart5, ebi2_lcd, m_voc, _, _, _, _, _),
0949 PINGROUP(9, blsp_spi5, blsp_uart5, _, _, _, _, _, _, _),
0950 PINGROUP(10, blsp_spi5, blsp_i2c5, blsp_uart5, ebi2_a, _, _, qdss_tracedata_b, _, _),
0951 PINGROUP(11, blsp_spi5, blsp_i2c5, blsp_uart5, blsp2_spi, ebi2_lcd, _, _, _, _),
0952 PINGROUP(12, blsp_spi1, blsp_uart1, blsp_uim1, blsp3_spi, gcc_gp2_clk_b, _, _, _, _),
0953 PINGROUP(13, blsp_spi1, blsp_uart1, blsp_uim1, blsp2_spi, gcc_gp3_clk_b, _, _, _, _),
0954 PINGROUP(14, blsp_spi1, blsp_uart1, blsp_i2c1, gcc_gp1_clk_b, _, _, _, _, _),
0955 PINGROUP(15, blsp_spi1, blsp_uart1, blsp_i2c1, _, _, _, _, _, _),
0956 PINGROUP(16, blsp_spi4, blsp_uart4, _, _, _, _, _, _, _),
0957 PINGROUP(17, blsp_spi4, blsp_uart4, _, _, _, _, _, _, _),
0958 PINGROUP(18, blsp_spi4, blsp_uart4, blsp_i2c4, _, _, _, _, _, _),
0959 PINGROUP(19, blsp_spi4, blsp_uart4, blsp_i2c4, _, _, _, _, _, _),
0960 PINGROUP(20, blsp_spi6, blsp_uart6, pri_mi2s_ws_a, ebi2_lcd_te_b, blsp1_spi, _, _, _,
0961 qdss_tracedata_a),
0962 PINGROUP(21, blsp_spi6, blsp_uart6, pri_mi2s_data0_a, blsp1_spi, _, _, _, _, _),
0963 PINGROUP(22, blsp_spi6, blsp_uart6, pri_mi2s_data1_a, blsp_i2c6, ebi2_a_d_8_b, _, _, _, _),
0964 PINGROUP(23, blsp_spi6, blsp_uart6, pri_mi2s_sck_a, blsp_i2c6, ebi2_lcd_cs_n_b, _, _, _, _),
0965 PINGROUP(24, pri_mi2s_mclk_a, _, pwr_nav_enabled_a, _, _, _, _, qdss_tracedata_a,
0966 bimc_dte1),
0967 PINGROUP(25, sd_write, _, pwr_crypto_enabled_a, _, _, _, _, qdss_tracedata_a, _),
0968 PINGROUP(26, blsp3_spi, adsp_ext, _, qdss_tracedata_a, _, atest_combodac_to_gpio_native, _,
0969 _, _),
0970 PINGROUP(27, uim2_data, gmac_mdio, gcc_gp1_clk_a, _, _, atest_combodac_to_gpio_native, _, _,
0971 _),
0972 PINGROUP(28, uim2_clk, gmac_mdio, gcc_gp2_clk_a, _, _, atest_combodac_to_gpio_native, _, _,
0973 _),
0974 PINGROUP(29, uim2_reset, gcc_gp3_clk_a, _, _, atest_combodac_to_gpio_native, _, _, _, _),
0975 PINGROUP(30, uim2_present, prng_rosc, _, _, atest_combodac_to_gpio_native, _, _, _, _),
0976 PINGROUP(31, uim1_data, _, _, atest_combodac_to_gpio_native, _, _, _, _, _),
0977 PINGROUP(32, uim1_clk, _, _, atest_combodac_to_gpio_native, _, _, _, _, _),
0978 PINGROUP(33, uim1_reset, _, _, atest_combodac_to_gpio_native, _, _, _, _, _),
0979 PINGROUP(34, uim1_present, gcc_plltest, _, _, atest_combodac_to_gpio_native, _, _, _, _),
0980 PINGROUP(35, uim_batt, gcc_plltest, _, atest_combodac_to_gpio_native, _, _, _, _, _),
0981 PINGROUP(36, coex_uart, _, _, _, _, _, _, _, _),
0982 PINGROUP(37, coex_uart, _, _, _, _, _, _, _, _),
0983 PINGROUP(38, _, _, _, qdss_cti_trig_in_a0, _, _, _, _, _),
0984 PINGROUP(39, _, _, _, qdss_tracedata_b, _, atest_bbrx1, _, _, _),
0985 PINGROUP(40, _, cri_trng0, _, _, _, _, qdss_tracedata_b, _, atest_bbrx0),
0986 PINGROUP(41, _, _, _, _, _, qdss_tracedata_b, _, atest_combodac_to_gpio_native, _),
0987 PINGROUP(42, _, cri_trng, _, _, qdss_tracedata_b, _, _, _, _),
0988 PINGROUP(43, _, _, _, _, qdss_tracedata_b, _, _, _, _),
0989 PINGROUP(44, _, _, qdss_cti_trig_in_b0, _, atest_gpsadc_dtest0_native, _, _, _, _),
0990 PINGROUP(45, _, _, qdss_cti_trig_out_b0, _, atest_combodac_to_gpio_native, _, _, _, _),
0991 PINGROUP(46, _, _, qdss_tracedata_b, _, _, _, _, _, _),
0992 PINGROUP(47, _, _, qdss_tracedata_b, _, _, _, _, _, _),
0993 PINGROUP(48, _, _, qdss_tracedata_b, _, _, _, _, _, _),
0994 PINGROUP(49, _, _, qdss_tracectl_b, _, atest_combodac_to_gpio_native, _, _, _, _),
0995 PINGROUP(50, _, _, qdss_traceclk_b, _, atest_combodac_to_gpio_native, _, _, _, _),
0996 PINGROUP(51, _, pa_indicator, _, qdss_tracedata_b, _, atest_combodac_to_gpio_native, _, _,
0997 _),
0998 PINGROUP(52, _, _, _, qdss_tracedata_b, _, atest_combodac_to_gpio_native, _, _, _),
0999 PINGROUP(53, _, modem_tsync, nav_tsync_out_a, nav_ptp_pps_in_a, ptp_pps_out_a,
1000 qdss_tracedata_b, _, _, _),
1001 PINGROUP(54, _, qdss_tracedata_b, _, atest_combodac_to_gpio_native, _, _, _, _, _),
1002 PINGROUP(55, gsm0_tx, _, qdss_tracedata_b, _, atest_combodac_to_gpio_native, _, _, _, _),
1003 PINGROUP(56, _, _, qdss_cti_trig_in_b1, _, _, _, _, _, _),
1004 PINGROUP(57, _, cri_trng1, _, qdss_cti_trig_out_b1, _, atest_combodac_to_gpio_native, _, _,
1005 _),
1006 PINGROUP(58, _, ssbi1, _, qdss_tracedata_b, _, atest_gpsadc_dtest1_native, _, _, _),
1007 PINGROUP(59, _, ssbi2, _, qdss_tracedata_b, _, atest_combodac_to_gpio_native, _, _, _),
1008 PINGROUP(60, atest_char3, _, _, _, _, _, _, _, _),
1009 PINGROUP(61, atest_char2, _, _, _, _, _, _, _, _),
1010 PINGROUP(62, atest_char1, _, _, _, _, _, _, _, _),
1011 PINGROUP(63, atest_char0, _, _, _, _, _, _, _, _),
1012 PINGROUP(64, atest_char, _, _, _, _, _, _, _, _),
1013 PINGROUP(65, _, _, _, _, _, _, _, _, _),
1014 PINGROUP(66, _, _, _, _, _, _, _, _, _),
1015 PINGROUP(67, _, _, _, _, _, _, _, _, _),
1016 PINGROUP(68, _, _, _, _, _, _, _, _, _),
1017 PINGROUP(69, _, _, _, _, _, _, _, _, _),
1018 PINGROUP(70, _, _, ebi0_wrcdc, _, _, _, _, _, _),
1019 PINGROUP(71, _, _, _, _, _, _, _, _, _),
1020 PINGROUP(72, ldo_update, _, gcc_tlmm, _, _, _, _, _, _),
1021 PINGROUP(73, ldo_en, dbg_out, _, _, _, atest_tsens, _, _, _),
1022 PINGROUP(74, ebi2_lcd, _, _, _, _, _, _, _, _),
1023 PINGROUP(75, nav_tsync_out_b, nav_ptp_pps_in_b, ptp_pps_out_b, _, qdss_tracedata_a, _, _, _,
1024 _),
1025 PINGROUP(76, pbs0, sec_mi2s, blsp3_spi, pwr_modem_enabled_a, _, qdss_tracedata_a, _, _, _),
1026 PINGROUP(77, pbs1, sec_mi2s, blsp2_spi, pwr_modem_enabled_b, _, qdss_tracedata_a, _, _, _),
1027 PINGROUP(78, pbs2, sec_mi2s, blsp1_spi, ebi2_lcd, m_voc, pwr_nav_enabled_b, _,
1028 qdss_tracedata_a, _),
1029 PINGROUP(79, sec_mi2s, _, pwr_crypto_enabled_b, _, qdss_tracedata_a, _, _, _, _),
1030 SDC_PINGROUP(sdc1_clk, 0x10a000, 13, 6),
1031 SDC_PINGROUP(sdc1_cmd, 0x10a000, 11, 3),
1032 SDC_PINGROUP(sdc1_data, 0x10a000, 9, 0),
1033 SDC_PINGROUP(sdc2_clk, 0x109000, 14, 6),
1034 SDC_PINGROUP(sdc2_cmd, 0x109000, 11, 3),
1035 SDC_PINGROUP(sdc2_data, 0x109000, 9, 0),
1036 SDC_PINGROUP(qdsd_clk, 0x19c000, 3, 0),
1037 SDC_PINGROUP(qdsd_cmd, 0x19c000, 8, 5),
1038 SDC_PINGROUP(qdsd_data0, 0x19c000, 13, 10),
1039 SDC_PINGROUP(qdsd_data1, 0x19c000, 18, 15),
1040 SDC_PINGROUP(qdsd_data2, 0x19c000, 23, 20),
1041 SDC_PINGROUP(qdsd_data3, 0x19c000, 28, 25),
1042 };
1043
1044 static const struct msm_pinctrl_soc_data mdm9607_pinctrl = {
1045 .pins = mdm9607_pins,
1046 .npins = ARRAY_SIZE(mdm9607_pins),
1047 .functions = mdm9607_functions,
1048 .nfunctions = ARRAY_SIZE(mdm9607_functions),
1049 .groups = mdm9607_groups,
1050 .ngroups = ARRAY_SIZE(mdm9607_groups),
1051 .ngpios = 80,
1052 };
1053
1054 static int mdm9607_pinctrl_probe(struct platform_device *pdev)
1055 {
1056 return msm_pinctrl_probe(pdev, &mdm9607_pinctrl);
1057 }
1058
1059 static const struct of_device_id mdm9607_pinctrl_of_match[] = {
1060 { .compatible = "qcom,mdm9607-tlmm", },
1061 { }
1062 };
1063
1064 static struct platform_driver mdm9607_pinctrl_driver = {
1065 .driver = {
1066 .name = "mdm9607-pinctrl",
1067 .of_match_table = mdm9607_pinctrl_of_match,
1068 },
1069 .probe = mdm9607_pinctrl_probe,
1070 .remove = msm_pinctrl_remove,
1071 };
1072
1073 static int __init mdm9607_pinctrl_init(void)
1074 {
1075 return platform_driver_register(&mdm9607_pinctrl_driver);
1076 }
1077 arch_initcall(mdm9607_pinctrl_init);
1078
1079 static void __exit mdm9607_pinctrl_exit(void)
1080 {
1081 platform_driver_unregister(&mdm9607_pinctrl_driver);
1082 }
1083 module_exit(mdm9607_pinctrl_exit);
1084
1085 MODULE_DESCRIPTION("Qualcomm mdm9607 pinctrl driver");
1086 MODULE_LICENSE("GPL v2");
1087 MODULE_DEVICE_TABLE(of, mdm9607_pinctrl_of_match);
