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OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (c) 2014, The Linux Foundation. All rights reserved.
0004  */
0005 
0006 #include <linux/module.h>
0007 #include <linux/of.h>
0008 #include <linux/platform_device.h>
0009 #include <linux/pinctrl/pinctrl.h>
0010 
0011 #include "pinctrl-msm.h"
0012 
0013 static const struct pinctrl_pin_desc apq8084_pins[] = {
0014     PINCTRL_PIN(0, "GPIO_0"),
0015     PINCTRL_PIN(1, "GPIO_1"),
0016     PINCTRL_PIN(2, "GPIO_2"),
0017     PINCTRL_PIN(3, "GPIO_3"),
0018     PINCTRL_PIN(4, "GPIO_4"),
0019     PINCTRL_PIN(5, "GPIO_5"),
0020     PINCTRL_PIN(6, "GPIO_6"),
0021     PINCTRL_PIN(7, "GPIO_7"),
0022     PINCTRL_PIN(8, "GPIO_8"),
0023     PINCTRL_PIN(9, "GPIO_9"),
0024     PINCTRL_PIN(10, "GPIO_10"),
0025     PINCTRL_PIN(11, "GPIO_11"),
0026     PINCTRL_PIN(12, "GPIO_12"),
0027     PINCTRL_PIN(13, "GPIO_13"),
0028     PINCTRL_PIN(14, "GPIO_14"),
0029     PINCTRL_PIN(15, "GPIO_15"),
0030     PINCTRL_PIN(16, "GPIO_16"),
0031     PINCTRL_PIN(17, "GPIO_17"),
0032     PINCTRL_PIN(18, "GPIO_18"),
0033     PINCTRL_PIN(19, "GPIO_19"),
0034     PINCTRL_PIN(20, "GPIO_20"),
0035     PINCTRL_PIN(21, "GPIO_21"),
0036     PINCTRL_PIN(22, "GPIO_22"),
0037     PINCTRL_PIN(23, "GPIO_23"),
0038     PINCTRL_PIN(24, "GPIO_24"),
0039     PINCTRL_PIN(25, "GPIO_25"),
0040     PINCTRL_PIN(26, "GPIO_26"),
0041     PINCTRL_PIN(27, "GPIO_27"),
0042     PINCTRL_PIN(28, "GPIO_28"),
0043     PINCTRL_PIN(29, "GPIO_29"),
0044     PINCTRL_PIN(30, "GPIO_30"),
0045     PINCTRL_PIN(31, "GPIO_31"),
0046     PINCTRL_PIN(32, "GPIO_32"),
0047     PINCTRL_PIN(33, "GPIO_33"),
0048     PINCTRL_PIN(34, "GPIO_34"),
0049     PINCTRL_PIN(35, "GPIO_35"),
0050     PINCTRL_PIN(36, "GPIO_36"),
0051     PINCTRL_PIN(37, "GPIO_37"),
0052     PINCTRL_PIN(38, "GPIO_38"),
0053     PINCTRL_PIN(39, "GPIO_39"),
0054     PINCTRL_PIN(40, "GPIO_40"),
0055     PINCTRL_PIN(41, "GPIO_41"),
0056     PINCTRL_PIN(42, "GPIO_42"),
0057     PINCTRL_PIN(43, "GPIO_43"),
0058     PINCTRL_PIN(44, "GPIO_44"),
0059     PINCTRL_PIN(45, "GPIO_45"),
0060     PINCTRL_PIN(46, "GPIO_46"),
0061     PINCTRL_PIN(47, "GPIO_47"),
0062     PINCTRL_PIN(48, "GPIO_48"),
0063     PINCTRL_PIN(49, "GPIO_49"),
0064     PINCTRL_PIN(50, "GPIO_50"),
0065     PINCTRL_PIN(51, "GPIO_51"),
0066     PINCTRL_PIN(52, "GPIO_52"),
0067     PINCTRL_PIN(53, "GPIO_53"),
0068     PINCTRL_PIN(54, "GPIO_54"),
0069     PINCTRL_PIN(55, "GPIO_55"),
0070     PINCTRL_PIN(56, "GPIO_56"),
0071     PINCTRL_PIN(57, "GPIO_57"),
0072     PINCTRL_PIN(58, "GPIO_58"),
0073     PINCTRL_PIN(59, "GPIO_59"),
0074     PINCTRL_PIN(60, "GPIO_60"),
0075     PINCTRL_PIN(61, "GPIO_61"),
0076     PINCTRL_PIN(62, "GPIO_62"),
0077     PINCTRL_PIN(63, "GPIO_63"),
0078     PINCTRL_PIN(64, "GPIO_64"),
0079     PINCTRL_PIN(65, "GPIO_65"),
0080     PINCTRL_PIN(66, "GPIO_66"),
0081     PINCTRL_PIN(67, "GPIO_67"),
0082     PINCTRL_PIN(68, "GPIO_68"),
0083     PINCTRL_PIN(69, "GPIO_69"),
0084     PINCTRL_PIN(70, "GPIO_70"),
0085     PINCTRL_PIN(71, "GPIO_71"),
0086     PINCTRL_PIN(72, "GPIO_72"),
0087     PINCTRL_PIN(73, "GPIO_73"),
0088     PINCTRL_PIN(74, "GPIO_74"),
0089     PINCTRL_PIN(75, "GPIO_75"),
0090     PINCTRL_PIN(76, "GPIO_76"),
0091     PINCTRL_PIN(77, "GPIO_77"),
0092     PINCTRL_PIN(78, "GPIO_78"),
0093     PINCTRL_PIN(79, "GPIO_79"),
0094     PINCTRL_PIN(80, "GPIO_80"),
0095     PINCTRL_PIN(81, "GPIO_81"),
0096     PINCTRL_PIN(82, "GPIO_82"),
0097     PINCTRL_PIN(83, "GPIO_83"),
0098     PINCTRL_PIN(84, "GPIO_84"),
0099     PINCTRL_PIN(85, "GPIO_85"),
0100     PINCTRL_PIN(86, "GPIO_86"),
0101     PINCTRL_PIN(87, "GPIO_87"),
0102     PINCTRL_PIN(88, "GPIO_88"),
0103     PINCTRL_PIN(89, "GPIO_89"),
0104     PINCTRL_PIN(90, "GPIO_90"),
0105     PINCTRL_PIN(91, "GPIO_91"),
0106     PINCTRL_PIN(92, "GPIO_92"),
0107     PINCTRL_PIN(93, "GPIO_93"),
0108     PINCTRL_PIN(94, "GPIO_94"),
0109     PINCTRL_PIN(95, "GPIO_95"),
0110     PINCTRL_PIN(96, "GPIO_96"),
0111     PINCTRL_PIN(97, "GPIO_97"),
0112     PINCTRL_PIN(98, "GPIO_98"),
0113     PINCTRL_PIN(99, "GPIO_99"),
0114     PINCTRL_PIN(100, "GPIO_100"),
0115     PINCTRL_PIN(101, "GPIO_101"),
0116     PINCTRL_PIN(102, "GPIO_102"),
0117     PINCTRL_PIN(103, "GPIO_103"),
0118     PINCTRL_PIN(104, "GPIO_104"),
0119     PINCTRL_PIN(105, "GPIO_105"),
0120     PINCTRL_PIN(106, "GPIO_106"),
0121     PINCTRL_PIN(107, "GPIO_107"),
0122     PINCTRL_PIN(108, "GPIO_108"),
0123     PINCTRL_PIN(109, "GPIO_109"),
0124     PINCTRL_PIN(110, "GPIO_110"),
0125     PINCTRL_PIN(111, "GPIO_111"),
0126     PINCTRL_PIN(112, "GPIO_112"),
0127     PINCTRL_PIN(113, "GPIO_113"),
0128     PINCTRL_PIN(114, "GPIO_114"),
0129     PINCTRL_PIN(115, "GPIO_115"),
0130     PINCTRL_PIN(116, "GPIO_116"),
0131     PINCTRL_PIN(117, "GPIO_117"),
0132     PINCTRL_PIN(118, "GPIO_118"),
0133     PINCTRL_PIN(119, "GPIO_119"),
0134     PINCTRL_PIN(120, "GPIO_120"),
0135     PINCTRL_PIN(121, "GPIO_121"),
0136     PINCTRL_PIN(122, "GPIO_122"),
0137     PINCTRL_PIN(123, "GPIO_123"),
0138     PINCTRL_PIN(124, "GPIO_124"),
0139     PINCTRL_PIN(125, "GPIO_125"),
0140     PINCTRL_PIN(126, "GPIO_126"),
0141     PINCTRL_PIN(127, "GPIO_127"),
0142     PINCTRL_PIN(128, "GPIO_128"),
0143     PINCTRL_PIN(129, "GPIO_129"),
0144     PINCTRL_PIN(130, "GPIO_130"),
0145     PINCTRL_PIN(131, "GPIO_131"),
0146     PINCTRL_PIN(132, "GPIO_132"),
0147     PINCTRL_PIN(133, "GPIO_133"),
0148     PINCTRL_PIN(134, "GPIO_134"),
0149     PINCTRL_PIN(135, "GPIO_135"),
0150     PINCTRL_PIN(136, "GPIO_136"),
0151     PINCTRL_PIN(137, "GPIO_137"),
0152     PINCTRL_PIN(138, "GPIO_138"),
0153     PINCTRL_PIN(139, "GPIO_139"),
0154     PINCTRL_PIN(140, "GPIO_140"),
0155     PINCTRL_PIN(141, "GPIO_141"),
0156     PINCTRL_PIN(142, "GPIO_142"),
0157     PINCTRL_PIN(143, "GPIO_143"),
0158     PINCTRL_PIN(144, "GPIO_144"),
0159     PINCTRL_PIN(145, "GPIO_145"),
0160     PINCTRL_PIN(146, "GPIO_146"),
0161 
0162     PINCTRL_PIN(147, "SDC1_CLK"),
0163     PINCTRL_PIN(148, "SDC1_CMD"),
0164     PINCTRL_PIN(149, "SDC1_DATA"),
0165     PINCTRL_PIN(150, "SDC2_CLK"),
0166     PINCTRL_PIN(151, "SDC2_CMD"),
0167     PINCTRL_PIN(152, "SDC2_DATA"),
0168 };
0169 
0170 #define DECLARE_APQ_GPIO_PINS(pin) static const unsigned int gpio##pin##_pins[] = { pin }
0171 
0172 DECLARE_APQ_GPIO_PINS(0);
0173 DECLARE_APQ_GPIO_PINS(1);
0174 DECLARE_APQ_GPIO_PINS(2);
0175 DECLARE_APQ_GPIO_PINS(3);
0176 DECLARE_APQ_GPIO_PINS(4);
0177 DECLARE_APQ_GPIO_PINS(5);
0178 DECLARE_APQ_GPIO_PINS(6);
0179 DECLARE_APQ_GPIO_PINS(7);
0180 DECLARE_APQ_GPIO_PINS(8);
0181 DECLARE_APQ_GPIO_PINS(9);
0182 DECLARE_APQ_GPIO_PINS(10);
0183 DECLARE_APQ_GPIO_PINS(11);
0184 DECLARE_APQ_GPIO_PINS(12);
0185 DECLARE_APQ_GPIO_PINS(13);
0186 DECLARE_APQ_GPIO_PINS(14);
0187 DECLARE_APQ_GPIO_PINS(15);
0188 DECLARE_APQ_GPIO_PINS(16);
0189 DECLARE_APQ_GPIO_PINS(17);
0190 DECLARE_APQ_GPIO_PINS(18);
0191 DECLARE_APQ_GPIO_PINS(19);
0192 DECLARE_APQ_GPIO_PINS(20);
0193 DECLARE_APQ_GPIO_PINS(21);
0194 DECLARE_APQ_GPIO_PINS(22);
0195 DECLARE_APQ_GPIO_PINS(23);
0196 DECLARE_APQ_GPIO_PINS(24);
0197 DECLARE_APQ_GPIO_PINS(25);
0198 DECLARE_APQ_GPIO_PINS(26);
0199 DECLARE_APQ_GPIO_PINS(27);
0200 DECLARE_APQ_GPIO_PINS(28);
0201 DECLARE_APQ_GPIO_PINS(29);
0202 DECLARE_APQ_GPIO_PINS(30);
0203 DECLARE_APQ_GPIO_PINS(31);
0204 DECLARE_APQ_GPIO_PINS(32);
0205 DECLARE_APQ_GPIO_PINS(33);
0206 DECLARE_APQ_GPIO_PINS(34);
0207 DECLARE_APQ_GPIO_PINS(35);
0208 DECLARE_APQ_GPIO_PINS(36);
0209 DECLARE_APQ_GPIO_PINS(37);
0210 DECLARE_APQ_GPIO_PINS(38);
0211 DECLARE_APQ_GPIO_PINS(39);
0212 DECLARE_APQ_GPIO_PINS(40);
0213 DECLARE_APQ_GPIO_PINS(41);
0214 DECLARE_APQ_GPIO_PINS(42);
0215 DECLARE_APQ_GPIO_PINS(43);
0216 DECLARE_APQ_GPIO_PINS(44);
0217 DECLARE_APQ_GPIO_PINS(45);
0218 DECLARE_APQ_GPIO_PINS(46);
0219 DECLARE_APQ_GPIO_PINS(47);
0220 DECLARE_APQ_GPIO_PINS(48);
0221 DECLARE_APQ_GPIO_PINS(49);
0222 DECLARE_APQ_GPIO_PINS(50);
0223 DECLARE_APQ_GPIO_PINS(51);
0224 DECLARE_APQ_GPIO_PINS(52);
0225 DECLARE_APQ_GPIO_PINS(53);
0226 DECLARE_APQ_GPIO_PINS(54);
0227 DECLARE_APQ_GPIO_PINS(55);
0228 DECLARE_APQ_GPIO_PINS(56);
0229 DECLARE_APQ_GPIO_PINS(57);
0230 DECLARE_APQ_GPIO_PINS(58);
0231 DECLARE_APQ_GPIO_PINS(59);
0232 DECLARE_APQ_GPIO_PINS(60);
0233 DECLARE_APQ_GPIO_PINS(61);
0234 DECLARE_APQ_GPIO_PINS(62);
0235 DECLARE_APQ_GPIO_PINS(63);
0236 DECLARE_APQ_GPIO_PINS(64);
0237 DECLARE_APQ_GPIO_PINS(65);
0238 DECLARE_APQ_GPIO_PINS(66);
0239 DECLARE_APQ_GPIO_PINS(67);
0240 DECLARE_APQ_GPIO_PINS(68);
0241 DECLARE_APQ_GPIO_PINS(69);
0242 DECLARE_APQ_GPIO_PINS(70);
0243 DECLARE_APQ_GPIO_PINS(71);
0244 DECLARE_APQ_GPIO_PINS(72);
0245 DECLARE_APQ_GPIO_PINS(73);
0246 DECLARE_APQ_GPIO_PINS(74);
0247 DECLARE_APQ_GPIO_PINS(75);
0248 DECLARE_APQ_GPIO_PINS(76);
0249 DECLARE_APQ_GPIO_PINS(77);
0250 DECLARE_APQ_GPIO_PINS(78);
0251 DECLARE_APQ_GPIO_PINS(79);
0252 DECLARE_APQ_GPIO_PINS(80);
0253 DECLARE_APQ_GPIO_PINS(81);
0254 DECLARE_APQ_GPIO_PINS(82);
0255 DECLARE_APQ_GPIO_PINS(83);
0256 DECLARE_APQ_GPIO_PINS(84);
0257 DECLARE_APQ_GPIO_PINS(85);
0258 DECLARE_APQ_GPIO_PINS(86);
0259 DECLARE_APQ_GPIO_PINS(87);
0260 DECLARE_APQ_GPIO_PINS(88);
0261 DECLARE_APQ_GPIO_PINS(89);
0262 DECLARE_APQ_GPIO_PINS(90);
0263 DECLARE_APQ_GPIO_PINS(91);
0264 DECLARE_APQ_GPIO_PINS(92);
0265 DECLARE_APQ_GPIO_PINS(93);
0266 DECLARE_APQ_GPIO_PINS(94);
0267 DECLARE_APQ_GPIO_PINS(95);
0268 DECLARE_APQ_GPIO_PINS(96);
0269 DECLARE_APQ_GPIO_PINS(97);
0270 DECLARE_APQ_GPIO_PINS(98);
0271 DECLARE_APQ_GPIO_PINS(99);
0272 DECLARE_APQ_GPIO_PINS(100);
0273 DECLARE_APQ_GPIO_PINS(101);
0274 DECLARE_APQ_GPIO_PINS(102);
0275 DECLARE_APQ_GPIO_PINS(103);
0276 DECLARE_APQ_GPIO_PINS(104);
0277 DECLARE_APQ_GPIO_PINS(105);
0278 DECLARE_APQ_GPIO_PINS(106);
0279 DECLARE_APQ_GPIO_PINS(107);
0280 DECLARE_APQ_GPIO_PINS(108);
0281 DECLARE_APQ_GPIO_PINS(109);
0282 DECLARE_APQ_GPIO_PINS(110);
0283 DECLARE_APQ_GPIO_PINS(111);
0284 DECLARE_APQ_GPIO_PINS(112);
0285 DECLARE_APQ_GPIO_PINS(113);
0286 DECLARE_APQ_GPIO_PINS(114);
0287 DECLARE_APQ_GPIO_PINS(115);
0288 DECLARE_APQ_GPIO_PINS(116);
0289 DECLARE_APQ_GPIO_PINS(117);
0290 DECLARE_APQ_GPIO_PINS(118);
0291 DECLARE_APQ_GPIO_PINS(119);
0292 DECLARE_APQ_GPIO_PINS(120);
0293 DECLARE_APQ_GPIO_PINS(121);
0294 DECLARE_APQ_GPIO_PINS(122);
0295 DECLARE_APQ_GPIO_PINS(123);
0296 DECLARE_APQ_GPIO_PINS(124);
0297 DECLARE_APQ_GPIO_PINS(125);
0298 DECLARE_APQ_GPIO_PINS(126);
0299 DECLARE_APQ_GPIO_PINS(127);
0300 DECLARE_APQ_GPIO_PINS(128);
0301 DECLARE_APQ_GPIO_PINS(129);
0302 DECLARE_APQ_GPIO_PINS(130);
0303 DECLARE_APQ_GPIO_PINS(131);
0304 DECLARE_APQ_GPIO_PINS(132);
0305 DECLARE_APQ_GPIO_PINS(133);
0306 DECLARE_APQ_GPIO_PINS(134);
0307 DECLARE_APQ_GPIO_PINS(135);
0308 DECLARE_APQ_GPIO_PINS(136);
0309 DECLARE_APQ_GPIO_PINS(137);
0310 DECLARE_APQ_GPIO_PINS(138);
0311 DECLARE_APQ_GPIO_PINS(139);
0312 DECLARE_APQ_GPIO_PINS(140);
0313 DECLARE_APQ_GPIO_PINS(141);
0314 DECLARE_APQ_GPIO_PINS(142);
0315 DECLARE_APQ_GPIO_PINS(143);
0316 DECLARE_APQ_GPIO_PINS(144);
0317 DECLARE_APQ_GPIO_PINS(145);
0318 DECLARE_APQ_GPIO_PINS(146);
0319 
0320 static const unsigned int sdc1_clk_pins[] = { 147 };
0321 static const unsigned int sdc1_cmd_pins[] = { 148 };
0322 static const unsigned int sdc1_data_pins[] = { 149 };
0323 static const unsigned int sdc2_clk_pins[] = { 150 };
0324 static const unsigned int sdc2_cmd_pins[] = { 151 };
0325 static const unsigned int sdc2_data_pins[] = { 152 };
0326 
0327 #define FUNCTION(fname)                 \
0328     [APQ_MUX_##fname] = {               \
0329         .name = #fname,             \
0330         .groups = fname##_groups,       \
0331         .ngroups = ARRAY_SIZE(fname##_groups),  \
0332     }
0333 
0334 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7)        \
0335     {                       \
0336         .name = "gpio" #id,         \
0337         .pins = gpio##id##_pins,        \
0338         .npins = ARRAY_SIZE(gpio##id##_pins),   \
0339         .funcs = (int[]){           \
0340             APQ_MUX_gpio,           \
0341             APQ_MUX_##f1,           \
0342             APQ_MUX_##f2,           \
0343             APQ_MUX_##f3,           \
0344             APQ_MUX_##f4,           \
0345             APQ_MUX_##f5,           \
0346             APQ_MUX_##f6,           \
0347             APQ_MUX_##f7            \
0348         },                  \
0349         .nfuncs = 8,                \
0350         .ctl_reg = 0x1000 + 0x10 * id,      \
0351         .io_reg = 0x1004 + 0x10 * id,       \
0352         .intr_cfg_reg = 0x1008 + 0x10 * id, \
0353         .intr_status_reg = 0x100c + 0x10 * id,  \
0354         .intr_target_reg = 0x1008 + 0x10 * id,  \
0355         .mux_bit = 2,               \
0356         .pull_bit = 0,              \
0357         .drv_bit = 6,               \
0358         .oe_bit = 9,                \
0359         .in_bit = 0,                \
0360         .out_bit = 1,               \
0361         .intr_enable_bit = 0,           \
0362         .intr_status_bit = 0,           \
0363         .intr_ack_high = 0,         \
0364         .intr_target_bit = 5,           \
0365         .intr_target_kpss_val = 3,      \
0366         .intr_raw_status_bit = 4,       \
0367         .intr_polarity_bit = 1,         \
0368         .intr_detection_bit = 2,        \
0369         .intr_detection_width = 2,      \
0370     }
0371 
0372 #define SDC_PINGROUP(pg_name, ctl, pull, drv)       \
0373     {                       \
0374         .name = #pg_name,                   \
0375         .pins = pg_name##_pins,                 \
0376         .npins = ARRAY_SIZE(pg_name##_pins),    \
0377         .ctl_reg = ctl,                         \
0378         .io_reg = 0,                            \
0379         .intr_cfg_reg = 0,                      \
0380         .intr_status_reg = 0,                   \
0381         .intr_target_reg = 0,                   \
0382         .mux_bit = -1,                          \
0383         .pull_bit = pull,                       \
0384         .drv_bit = drv,                         \
0385         .oe_bit = -1,                           \
0386         .in_bit = -1,                           \
0387         .out_bit = -1,                          \
0388         .intr_enable_bit = -1,                  \
0389         .intr_status_bit = -1,                  \
0390         .intr_target_bit = -1,                  \
0391         .intr_target_kpss_val = -1,     \
0392         .intr_raw_status_bit = -1,              \
0393         .intr_polarity_bit = -1,                \
0394         .intr_detection_bit = -1,               \
0395         .intr_detection_width = -1,             \
0396     }
0397 
0398 enum apq8084_functions {
0399     APQ_MUX_adsp_ext,
0400     APQ_MUX_audio_ref,
0401     APQ_MUX_blsp_i2c1,
0402     APQ_MUX_blsp_i2c2,
0403     APQ_MUX_blsp_i2c3,
0404     APQ_MUX_blsp_i2c4,
0405     APQ_MUX_blsp_i2c5,
0406     APQ_MUX_blsp_i2c6,
0407     APQ_MUX_blsp_i2c7,
0408     APQ_MUX_blsp_i2c8,
0409     APQ_MUX_blsp_i2c9,
0410     APQ_MUX_blsp_i2c10,
0411     APQ_MUX_blsp_i2c11,
0412     APQ_MUX_blsp_i2c12,
0413     APQ_MUX_blsp_spi1,
0414     APQ_MUX_blsp_spi1_cs1,
0415     APQ_MUX_blsp_spi1_cs2,
0416     APQ_MUX_blsp_spi1_cs3,
0417     APQ_MUX_blsp_spi2,
0418     APQ_MUX_blsp_spi3,
0419     APQ_MUX_blsp_spi3_cs1,
0420     APQ_MUX_blsp_spi3_cs2,
0421     APQ_MUX_blsp_spi3_cs3,
0422     APQ_MUX_blsp_spi4,
0423     APQ_MUX_blsp_spi5,
0424     APQ_MUX_blsp_spi6,
0425     APQ_MUX_blsp_spi7,
0426     APQ_MUX_blsp_spi8,
0427     APQ_MUX_blsp_spi9,
0428     APQ_MUX_blsp_spi10,
0429     APQ_MUX_blsp_spi10_cs1,
0430     APQ_MUX_blsp_spi10_cs2,
0431     APQ_MUX_blsp_spi10_cs3,
0432     APQ_MUX_blsp_spi11,
0433     APQ_MUX_blsp_spi12,
0434     APQ_MUX_blsp_uart1,
0435     APQ_MUX_blsp_uart2,
0436     APQ_MUX_blsp_uart3,
0437     APQ_MUX_blsp_uart4,
0438     APQ_MUX_blsp_uart5,
0439     APQ_MUX_blsp_uart6,
0440     APQ_MUX_blsp_uart7,
0441     APQ_MUX_blsp_uart8,
0442     APQ_MUX_blsp_uart9,
0443     APQ_MUX_blsp_uart10,
0444     APQ_MUX_blsp_uart11,
0445     APQ_MUX_blsp_uart12,
0446     APQ_MUX_blsp_uim1,
0447     APQ_MUX_blsp_uim2,
0448     APQ_MUX_blsp_uim3,
0449     APQ_MUX_blsp_uim4,
0450     APQ_MUX_blsp_uim5,
0451     APQ_MUX_blsp_uim6,
0452     APQ_MUX_blsp_uim7,
0453     APQ_MUX_blsp_uim8,
0454     APQ_MUX_blsp_uim9,
0455     APQ_MUX_blsp_uim10,
0456     APQ_MUX_blsp_uim11,
0457     APQ_MUX_blsp_uim12,
0458     APQ_MUX_cam_mclk0,
0459     APQ_MUX_cam_mclk1,
0460     APQ_MUX_cam_mclk2,
0461     APQ_MUX_cam_mclk3,
0462     APQ_MUX_cci_async,
0463     APQ_MUX_cci_async_in0,
0464     APQ_MUX_cci_i2c0,
0465     APQ_MUX_cci_i2c1,
0466     APQ_MUX_cci_timer0,
0467     APQ_MUX_cci_timer1,
0468     APQ_MUX_cci_timer2,
0469     APQ_MUX_cci_timer3,
0470     APQ_MUX_cci_timer4,
0471     APQ_MUX_edp_hpd,
0472     APQ_MUX_gcc_gp1,
0473     APQ_MUX_gcc_gp2,
0474     APQ_MUX_gcc_gp3,
0475     APQ_MUX_gcc_obt,
0476     APQ_MUX_gcc_vtt,
0477     APQ_MUX_gp_mn,
0478     APQ_MUX_gp_pdm0,
0479     APQ_MUX_gp_pdm1,
0480     APQ_MUX_gp_pdm2,
0481     APQ_MUX_gp0_clk,
0482     APQ_MUX_gp1_clk,
0483     APQ_MUX_gpio,
0484     APQ_MUX_hdmi_cec,
0485     APQ_MUX_hdmi_ddc,
0486     APQ_MUX_hdmi_dtest,
0487     APQ_MUX_hdmi_hpd,
0488     APQ_MUX_hdmi_rcv,
0489     APQ_MUX_hsic,
0490     APQ_MUX_ldo_en,
0491     APQ_MUX_ldo_update,
0492     APQ_MUX_mdp_vsync,
0493     APQ_MUX_pci_e0,
0494     APQ_MUX_pci_e0_n,
0495     APQ_MUX_pci_e0_rst,
0496     APQ_MUX_pci_e1,
0497     APQ_MUX_pci_e1_rst,
0498     APQ_MUX_pci_e1_rst_n,
0499     APQ_MUX_pci_e1_clkreq_n,
0500     APQ_MUX_pri_mi2s,
0501     APQ_MUX_qua_mi2s,
0502     APQ_MUX_sata_act,
0503     APQ_MUX_sata_devsleep,
0504     APQ_MUX_sata_devsleep_n,
0505     APQ_MUX_sd_write,
0506     APQ_MUX_sdc_emmc_mode,
0507     APQ_MUX_sdc3,
0508     APQ_MUX_sdc4,
0509     APQ_MUX_sec_mi2s,
0510     APQ_MUX_slimbus,
0511     APQ_MUX_spdif_tx,
0512     APQ_MUX_spkr_i2s,
0513     APQ_MUX_spkr_i2s_ws,
0514     APQ_MUX_spss_geni,
0515     APQ_MUX_ter_mi2s,
0516     APQ_MUX_tsif1,
0517     APQ_MUX_tsif2,
0518     APQ_MUX_uim,
0519     APQ_MUX_uim_batt_alarm,
0520     APQ_MUX_NA,
0521 };
0522 
0523 static const char * const gpio_groups[] = {
0524     "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
0525     "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
0526     "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
0527     "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
0528     "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
0529     "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
0530     "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
0531     "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
0532     "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
0533     "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
0534     "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
0535     "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
0536     "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
0537     "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
0538     "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
0539     "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
0540     "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
0541     "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122",
0542     "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", "gpio128",
0543     "gpio129", "gpio130", "gpio131", "gpio132", "gpio133", "gpio134",
0544     "gpio135", "gpio136", "gpio137", "gpio138", "gpio139", "gpio140",
0545     "gpio141", "gpio142", "gpio143", "gpio144", "gpio145", "gpio146"
0546 };
0547 
0548 static const char * const adsp_ext_groups[] = {
0549     "gpio34"
0550 };
0551 static const char * const audio_ref_groups[] = {
0552     "gpio100"
0553 };
0554 static const char * const blsp_i2c1_groups[] = {
0555     "gpio2", "gpio3"
0556 };
0557 static const char * const blsp_i2c2_groups[] = {
0558     "gpio6", "gpio7"
0559 };
0560 static const char * const blsp_i2c3_groups[] = {
0561     "gpio10", "gpio11"
0562 };
0563 static const char * const blsp_i2c4_groups[] = {
0564     "gpio29", "gpio30"
0565 };
0566 static const char * const blsp_i2c5_groups[] = {
0567     "gpio41", "gpio42"
0568 };
0569 static const char * const blsp_i2c6_groups[] = {
0570     "gpio45", "gpio46"
0571 };
0572 static const char * const blsp_i2c7_groups[] = {
0573     "gpio132", "gpio133"
0574 };
0575 static const char * const blsp_i2c8_groups[] = {
0576     "gpio53", "gpio54"
0577 };
0578 static const char * const blsp_i2c9_groups[] = {
0579     "gpio57", "gpio58"
0580 };
0581 static const char * const blsp_i2c10_groups[] = {
0582     "gpio61", "gpio62"
0583 };
0584 static const char * const blsp_i2c11_groups[] = {
0585     "gpio65", "gpio66"
0586 };
0587 static const char * const blsp_i2c12_groups[] = {
0588     "gpio49", "gpio50"
0589 };
0590 static const char * const blsp_spi1_groups[] = {
0591     "gpio0", "gpio1", "gpio2", "gpio3"
0592 };
0593 static const char * const blsp_spi2_groups[] = {
0594     "gpio4", "gpio5", "gpio6", "gpio7"
0595 };
0596 static const char * const blsp_spi3_groups[] = {
0597     "gpio8", "gpio9", "gpio10", "gpio11"
0598 };
0599 static const char * const blsp_spi4_groups[] = {
0600     "gpio27", "gpio28", "gpio29", "gpio30"
0601 };
0602 static const char * const blsp_spi5_groups[] = {
0603     "gpio39", "gpio40", "gpio41", "gpio42"
0604 };
0605 static const char * const blsp_spi6_groups[] = {
0606     "gpio43", "gpio44", "gpio45", "gpio46"
0607 };
0608 static const char * const blsp_spi7_groups[] = {
0609     "gpio130", "gpio131", "gpio132", "gpio133"
0610 };
0611 static const char * const blsp_spi8_groups[] = {
0612     "gpio51", "gpio52", "gpio53", "gpio54"
0613 };
0614 static const char * const blsp_spi9_groups[] = {
0615     "gpio55", "gpio56", "gpio57", "gpio58"
0616 };
0617 static const char * const blsp_spi10_groups[] = {
0618     "gpio59", "gpio60", "gpio61", "gpio62"
0619 };
0620 static const char * const blsp_spi11_groups[] = {
0621     "gpio63", "gpio64", "gpio65", "gpio66"
0622 };
0623 static const char * const blsp_spi12_groups[] = {
0624     "gpio47", "gpio48", "gpio49", "gpio50"
0625 };
0626 static const char * const blsp_uart1_groups[] = {
0627     "gpio0", "gpio1", "gpio2", "gpio3"
0628 };
0629 static const char * const blsp_uart2_groups[] = {
0630     "gpio4", "gpio5", "gpio6", "gpio7"
0631 };
0632 static const char * const blsp_uart3_groups[] = {
0633     "gpio8"
0634 };
0635 static const char * const blsp_uart4_groups[] = {
0636     "gpio27", "gpio28", "gpio29", "gpio30"
0637 };
0638 static const char * const blsp_uart5_groups[] = {
0639     "gpio39", "gpio40", "gpio41", "gpio42"
0640 };
0641 static const char * const blsp_uart6_groups[] = {
0642     "gpio43", "gpio44", "gpio45", "gpio46"
0643 };
0644 static const char * const blsp_uart7_groups[] = {
0645     "gpio130", "gpio131", "gpio132", "gpio133"
0646 };
0647 static const char * const blsp_uart8_groups[] = {
0648     "gpio51", "gpio52", "gpio53", "gpio54"
0649 };
0650 static const char * const blsp_uart9_groups[] = {
0651     "gpio55", "gpio56", "gpio57", "gpio58"
0652 };
0653 static const char * const blsp_uart10_groups[] = {
0654     "gpio59", "gpio60", "gpio61", "gpio62"
0655 };
0656 static const char * const blsp_uart11_groups[] = {
0657     "gpio63", "gpio64", "gpio65", "gpio66"
0658 };
0659 static const char * const blsp_uart12_groups[] = {
0660     "gpio47", "gpio48", "gpio49", "gpio50"
0661 };
0662 static const char * const blsp_uim1_groups[] = {
0663     "gpio0", "gpio1"
0664 };
0665 static const char * const blsp_uim2_groups[] = {
0666     "gpio4", "gpio5"
0667 };
0668 static const char * const blsp_uim3_groups[] = {
0669     "gpio8", "gpio9"
0670 };
0671 static const char * const blsp_uim4_groups[] = {
0672     "gpio27", "gpio28"
0673 };
0674 static const char * const blsp_uim5_groups[] = {
0675     "gpio39", "gpio40"
0676 };
0677 static const char * const blsp_uim6_groups[] = {
0678     "gpio43", "gpio44"
0679 };
0680 static const char * const blsp_uim7_groups[] = {
0681     "gpio130", "gpio131"
0682 };
0683 static const char * const blsp_uim8_groups[] = {
0684     "gpio51", "gpio52"
0685 };
0686 static const char * const blsp_uim9_groups[] = {
0687     "gpio55", "gpio56"
0688 };
0689 static const char * const blsp_uim10_groups[] = {
0690     "gpio59", "gpio60"
0691 };
0692 static const char * const blsp_uim11_groups[] = {
0693     "gpio63", "gpio64"
0694 };
0695 static const char * const blsp_uim12_groups[] = {
0696     "gpio47", "gpio48"
0697 };
0698 static const char * const blsp_spi1_cs1_groups[] = {
0699     "gpio116"
0700 };
0701 static const char * const blsp_spi1_cs2_groups[] = {
0702     "gpio117"
0703 };
0704 static const char * const blsp_spi1_cs3_groups[] = {
0705     "gpio118"
0706 };
0707 static const char * const blsp_spi3_cs1_groups[] = {
0708     "gpio67"
0709 };
0710 static const char * const blsp_spi3_cs2_groups[] = {
0711     "gpio71"
0712 };
0713 static const char * const blsp_spi3_cs3_groups[] = {
0714     "gpio72"
0715 };
0716 static const char * const blsp_spi10_cs1_groups[] = {
0717     "gpio106"
0718 };
0719 static const char * const blsp_spi10_cs2_groups[] = {
0720     "gpio111"
0721 };
0722 static const char * const blsp_spi10_cs3_groups[] = {
0723     "gpio128"
0724 };
0725 static const char * const cam_mclk0_groups[] = {
0726     "gpio15"
0727 };
0728 static const char * const cam_mclk1_groups[] = {
0729     "gpio16"
0730 };
0731 static const char * const cam_mclk2_groups[] = {
0732     "gpio17"
0733 };
0734 static const char * const cam_mclk3_groups[] = {
0735     "gpio18"
0736 };
0737 static const char * const cci_async_groups[] = {
0738     "gpio26", "gpio119"
0739 };
0740 static const char * const cci_async_in0_groups[] = {
0741     "gpio120"
0742 };
0743 static const char * const cci_i2c0_groups[] = {
0744     "gpio19", "gpio20"
0745 };
0746 static const char * const cci_i2c1_groups[] = {
0747     "gpio21", "gpio22"
0748 };
0749 static const char * const cci_timer0_groups[] = {
0750     "gpio23"
0751 };
0752 static const char * const cci_timer1_groups[] = {
0753     "gpio24"
0754 };
0755 static const char * const cci_timer2_groups[] = {
0756     "gpio25"
0757 };
0758 static const char * const cci_timer3_groups[] = {
0759     "gpio26"
0760 };
0761 static const char * const cci_timer4_groups[] = {
0762     "gpio119"
0763 };
0764 static const char * const edp_hpd_groups[] = {
0765     "gpio103"
0766 };
0767 static const char * const gcc_gp1_groups[] = {
0768     "gpio37"
0769 };
0770 static const char * const gcc_gp2_groups[] = {
0771     "gpio38"
0772 };
0773 static const char * const gcc_gp3_groups[] = {
0774     "gpio86"
0775 };
0776 static const char * const gcc_obt_groups[] = {
0777     "gpio127"
0778 };
0779 static const char * const gcc_vtt_groups[] = {
0780     "gpio126"
0781 };
0782 static const char * const gp_mn_groups[] = {
0783     "gpio29"
0784 };
0785 static const char * const gp_pdm0_groups[] = {
0786     "gpio48", "gpio83"
0787 };
0788 static const char * const gp_pdm1_groups[] = {
0789     "gpio84", "gpio101"
0790 };
0791 static const char * const gp_pdm2_groups[] = {
0792     "gpio85", "gpio110"
0793 };
0794 static const char * const gp0_clk_groups[] = {
0795     "gpio25"
0796 };
0797 static const char * const gp1_clk_groups[] = {
0798     "gpio26"
0799 };
0800 static const char * const hdmi_cec_groups[] = {
0801     "gpio31"
0802 };
0803 static const char * const hdmi_ddc_groups[] = {
0804     "gpio32", "gpio33"
0805 };
0806 static const char * const hdmi_dtest_groups[] = {
0807     "gpio123"
0808 };
0809 static const char * const hdmi_hpd_groups[] = {
0810     "gpio34"
0811 };
0812 static const char * const hdmi_rcv_groups[] = {
0813     "gpio125"
0814 };
0815 static const char * const hsic_groups[] = {
0816     "gpio134", "gpio135"
0817 };
0818 static const char * const ldo_en_groups[] = {
0819     "gpio124"
0820 };
0821 static const char * const ldo_update_groups[] = {
0822     "gpio125"
0823 };
0824 static const char * const mdp_vsync_groups[] = {
0825     "gpio12", "gpio13", "gpio14"
0826 };
0827 static const char * const pci_e0_groups[] = {
0828     "gpio68", "gpio70"
0829 };
0830 static const char * const pci_e0_n_groups[] = {
0831     "gpio68", "gpio70"
0832 };
0833 static const char * const pci_e0_rst_groups[] = {
0834     "gpio70"
0835 };
0836 static const char * const pci_e1_groups[] = {
0837     "gpio140"
0838 };
0839 static const char * const pci_e1_rst_groups[] = {
0840     "gpio140"
0841 };
0842 static const char * const pci_e1_rst_n_groups[] = {
0843     "gpio140"
0844 };
0845 static const char * const pci_e1_clkreq_n_groups[] = {
0846     "gpio141"
0847 };
0848 static const char * const pri_mi2s_groups[] = {
0849     "gpio76", "gpio77", "gpio78", "gpio79", "gpio80"
0850 };
0851 static const char * const qua_mi2s_groups[] = {
0852     "gpio91", "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97"
0853 };
0854 static const char * const sata_act_groups[] = {
0855     "gpio129"
0856 };
0857 static const char * const sata_devsleep_groups[] = {
0858     "gpio119"
0859 };
0860 static const char * const sata_devsleep_n_groups[] = {
0861     "gpio119"
0862 };
0863 static const char * const sd_write_groups[] = {
0864     "gpio75"
0865 };
0866 static const char * const sdc_emmc_mode_groups[] = {
0867     "gpio146"
0868 };
0869 static const char * const sdc3_groups[] = {
0870     "gpio67", "gpio68", "gpio69", "gpio70", "gpio71", "gpio72"
0871 };
0872 static const char * const sdc4_groups[] = {
0873     "gpio82", "gpio83", "gpio84", "gpio85", "gpio86",
0874     "gpio91", "gpio95", "gpio96", "gpio97", "gpio101"
0875 };
0876 static const char * const sec_mi2s_groups[] = {
0877     "gpio81", "gpio82", "gpio83", "gpio84", "gpio85"
0878 };
0879 static const char * const slimbus_groups[] = {
0880     "gpio98", "gpio99"
0881 };
0882 static const char * const spdif_tx_groups[] = {
0883     "gpio124", "gpio136", "gpio142"
0884 };
0885 static const char * const spkr_i2s_groups[] = {
0886     "gpio98", "gpio99", "gpio100"
0887 };
0888 static const char * const spkr_i2s_ws_groups[] = {
0889     "gpio104"
0890 };
0891 static const char * const spss_geni_groups[] = {
0892     "gpio8", "gpio9"
0893 };
0894 static const char * const ter_mi2s_groups[] = {
0895     "gpio86", "gpio87", "gpio88", "gpio89", "gpio90"
0896 };
0897 static const char * const tsif1_groups[] = {
0898     "gpio82", "gpio83", "gpio84", "gpio85", "gpio86"
0899 };
0900 static const char * const tsif2_groups[] = {
0901     "gpio91", "gpio95", "gpio96", "gpio97", "gpio101"
0902 };
0903 static const char * const uim_groups[] = {
0904     "gpio130", "gpio131", "gpio132", "gpio133"
0905 };
0906 static const char * const uim_batt_alarm_groups[] = {
0907     "gpio102"
0908 };
0909 static const struct msm_function apq8084_functions[] = {
0910     FUNCTION(adsp_ext),
0911     FUNCTION(audio_ref),
0912     FUNCTION(blsp_i2c1),
0913     FUNCTION(blsp_i2c2),
0914     FUNCTION(blsp_i2c3),
0915     FUNCTION(blsp_i2c4),
0916     FUNCTION(blsp_i2c5),
0917     FUNCTION(blsp_i2c6),
0918     FUNCTION(blsp_i2c7),
0919     FUNCTION(blsp_i2c8),
0920     FUNCTION(blsp_i2c9),
0921     FUNCTION(blsp_i2c10),
0922     FUNCTION(blsp_i2c11),
0923     FUNCTION(blsp_i2c12),
0924     FUNCTION(blsp_spi1),
0925     FUNCTION(blsp_spi1_cs1),
0926     FUNCTION(blsp_spi1_cs2),
0927     FUNCTION(blsp_spi1_cs3),
0928     FUNCTION(blsp_spi2),
0929     FUNCTION(blsp_spi3),
0930     FUNCTION(blsp_spi3_cs1),
0931     FUNCTION(blsp_spi3_cs2),
0932     FUNCTION(blsp_spi3_cs3),
0933     FUNCTION(blsp_spi4),
0934     FUNCTION(blsp_spi5),
0935     FUNCTION(blsp_spi6),
0936     FUNCTION(blsp_spi7),
0937     FUNCTION(blsp_spi8),
0938     FUNCTION(blsp_spi9),
0939     FUNCTION(blsp_spi10),
0940     FUNCTION(blsp_spi10_cs1),
0941     FUNCTION(blsp_spi10_cs2),
0942     FUNCTION(blsp_spi10_cs3),
0943     FUNCTION(blsp_spi11),
0944     FUNCTION(blsp_spi12),
0945     FUNCTION(blsp_uart1),
0946     FUNCTION(blsp_uart2),
0947     FUNCTION(blsp_uart3),
0948     FUNCTION(blsp_uart4),
0949     FUNCTION(blsp_uart5),
0950     FUNCTION(blsp_uart6),
0951     FUNCTION(blsp_uart7),
0952     FUNCTION(blsp_uart8),
0953     FUNCTION(blsp_uart9),
0954     FUNCTION(blsp_uart10),
0955     FUNCTION(blsp_uart11),
0956     FUNCTION(blsp_uart12),
0957     FUNCTION(blsp_uim1),
0958     FUNCTION(blsp_uim2),
0959     FUNCTION(blsp_uim3),
0960     FUNCTION(blsp_uim4),
0961     FUNCTION(blsp_uim5),
0962     FUNCTION(blsp_uim6),
0963     FUNCTION(blsp_uim7),
0964     FUNCTION(blsp_uim8),
0965     FUNCTION(blsp_uim9),
0966     FUNCTION(blsp_uim10),
0967     FUNCTION(blsp_uim11),
0968     FUNCTION(blsp_uim12),
0969     FUNCTION(cam_mclk0),
0970     FUNCTION(cam_mclk1),
0971     FUNCTION(cam_mclk2),
0972     FUNCTION(cam_mclk3),
0973     FUNCTION(cci_async),
0974     FUNCTION(cci_async_in0),
0975     FUNCTION(cci_i2c0),
0976     FUNCTION(cci_i2c1),
0977     FUNCTION(cci_timer0),
0978     FUNCTION(cci_timer1),
0979     FUNCTION(cci_timer2),
0980     FUNCTION(cci_timer3),
0981     FUNCTION(cci_timer4),
0982     FUNCTION(edp_hpd),
0983     FUNCTION(gcc_gp1),
0984     FUNCTION(gcc_gp2),
0985     FUNCTION(gcc_gp3),
0986     FUNCTION(gcc_obt),
0987     FUNCTION(gcc_vtt),
0988     FUNCTION(gp_mn),
0989     FUNCTION(gp_pdm0),
0990     FUNCTION(gp_pdm1),
0991     FUNCTION(gp_pdm2),
0992     FUNCTION(gp0_clk),
0993     FUNCTION(gp1_clk),
0994     FUNCTION(gpio),
0995     FUNCTION(hdmi_cec),
0996     FUNCTION(hdmi_ddc),
0997     FUNCTION(hdmi_dtest),
0998     FUNCTION(hdmi_hpd),
0999     FUNCTION(hdmi_rcv),
1000     FUNCTION(hsic),
1001     FUNCTION(ldo_en),
1002     FUNCTION(ldo_update),
1003     FUNCTION(mdp_vsync),
1004     FUNCTION(pci_e0),
1005     FUNCTION(pci_e0_n),
1006     FUNCTION(pci_e0_rst),
1007     FUNCTION(pci_e1),
1008     FUNCTION(pci_e1_rst),
1009     FUNCTION(pci_e1_rst_n),
1010     FUNCTION(pci_e1_clkreq_n),
1011     FUNCTION(pri_mi2s),
1012     FUNCTION(qua_mi2s),
1013     FUNCTION(sata_act),
1014     FUNCTION(sata_devsleep),
1015     FUNCTION(sata_devsleep_n),
1016     FUNCTION(sd_write),
1017     FUNCTION(sdc_emmc_mode),
1018     FUNCTION(sdc3),
1019     FUNCTION(sdc4),
1020     FUNCTION(sec_mi2s),
1021     FUNCTION(slimbus),
1022     FUNCTION(spdif_tx),
1023     FUNCTION(spkr_i2s),
1024     FUNCTION(spkr_i2s_ws),
1025     FUNCTION(spss_geni),
1026     FUNCTION(ter_mi2s),
1027     FUNCTION(tsif1),
1028     FUNCTION(tsif2),
1029     FUNCTION(uim),
1030     FUNCTION(uim_batt_alarm),
1031 };
1032 
1033 static const struct msm_pingroup apq8084_groups[] = {
1034     PINGROUP(0,   blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA),
1035     PINGROUP(1,   blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA),
1036     PINGROUP(2,   blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA),
1037     PINGROUP(3,   blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA),
1038     PINGROUP(4,   blsp_spi2, blsp_uart2, blsp_uim2, NA, NA, NA, NA),
1039     PINGROUP(5,   blsp_spi2, blsp_uart2, blsp_uim2, NA, NA, NA, NA),
1040     PINGROUP(6,   blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA),
1041     PINGROUP(7,   blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA),
1042     PINGROUP(8,   blsp_spi3, blsp_uart3, blsp_uim3, spss_geni, NA, NA, NA),
1043     PINGROUP(9,   blsp_spi3, blsp_uim3, blsp_uart3, spss_geni, NA, NA, NA),
1044     PINGROUP(10,  blsp_spi3, blsp_uart3, blsp_i2c3, NA, NA, NA, NA),
1045     PINGROUP(11,  blsp_spi3, blsp_uart3, blsp_i2c3, NA, NA, NA, NA),
1046     PINGROUP(12,  mdp_vsync, NA, NA, NA, NA, NA, NA),
1047     PINGROUP(13,  mdp_vsync, NA, NA, NA, NA, NA, NA),
1048     PINGROUP(14,  mdp_vsync, NA, NA, NA, NA, NA, NA),
1049     PINGROUP(15,  cam_mclk0, NA, NA, NA, NA, NA, NA),
1050     PINGROUP(16,  cam_mclk1, NA, NA, NA, NA, NA, NA),
1051     PINGROUP(17,  cam_mclk2, NA, NA, NA, NA, NA, NA),
1052     PINGROUP(18,  cam_mclk3, NA, NA, NA, NA, NA, NA),
1053     PINGROUP(19,  cci_i2c0, NA, NA, NA, NA, NA, NA),
1054     PINGROUP(20,  cci_i2c0, NA, NA, NA, NA, NA, NA),
1055     PINGROUP(21,  cci_i2c1, NA, NA, NA, NA, NA, NA),
1056     PINGROUP(22,  cci_i2c1, NA, NA, NA, NA, NA, NA),
1057     PINGROUP(23,  cci_timer0, NA, NA, NA, NA, NA, NA),
1058     PINGROUP(24,  cci_timer1, NA, NA, NA, NA, NA, NA),
1059     PINGROUP(25,  cci_timer2, gp0_clk, NA, NA, NA, NA, NA),
1060     PINGROUP(26,  cci_timer3, cci_async, gp1_clk, NA, NA, NA, NA),
1061     PINGROUP(27,  blsp_spi4, blsp_uart4, blsp_uim4, NA, NA, NA, NA),
1062     PINGROUP(28,  blsp_spi4, blsp_uart4, blsp_uim4, NA, NA, NA, NA),
1063     PINGROUP(29,  blsp_spi4, blsp_uart4, blsp_i2c4, gp_mn, NA, NA, NA),
1064     PINGROUP(30,  blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA, NA),
1065     PINGROUP(31,  hdmi_cec, NA, NA, NA, NA, NA, NA),
1066     PINGROUP(32,  hdmi_ddc, NA, NA, NA, NA, NA, NA),
1067     PINGROUP(33,  hdmi_ddc, NA, NA, NA, NA, NA, NA),
1068     PINGROUP(34,  hdmi_hpd, NA, adsp_ext, NA, NA, NA, NA),
1069     PINGROUP(35,  NA, NA, NA, NA, NA, NA, NA),
1070     PINGROUP(36,  NA, NA, NA, NA, NA, NA, NA),
1071     PINGROUP(37,  gcc_gp1, NA, NA, NA, NA, NA, NA),
1072     PINGROUP(38,  gcc_gp2, NA, NA, NA, NA, NA, NA),
1073     PINGROUP(39,  blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA, NA),
1074     PINGROUP(40,  blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA, NA),
1075     PINGROUP(41,  blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA, NA),
1076     PINGROUP(42,  blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA, NA),
1077     PINGROUP(43,  blsp_spi6, blsp_uart6, blsp_uim6, NA, NA, NA, NA),
1078     PINGROUP(44,  blsp_spi6, blsp_uart6, blsp_uim6, NA, NA, NA, NA),
1079     PINGROUP(45,  blsp_spi6, blsp_uart6, blsp_i2c6, NA, NA, NA, NA),
1080     PINGROUP(46,  blsp_spi6, blsp_uart6, blsp_i2c6, NA, NA, NA, NA),
1081     PINGROUP(47,  blsp_spi12, blsp_uart12, blsp_uim12, NA, NA, NA, NA),
1082     PINGROUP(48,  blsp_spi12, blsp_uart12, blsp_uim12, gp_pdm0, NA, NA, NA),
1083     PINGROUP(49,  blsp_spi12, blsp_uart12, blsp_i2c12, NA, NA, NA, NA),
1084     PINGROUP(50,  blsp_spi12, blsp_uart12, blsp_i2c12, NA, NA, NA, NA),
1085     PINGROUP(51,  blsp_spi8, blsp_uart8, blsp_uim8, NA, NA, NA, NA),
1086     PINGROUP(52,  blsp_spi8, blsp_uart8, blsp_uim8, NA, NA, NA, NA),
1087     PINGROUP(53,  blsp_spi8, blsp_uart8, blsp_i2c8, NA, NA, NA, NA),
1088     PINGROUP(54,  blsp_spi8, blsp_uart8, blsp_i2c8, NA, NA, NA, NA),
1089     PINGROUP(55,  blsp_spi9, blsp_uart9, blsp_uim9, NA, NA, NA, NA),
1090     PINGROUP(56,  blsp_spi9, blsp_uart9, blsp_uim9, NA, NA, NA, NA),
1091     PINGROUP(57,  blsp_spi9, blsp_uart9, blsp_i2c9, NA, NA, NA, NA),
1092     PINGROUP(58,  blsp_spi9, blsp_uart9, blsp_i2c9, NA, NA, NA, NA),
1093     PINGROUP(59,  blsp_spi10, blsp_uart10, blsp_uim10, NA, NA, NA, NA),
1094     PINGROUP(60,  blsp_spi10, blsp_uart10, blsp_uim10, NA, NA, NA, NA),
1095     PINGROUP(61,  blsp_spi10, blsp_uart10, blsp_i2c10, NA, NA, NA, NA),
1096     PINGROUP(62,  blsp_spi10, blsp_uart10, blsp_i2c10, NA, NA, NA, NA),
1097     PINGROUP(63,  blsp_spi11, blsp_uart11, blsp_uim11, NA, NA, NA, NA),
1098     PINGROUP(64,  blsp_spi11, blsp_uart11, blsp_uim11, NA, NA, NA, NA),
1099     PINGROUP(65,  blsp_spi11, blsp_uart11, blsp_i2c11, NA, NA, NA, NA),
1100     PINGROUP(66,  blsp_spi11, blsp_uart11, blsp_i2c11, NA, NA, NA, NA),
1101     PINGROUP(67,  sdc3, blsp_spi3_cs1, NA, NA, NA, NA, NA),
1102     PINGROUP(68,  sdc3, pci_e0, NA, NA, NA, NA, NA),
1103     PINGROUP(69,  sdc3, NA, NA, NA, NA, NA, NA),
1104     PINGROUP(70,  sdc3, pci_e0_n, pci_e0, NA, NA, NA, NA),
1105     PINGROUP(71,  sdc3, blsp_spi3_cs2, NA, NA, NA, NA, NA),
1106     PINGROUP(72,  sdc3, blsp_spi3_cs3, NA, NA, NA, NA, NA),
1107     PINGROUP(73,  NA, NA, NA, NA, NA, NA, NA),
1108     PINGROUP(74,  NA, NA, NA, NA, NA, NA, NA),
1109     PINGROUP(75,  sd_write, NA, NA, NA, NA, NA, NA),
1110     PINGROUP(76,  pri_mi2s, NA, NA, NA, NA, NA, NA),
1111     PINGROUP(77,  pri_mi2s, NA, NA, NA, NA, NA, NA),
1112     PINGROUP(78,  pri_mi2s, NA, NA, NA, NA, NA, NA),
1113     PINGROUP(79,  pri_mi2s, NA, NA, NA, NA, NA, NA),
1114     PINGROUP(80,  pri_mi2s, NA, NA, NA, NA, NA, NA),
1115     PINGROUP(81,  sec_mi2s, NA, NA, NA, NA, NA, NA),
1116     PINGROUP(82,  sec_mi2s, sdc4, tsif1, NA, NA, NA, NA),
1117     PINGROUP(83,  sec_mi2s, sdc4, tsif1, NA, NA, NA, gp_pdm0),
1118     PINGROUP(84,  sec_mi2s, sdc4, tsif1, NA, NA, NA, gp_pdm1),
1119     PINGROUP(85,  sec_mi2s, sdc4, tsif1, NA, gp_pdm2, NA, NA),
1120     PINGROUP(86,  ter_mi2s, sdc4, tsif1, NA, NA, NA, gcc_gp3),
1121     PINGROUP(87,  ter_mi2s, NA, NA, NA, NA, NA, NA),
1122     PINGROUP(88,  ter_mi2s, NA, NA, NA, NA, NA, NA),
1123     PINGROUP(89,  ter_mi2s, NA, NA, NA, NA, NA, NA),
1124     PINGROUP(90,  ter_mi2s, NA, NA, NA, NA, NA, NA),
1125     PINGROUP(91,  qua_mi2s, sdc4, tsif2, NA, NA, NA, NA),
1126     PINGROUP(92,  qua_mi2s, NA, NA, NA, NA, NA, NA),
1127     PINGROUP(93,  qua_mi2s, NA, NA, NA, NA, NA, NA),
1128     PINGROUP(94,  qua_mi2s, NA, NA, NA, NA, NA, NA),
1129     PINGROUP(95,  qua_mi2s, sdc4, tsif2, NA, NA, NA, gcc_gp1),
1130     PINGROUP(96,  qua_mi2s, sdc4, tsif2, NA, NA, NA, gcc_gp2),
1131     PINGROUP(97,  qua_mi2s, sdc4, tsif2, NA, gcc_gp3, NA, NA),
1132     PINGROUP(98,  slimbus, spkr_i2s, NA, NA, NA, NA, NA),
1133     PINGROUP(99,  slimbus, spkr_i2s, NA, NA, NA, NA, NA),
1134     PINGROUP(100, audio_ref, spkr_i2s, NA, NA, NA, NA, NA),
1135     PINGROUP(101, sdc4, tsif2, gp_pdm1, NA, NA, NA, NA),
1136     PINGROUP(102, uim_batt_alarm, NA, NA, NA, NA, NA, NA),
1137     PINGROUP(103, edp_hpd, NA, NA, NA, NA, NA, NA),
1138     PINGROUP(104, spkr_i2s, NA, NA, NA, NA, NA, NA),
1139     PINGROUP(105, NA, NA, NA, NA, NA, NA, NA),
1140     PINGROUP(106, blsp_spi10_cs1, NA, NA, NA, NA, NA, NA),
1141     PINGROUP(107, NA, NA, NA, NA, NA, NA, NA),
1142     PINGROUP(108, NA, NA, NA, NA, NA, NA, NA),
1143     PINGROUP(109, NA, NA, NA, NA, NA, NA, NA),
1144     PINGROUP(110, gp_pdm2, NA, NA, NA, NA, NA, NA),
1145     PINGROUP(111, blsp_spi10_cs2, NA, NA, NA, NA, NA, NA),
1146     PINGROUP(112, NA, NA, NA, NA, NA, NA, NA),
1147     PINGROUP(113, NA, NA, NA, NA, NA, NA, NA),
1148     PINGROUP(114, NA, NA, NA, NA, NA, NA, NA),
1149     PINGROUP(115, NA, NA, NA, NA, NA, NA, NA),
1150     PINGROUP(116, blsp_spi1_cs1, NA, NA, NA, NA, NA, NA),
1151     PINGROUP(117, blsp_spi1_cs2, NA, NA, NA, NA, NA, NA),
1152     PINGROUP(118, blsp_spi1_cs3, NA, NA, NA, NA, NA, NA),
1153     PINGROUP(119, cci_timer4, cci_async, sata_devsleep, sata_devsleep_n, NA, NA, NA),
1154     PINGROUP(120, cci_async, NA, NA, NA, NA, NA, NA),
1155     PINGROUP(121, NA, NA, NA, NA, NA, NA, NA),
1156     PINGROUP(122, NA, NA, NA, NA, NA, NA, NA),
1157     PINGROUP(123, hdmi_dtest, NA, NA, NA, NA, NA, NA),
1158     PINGROUP(124, spdif_tx, ldo_en, NA, NA, NA, NA, NA),
1159     PINGROUP(125, ldo_update, hdmi_rcv, NA, NA, NA, NA, NA),
1160     PINGROUP(126, gcc_vtt, NA, NA, NA, NA, NA, NA),
1161     PINGROUP(127, gcc_obt, NA, NA, NA, NA, NA, NA),
1162     PINGROUP(128, blsp_spi10_cs3, NA, NA, NA, NA, NA, NA),
1163     PINGROUP(129, sata_act, NA, NA, NA, NA, NA, NA),
1164     PINGROUP(130, uim, blsp_spi7, blsp_uart7, blsp_uim7, NA, NA, NA),
1165     PINGROUP(131, uim, blsp_spi7, blsp_uart7, blsp_uim7, NA, NA, NA),
1166     PINGROUP(132, uim, blsp_spi7, blsp_uart7, blsp_i2c7, NA, NA, NA),
1167     PINGROUP(133, uim, blsp_spi7, blsp_uart7, blsp_i2c7, NA, NA, NA),
1168     PINGROUP(134, hsic, NA, NA, NA, NA, NA, NA),
1169     PINGROUP(135, hsic, NA, NA, NA, NA, NA, NA),
1170     PINGROUP(136, spdif_tx, NA, NA, NA, NA, NA, NA),
1171     PINGROUP(137, NA, NA, NA, NA, NA, NA, NA),
1172     PINGROUP(138, NA, NA, NA, NA, NA, NA, NA),
1173     PINGROUP(139, NA, NA, NA, NA, NA, NA, NA),
1174     PINGROUP(140, pci_e1_rst_n, pci_e1_rst, NA, NA, NA, NA, NA),
1175     PINGROUP(141, pci_e1_clkreq_n, NA, NA, NA, NA, NA, NA),
1176     PINGROUP(142, spdif_tx, NA, NA, NA, NA, NA, NA),
1177     PINGROUP(143, NA, NA, NA, NA, NA, NA, NA),
1178     PINGROUP(144, NA, NA, NA, NA, NA, NA, NA),
1179     PINGROUP(145, NA, NA, NA, NA, NA, NA, NA),
1180     PINGROUP(146, sdc_emmc_mode, NA, NA, NA, NA, NA, NA),
1181 
1182     SDC_PINGROUP(sdc1_clk, 0x2044, 13, 6),
1183     SDC_PINGROUP(sdc1_cmd, 0x2044, 11, 3),
1184     SDC_PINGROUP(sdc1_data, 0x2044, 9, 0),
1185     SDC_PINGROUP(sdc2_clk, 0x2048, 14, 6),
1186     SDC_PINGROUP(sdc2_cmd, 0x2048, 11, 3),
1187     SDC_PINGROUP(sdc2_data, 0x2048, 9, 0),
1188 };
1189 
1190 #define NUM_GPIO_PINGROUPS 147
1191 
1192 static const struct msm_pinctrl_soc_data apq8084_pinctrl = {
1193     .pins = apq8084_pins,
1194     .npins = ARRAY_SIZE(apq8084_pins),
1195     .functions = apq8084_functions,
1196     .nfunctions = ARRAY_SIZE(apq8084_functions),
1197     .groups = apq8084_groups,
1198     .ngroups = ARRAY_SIZE(apq8084_groups),
1199     .ngpios = NUM_GPIO_PINGROUPS,
1200 };
1201 
1202 static int apq8084_pinctrl_probe(struct platform_device *pdev)
1203 {
1204     return msm_pinctrl_probe(pdev, &apq8084_pinctrl);
1205 }
1206 
1207 static const struct of_device_id apq8084_pinctrl_of_match[] = {
1208     { .compatible = "qcom,apq8084-pinctrl", },
1209     { },
1210 };
1211 
1212 static struct platform_driver apq8084_pinctrl_driver = {
1213     .driver = {
1214         .name = "apq8084-pinctrl",
1215         .of_match_table = apq8084_pinctrl_of_match,
1216     },
1217     .probe = apq8084_pinctrl_probe,
1218     .remove = msm_pinctrl_remove,
1219 };
1220 
1221 static int __init apq8084_pinctrl_init(void)
1222 {
1223     return platform_driver_register(&apq8084_pinctrl_driver);
1224 }
1225 arch_initcall(apq8084_pinctrl_init);
1226 
1227 static void __exit apq8084_pinctrl_exit(void)
1228 {
1229     platform_driver_unregister(&apq8084_pinctrl_driver);
1230 }
1231 module_exit(apq8084_pinctrl_exit);
1232 
1233 MODULE_DESCRIPTION("Qualcomm APQ8084 pinctrl driver");
1234 MODULE_LICENSE("GPL v2");
1235 MODULE_DEVICE_TABLE(of, apq8084_pinctrl_of_match);
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