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OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (c) 2014, Sony Mobile Communications AB.
0004  */
0005 
0006 #include <linux/module.h>
0007 #include <linux/of.h>
0008 #include <linux/platform_device.h>
0009 #include <linux/pinctrl/pinctrl.h>
0010 
0011 #include "pinctrl-msm.h"
0012 
0013 static const struct pinctrl_pin_desc apq8064_pins[] = {
0014     PINCTRL_PIN(0, "GPIO_0"),
0015     PINCTRL_PIN(1, "GPIO_1"),
0016     PINCTRL_PIN(2, "GPIO_2"),
0017     PINCTRL_PIN(3, "GPIO_3"),
0018     PINCTRL_PIN(4, "GPIO_4"),
0019     PINCTRL_PIN(5, "GPIO_5"),
0020     PINCTRL_PIN(6, "GPIO_6"),
0021     PINCTRL_PIN(7, "GPIO_7"),
0022     PINCTRL_PIN(8, "GPIO_8"),
0023     PINCTRL_PIN(9, "GPIO_9"),
0024     PINCTRL_PIN(10, "GPIO_10"),
0025     PINCTRL_PIN(11, "GPIO_11"),
0026     PINCTRL_PIN(12, "GPIO_12"),
0027     PINCTRL_PIN(13, "GPIO_13"),
0028     PINCTRL_PIN(14, "GPIO_14"),
0029     PINCTRL_PIN(15, "GPIO_15"),
0030     PINCTRL_PIN(16, "GPIO_16"),
0031     PINCTRL_PIN(17, "GPIO_17"),
0032     PINCTRL_PIN(18, "GPIO_18"),
0033     PINCTRL_PIN(19, "GPIO_19"),
0034     PINCTRL_PIN(20, "GPIO_20"),
0035     PINCTRL_PIN(21, "GPIO_21"),
0036     PINCTRL_PIN(22, "GPIO_22"),
0037     PINCTRL_PIN(23, "GPIO_23"),
0038     PINCTRL_PIN(24, "GPIO_24"),
0039     PINCTRL_PIN(25, "GPIO_25"),
0040     PINCTRL_PIN(26, "GPIO_26"),
0041     PINCTRL_PIN(27, "GPIO_27"),
0042     PINCTRL_PIN(28, "GPIO_28"),
0043     PINCTRL_PIN(29, "GPIO_29"),
0044     PINCTRL_PIN(30, "GPIO_30"),
0045     PINCTRL_PIN(31, "GPIO_31"),
0046     PINCTRL_PIN(32, "GPIO_32"),
0047     PINCTRL_PIN(33, "GPIO_33"),
0048     PINCTRL_PIN(34, "GPIO_34"),
0049     PINCTRL_PIN(35, "GPIO_35"),
0050     PINCTRL_PIN(36, "GPIO_36"),
0051     PINCTRL_PIN(37, "GPIO_37"),
0052     PINCTRL_PIN(38, "GPIO_38"),
0053     PINCTRL_PIN(39, "GPIO_39"),
0054     PINCTRL_PIN(40, "GPIO_40"),
0055     PINCTRL_PIN(41, "GPIO_41"),
0056     PINCTRL_PIN(42, "GPIO_42"),
0057     PINCTRL_PIN(43, "GPIO_43"),
0058     PINCTRL_PIN(44, "GPIO_44"),
0059     PINCTRL_PIN(45, "GPIO_45"),
0060     PINCTRL_PIN(46, "GPIO_46"),
0061     PINCTRL_PIN(47, "GPIO_47"),
0062     PINCTRL_PIN(48, "GPIO_48"),
0063     PINCTRL_PIN(49, "GPIO_49"),
0064     PINCTRL_PIN(50, "GPIO_50"),
0065     PINCTRL_PIN(51, "GPIO_51"),
0066     PINCTRL_PIN(52, "GPIO_52"),
0067     PINCTRL_PIN(53, "GPIO_53"),
0068     PINCTRL_PIN(54, "GPIO_54"),
0069     PINCTRL_PIN(55, "GPIO_55"),
0070     PINCTRL_PIN(56, "GPIO_56"),
0071     PINCTRL_PIN(57, "GPIO_57"),
0072     PINCTRL_PIN(58, "GPIO_58"),
0073     PINCTRL_PIN(59, "GPIO_59"),
0074     PINCTRL_PIN(60, "GPIO_60"),
0075     PINCTRL_PIN(61, "GPIO_61"),
0076     PINCTRL_PIN(62, "GPIO_62"),
0077     PINCTRL_PIN(63, "GPIO_63"),
0078     PINCTRL_PIN(64, "GPIO_64"),
0079     PINCTRL_PIN(65, "GPIO_65"),
0080     PINCTRL_PIN(66, "GPIO_66"),
0081     PINCTRL_PIN(67, "GPIO_67"),
0082     PINCTRL_PIN(68, "GPIO_68"),
0083     PINCTRL_PIN(69, "GPIO_69"),
0084     PINCTRL_PIN(70, "GPIO_70"),
0085     PINCTRL_PIN(71, "GPIO_71"),
0086     PINCTRL_PIN(72, "GPIO_72"),
0087     PINCTRL_PIN(73, "GPIO_73"),
0088     PINCTRL_PIN(74, "GPIO_74"),
0089     PINCTRL_PIN(75, "GPIO_75"),
0090     PINCTRL_PIN(76, "GPIO_76"),
0091     PINCTRL_PIN(77, "GPIO_77"),
0092     PINCTRL_PIN(78, "GPIO_78"),
0093     PINCTRL_PIN(79, "GPIO_79"),
0094     PINCTRL_PIN(80, "GPIO_80"),
0095     PINCTRL_PIN(81, "GPIO_81"),
0096     PINCTRL_PIN(82, "GPIO_82"),
0097     PINCTRL_PIN(83, "GPIO_83"),
0098     PINCTRL_PIN(84, "GPIO_84"),
0099     PINCTRL_PIN(85, "GPIO_85"),
0100     PINCTRL_PIN(86, "GPIO_86"),
0101     PINCTRL_PIN(87, "GPIO_87"),
0102     PINCTRL_PIN(88, "GPIO_88"),
0103     PINCTRL_PIN(89, "GPIO_89"),
0104 
0105     PINCTRL_PIN(90, "SDC1_CLK"),
0106     PINCTRL_PIN(91, "SDC1_CMD"),
0107     PINCTRL_PIN(92, "SDC1_DATA"),
0108     PINCTRL_PIN(93, "SDC3_CLK"),
0109     PINCTRL_PIN(94, "SDC3_CMD"),
0110     PINCTRL_PIN(95, "SDC3_DATA"),
0111 };
0112 
0113 #define DECLARE_APQ_GPIO_PINS(pin) static const unsigned int gpio##pin##_pins[] = { pin }
0114 DECLARE_APQ_GPIO_PINS(0);
0115 DECLARE_APQ_GPIO_PINS(1);
0116 DECLARE_APQ_GPIO_PINS(2);
0117 DECLARE_APQ_GPIO_PINS(3);
0118 DECLARE_APQ_GPIO_PINS(4);
0119 DECLARE_APQ_GPIO_PINS(5);
0120 DECLARE_APQ_GPIO_PINS(6);
0121 DECLARE_APQ_GPIO_PINS(7);
0122 DECLARE_APQ_GPIO_PINS(8);
0123 DECLARE_APQ_GPIO_PINS(9);
0124 DECLARE_APQ_GPIO_PINS(10);
0125 DECLARE_APQ_GPIO_PINS(11);
0126 DECLARE_APQ_GPIO_PINS(12);
0127 DECLARE_APQ_GPIO_PINS(13);
0128 DECLARE_APQ_GPIO_PINS(14);
0129 DECLARE_APQ_GPIO_PINS(15);
0130 DECLARE_APQ_GPIO_PINS(16);
0131 DECLARE_APQ_GPIO_PINS(17);
0132 DECLARE_APQ_GPIO_PINS(18);
0133 DECLARE_APQ_GPIO_PINS(19);
0134 DECLARE_APQ_GPIO_PINS(20);
0135 DECLARE_APQ_GPIO_PINS(21);
0136 DECLARE_APQ_GPIO_PINS(22);
0137 DECLARE_APQ_GPIO_PINS(23);
0138 DECLARE_APQ_GPIO_PINS(24);
0139 DECLARE_APQ_GPIO_PINS(25);
0140 DECLARE_APQ_GPIO_PINS(26);
0141 DECLARE_APQ_GPIO_PINS(27);
0142 DECLARE_APQ_GPIO_PINS(28);
0143 DECLARE_APQ_GPIO_PINS(29);
0144 DECLARE_APQ_GPIO_PINS(30);
0145 DECLARE_APQ_GPIO_PINS(31);
0146 DECLARE_APQ_GPIO_PINS(32);
0147 DECLARE_APQ_GPIO_PINS(33);
0148 DECLARE_APQ_GPIO_PINS(34);
0149 DECLARE_APQ_GPIO_PINS(35);
0150 DECLARE_APQ_GPIO_PINS(36);
0151 DECLARE_APQ_GPIO_PINS(37);
0152 DECLARE_APQ_GPIO_PINS(38);
0153 DECLARE_APQ_GPIO_PINS(39);
0154 DECLARE_APQ_GPIO_PINS(40);
0155 DECLARE_APQ_GPIO_PINS(41);
0156 DECLARE_APQ_GPIO_PINS(42);
0157 DECLARE_APQ_GPIO_PINS(43);
0158 DECLARE_APQ_GPIO_PINS(44);
0159 DECLARE_APQ_GPIO_PINS(45);
0160 DECLARE_APQ_GPIO_PINS(46);
0161 DECLARE_APQ_GPIO_PINS(47);
0162 DECLARE_APQ_GPIO_PINS(48);
0163 DECLARE_APQ_GPIO_PINS(49);
0164 DECLARE_APQ_GPIO_PINS(50);
0165 DECLARE_APQ_GPIO_PINS(51);
0166 DECLARE_APQ_GPIO_PINS(52);
0167 DECLARE_APQ_GPIO_PINS(53);
0168 DECLARE_APQ_GPIO_PINS(54);
0169 DECLARE_APQ_GPIO_PINS(55);
0170 DECLARE_APQ_GPIO_PINS(56);
0171 DECLARE_APQ_GPIO_PINS(57);
0172 DECLARE_APQ_GPIO_PINS(58);
0173 DECLARE_APQ_GPIO_PINS(59);
0174 DECLARE_APQ_GPIO_PINS(60);
0175 DECLARE_APQ_GPIO_PINS(61);
0176 DECLARE_APQ_GPIO_PINS(62);
0177 DECLARE_APQ_GPIO_PINS(63);
0178 DECLARE_APQ_GPIO_PINS(64);
0179 DECLARE_APQ_GPIO_PINS(65);
0180 DECLARE_APQ_GPIO_PINS(66);
0181 DECLARE_APQ_GPIO_PINS(67);
0182 DECLARE_APQ_GPIO_PINS(68);
0183 DECLARE_APQ_GPIO_PINS(69);
0184 DECLARE_APQ_GPIO_PINS(70);
0185 DECLARE_APQ_GPIO_PINS(71);
0186 DECLARE_APQ_GPIO_PINS(72);
0187 DECLARE_APQ_GPIO_PINS(73);
0188 DECLARE_APQ_GPIO_PINS(74);
0189 DECLARE_APQ_GPIO_PINS(75);
0190 DECLARE_APQ_GPIO_PINS(76);
0191 DECLARE_APQ_GPIO_PINS(77);
0192 DECLARE_APQ_GPIO_PINS(78);
0193 DECLARE_APQ_GPIO_PINS(79);
0194 DECLARE_APQ_GPIO_PINS(80);
0195 DECLARE_APQ_GPIO_PINS(81);
0196 DECLARE_APQ_GPIO_PINS(82);
0197 DECLARE_APQ_GPIO_PINS(83);
0198 DECLARE_APQ_GPIO_PINS(84);
0199 DECLARE_APQ_GPIO_PINS(85);
0200 DECLARE_APQ_GPIO_PINS(86);
0201 DECLARE_APQ_GPIO_PINS(87);
0202 DECLARE_APQ_GPIO_PINS(88);
0203 DECLARE_APQ_GPIO_PINS(89);
0204 
0205 static const unsigned int sdc1_clk_pins[] = { 90 };
0206 static const unsigned int sdc1_cmd_pins[] = { 91 };
0207 static const unsigned int sdc1_data_pins[] = { 92 };
0208 static const unsigned int sdc3_clk_pins[] = { 93 };
0209 static const unsigned int sdc3_cmd_pins[] = { 94 };
0210 static const unsigned int sdc3_data_pins[] = { 95 };
0211 
0212 #define FUNCTION(fname)                 \
0213     [APQ_MUX_##fname] = {               \
0214         .name = #fname,             \
0215         .groups = fname##_groups,       \
0216         .ngroups = ARRAY_SIZE(fname##_groups),  \
0217     }
0218 
0219 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10) \
0220     {                       \
0221         .name = "gpio" #id,         \
0222         .pins = gpio##id##_pins,        \
0223         .npins = ARRAY_SIZE(gpio##id##_pins),   \
0224         .funcs = (int[]){           \
0225             APQ_MUX_gpio,           \
0226             APQ_MUX_##f1,           \
0227             APQ_MUX_##f2,           \
0228             APQ_MUX_##f3,           \
0229             APQ_MUX_##f4,           \
0230             APQ_MUX_##f5,           \
0231             APQ_MUX_##f6,           \
0232             APQ_MUX_##f7,           \
0233             APQ_MUX_##f8,           \
0234             APQ_MUX_##f9,           \
0235             APQ_MUX_##f10,          \
0236         },                  \
0237         .nfuncs = 11,               \
0238         .ctl_reg = 0x1000 + 0x10 * id,      \
0239         .io_reg = 0x1004 + 0x10 * id,       \
0240         .intr_cfg_reg = 0x1008 + 0x10 * id, \
0241         .intr_status_reg = 0x100c + 0x10 * id,  \
0242         .intr_target_reg = 0x400 + 0x4 * id,    \
0243         .mux_bit = 2,               \
0244         .pull_bit = 0,              \
0245         .drv_bit = 6,               \
0246         .oe_bit = 9,                \
0247         .in_bit = 0,                \
0248         .out_bit = 1,               \
0249         .intr_enable_bit = 0,           \
0250         .intr_status_bit = 0,           \
0251         .intr_ack_high = 1,         \
0252         .intr_target_bit = 0,           \
0253         .intr_target_kpss_val = 4,      \
0254         .intr_raw_status_bit = 3,       \
0255         .intr_polarity_bit = 1,         \
0256         .intr_detection_bit = 2,        \
0257         .intr_detection_width = 1,      \
0258     }
0259 
0260 #define SDC_PINGROUP(pg_name, ctl, pull, drv)       \
0261     {                       \
0262         .name = #pg_name,           \
0263         .pins = pg_name##_pins,         \
0264         .npins = ARRAY_SIZE(pg_name##_pins),    \
0265         .ctl_reg = ctl,             \
0266         .io_reg = 0,                \
0267         .intr_cfg_reg = 0,          \
0268         .intr_status_reg = 0,           \
0269         .intr_target_reg = 0,           \
0270         .mux_bit = -1,              \
0271         .pull_bit = pull,           \
0272         .drv_bit = drv,             \
0273         .oe_bit = -1,               \
0274         .in_bit = -1,               \
0275         .out_bit = -1,              \
0276         .intr_enable_bit = -1,          \
0277         .intr_status_bit = -1,          \
0278         .intr_target_bit = -1,          \
0279         .intr_target_kpss_val = -1,     \
0280         .intr_raw_status_bit = -1,      \
0281         .intr_polarity_bit = -1,        \
0282         .intr_detection_bit = -1,       \
0283         .intr_detection_width = -1,     \
0284     }
0285 
0286 enum apq8064_functions {
0287     APQ_MUX_cam_mclk,
0288     APQ_MUX_codec_mic_i2s,
0289     APQ_MUX_codec_spkr_i2s,
0290     APQ_MUX_gp_clk_0a,
0291     APQ_MUX_gp_clk_0b,
0292     APQ_MUX_gp_clk_1a,
0293     APQ_MUX_gp_clk_1b,
0294     APQ_MUX_gp_clk_2a,
0295     APQ_MUX_gp_clk_2b,
0296     APQ_MUX_gpio,
0297     APQ_MUX_gsbi1,
0298     APQ_MUX_gsbi2,
0299     APQ_MUX_gsbi3,
0300     APQ_MUX_gsbi4,
0301     APQ_MUX_gsbi4_cam_i2c,
0302     APQ_MUX_gsbi5,
0303     APQ_MUX_gsbi5_spi_cs1,
0304     APQ_MUX_gsbi5_spi_cs2,
0305     APQ_MUX_gsbi5_spi_cs3,
0306     APQ_MUX_gsbi6,
0307     APQ_MUX_gsbi6_spi_cs1,
0308     APQ_MUX_gsbi6_spi_cs2,
0309     APQ_MUX_gsbi6_spi_cs3,
0310     APQ_MUX_gsbi7,
0311     APQ_MUX_gsbi7_spi_cs1,
0312     APQ_MUX_gsbi7_spi_cs2,
0313     APQ_MUX_gsbi7_spi_cs3,
0314     APQ_MUX_gsbi_cam_i2c,
0315     APQ_MUX_hdmi,
0316     APQ_MUX_mi2s,
0317     APQ_MUX_riva_bt,
0318     APQ_MUX_riva_fm,
0319     APQ_MUX_riva_wlan,
0320     APQ_MUX_sdc2,
0321     APQ_MUX_sdc4,
0322     APQ_MUX_slimbus,
0323     APQ_MUX_spkr_i2s,
0324     APQ_MUX_tsif1,
0325     APQ_MUX_tsif2,
0326     APQ_MUX_usb2_hsic,
0327     APQ_MUX_ps_hold,
0328     APQ_MUX_NA,
0329 };
0330 
0331 static const char * const cam_mclk_groups[] = {
0332     "gpio4" "gpio5"
0333 };
0334 static const char * const codec_mic_i2s_groups[] = {
0335     "gpio34", "gpio35", "gpio36", "gpio37", "gpio38"
0336 };
0337 static const char * const codec_spkr_i2s_groups[] = {
0338     "gpio39", "gpio40", "gpio41", "gpio42"
0339 };
0340 static const char * const gpio_groups[] = {
0341     "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
0342     "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
0343     "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
0344     "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
0345     "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
0346     "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
0347     "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
0348     "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
0349     "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
0350     "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
0351     "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
0352     "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
0353     "gpio85", "gpio86", "gpio87", "gpio88", "gpio89"
0354 };
0355 static const char * const gp_clk_0a_groups[] = {
0356     "gpio3"
0357 };
0358 static const char * const gp_clk_0b_groups[] = {
0359     "gpio34"
0360 };
0361 static const char * const gp_clk_1a_groups[] = {
0362     "gpio4"
0363 };
0364 static const char * const gp_clk_1b_groups[] = {
0365     "gpio50"
0366 };
0367 static const char * const gp_clk_2a_groups[] = {
0368     "gpio32"
0369 };
0370 static const char * const gp_clk_2b_groups[] = {
0371     "gpio25"
0372 };
0373 static const char * const ps_hold_groups[] = {
0374     "gpio78"
0375 };
0376 static const char * const gsbi1_groups[] = {
0377     "gpio18", "gpio19", "gpio20", "gpio21"
0378 };
0379 static const char * const gsbi2_groups[] = {
0380     "gpio22", "gpio23", "gpio24", "gpio25"
0381 };
0382 static const char * const gsbi3_groups[] = {
0383     "gpio6", "gpio7", "gpio8", "gpio9"
0384 };
0385 static const char * const gsbi4_groups[] = {
0386     "gpio10", "gpio11", "gpio12", "gpio13"
0387 };
0388 static const char * const gsbi4_cam_i2c_groups[] = {
0389     "gpio10", "gpio11", "gpio12", "gpio13"
0390 };
0391 static const char * const gsbi5_groups[] = {
0392     "gpio51", "gpio52", "gpio53", "gpio54"
0393 };
0394 static const char * const gsbi5_spi_cs1_groups[] = {
0395     "gpio47"
0396 };
0397 static const char * const gsbi5_spi_cs2_groups[] = {
0398     "gpio31"
0399 };
0400 static const char * const gsbi5_spi_cs3_groups[] = {
0401     "gpio32"
0402 };
0403 static const char * const gsbi6_groups[] = {
0404     "gpio14", "gpio15", "gpio16", "gpio17"
0405 };
0406 static const char * const gsbi6_spi_cs1_groups[] = {
0407     "gpio47"
0408 };
0409 static const char * const gsbi6_spi_cs2_groups[] = {
0410     "gpio31"
0411 };
0412 static const char * const gsbi6_spi_cs3_groups[] = {
0413     "gpio32"
0414 };
0415 static const char * const gsbi7_groups[] = {
0416     "gpio82", "gpio83", "gpio84", "gpio85"
0417 };
0418 static const char * const gsbi7_spi_cs1_groups[] = {
0419     "gpio47"
0420 };
0421 static const char * const gsbi7_spi_cs2_groups[] = {
0422     "gpio31"
0423 };
0424 static const char * const gsbi7_spi_cs3_groups[] = {
0425     "gpio32"
0426 };
0427 static const char * const gsbi_cam_i2c_groups[] = {
0428     "gpio10", "gpio11", "gpio12", "gpio13"
0429 };
0430 static const char * const hdmi_groups[] = {
0431     "gpio69", "gpio70", "gpio71", "gpio72"
0432 };
0433 static const char * const mi2s_groups[] = {
0434     "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32", "gpio33"
0435 };
0436 static const char * const riva_bt_groups[] = {
0437     "gpio16", "gpio17"
0438 };
0439 static const char * const riva_fm_groups[] = {
0440     "gpio14", "gpio15"
0441 };
0442 static const char * const riva_wlan_groups[] = {
0443     "gpio64", "gpio65", "gpio66", "gpio67", "gpio68"
0444 };
0445 static const char * const sdc2_groups[] = {
0446     "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62"
0447 };
0448 static const char * const sdc4_groups[] = {
0449     "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68"
0450 };
0451 static const char * const slimbus_groups[] = {
0452     "gpio40", "gpio41"
0453 };
0454 static const char * const spkr_i2s_groups[] = {
0455     "gpio47", "gpio48", "gpio49", "gpio50"
0456 };
0457 static const char * const tsif1_groups[] = {
0458     "gpio55", "gpio56", "gpio57"
0459 };
0460 static const char * const tsif2_groups[] = {
0461     "gpio58", "gpio59", "gpio60"
0462 };
0463 static const char * const usb2_hsic_groups[] = {
0464     "gpio88", "gpio89"
0465 };
0466 
0467 static const struct msm_function apq8064_functions[] = {
0468     FUNCTION(cam_mclk),
0469     FUNCTION(codec_mic_i2s),
0470     FUNCTION(codec_spkr_i2s),
0471     FUNCTION(gp_clk_0a),
0472     FUNCTION(gp_clk_0b),
0473     FUNCTION(gp_clk_1a),
0474     FUNCTION(gp_clk_1b),
0475     FUNCTION(gp_clk_2a),
0476     FUNCTION(gp_clk_2b),
0477     FUNCTION(gpio),
0478     FUNCTION(gsbi1),
0479     FUNCTION(gsbi2),
0480     FUNCTION(gsbi3),
0481     FUNCTION(gsbi4),
0482     FUNCTION(gsbi4_cam_i2c),
0483     FUNCTION(gsbi5),
0484     FUNCTION(gsbi5_spi_cs1),
0485     FUNCTION(gsbi5_spi_cs2),
0486     FUNCTION(gsbi5_spi_cs3),
0487     FUNCTION(gsbi6),
0488     FUNCTION(gsbi6_spi_cs1),
0489     FUNCTION(gsbi6_spi_cs2),
0490     FUNCTION(gsbi6_spi_cs3),
0491     FUNCTION(gsbi7),
0492     FUNCTION(gsbi7_spi_cs1),
0493     FUNCTION(gsbi7_spi_cs2),
0494     FUNCTION(gsbi7_spi_cs3),
0495     FUNCTION(gsbi_cam_i2c),
0496     FUNCTION(hdmi),
0497     FUNCTION(mi2s),
0498     FUNCTION(riva_bt),
0499     FUNCTION(riva_fm),
0500     FUNCTION(riva_wlan),
0501     FUNCTION(sdc2),
0502     FUNCTION(sdc4),
0503     FUNCTION(slimbus),
0504     FUNCTION(spkr_i2s),
0505     FUNCTION(tsif1),
0506     FUNCTION(tsif2),
0507     FUNCTION(usb2_hsic),
0508     FUNCTION(ps_hold),
0509 };
0510 
0511 static const struct msm_pingroup apq8064_groups[] = {
0512     PINGROUP(0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0513     PINGROUP(1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0514     PINGROUP(2, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0515     PINGROUP(3, NA, gp_clk_0a, NA, NA, NA, NA, NA, NA, NA, NA),
0516     PINGROUP(4, NA, NA, cam_mclk, gp_clk_1a, NA, NA, NA, NA, NA, NA),
0517     PINGROUP(5, NA, cam_mclk, NA, NA, NA, NA, NA, NA, NA, NA),
0518     PINGROUP(6, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0519     PINGROUP(7, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0520     PINGROUP(8, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0521     PINGROUP(9, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0522     PINGROUP(10, gsbi4, NA, NA, NA, NA, NA, NA, NA, gsbi4_cam_i2c, NA),
0523     PINGROUP(11, gsbi4, NA, NA, NA, NA, NA, NA, NA, NA, gsbi4_cam_i2c),
0524     PINGROUP(12, gsbi4, NA, NA, NA, NA, gsbi4_cam_i2c, NA, NA, NA, NA),
0525     PINGROUP(13, gsbi4, NA, NA, NA, NA, gsbi4_cam_i2c, NA, NA, NA, NA),
0526     PINGROUP(14, riva_fm, gsbi6, NA, NA, NA, NA, NA, NA, NA, NA),
0527     PINGROUP(15, riva_fm, gsbi6, NA, NA, NA, NA, NA, NA, NA, NA),
0528     PINGROUP(16, riva_bt, gsbi6, NA, NA, NA, NA, NA, NA, NA, NA),
0529     PINGROUP(17, riva_bt, gsbi6, NA, NA, NA, NA, NA, NA, NA, NA),
0530     PINGROUP(18, gsbi1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0531     PINGROUP(19, gsbi1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0532     PINGROUP(20, gsbi1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0533     PINGROUP(21, gsbi1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0534     PINGROUP(22, gsbi2, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0535     PINGROUP(23, gsbi2, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0536     PINGROUP(24, gsbi2, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0537     PINGROUP(25, gsbi2, gp_clk_2b, NA, NA, NA, NA, NA, NA, NA, NA),
0538     PINGROUP(26, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0539     PINGROUP(27, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0540     PINGROUP(28, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0541     PINGROUP(29, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0542     PINGROUP(30, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0543     PINGROUP(31, mi2s, NA, gsbi5_spi_cs2, gsbi6_spi_cs2, gsbi7_spi_cs2, NA, NA, NA, NA, NA),
0544     PINGROUP(32, mi2s, gp_clk_2a, NA, NA, NA, gsbi5_spi_cs3, gsbi6_spi_cs3, gsbi7_spi_cs3, NA, NA),
0545     PINGROUP(33, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0546     PINGROUP(34, codec_mic_i2s, gp_clk_0b, NA, NA, NA, NA, NA, NA, NA, NA),
0547     PINGROUP(35, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0548     PINGROUP(36, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0549     PINGROUP(37, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0550     PINGROUP(38, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0551     PINGROUP(39, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0552     PINGROUP(40, slimbus, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA),
0553     PINGROUP(41, slimbus, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA),
0554     PINGROUP(42, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0555     PINGROUP(43, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0556     PINGROUP(44, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0557     PINGROUP(45, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0558     PINGROUP(46, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0559     PINGROUP(47, spkr_i2s, gsbi5_spi_cs1, gsbi6_spi_cs1, gsbi7_spi_cs1, NA, NA, NA, NA, NA, NA),
0560     PINGROUP(48, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0561     PINGROUP(49, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0562     PINGROUP(50, spkr_i2s, gp_clk_1b, NA, NA, NA, NA, NA, NA, NA, NA),
0563     PINGROUP(51, NA, gsbi5, NA, NA, NA, NA, NA, NA, NA, NA),
0564     PINGROUP(52, NA, gsbi5, NA, NA, NA, NA, NA, NA, NA, NA),
0565     PINGROUP(53, NA, gsbi5, NA, NA, NA, NA, NA, NA, NA, NA),
0566     PINGROUP(54, NA, gsbi5, NA, NA, NA, NA, NA, NA, NA, NA),
0567     PINGROUP(55, tsif1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0568     PINGROUP(56, tsif1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0569     PINGROUP(57, tsif1, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
0570     PINGROUP(58, tsif2, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
0571     PINGROUP(59, tsif2, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
0572     PINGROUP(60, tsif2, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
0573     PINGROUP(61, NA, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
0574     PINGROUP(62, NA, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
0575     PINGROUP(63, NA, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
0576     PINGROUP(64, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
0577     PINGROUP(65, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
0578     PINGROUP(66, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
0579     PINGROUP(67, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
0580     PINGROUP(68, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
0581     PINGROUP(69, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0582     PINGROUP(70, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0583     PINGROUP(71, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0584     PINGROUP(72, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0585     PINGROUP(73, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0586     PINGROUP(74, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0587     PINGROUP(75, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0588     PINGROUP(76, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0589     PINGROUP(77, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0590     PINGROUP(78, ps_hold, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0591     PINGROUP(79, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0592     PINGROUP(80, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0593     PINGROUP(81, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0594     PINGROUP(82, NA, gsbi7, NA, NA, NA, NA, NA, NA, NA, NA),
0595     PINGROUP(83, gsbi7, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0596     PINGROUP(84, NA, gsbi7, NA, NA, NA, NA, NA, NA, NA, NA),
0597     PINGROUP(85, NA, NA, gsbi7, NA, NA, NA, NA, NA, NA, NA),
0598     PINGROUP(86, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0599     PINGROUP(87, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0600     PINGROUP(88, usb2_hsic, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0601     PINGROUP(89, usb2_hsic, NA, NA, NA, NA, NA, NA, NA, NA, NA),
0602 
0603     SDC_PINGROUP(sdc1_clk, 0x20a0, 13, 6),
0604     SDC_PINGROUP(sdc1_cmd, 0x20a0, 11, 3),
0605     SDC_PINGROUP(sdc1_data, 0x20a0, 9, 0),
0606 
0607     SDC_PINGROUP(sdc3_clk, 0x20a4, 14, 6),
0608     SDC_PINGROUP(sdc3_cmd, 0x20a4, 11, 3),
0609     SDC_PINGROUP(sdc3_data, 0x20a4, 9, 0),
0610 };
0611 
0612 #define NUM_GPIO_PINGROUPS 90
0613 
0614 static const struct msm_pinctrl_soc_data apq8064_pinctrl = {
0615     .pins = apq8064_pins,
0616     .npins = ARRAY_SIZE(apq8064_pins),
0617     .functions = apq8064_functions,
0618     .nfunctions = ARRAY_SIZE(apq8064_functions),
0619     .groups = apq8064_groups,
0620     .ngroups = ARRAY_SIZE(apq8064_groups),
0621     .ngpios = NUM_GPIO_PINGROUPS,
0622 };
0623 
0624 static int apq8064_pinctrl_probe(struct platform_device *pdev)
0625 {
0626     return msm_pinctrl_probe(pdev, &apq8064_pinctrl);
0627 }
0628 
0629 static const struct of_device_id apq8064_pinctrl_of_match[] = {
0630     { .compatible = "qcom,apq8064-pinctrl", },
0631     { },
0632 };
0633 
0634 static struct platform_driver apq8064_pinctrl_driver = {
0635     .driver = {
0636         .name = "apq8064-pinctrl",
0637         .of_match_table = apq8064_pinctrl_of_match,
0638     },
0639     .probe = apq8064_pinctrl_probe,
0640     .remove = msm_pinctrl_remove,
0641 };
0642 
0643 static int __init apq8064_pinctrl_init(void)
0644 {
0645     return platform_driver_register(&apq8064_pinctrl_driver);
0646 }
0647 arch_initcall(apq8064_pinctrl_init);
0648 
0649 static void __exit apq8064_pinctrl_exit(void)
0650 {
0651     platform_driver_unregister(&apq8064_pinctrl_driver);
0652 }
0653 module_exit(apq8064_pinctrl_exit);
0654 
0655 MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>");
0656 MODULE_DESCRIPTION("Qualcomm APQ8064 pinctrl driver");
0657 MODULE_LICENSE("GPL v2");
0658 MODULE_DEVICE_TABLE(of, apq8064_pinctrl_of_match);
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