pinctrl/pxa/pinctrl-pxa2xx.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Marvell PXA2xx family pin control
0004  *
0005  * Copyright (C) 2015 Robert Jarzmik
0006  */
0007
0008 #include <linux/bitops.h>
0009 #include <linux/io.h>
0010 #include <linux/of.h>
0011 #include <linux/of_address.h>
0012 #include <linux/module.h>
0013 #include <linux/pinctrl/machine.h>
0014 #include <linux/pinctrl/pinconf.h>
0015 #include <linux/pinctrl/pinconf-generic.h>
0016 #include <linux/pinctrl/pinmux.h>
0017 #include <linux/pinctrl/pinctrl.h>
0018 #include <linux/platform_device.h>
0019 #include <linux/slab.h>
0020
0021 #include "../pinctrl-utils.h"
0022 #include "pinctrl-pxa2xx.h"
0023
0024 static int pxa2xx_pctrl_get_groups_count(struct pinctrl_dev *pctldev)
0025 {
0026     struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
0027
0028     return pctl->ngroups;
0029 }
0030
0031 static const char *pxa2xx_pctrl_get_group_name(struct pinctrl_dev *pctldev,
0032                            unsigned tgroup)
0033 {
0034     struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
0035     struct pxa_pinctrl_group *group = pctl->groups + tgroup;
0036
0037     return group->name;
0038 }
0039
0040 static int pxa2xx_pctrl_get_group_pins(struct pinctrl_dev *pctldev,
0041                        unsigned tgroup,
0042                        const unsigned **pins,
0043                        unsigned *num_pins)
0044 {
0045     struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
0046     struct pxa_pinctrl_group *group = pctl->groups + tgroup;
0047
0048     *pins = (unsigned *)&group->pin;
0049     *num_pins = 1;
0050
0051     return 0;
0052 }
0053
0054 static const struct pinctrl_ops pxa2xx_pctl_ops = {
0055 #ifdef CONFIG_OF
0056     .dt_node_to_map     = pinconf_generic_dt_node_to_map_all,
0057     .dt_free_map        = pinctrl_utils_free_map,
0058 #endif
0059     .get_groups_count   = pxa2xx_pctrl_get_groups_count,
0060     .get_group_name     = pxa2xx_pctrl_get_group_name,
0061     .get_group_pins     = pxa2xx_pctrl_get_group_pins,
0062 };
0063
0064 static struct pxa_desc_function *
0065 pxa_desc_by_func_group(struct pxa_pinctrl *pctl, const char *pin_name,
0066                const char *func_name)
0067 {
0068     int i;
0069     struct pxa_desc_function *df;
0070
0071     for (i = 0; i < pctl->npins; i++) {
0072         const struct pxa_desc_pin *pin = pctl->ppins + i;
0073
0074         if (!strcmp(pin->pin.name, pin_name))
0075             for (df = pin->functions; df->name; df++)
0076                 if (!strcmp(df->name, func_name))
0077                     return df;
0078     }
0079
0080     return NULL;
0081 }
0082
0083 static int pxa2xx_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
0084                      struct pinctrl_gpio_range *range,
0085                      unsigned pin,
0086                      bool input)
0087 {
0088     struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
0089     unsigned long flags;
0090     uint32_t val;
0091     void __iomem *gpdr;
0092
0093     gpdr = pctl->base_gpdr[pin / 32];
0094     dev_dbg(pctl->dev, "set_direction(pin=%d): dir=%d\n",
0095         pin, !input);
0096
0097     spin_lock_irqsave(&pctl->lock, flags);
0098
0099     val = readl_relaxed(gpdr);
0100     val = (val & ~BIT(pin % 32)) | (input ? 0 : BIT(pin % 32));
0101     writel_relaxed(val, gpdr);
0102
0103     spin_unlock_irqrestore(&pctl->lock, flags);
0104
0105     return 0;
0106 }
0107
0108 static const char *pxa2xx_pmx_get_func_name(struct pinctrl_dev *pctldev,
0109                         unsigned function)
0110 {
0111     struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
0112     struct pxa_pinctrl_function *pf = pctl->functions + function;
0113
0114     return pf->name;
0115 }
0116
0117 static int pxa2xx_get_functions_count(struct pinctrl_dev *pctldev)
0118 {
0119     struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
0120
0121     return pctl->nfuncs;
0122 }
0123
0124 static int pxa2xx_pmx_get_func_groups(struct pinctrl_dev *pctldev,
0125                       unsigned function,
0126                       const char * const **groups,
0127                       unsigned * const num_groups)
0128 {
0129     struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
0130     struct pxa_pinctrl_function *pf = pctl->functions + function;
0131
0132     *groups = pf->groups;
0133     *num_groups = pf->ngroups;
0134
0135     return 0;
0136 }
0137
0138 static int pxa2xx_pmx_set_mux(struct pinctrl_dev *pctldev, unsigned function,
0139                   unsigned tgroup)
0140 {
0141     struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
0142     struct pxa_pinctrl_group *group = pctl->groups + tgroup;
0143     struct pxa_desc_function *df;
0144     int pin, shift;
0145     unsigned long flags;
0146     void __iomem *gafr, *gpdr;
0147     u32 val;
0148
0149
0150     df = pxa_desc_by_func_group(pctl, group->name,
0151                     (pctl->functions + function)->name);
0152     if (!df)
0153         return -EINVAL;
0154
0155     pin = group->pin;
0156     gafr = pctl->base_gafr[pin / 16];
0157     gpdr = pctl->base_gpdr[pin / 32];
0158     shift = (pin % 16) << 1;
0159     dev_dbg(pctl->dev, "set_mux(pin=%d): af=%d dir=%d\n",
0160         pin, df->muxval >> 1, df->muxval & 0x1);
0161
0162     spin_lock_irqsave(&pctl->lock, flags);
0163
0164     val = readl_relaxed(gafr);
0165     val = (val & ~(0x3 << shift)) | ((df->muxval >> 1) << shift);
0166     writel_relaxed(val, gafr);
0167
0168     val = readl_relaxed(gpdr);
0169     val = (val & ~BIT(pin % 32)) | ((df->muxval & 1) ? BIT(pin % 32) : 0);
0170     writel_relaxed(val, gpdr);
0171
0172     spin_unlock_irqrestore(&pctl->lock, flags);
0173
0174     return 0;
0175 }
0176 static const struct pinmux_ops pxa2xx_pinmux_ops = {
0177     .get_functions_count = pxa2xx_get_functions_count,
0178     .get_function_name = pxa2xx_pmx_get_func_name,
0179     .get_function_groups = pxa2xx_pmx_get_func_groups,
0180     .set_mux = pxa2xx_pmx_set_mux,
0181     .gpio_set_direction = pxa2xx_pmx_gpio_set_direction,
0182 };
0183
0184 static int pxa2xx_pconf_group_get(struct pinctrl_dev *pctldev,
0185                   unsigned group,
0186                   unsigned long *config)
0187 {
0188     struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
0189     struct pxa_pinctrl_group *g = pctl->groups + group;
0190     unsigned long flags;
0191     unsigned pin = g->pin;
0192     void __iomem *pgsr = pctl->base_pgsr[pin / 32];
0193     u32 val;
0194
0195     spin_lock_irqsave(&pctl->lock, flags);
0196     val = readl_relaxed(pgsr) & BIT(pin % 32);
0197     *config = val ? PIN_CONFIG_MODE_LOW_POWER : 0;
0198     spin_unlock_irqrestore(&pctl->lock, flags);
0199
0200     dev_dbg(pctl->dev, "get sleep gpio state(pin=%d) %d\n",
0201         pin, !!val);
0202     return 0;
0203 }
0204
0205 static int pxa2xx_pconf_group_set(struct pinctrl_dev *pctldev,
0206                   unsigned group,
0207                   unsigned long *configs,
0208                   unsigned num_configs)
0209 {
0210     struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
0211     struct pxa_pinctrl_group *g = pctl->groups + group;
0212     unsigned long flags;
0213     unsigned pin = g->pin;
0214     void __iomem *pgsr = pctl->base_pgsr[pin / 32];
0215     int i, is_set = 0;
0216     u32 val;
0217
0218     for (i = 0; i < num_configs; i++) {
0219         switch (pinconf_to_config_param(configs[i])) {
0220         case PIN_CONFIG_MODE_LOW_POWER:
0221             is_set = pinconf_to_config_argument(configs[i]);
0222             break;
0223         default:
0224             return -EINVAL;
0225         }
0226     }
0227
0228     dev_dbg(pctl->dev, "set sleep gpio state(pin=%d) %d\n",
0229         pin, is_set);
0230
0231     spin_lock_irqsave(&pctl->lock, flags);
0232     val = readl_relaxed(pgsr);
0233     val = (val & ~BIT(pin % 32)) | (is_set ? BIT(pin % 32) : 0);
0234     writel_relaxed(val, pgsr);
0235     spin_unlock_irqrestore(&pctl->lock, flags);
0236
0237     return 0;
0238 }
0239
0240 static const struct pinconf_ops pxa2xx_pconf_ops = {
0241     .pin_config_group_get   = pxa2xx_pconf_group_get,
0242     .pin_config_group_set   = pxa2xx_pconf_group_set,
0243     .is_generic     = true,
0244 };
0245
0246 static struct pinctrl_desc pxa2xx_pinctrl_desc = {
0247     .confops    = &pxa2xx_pconf_ops,
0248     .pctlops    = &pxa2xx_pctl_ops,
0249     .pmxops     = &pxa2xx_pinmux_ops,
0250 };
0251
0252 static const struct pxa_pinctrl_function *
0253 pxa2xx_find_function(struct pxa_pinctrl *pctl, const char *fname,
0254              const struct pxa_pinctrl_function *functions)
0255 {
0256     const struct pxa_pinctrl_function *func;
0257
0258     for (func = functions; func->name; func++)
0259         if (!strcmp(fname, func->name))
0260             return func;
0261
0262     return NULL;
0263 }
0264
0265 static int pxa2xx_build_functions(struct pxa_pinctrl *pctl)
0266 {
0267     int i;
0268     struct pxa_pinctrl_function *functions;
0269     struct pxa_desc_function *df;
0270
0271     /*
0272      * Each pin can have at most 6 alternate functions, and 2 gpio functions
0273      * which are common to each pin. As there are more than 2 pins without
0274      * alternate function, 6 * npins is an absolute high limit of the number
0275      * of functions.
0276      */
0277     functions = devm_kcalloc(pctl->dev, pctl->npins * 6,
0278                  sizeof(*functions), GFP_KERNEL);
0279     if (!functions)
0280         return -ENOMEM;
0281
0282     for (i = 0; i < pctl->npins; i++)
0283         for (df = pctl->ppins[i].functions; df->name; df++)
0284             if (!pxa2xx_find_function(pctl, df->name, functions))
0285                 (functions + pctl->nfuncs++)->name = df->name;
0286     pctl->functions = devm_kmemdup(pctl->dev, functions,
0287                        pctl->nfuncs * sizeof(*functions),
0288                        GFP_KERNEL);
0289     if (!pctl->functions)
0290         return -ENOMEM;
0291
0292     devm_kfree(pctl->dev, functions);
0293     return 0;
0294 }
0295
0296 static int pxa2xx_build_groups(struct pxa_pinctrl *pctl)
0297 {
0298     int i, j, ngroups;
0299     struct pxa_pinctrl_function *func;
0300     struct pxa_desc_function *df;
0301     char **gtmp;
0302
0303     gtmp = devm_kmalloc_array(pctl->dev, pctl->npins, sizeof(*gtmp),
0304                   GFP_KERNEL);
0305     if (!gtmp)
0306         return -ENOMEM;
0307
0308     for (i = 0; i < pctl->nfuncs; i++) {
0309         ngroups = 0;
0310         for (j = 0; j < pctl->npins; j++)
0311             for (df = pctl->ppins[j].functions; df->name;
0312                  df++)
0313                 if (!strcmp(pctl->functions[i].name,
0314                         df->name))
0315                     gtmp[ngroups++] = (char *)
0316                         pctl->ppins[j].pin.name;
0317         func = pctl->functions + i;
0318         func->ngroups = ngroups;
0319         func->groups =
0320             devm_kmalloc_array(pctl->dev, ngroups,
0321                        sizeof(char *), GFP_KERNEL);
0322         if (!func->groups)
0323             return -ENOMEM;
0324
0325         memcpy(func->groups, gtmp, ngroups * sizeof(*gtmp));
0326     }
0327
0328     devm_kfree(pctl->dev, gtmp);
0329     return 0;
0330 }
0331
0332 static int pxa2xx_build_state(struct pxa_pinctrl *pctl,
0333                   const struct pxa_desc_pin *ppins, int npins)
0334 {
0335     struct pxa_pinctrl_group *group;
0336     struct pinctrl_pin_desc *pins;
0337     int ret, i;
0338
0339     pctl->npins = npins;
0340     pctl->ppins = ppins;
0341     pctl->ngroups = npins;
0342
0343     pctl->desc.npins = npins;
0344     pins = devm_kcalloc(pctl->dev, npins, sizeof(*pins), GFP_KERNEL);
0345     if (!pins)
0346         return -ENOMEM;
0347
0348     pctl->desc.pins = pins;
0349     for (i = 0; i < npins; i++)
0350         pins[i] = ppins[i].pin;
0351
0352     pctl->groups = devm_kmalloc_array(pctl->dev, pctl->ngroups,
0353                       sizeof(*pctl->groups), GFP_KERNEL);
0354     if (!pctl->groups)
0355         return -ENOMEM;
0356
0357     for (i = 0; i < npins; i++) {
0358         group = pctl->groups + i;
0359         group->name = ppins[i].pin.name;
0360         group->pin = ppins[i].pin.number;
0361     }
0362
0363     ret = pxa2xx_build_functions(pctl);
0364     if (ret)
0365         return ret;
0366
0367     ret = pxa2xx_build_groups(pctl);
0368     if (ret)
0369         return ret;
0370
0371     return 0;
0372 }
0373
0374 int pxa2xx_pinctrl_init(struct platform_device *pdev,
0375             const struct pxa_desc_pin *ppins, int npins,
0376             void __iomem *base_gafr[], void __iomem *base_gpdr[],
0377             void __iomem *base_pgsr[])
0378 {
0379     struct pxa_pinctrl *pctl;
0380     int ret, i, maxpin = 0;
0381
0382     for (i = 0; i < npins; i++)
0383         maxpin = max_t(int, ppins[i].pin.number, maxpin);
0384
0385     pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
0386     if (!pctl)
0387         return -ENOMEM;
0388     pctl->base_gafr = devm_kcalloc(&pdev->dev, roundup(maxpin, 16),
0389                        sizeof(*pctl->base_gafr), GFP_KERNEL);
0390     pctl->base_gpdr = devm_kcalloc(&pdev->dev, roundup(maxpin, 32),
0391                        sizeof(*pctl->base_gpdr), GFP_KERNEL);
0392     pctl->base_pgsr = devm_kcalloc(&pdev->dev, roundup(maxpin, 32),
0393                        sizeof(*pctl->base_pgsr), GFP_KERNEL);
0394     if (!pctl->base_gafr || !pctl->base_gpdr || !pctl->base_pgsr)
0395         return -ENOMEM;
0396
0397     platform_set_drvdata(pdev, pctl);
0398     spin_lock_init(&pctl->lock);
0399
0400     pctl->dev = &pdev->dev;
0401     pctl->desc = pxa2xx_pinctrl_desc;
0402     pctl->desc.name = dev_name(&pdev->dev);
0403     pctl->desc.owner = THIS_MODULE;
0404
0405     for (i = 0; i < roundup(maxpin, 16); i += 16)
0406         pctl->base_gafr[i / 16] = base_gafr[i / 16];
0407     for (i = 0; i < roundup(maxpin, 32); i += 32) {
0408         pctl->base_gpdr[i / 32] = base_gpdr[i / 32];
0409         pctl->base_pgsr[i / 32] = base_pgsr[i / 32];
0410     }
0411
0412     ret = pxa2xx_build_state(pctl, ppins, npins);
0413     if (ret)
0414         return ret;
0415
0416     pctl->pctl_dev = devm_pinctrl_register(&pdev->dev, &pctl->desc, pctl);
0417     if (IS_ERR(pctl->pctl_dev)) {
0418         dev_err(&pdev->dev, "couldn't register pinctrl driver\n");
0419         return PTR_ERR(pctl->pctl_dev);
0420     }
0421
0422     dev_info(&pdev->dev, "initialized pxa2xx pinctrl driver\n");
0423
0424     return 0;
0425 }
0426 EXPORT_SYMBOL_GPL(pxa2xx_pinctrl_init);
0427
0428 MODULE_AUTHOR("Robert Jarzmik <robert.jarzmik@free.fr>");
0429 MODULE_DESCRIPTION("Marvell PXA2xx pinctrl driver");
0430 MODULE_LICENSE("GPL v2");