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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * ZynqMP pin controller
0004  *
0005  * Copyright (C) 2020, 2021 Xilinx, Inc.
0006  *
0007  * Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
0008  * Rajan Vaja <rajan.vaja@xilinx.com>
0009  */
0010 
0011 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
0012 
0013 #include <linux/init.h>
0014 #include <linux/module.h>
0015 #include <linux/of_address.h>
0016 #include <linux/platform_device.h>
0017 #include <linux/firmware/xlnx-zynqmp.h>
0018 
0019 #include <linux/pinctrl/pinmux.h>
0020 #include <linux/pinctrl/pinconf-generic.h>
0021 
0022 #include "core.h"
0023 #include "pinctrl-utils.h"
0024 
0025 #define ZYNQMP_PIN_PREFIX           "MIO"
0026 #define PINCTRL_GET_FUNC_NAME_RESP_LEN      16
0027 #define MAX_FUNC_NAME_LEN           16
0028 #define MAX_GROUP_PIN               50
0029 #define MAX_PIN_GROUPS              50
0030 #define END_OF_FUNCTIONS            "END_OF_FUNCTIONS"
0031 #define NUM_GROUPS_PER_RESP         6
0032 
0033 #define PINCTRL_GET_FUNC_GROUPS_RESP_LEN    12
0034 #define PINCTRL_GET_PIN_GROUPS_RESP_LEN     12
0035 #define NA_GROUP                0xFFFF
0036 #define RESERVED_GROUP              0xFFFE
0037 
0038 #define DRIVE_STRENGTH_2MA  2
0039 #define DRIVE_STRENGTH_4MA  4
0040 #define DRIVE_STRENGTH_8MA  8
0041 #define DRIVE_STRENGTH_12MA 12
0042 
0043 /**
0044  * struct zynqmp_pmux_function - a pinmux function
0045  * @name:   Name of the pin mux function
0046  * @groups: List of pin groups for this function
0047  * @ngroups:    Number of entries in @groups
0048  * @node:   Firmware node matching with the function
0049  *
0050  * This structure holds information about pin control function
0051  * and function group names supporting that function.
0052  */
0053 struct zynqmp_pmux_function {
0054     char name[MAX_FUNC_NAME_LEN];
0055     const char * const *groups;
0056     unsigned int ngroups;
0057 };
0058 
0059 /**
0060  * struct zynqmp_pinctrl - driver data
0061  * @pctrl:  Pin control device
0062  * @groups: Pin groups
0063  * @ngroups:    Number of @groups
0064  * @funcs:  Pin mux functions
0065  * @nfuncs: Number of @funcs
0066  *
0067  * This struct is stored as driver data and used to retrieve
0068  * information regarding pin control functions, groups and
0069  * group pins.
0070  */
0071 struct zynqmp_pinctrl {
0072     struct pinctrl_dev *pctrl;
0073     const struct zynqmp_pctrl_group *groups;
0074     unsigned int ngroups;
0075     const struct zynqmp_pmux_function *funcs;
0076     unsigned int nfuncs;
0077 };
0078 
0079 /**
0080  * struct zynqmp_pctrl_group - Pin control group info
0081  * @name:   Group name
0082  * @pins:   Group pin numbers
0083  * @npins:  Number of pins in the group
0084  */
0085 struct zynqmp_pctrl_group {
0086     const char *name;
0087     unsigned int pins[MAX_GROUP_PIN];
0088     unsigned int npins;
0089 };
0090 
0091 static struct pinctrl_desc zynqmp_desc;
0092 
0093 static int zynqmp_pctrl_get_groups_count(struct pinctrl_dev *pctldev)
0094 {
0095     struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
0096 
0097     return pctrl->ngroups;
0098 }
0099 
0100 static const char *zynqmp_pctrl_get_group_name(struct pinctrl_dev *pctldev,
0101                            unsigned int selector)
0102 {
0103     struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
0104 
0105     return pctrl->groups[selector].name;
0106 }
0107 
0108 static int zynqmp_pctrl_get_group_pins(struct pinctrl_dev *pctldev,
0109                        unsigned int selector,
0110                        const unsigned int **pins,
0111                        unsigned int *npins)
0112 {
0113     struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
0114 
0115     *pins = pctrl->groups[selector].pins;
0116     *npins = pctrl->groups[selector].npins;
0117 
0118     return 0;
0119 }
0120 
0121 static const struct pinctrl_ops zynqmp_pctrl_ops = {
0122     .get_groups_count = zynqmp_pctrl_get_groups_count,
0123     .get_group_name = zynqmp_pctrl_get_group_name,
0124     .get_group_pins = zynqmp_pctrl_get_group_pins,
0125     .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
0126     .dt_free_map = pinctrl_utils_free_map,
0127 };
0128 
0129 static int zynqmp_pinmux_request_pin(struct pinctrl_dev *pctldev,
0130                      unsigned int pin)
0131 {
0132     int ret;
0133 
0134     ret = zynqmp_pm_pinctrl_request(pin);
0135     if (ret) {
0136         dev_err(pctldev->dev, "request failed for pin %u\n", pin);
0137         return ret;
0138     }
0139 
0140     return 0;
0141 }
0142 
0143 static int zynqmp_pmux_get_functions_count(struct pinctrl_dev *pctldev)
0144 {
0145     struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
0146 
0147     return pctrl->nfuncs;
0148 }
0149 
0150 static const char *zynqmp_pmux_get_function_name(struct pinctrl_dev *pctldev,
0151                          unsigned int selector)
0152 {
0153     struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
0154 
0155     return pctrl->funcs[selector].name;
0156 }
0157 
0158 /**
0159  * zynqmp_pmux_get_function_groups() - Get groups for the function
0160  * @pctldev:    Pincontrol device pointer.
0161  * @selector:   Function ID
0162  * @groups: Group names.
0163  * @num_groups: Number of function groups.
0164  *
0165  * Get function's group count and group names.
0166  *
0167  * Return: 0
0168  */
0169 static int zynqmp_pmux_get_function_groups(struct pinctrl_dev *pctldev,
0170                        unsigned int selector,
0171                        const char * const **groups,
0172                        unsigned * const num_groups)
0173 {
0174     struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
0175 
0176     *groups = pctrl->funcs[selector].groups;
0177     *num_groups = pctrl->funcs[selector].ngroups;
0178 
0179     return 0;
0180 }
0181 
0182 /**
0183  * zynqmp_pinmux_set_mux() - Set requested function for the group
0184  * @pctldev:    Pincontrol device pointer.
0185  * @function:   Function ID.
0186  * @group:  Group ID.
0187  *
0188  * Loop through all pins of the group and call firmware API
0189  * to set requested function for all pins in the group.
0190  *
0191  * Return: 0 on success else error code.
0192  */
0193 static int zynqmp_pinmux_set_mux(struct pinctrl_dev *pctldev,
0194                  unsigned int function,
0195                  unsigned int group)
0196 {
0197     struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
0198     const struct zynqmp_pctrl_group *pgrp = &pctrl->groups[group];
0199     int ret, i;
0200 
0201     for (i = 0; i < pgrp->npins; i++) {
0202         unsigned int pin = pgrp->pins[i];
0203 
0204         ret = zynqmp_pm_pinctrl_set_function(pin, function);
0205         if (ret) {
0206             dev_err(pctldev->dev, "set mux failed for pin %u\n",
0207                 pin);
0208             return ret;
0209         }
0210     }
0211 
0212     return 0;
0213 }
0214 
0215 static int zynqmp_pinmux_release_pin(struct pinctrl_dev *pctldev,
0216                      unsigned int pin)
0217 {
0218     int ret;
0219 
0220     ret = zynqmp_pm_pinctrl_release(pin);
0221     if (ret) {
0222         dev_err(pctldev->dev, "free pin failed for pin %u\n",
0223             pin);
0224         return ret;
0225     }
0226 
0227     return 0;
0228 }
0229 
0230 static const struct pinmux_ops zynqmp_pinmux_ops = {
0231     .request = zynqmp_pinmux_request_pin,
0232     .get_functions_count = zynqmp_pmux_get_functions_count,
0233     .get_function_name = zynqmp_pmux_get_function_name,
0234     .get_function_groups = zynqmp_pmux_get_function_groups,
0235     .set_mux = zynqmp_pinmux_set_mux,
0236     .free = zynqmp_pinmux_release_pin,
0237 };
0238 
0239 /**
0240  * zynqmp_pinconf_cfg_get() - get config value for the pin
0241  * @pctldev:    Pin control device pointer.
0242  * @pin:    Pin number.
0243  * @config: Value of config param.
0244  *
0245  * Get value of the requested configuration parameter for the
0246  * given pin.
0247  *
0248  * Return: 0 on success else error code.
0249  */
0250 static int zynqmp_pinconf_cfg_get(struct pinctrl_dev *pctldev,
0251                   unsigned int pin,
0252                   unsigned long *config)
0253 {
0254     unsigned int arg, param = pinconf_to_config_param(*config);
0255     int ret;
0256 
0257     switch (param) {
0258     case PIN_CONFIG_SLEW_RATE:
0259         param = PM_PINCTRL_CONFIG_SLEW_RATE;
0260         ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
0261         break;
0262     case PIN_CONFIG_BIAS_PULL_UP:
0263         param = PM_PINCTRL_CONFIG_PULL_CTRL;
0264         ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
0265         if (arg != PM_PINCTRL_BIAS_PULL_UP)
0266             return -EINVAL;
0267 
0268         arg = 1;
0269         break;
0270     case PIN_CONFIG_BIAS_PULL_DOWN:
0271         param = PM_PINCTRL_CONFIG_PULL_CTRL;
0272         ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
0273         if (arg != PM_PINCTRL_BIAS_PULL_DOWN)
0274             return -EINVAL;
0275 
0276         arg = 1;
0277         break;
0278     case PIN_CONFIG_BIAS_DISABLE:
0279         param = PM_PINCTRL_CONFIG_BIAS_STATUS;
0280         ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
0281         if (arg != PM_PINCTRL_BIAS_DISABLE)
0282             return -EINVAL;
0283 
0284         arg = 1;
0285         break;
0286     case PIN_CONFIG_POWER_SOURCE:
0287         param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS;
0288         ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
0289         break;
0290     case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
0291         param = PM_PINCTRL_CONFIG_SCHMITT_CMOS;
0292         ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
0293         break;
0294     case PIN_CONFIG_DRIVE_STRENGTH:
0295         param = PM_PINCTRL_CONFIG_DRIVE_STRENGTH;
0296         ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
0297         switch (arg) {
0298         case PM_PINCTRL_DRIVE_STRENGTH_2MA:
0299             arg = DRIVE_STRENGTH_2MA;
0300             break;
0301         case PM_PINCTRL_DRIVE_STRENGTH_4MA:
0302             arg = DRIVE_STRENGTH_4MA;
0303             break;
0304         case PM_PINCTRL_DRIVE_STRENGTH_8MA:
0305             arg = DRIVE_STRENGTH_8MA;
0306             break;
0307         case PM_PINCTRL_DRIVE_STRENGTH_12MA:
0308             arg = DRIVE_STRENGTH_12MA;
0309             break;
0310         default:
0311             /* Invalid drive strength */
0312             dev_warn(pctldev->dev,
0313                  "Invalid drive strength for pin %d\n",
0314                  pin);
0315             return -EINVAL;
0316         }
0317         break;
0318     default:
0319         ret = -ENOTSUPP;
0320         break;
0321     }
0322 
0323     if (ret)
0324         return ret;
0325 
0326     param = pinconf_to_config_param(*config);
0327     *config = pinconf_to_config_packed(param, arg);
0328 
0329     return 0;
0330 }
0331 
0332 /**
0333  * zynqmp_pinconf_cfg_set() - Set requested config for the pin
0334  * @pctldev:        Pincontrol device pointer.
0335  * @pin:        Pin number.
0336  * @configs:        Configuration to set.
0337  * @num_configs:    Number of configurations.
0338  *
0339  * Loop through all configurations and call firmware API
0340  * to set requested configurations for the pin.
0341  *
0342  * Return: 0 on success else error code.
0343  */
0344 static int zynqmp_pinconf_cfg_set(struct pinctrl_dev *pctldev,
0345                   unsigned int pin, unsigned long *configs,
0346                   unsigned int num_configs)
0347 {
0348     int i, ret;
0349 
0350     for (i = 0; i < num_configs; i++) {
0351         unsigned int param = pinconf_to_config_param(configs[i]);
0352         unsigned int arg = pinconf_to_config_argument(configs[i]);
0353         unsigned int value;
0354 
0355         switch (param) {
0356         case PIN_CONFIG_SLEW_RATE:
0357             param = PM_PINCTRL_CONFIG_SLEW_RATE;
0358             ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
0359             break;
0360         case PIN_CONFIG_BIAS_PULL_UP:
0361             param = PM_PINCTRL_CONFIG_PULL_CTRL;
0362             arg = PM_PINCTRL_BIAS_PULL_UP;
0363             ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
0364             break;
0365         case PIN_CONFIG_BIAS_PULL_DOWN:
0366             param = PM_PINCTRL_CONFIG_PULL_CTRL;
0367             arg = PM_PINCTRL_BIAS_PULL_DOWN;
0368             ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
0369             break;
0370         case PIN_CONFIG_BIAS_DISABLE:
0371             param = PM_PINCTRL_CONFIG_BIAS_STATUS;
0372             arg = PM_PINCTRL_BIAS_DISABLE;
0373             ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
0374             break;
0375         case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
0376             param = PM_PINCTRL_CONFIG_SCHMITT_CMOS;
0377             ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
0378             break;
0379         case PIN_CONFIG_DRIVE_STRENGTH:
0380             switch (arg) {
0381             case DRIVE_STRENGTH_2MA:
0382                 value = PM_PINCTRL_DRIVE_STRENGTH_2MA;
0383                 break;
0384             case DRIVE_STRENGTH_4MA:
0385                 value = PM_PINCTRL_DRIVE_STRENGTH_4MA;
0386                 break;
0387             case DRIVE_STRENGTH_8MA:
0388                 value = PM_PINCTRL_DRIVE_STRENGTH_8MA;
0389                 break;
0390             case DRIVE_STRENGTH_12MA:
0391                 value = PM_PINCTRL_DRIVE_STRENGTH_12MA;
0392                 break;
0393             default:
0394                 /* Invalid drive strength */
0395                 dev_warn(pctldev->dev,
0396                      "Invalid drive strength for pin %d\n",
0397                      pin);
0398                 return -EINVAL;
0399             }
0400 
0401             param = PM_PINCTRL_CONFIG_DRIVE_STRENGTH;
0402             ret = zynqmp_pm_pinctrl_set_config(pin, param, value);
0403             break;
0404         case PIN_CONFIG_POWER_SOURCE:
0405             param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS;
0406             ret = zynqmp_pm_pinctrl_get_config(pin, param, &value);
0407 
0408             if (arg != value)
0409                 dev_warn(pctldev->dev,
0410                      "Invalid IO Standard requested for pin %d\n",
0411                      pin);
0412 
0413             break;
0414         case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
0415             param = PM_PINCTRL_CONFIG_TRI_STATE;
0416             arg = PM_PINCTRL_TRI_STATE_ENABLE;
0417             ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
0418             break;
0419         case PIN_CONFIG_MODE_LOW_POWER:
0420             /*
0421              * These cases are mentioned in dts but configurable
0422              * registers are unknown. So falling through to ignore
0423              * boot time warnings as of now.
0424              */
0425             ret = 0;
0426             break;
0427         case PIN_CONFIG_OUTPUT_ENABLE:
0428             param = PM_PINCTRL_CONFIG_TRI_STATE;
0429             arg = PM_PINCTRL_TRI_STATE_DISABLE;
0430             ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
0431             break;
0432         default:
0433             dev_warn(pctldev->dev,
0434                  "unsupported configuration parameter '%u'\n",
0435                  param);
0436             ret = -ENOTSUPP;
0437             break;
0438         }
0439 
0440         param = pinconf_to_config_param(configs[i]);
0441         arg = pinconf_to_config_argument(configs[i]);
0442         if (ret)
0443             dev_warn(pctldev->dev,
0444                  "failed to set: pin %u param %u value %u\n",
0445                  pin, param, arg);
0446     }
0447 
0448     return 0;
0449 }
0450 
0451 /**
0452  * zynqmp_pinconf_group_set() - Set requested config for the group
0453  * @pctldev:        Pincontrol device pointer.
0454  * @selector:       Group ID.
0455  * @configs:        Configuration to set.
0456  * @num_configs:    Number of configurations.
0457  *
0458  * Call function to set configs for each pin in the group.
0459  *
0460  * Return: 0 on success else error code.
0461  */
0462 static int zynqmp_pinconf_group_set(struct pinctrl_dev *pctldev,
0463                     unsigned int selector,
0464                     unsigned long *configs,
0465                     unsigned int num_configs)
0466 {
0467     int i, ret;
0468     struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
0469     const struct zynqmp_pctrl_group *pgrp = &pctrl->groups[selector];
0470 
0471     for (i = 0; i < pgrp->npins; i++) {
0472         ret = zynqmp_pinconf_cfg_set(pctldev, pgrp->pins[i], configs,
0473                          num_configs);
0474         if (ret)
0475             return ret;
0476     }
0477 
0478     return 0;
0479 }
0480 
0481 static const struct pinconf_ops zynqmp_pinconf_ops = {
0482     .is_generic = true,
0483     .pin_config_get = zynqmp_pinconf_cfg_get,
0484     .pin_config_set = zynqmp_pinconf_cfg_set,
0485     .pin_config_group_set = zynqmp_pinconf_group_set,
0486 };
0487 
0488 static struct pinctrl_desc zynqmp_desc = {
0489     .name = "zynqmp_pinctrl",
0490     .owner = THIS_MODULE,
0491     .pctlops = &zynqmp_pctrl_ops,
0492     .pmxops = &zynqmp_pinmux_ops,
0493     .confops = &zynqmp_pinconf_ops,
0494 };
0495 
0496 static int zynqmp_pinctrl_get_function_groups(u32 fid, u32 index, u16 *groups)
0497 {
0498     struct zynqmp_pm_query_data qdata = {0};
0499     u32 payload[PAYLOAD_ARG_CNT];
0500     int ret;
0501 
0502     qdata.qid = PM_QID_PINCTRL_GET_FUNCTION_GROUPS;
0503     qdata.arg1 = fid;
0504     qdata.arg2 = index;
0505 
0506     ret = zynqmp_pm_query_data(qdata, payload);
0507     if (ret)
0508         return ret;
0509 
0510     memcpy(groups, &payload[1], PINCTRL_GET_FUNC_GROUPS_RESP_LEN);
0511 
0512     return 0;
0513 }
0514 
0515 static int zynqmp_pinctrl_get_func_num_groups(u32 fid, unsigned int *ngroups)
0516 {
0517     struct zynqmp_pm_query_data qdata = {0};
0518     u32 payload[PAYLOAD_ARG_CNT];
0519     int ret;
0520 
0521     qdata.qid = PM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS;
0522     qdata.arg1 = fid;
0523 
0524     ret = zynqmp_pm_query_data(qdata, payload);
0525     if (ret)
0526         return ret;
0527 
0528     *ngroups = payload[1];
0529 
0530     return 0;
0531 }
0532 
0533 /**
0534  * zynqmp_pinctrl_prepare_func_groups() - prepare function and groups data
0535  * @dev:    Device pointer.
0536  * @fid:    Function ID.
0537  * @func:   Function data.
0538  * @groups: Groups data.
0539  *
0540  * Query firmware to get group IDs for each function. Firmware returns
0541  * group IDs. Based on the group index for the function, group names in
0542  * the function are stored. For example, the first group in "eth0" function
0543  * is named as "eth0_0" and the second group as "eth0_1" and so on.
0544  *
0545  * Based on the group ID received from the firmware, function stores name of
0546  * the group for that group ID. For example, if "eth0" first group ID
0547  * is x, groups[x] name will be stored as "eth0_0".
0548  *
0549  * Once done for each function, each function would have its group names
0550  * and each group would also have their names.
0551  *
0552  * Return: 0 on success else error code.
0553  */
0554 static int zynqmp_pinctrl_prepare_func_groups(struct device *dev, u32 fid,
0555                           struct zynqmp_pmux_function *func,
0556                           struct zynqmp_pctrl_group *groups)
0557 {
0558     u16 resp[NUM_GROUPS_PER_RESP] = {0};
0559     const char **fgroups;
0560     int ret, index, i;
0561 
0562     fgroups = devm_kzalloc(dev, sizeof(*fgroups) * func->ngroups, GFP_KERNEL);
0563     if (!fgroups)
0564         return -ENOMEM;
0565 
0566     for (index = 0; index < func->ngroups; index += NUM_GROUPS_PER_RESP) {
0567         ret = zynqmp_pinctrl_get_function_groups(fid, index, resp);
0568         if (ret)
0569             return ret;
0570 
0571         for (i = 0; i < NUM_GROUPS_PER_RESP; i++) {
0572             if (resp[i] == NA_GROUP)
0573                 goto done;
0574 
0575             if (resp[i] == RESERVED_GROUP)
0576                 continue;
0577 
0578             fgroups[index + i] = devm_kasprintf(dev, GFP_KERNEL,
0579                                 "%s_%d_grp",
0580                                 func->name,
0581                                 index + i);
0582             if (!fgroups[index + i])
0583                 return -ENOMEM;
0584 
0585             groups[resp[i]].name = devm_kasprintf(dev, GFP_KERNEL,
0586                                   "%s_%d_grp",
0587                                   func->name,
0588                                   index + i);
0589             if (!groups[resp[i]].name)
0590                 return -ENOMEM;
0591         }
0592     }
0593 done:
0594     func->groups = fgroups;
0595 
0596     return 0;
0597 }
0598 
0599 static void zynqmp_pinctrl_get_function_name(u32 fid, char *name)
0600 {
0601     struct zynqmp_pm_query_data qdata = {0};
0602     u32 payload[PAYLOAD_ARG_CNT];
0603 
0604     qdata.qid = PM_QID_PINCTRL_GET_FUNCTION_NAME;
0605     qdata.arg1 = fid;
0606 
0607     /*
0608      * Name of the function is maximum 16 bytes and cannot
0609      * accommodate the return value in SMC buffers, hence ignoring
0610      * the return value for this specific qid.
0611      */
0612     zynqmp_pm_query_data(qdata, payload);
0613     memcpy(name, payload, PINCTRL_GET_FUNC_NAME_RESP_LEN);
0614 }
0615 
0616 static int zynqmp_pinctrl_get_num_functions(unsigned int *nfuncs)
0617 {
0618     struct zynqmp_pm_query_data qdata = {0};
0619     u32 payload[PAYLOAD_ARG_CNT];
0620     int ret;
0621 
0622     qdata.qid = PM_QID_PINCTRL_GET_NUM_FUNCTIONS;
0623 
0624     ret = zynqmp_pm_query_data(qdata, payload);
0625     if (ret)
0626         return ret;
0627 
0628     *nfuncs = payload[1];
0629 
0630     return 0;
0631 }
0632 
0633 static int zynqmp_pinctrl_get_pin_groups(u32 pin, u32 index, u16 *groups)
0634 {
0635     struct zynqmp_pm_query_data qdata = {0};
0636     u32 payload[PAYLOAD_ARG_CNT];
0637     int ret;
0638 
0639     qdata.qid = PM_QID_PINCTRL_GET_PIN_GROUPS;
0640     qdata.arg1 = pin;
0641     qdata.arg2 = index;
0642 
0643     ret = zynqmp_pm_query_data(qdata, payload);
0644     if (ret)
0645         return ret;
0646 
0647     memcpy(groups, &payload[1], PINCTRL_GET_PIN_GROUPS_RESP_LEN);
0648 
0649     return 0;
0650 }
0651 
0652 static void zynqmp_pinctrl_group_add_pin(struct zynqmp_pctrl_group *group,
0653                      unsigned int pin)
0654 {
0655     group->pins[group->npins++] = pin;
0656 }
0657 
0658 /**
0659  * zynqmp_pinctrl_create_pin_groups() - assign pins to respective groups
0660  * @dev:    Device pointer.
0661  * @groups: Groups data.
0662  * @pin:    Pin number.
0663  *
0664  * Query firmware to get groups available for the given pin.
0665  * Based on the firmware response(group IDs for the pin), add
0666  * pin number to the respective group's pin array.
0667  *
0668  * Once all pins are queries, each group would have its number
0669  * of pins and pin numbers data.
0670  *
0671  * Return: 0 on success else error code.
0672  */
0673 static int zynqmp_pinctrl_create_pin_groups(struct device *dev,
0674                         struct zynqmp_pctrl_group *groups,
0675                         unsigned int pin)
0676 {
0677     u16 resp[NUM_GROUPS_PER_RESP] = {0};
0678     int ret, i, index = 0;
0679 
0680     do {
0681         ret = zynqmp_pinctrl_get_pin_groups(pin, index, resp);
0682         if (ret)
0683             return ret;
0684 
0685         for (i = 0; i < NUM_GROUPS_PER_RESP; i++) {
0686             if (resp[i] == NA_GROUP)
0687                 return ret;
0688 
0689             if (resp[i] == RESERVED_GROUP)
0690                 continue;
0691 
0692             zynqmp_pinctrl_group_add_pin(&groups[resp[i]], pin);
0693         }
0694         index += NUM_GROUPS_PER_RESP;
0695     } while (index <= MAX_PIN_GROUPS);
0696 
0697     return 0;
0698 }
0699 
0700 /**
0701  * zynqmp_pinctrl_prepare_group_pins() - prepare each group's pin data
0702  * @dev:    Device pointer.
0703  * @groups: Groups data.
0704  * @ngroups:    Number of groups.
0705  *
0706  * Prepare pin number and number of pins data for each pins.
0707  *
0708  * Return: 0 on success else error code.
0709  */
0710 static int zynqmp_pinctrl_prepare_group_pins(struct device *dev,
0711                          struct zynqmp_pctrl_group *groups,
0712                          unsigned int ngroups)
0713 {
0714     unsigned int pin;
0715     int ret;
0716 
0717     for (pin = 0; pin < zynqmp_desc.npins; pin++) {
0718         ret = zynqmp_pinctrl_create_pin_groups(dev, groups, pin);
0719         if (ret)
0720             return ret;
0721     }
0722 
0723     return 0;
0724 }
0725 
0726 /**
0727  * zynqmp_pinctrl_prepare_function_info() - prepare function info
0728  * @dev:    Device pointer.
0729  * @pctrl:  Pin control driver data.
0730  *
0731  * Query firmware for functions, groups and pin information and
0732  * prepare pin control driver data.
0733  *
0734  * Query number of functions and number of function groups (number
0735  * of groups in the given function) to allocate required memory buffers
0736  * for functions and groups. Once buffers are allocated to store
0737  * functions and groups data, query and store required information
0738  * (number of groups and group names for each function, number of
0739  * pins and pin numbers for each group).
0740  *
0741  * Return: 0 on success else error code.
0742  */
0743 static int zynqmp_pinctrl_prepare_function_info(struct device *dev,
0744                         struct zynqmp_pinctrl *pctrl)
0745 {
0746     struct zynqmp_pmux_function *funcs;
0747     struct zynqmp_pctrl_group *groups;
0748     int ret, i;
0749 
0750     ret = zynqmp_pinctrl_get_num_functions(&pctrl->nfuncs);
0751     if (ret)
0752         return ret;
0753 
0754     funcs = devm_kzalloc(dev, sizeof(*funcs) * pctrl->nfuncs, GFP_KERNEL);
0755     if (!funcs)
0756         return -ENOMEM;
0757 
0758     for (i = 0; i < pctrl->nfuncs; i++) {
0759         zynqmp_pinctrl_get_function_name(i, funcs[i].name);
0760 
0761         ret = zynqmp_pinctrl_get_func_num_groups(i, &funcs[i].ngroups);
0762         if (ret)
0763             return ret;
0764 
0765         pctrl->ngroups += funcs[i].ngroups;
0766     }
0767 
0768     groups = devm_kzalloc(dev, sizeof(*groups) * pctrl->ngroups, GFP_KERNEL);
0769     if (!groups)
0770         return -ENOMEM;
0771 
0772     for (i = 0; i < pctrl->nfuncs; i++) {
0773         ret = zynqmp_pinctrl_prepare_func_groups(dev, i, &funcs[i],
0774                              groups);
0775         if (ret)
0776             return ret;
0777     }
0778 
0779     ret = zynqmp_pinctrl_prepare_group_pins(dev, groups, pctrl->ngroups);
0780     if (ret)
0781         return ret;
0782 
0783     pctrl->funcs = funcs;
0784     pctrl->groups = groups;
0785 
0786     return 0;
0787 }
0788 
0789 static int zynqmp_pinctrl_get_num_pins(unsigned int *npins)
0790 {
0791     struct zynqmp_pm_query_data qdata = {0};
0792     u32 payload[PAYLOAD_ARG_CNT];
0793     int ret;
0794 
0795     qdata.qid = PM_QID_PINCTRL_GET_NUM_PINS;
0796 
0797     ret = zynqmp_pm_query_data(qdata, payload);
0798     if (ret)
0799         return ret;
0800 
0801     *npins = payload[1];
0802 
0803     return 0;
0804 }
0805 
0806 /**
0807  * zynqmp_pinctrl_prepare_pin_desc() - prepare pin description info
0808  * @dev:        Device pointer.
0809  * @zynqmp_pins:    Pin information.
0810  * @npins:      Number of pins.
0811  *
0812  * Query number of pins information from firmware and prepare pin
0813  * description containing pin number and pin name.
0814  *
0815  * Return: 0 on success else error code.
0816  */
0817 static int zynqmp_pinctrl_prepare_pin_desc(struct device *dev,
0818                        const struct pinctrl_pin_desc
0819                        **zynqmp_pins,
0820                        unsigned int *npins)
0821 {
0822     struct pinctrl_pin_desc *pins, *pin;
0823     int ret;
0824     int i;
0825 
0826     ret = zynqmp_pinctrl_get_num_pins(npins);
0827     if (ret)
0828         return ret;
0829 
0830     pins = devm_kzalloc(dev, sizeof(*pins) * *npins, GFP_KERNEL);
0831     if (!pins)
0832         return -ENOMEM;
0833 
0834     for (i = 0; i < *npins; i++) {
0835         pin = &pins[i];
0836         pin->number = i;
0837         pin->name = devm_kasprintf(dev, GFP_KERNEL, "%s%d",
0838                        ZYNQMP_PIN_PREFIX, i);
0839         if (!pin->name)
0840             return -ENOMEM;
0841     }
0842 
0843     *zynqmp_pins = pins;
0844 
0845     return 0;
0846 }
0847 
0848 static int zynqmp_pinctrl_probe(struct platform_device *pdev)
0849 {
0850     struct zynqmp_pinctrl *pctrl;
0851     int ret;
0852 
0853     pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);
0854     if (!pctrl)
0855         return -ENOMEM;
0856 
0857     ret = zynqmp_pinctrl_prepare_pin_desc(&pdev->dev,
0858                           &zynqmp_desc.pins,
0859                           &zynqmp_desc.npins);
0860     if (ret) {
0861         dev_err(&pdev->dev, "pin desc prepare fail with %d\n", ret);
0862         return ret;
0863     }
0864 
0865     ret = zynqmp_pinctrl_prepare_function_info(&pdev->dev, pctrl);
0866     if (ret) {
0867         dev_err(&pdev->dev, "function info prepare fail with %d\n", ret);
0868         return ret;
0869     }
0870 
0871     pctrl->pctrl = devm_pinctrl_register(&pdev->dev, &zynqmp_desc, pctrl);
0872     if (IS_ERR(pctrl->pctrl))
0873         return PTR_ERR(pctrl->pctrl);
0874 
0875     platform_set_drvdata(pdev, pctrl);
0876 
0877     return ret;
0878 }
0879 
0880 static const struct of_device_id zynqmp_pinctrl_of_match[] = {
0881     { .compatible = "xlnx,zynqmp-pinctrl" },
0882     { }
0883 };
0884 MODULE_DEVICE_TABLE(of, zynqmp_pinctrl_of_match);
0885 
0886 static struct platform_driver zynqmp_pinctrl_driver = {
0887     .driver = {
0888         .name = "zynqmp-pinctrl",
0889         .of_match_table = zynqmp_pinctrl_of_match,
0890     },
0891     .probe = zynqmp_pinctrl_probe,
0892 };
0893 module_platform_driver(zynqmp_pinctrl_driver);
0894 
0895 MODULE_AUTHOR("Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>");
0896 MODULE_DESCRIPTION("ZynqMP Pin Controller Driver");
0897 MODULE_LICENSE("GPL v2");
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