drivers/pinctrl/pinctrl-rk805.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Pinctrl driver for Rockchip RK805 PMIC
0004  *
0005  * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd
0006  *
0007  * Author: Joseph Chen <chenjh@rock-chips.com>
0008  *
0009  * Based on the pinctrl-as3722 driver
0010  */
0011
0012 #include <linux/gpio/driver.h>
0013 #include <linux/kernel.h>
0014 #include <linux/module.h>
0015 #include <linux/mfd/rk808.h>
0016 #include <linux/platform_device.h>
0017 #include <linux/pm.h>
0018 #include <linux/property.h>
0019 #include <linux/slab.h>
0020
0021 #include <linux/pinctrl/consumer.h>
0022 #include <linux/pinctrl/machine.h>
0023 #include <linux/pinctrl/pinctrl.h>
0024 #include <linux/pinctrl/pinconf-generic.h>
0025 #include <linux/pinctrl/pinconf.h>
0026 #include <linux/pinctrl/pinmux.h>
0027
0028 #include "core.h"
0029 #include "pinconf.h"
0030 #include "pinctrl-utils.h"
0031
0032 struct rk805_pin_function {
0033     const char *name;
0034     const char *const *groups;
0035     unsigned int ngroups;
0036     int mux_option;
0037 };
0038
0039 struct rk805_pin_group {
0040     const char *name;
0041     const unsigned int pins[1];
0042     unsigned int npins;
0043 };
0044
0045 /*
0046  * @reg: gpio setting register;
0047  * @fun_mask: functions select mask value, when set is gpio;
0048  * @dir_mask: input or output mask value, when set is output, otherwise input;
0049  * @val_mask: gpio set value, when set is level high, otherwise low;
0050  *
0051  * Different PMIC has different pin features, belowing 3 mask members are not
0052  * all necessary for every PMIC. For example, RK805 has 2 pins that can be used
0053  * as output only GPIOs, so func_mask and dir_mask are not needed. RK816 has 1
0054  * pin that can be used as TS/GPIO, so fun_mask, dir_mask and val_mask are all
0055  * necessary.
0056  */
0057 struct rk805_pin_config {
0058     u8 reg;
0059     u8 fun_msk;
0060     u8 dir_msk;
0061     u8 val_msk;
0062 };
0063
0064 struct rk805_pctrl_info {
0065     struct rk808 *rk808;
0066     struct device *dev;
0067     struct pinctrl_dev *pctl;
0068     struct gpio_chip gpio_chip;
0069     struct pinctrl_desc pinctrl_desc;
0070     const struct rk805_pin_function *functions;
0071     unsigned int num_functions;
0072     const struct rk805_pin_group *groups;
0073     int num_pin_groups;
0074     const struct pinctrl_pin_desc *pins;
0075     unsigned int num_pins;
0076     const struct rk805_pin_config *pin_cfg;
0077 };
0078
0079 enum rk805_pinmux_option {
0080     RK805_PINMUX_GPIO,
0081 };
0082
0083 enum {
0084     RK805_GPIO0,
0085     RK805_GPIO1,
0086 };
0087
0088 static const char *const rk805_gpio_groups[] = {
0089     "gpio0",
0090     "gpio1",
0091 };
0092
0093 /* RK805: 2 output only GPIOs */
0094 static const struct pinctrl_pin_desc rk805_pins_desc[] = {
0095     PINCTRL_PIN(RK805_GPIO0, "gpio0"),
0096     PINCTRL_PIN(RK805_GPIO1, "gpio1"),
0097 };
0098
0099 static const struct rk805_pin_function rk805_pin_functions[] = {
0100     {
0101         .name = "gpio",
0102         .groups = rk805_gpio_groups,
0103         .ngroups = ARRAY_SIZE(rk805_gpio_groups),
0104         .mux_option = RK805_PINMUX_GPIO,
0105     },
0106 };
0107
0108 static const struct rk805_pin_group rk805_pin_groups[] = {
0109     {
0110         .name = "gpio0",
0111         .pins = { RK805_GPIO0 },
0112         .npins = 1,
0113     },
0114     {
0115         .name = "gpio1",
0116         .pins = { RK805_GPIO1 },
0117         .npins = 1,
0118     },
0119 };
0120
0121 #define RK805_GPIO0_VAL_MSK BIT(0)
0122 #define RK805_GPIO1_VAL_MSK BIT(1)
0123
0124 static const struct rk805_pin_config rk805_gpio_cfgs[] = {
0125     {
0126         .reg = RK805_OUT_REG,
0127         .val_msk = RK805_GPIO0_VAL_MSK,
0128     },
0129     {
0130         .reg = RK805_OUT_REG,
0131         .val_msk = RK805_GPIO1_VAL_MSK,
0132     },
0133 };
0134
0135 /* generic gpio chip */
0136 static int rk805_gpio_get(struct gpio_chip *chip, unsigned int offset)
0137 {
0138     struct rk805_pctrl_info *pci = gpiochip_get_data(chip);
0139     int ret, val;
0140
0141     ret = regmap_read(pci->rk808->regmap, pci->pin_cfg[offset].reg, &val);
0142     if (ret) {
0143         dev_err(pci->dev, "get gpio%d value failed\n", offset);
0144         return ret;
0145     }
0146
0147     return !!(val & pci->pin_cfg[offset].val_msk);
0148 }
0149
0150 static void rk805_gpio_set(struct gpio_chip *chip,
0151                unsigned int offset,
0152                int value)
0153 {
0154     struct rk805_pctrl_info *pci = gpiochip_get_data(chip);
0155     int ret;
0156
0157     ret = regmap_update_bits(pci->rk808->regmap,
0158                  pci->pin_cfg[offset].reg,
0159                  pci->pin_cfg[offset].val_msk,
0160                  value ? pci->pin_cfg[offset].val_msk : 0);
0161     if (ret)
0162         dev_err(pci->dev, "set gpio%d value %d failed\n",
0163             offset, value);
0164 }
0165
0166 static int rk805_gpio_direction_input(struct gpio_chip *chip,
0167                       unsigned int offset)
0168 {
0169     return pinctrl_gpio_direction_input(chip->base + offset);
0170 }
0171
0172 static int rk805_gpio_direction_output(struct gpio_chip *chip,
0173                        unsigned int offset, int value)
0174 {
0175     rk805_gpio_set(chip, offset, value);
0176     return pinctrl_gpio_direction_output(chip->base + offset);
0177 }
0178
0179 static int rk805_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
0180 {
0181     struct rk805_pctrl_info *pci = gpiochip_get_data(chip);
0182     unsigned int val;
0183     int ret;
0184
0185     /* default output*/
0186     if (!pci->pin_cfg[offset].dir_msk)
0187         return GPIO_LINE_DIRECTION_OUT;
0188
0189     ret = regmap_read(pci->rk808->regmap,
0190               pci->pin_cfg[offset].reg,
0191               &val);
0192     if (ret) {
0193         dev_err(pci->dev, "get gpio%d direction failed\n", offset);
0194         return ret;
0195     }
0196
0197     if (val & pci->pin_cfg[offset].dir_msk)
0198         return GPIO_LINE_DIRECTION_OUT;
0199
0200     return GPIO_LINE_DIRECTION_IN;
0201 }
0202
0203 static const struct gpio_chip rk805_gpio_chip = {
0204     .label          = "rk805-gpio",
0205     .request        = gpiochip_generic_request,
0206     .free           = gpiochip_generic_free,
0207     .get_direction      = rk805_gpio_get_direction,
0208     .get            = rk805_gpio_get,
0209     .set            = rk805_gpio_set,
0210     .direction_input    = rk805_gpio_direction_input,
0211     .direction_output   = rk805_gpio_direction_output,
0212     .can_sleep      = true,
0213     .base           = -1,
0214     .owner          = THIS_MODULE,
0215 };
0216
0217 /* generic pinctrl */
0218 static int rk805_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
0219 {
0220     struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
0221
0222     return pci->num_pin_groups;
0223 }
0224
0225 static const char *rk805_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
0226                         unsigned int group)
0227 {
0228     struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
0229
0230     return pci->groups[group].name;
0231 }
0232
0233 static int rk805_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
0234                     unsigned int group,
0235                     const unsigned int **pins,
0236                     unsigned int *num_pins)
0237 {
0238     struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
0239
0240     *pins = pci->groups[group].pins;
0241     *num_pins = pci->groups[group].npins;
0242
0243     return 0;
0244 }
0245
0246 static const struct pinctrl_ops rk805_pinctrl_ops = {
0247     .get_groups_count = rk805_pinctrl_get_groups_count,
0248     .get_group_name = rk805_pinctrl_get_group_name,
0249     .get_group_pins = rk805_pinctrl_get_group_pins,
0250     .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
0251     .dt_free_map = pinctrl_utils_free_map,
0252 };
0253
0254 static int rk805_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
0255 {
0256     struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
0257
0258     return pci->num_functions;
0259 }
0260
0261 static const char *rk805_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
0262                            unsigned int function)
0263 {
0264     struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
0265
0266     return pci->functions[function].name;
0267 }
0268
0269 static int rk805_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,
0270                      unsigned int function,
0271                      const char *const **groups,
0272                      unsigned int *const num_groups)
0273 {
0274     struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
0275
0276     *groups = pci->functions[function].groups;
0277     *num_groups = pci->functions[function].ngroups;
0278
0279     return 0;
0280 }
0281
0282 static int _rk805_pinctrl_set_mux(struct pinctrl_dev *pctldev,
0283                   unsigned int offset,
0284                   int mux)
0285 {
0286     struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
0287     int ret;
0288
0289     if (!pci->pin_cfg[offset].fun_msk)
0290         return 0;
0291
0292     if (mux == RK805_PINMUX_GPIO) {
0293         ret = regmap_update_bits(pci->rk808->regmap,
0294                      pci->pin_cfg[offset].reg,
0295                      pci->pin_cfg[offset].fun_msk,
0296                      pci->pin_cfg[offset].fun_msk);
0297         if (ret) {
0298             dev_err(pci->dev, "set gpio%d GPIO failed\n", offset);
0299             return ret;
0300         }
0301     } else {
0302         dev_err(pci->dev, "Couldn't find function mux %d\n", mux);
0303         return -EINVAL;
0304     }
0305
0306     return 0;
0307 }
0308
0309 static int rk805_pinctrl_set_mux(struct pinctrl_dev *pctldev,
0310                  unsigned int function,
0311                  unsigned int group)
0312 {
0313     struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
0314     int mux = pci->functions[function].mux_option;
0315     int offset = group;
0316
0317     return _rk805_pinctrl_set_mux(pctldev, offset, mux);
0318 }
0319
0320 static int rk805_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
0321                     struct pinctrl_gpio_range *range,
0322                     unsigned int offset, bool input)
0323 {
0324     struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
0325     int ret;
0326
0327     /* switch to gpio function */
0328     ret = _rk805_pinctrl_set_mux(pctldev, offset, RK805_PINMUX_GPIO);
0329     if (ret) {
0330         dev_err(pci->dev, "set gpio%d mux failed\n", offset);
0331         return ret;
0332     }
0333
0334     /* set direction */
0335     if (!pci->pin_cfg[offset].dir_msk)
0336         return 0;
0337
0338     ret = regmap_update_bits(pci->rk808->regmap,
0339                  pci->pin_cfg[offset].reg,
0340                  pci->pin_cfg[offset].dir_msk,
0341                  input ? 0 : pci->pin_cfg[offset].dir_msk);
0342     if (ret) {
0343         dev_err(pci->dev, "set gpio%d direction failed\n", offset);
0344         return ret;
0345     }
0346
0347     return ret;
0348 }
0349
0350 static const struct pinmux_ops rk805_pinmux_ops = {
0351     .get_functions_count    = rk805_pinctrl_get_funcs_count,
0352     .get_function_name  = rk805_pinctrl_get_func_name,
0353     .get_function_groups    = rk805_pinctrl_get_func_groups,
0354     .set_mux        = rk805_pinctrl_set_mux,
0355     .gpio_set_direction = rk805_pmx_gpio_set_direction,
0356 };
0357
0358 static int rk805_pinconf_get(struct pinctrl_dev *pctldev,
0359                  unsigned int pin, unsigned long *config)
0360 {
0361     struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
0362     enum pin_config_param param = pinconf_to_config_param(*config);
0363     u32 arg = 0;
0364
0365     switch (param) {
0366     case PIN_CONFIG_OUTPUT:
0367         arg = rk805_gpio_get(&pci->gpio_chip, pin);
0368         break;
0369     default:
0370         dev_err(pci->dev, "Properties not supported\n");
0371         return -ENOTSUPP;
0372     }
0373
0374     *config = pinconf_to_config_packed(param, (u16)arg);
0375
0376     return 0;
0377 }
0378
0379 static int rk805_pinconf_set(struct pinctrl_dev *pctldev,
0380                  unsigned int pin, unsigned long *configs,
0381                  unsigned int num_configs)
0382 {
0383     struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
0384     enum pin_config_param param;
0385     u32 i, arg = 0;
0386
0387     for (i = 0; i < num_configs; i++) {
0388         param = pinconf_to_config_param(configs[i]);
0389         arg = pinconf_to_config_argument(configs[i]);
0390
0391         switch (param) {
0392         case PIN_CONFIG_OUTPUT:
0393             rk805_gpio_set(&pci->gpio_chip, pin, arg);
0394             rk805_pmx_gpio_set_direction(pctldev, NULL, pin, false);
0395             break;
0396         default:
0397             dev_err(pci->dev, "Properties not supported\n");
0398             return -ENOTSUPP;
0399         }
0400     }
0401
0402     return 0;
0403 }
0404
0405 static const struct pinconf_ops rk805_pinconf_ops = {
0406     .pin_config_get = rk805_pinconf_get,
0407     .pin_config_set = rk805_pinconf_set,
0408 };
0409
0410 static const struct pinctrl_desc rk805_pinctrl_desc = {
0411     .name = "rk805-pinctrl",
0412     .pctlops = &rk805_pinctrl_ops,
0413     .pmxops = &rk805_pinmux_ops,
0414     .confops = &rk805_pinconf_ops,
0415     .owner = THIS_MODULE,
0416 };
0417
0418 static int rk805_pinctrl_probe(struct platform_device *pdev)
0419 {
0420     struct rk805_pctrl_info *pci;
0421     int ret;
0422
0423     device_set_node(&pdev->dev, dev_fwnode(pdev->dev.parent));
0424
0425     pci = devm_kzalloc(&pdev->dev, sizeof(*pci), GFP_KERNEL);
0426     if (!pci)
0427         return -ENOMEM;
0428
0429     pci->dev = &pdev->dev;
0430     pci->rk808 = dev_get_drvdata(pdev->dev.parent);
0431
0432     pci->pinctrl_desc = rk805_pinctrl_desc;
0433     pci->gpio_chip = rk805_gpio_chip;
0434     pci->gpio_chip.parent = &pdev->dev;
0435
0436     platform_set_drvdata(pdev, pci);
0437
0438     switch (pci->rk808->variant) {
0439     case RK805_ID:
0440         pci->pins = rk805_pins_desc;
0441         pci->num_pins = ARRAY_SIZE(rk805_pins_desc);
0442         pci->functions = rk805_pin_functions;
0443         pci->num_functions = ARRAY_SIZE(rk805_pin_functions);
0444         pci->groups = rk805_pin_groups;
0445         pci->num_pin_groups = ARRAY_SIZE(rk805_pin_groups);
0446         pci->pinctrl_desc.pins = rk805_pins_desc;
0447         pci->pinctrl_desc.npins = ARRAY_SIZE(rk805_pins_desc);
0448         pci->pin_cfg = rk805_gpio_cfgs;
0449         pci->gpio_chip.ngpio = ARRAY_SIZE(rk805_gpio_cfgs);
0450         break;
0451     default:
0452         dev_err(&pdev->dev, "unsupported RK805 ID %lu\n",
0453             pci->rk808->variant);
0454         return -EINVAL;
0455     }
0456
0457     /* Add gpio chip */
0458     ret = devm_gpiochip_add_data(&pdev->dev, &pci->gpio_chip, pci);
0459     if (ret < 0) {
0460         dev_err(&pdev->dev, "Couldn't add gpiochip\n");
0461         return ret;
0462     }
0463
0464     /* Add pinctrl */
0465     pci->pctl = devm_pinctrl_register(&pdev->dev, &pci->pinctrl_desc, pci);
0466     if (IS_ERR(pci->pctl)) {
0467         dev_err(&pdev->dev, "Couldn't add pinctrl\n");
0468         return PTR_ERR(pci->pctl);
0469     }
0470
0471     /* Add pin range */
0472     ret = gpiochip_add_pin_range(&pci->gpio_chip, dev_name(&pdev->dev),
0473                      0, 0, pci->gpio_chip.ngpio);
0474     if (ret < 0) {
0475         dev_err(&pdev->dev, "Couldn't add gpiochip pin range\n");
0476         return ret;
0477     }
0478
0479     return 0;
0480 }
0481
0482 static struct platform_driver rk805_pinctrl_driver = {
0483     .probe = rk805_pinctrl_probe,
0484     .driver = {
0485         .name = "rk805-pinctrl",
0486     },
0487 };
0488 module_platform_driver(rk805_pinctrl_driver);
0489
0490 MODULE_DESCRIPTION("RK805 pin control and GPIO driver");
0491 MODULE_AUTHOR("Joseph Chen <chenjh@rock-chips.com>");
0492 MODULE_LICENSE("GPL v2");