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OSCL-LXR
 
 

     

0001 /*
0002  * Pinctrl driver for NXP LPC18xx/LPC43xx System Control Unit (SCU)
0003  *
0004  * Copyright (C) 2015 Joachim Eastwood <manabian@gmail.com>
0005  *
0006  * This file is licensed under the terms of the GNU General Public
0007  * License version 2. This program is licensed "as is" without any
0008  * warranty of any kind, whether express or implied.
0009  */
0010 
0011 #include <linux/bitops.h>
0012 #include <linux/clk.h>
0013 #include <linux/io.h>
0014 #include <linux/init.h>
0015 #include <linux/of.h>
0016 #include <linux/of_device.h>
0017 #include <linux/pinctrl/pinctrl.h>
0018 #include <linux/pinctrl/pinmux.h>
0019 #include <linux/pinctrl/pinconf-generic.h>
0020 
0021 #include "core.h"
0022 #include "pinctrl-utils.h"
0023 
0024 /* LPC18XX SCU analog function registers */
0025 #define LPC18XX_SCU_REG_ENAIO0      0xc88
0026 #define LPC18XX_SCU_REG_ENAIO1      0xc8c
0027 #define LPC18XX_SCU_REG_ENAIO2      0xc90
0028 #define LPC18XX_SCU_REG_ENAIO2_DAC  BIT(0)
0029 
0030 /* LPC18XX SCU pin register definitions */
0031 #define LPC18XX_SCU_PIN_MODE_MASK   0x7
0032 #define LPC18XX_SCU_PIN_EPD     BIT(3)
0033 #define LPC18XX_SCU_PIN_EPUN        BIT(4)
0034 #define LPC18XX_SCU_PIN_EHS     BIT(5)
0035 #define LPC18XX_SCU_PIN_EZI     BIT(6)
0036 #define LPC18XX_SCU_PIN_ZIF     BIT(7)
0037 #define LPC18XX_SCU_PIN_EHD_MASK    0x300
0038 #define LPC18XX_SCU_PIN_EHD_POS     8
0039 
0040 #define LPC18XX_SCU_USB1_EPD        BIT(2)
0041 #define LPC18XX_SCU_USB1_EPWR       BIT(4)
0042 
0043 #define LPC18XX_SCU_I2C0_EFP        BIT(0)
0044 #define LPC18XX_SCU_I2C0_EHD        BIT(2)
0045 #define LPC18XX_SCU_I2C0_EZI        BIT(3)
0046 #define LPC18XX_SCU_I2C0_ZIF        BIT(7)
0047 #define LPC18XX_SCU_I2C0_SCL_SHIFT  0
0048 #define LPC18XX_SCU_I2C0_SDA_SHIFT  8
0049 
0050 #define LPC18XX_SCU_FUNC_PER_PIN    8
0051 
0052 /* LPC18XX SCU pin interrupt select registers */
0053 #define LPC18XX_SCU_PINTSEL0        0xe00
0054 #define LPC18XX_SCU_PINTSEL1        0xe04
0055 #define LPC18XX_SCU_PINTSEL_VAL_MASK    0xff
0056 #define LPC18XX_SCU_PINTSEL_PORT_SHIFT  5
0057 #define LPC18XX_SCU_IRQ_PER_PINTSEL 4
0058 #define LPC18XX_GPIO_PINS_PER_PORT  32
0059 #define LPC18XX_GPIO_PIN_INT_MAX    8
0060 
0061 #define LPC18XX_SCU_PINTSEL_VAL(val, n) \
0062     ((val) << (((n) % LPC18XX_SCU_IRQ_PER_PINTSEL) * 8))
0063 
0064 /* LPC18xx pin types */
0065 enum {
0066     TYPE_ND,    /* Normal-drive */
0067     TYPE_HD,    /* High-drive */
0068     TYPE_HS,    /* High-speed */
0069     TYPE_I2C0,
0070     TYPE_USB1,
0071 };
0072 
0073 /* LPC18xx pin functions */
0074 enum {
0075     FUNC_R,     /* Reserved */
0076     FUNC_ADC,
0077     FUNC_ADCTRIG,
0078     FUNC_CAN0,
0079     FUNC_CAN1,
0080     FUNC_CGU_OUT,
0081     FUNC_CLKIN,
0082     FUNC_CLKOUT,
0083     FUNC_CTIN,
0084     FUNC_CTOUT,
0085     FUNC_DAC,
0086     FUNC_EMC,
0087     FUNC_EMC_ALT,
0088     FUNC_ENET,
0089     FUNC_ENET_ALT,
0090     FUNC_GPIO,
0091     FUNC_I2C0,
0092     FUNC_I2C1,
0093     FUNC_I2S0_RX_MCLK,
0094     FUNC_I2S0_RX_SCK,
0095     FUNC_I2S0_RX_SDA,
0096     FUNC_I2S0_RX_WS,
0097     FUNC_I2S0_TX_MCLK,
0098     FUNC_I2S0_TX_SCK,
0099     FUNC_I2S0_TX_SDA,
0100     FUNC_I2S0_TX_WS,
0101     FUNC_I2S1,
0102     FUNC_LCD,
0103     FUNC_LCD_ALT,
0104     FUNC_MCTRL,
0105     FUNC_NMI,
0106     FUNC_QEI,
0107     FUNC_SDMMC,
0108     FUNC_SGPIO,
0109     FUNC_SPI,
0110     FUNC_SPIFI,
0111     FUNC_SSP0,
0112     FUNC_SSP0_ALT,
0113     FUNC_SSP1,
0114     FUNC_TIMER0,
0115     FUNC_TIMER1,
0116     FUNC_TIMER2,
0117     FUNC_TIMER3,
0118     FUNC_TRACE,
0119     FUNC_UART0,
0120     FUNC_UART1,
0121     FUNC_UART2,
0122     FUNC_UART3,
0123     FUNC_USB0,
0124     FUNC_USB1,
0125     FUNC_MAX
0126 };
0127 
0128 static const char *const lpc18xx_function_names[] = {
0129     [FUNC_R]        = "reserved",
0130     [FUNC_ADC]      = "adc",
0131     [FUNC_ADCTRIG]      = "adctrig",
0132     [FUNC_CAN0]     = "can0",
0133     [FUNC_CAN1]     = "can1",
0134     [FUNC_CGU_OUT]      = "cgu_out",
0135     [FUNC_CLKIN]        = "clkin",
0136     [FUNC_CLKOUT]       = "clkout",
0137     [FUNC_CTIN]     = "ctin",
0138     [FUNC_CTOUT]        = "ctout",
0139     [FUNC_DAC]      = "dac",
0140     [FUNC_EMC]      = "emc",
0141     [FUNC_EMC_ALT]      = "emc_alt",
0142     [FUNC_ENET]     = "enet",
0143     [FUNC_ENET_ALT]     = "enet_alt",
0144     [FUNC_GPIO]     = "gpio",
0145     [FUNC_I2C0]     = "i2c0",
0146     [FUNC_I2C1]     = "i2c1",
0147     [FUNC_I2S0_RX_MCLK] = "i2s0_rx_mclk",
0148     [FUNC_I2S0_RX_SCK]  = "i2s0_rx_sck",
0149     [FUNC_I2S0_RX_SDA]  = "i2s0_rx_sda",
0150     [FUNC_I2S0_RX_WS]   = "i2s0_rx_ws",
0151     [FUNC_I2S0_TX_MCLK] = "i2s0_tx_mclk",
0152     [FUNC_I2S0_TX_SCK]  = "i2s0_tx_sck",
0153     [FUNC_I2S0_TX_SDA]  = "i2s0_tx_sda",
0154     [FUNC_I2S0_TX_WS]   = "i2s0_tx_ws",
0155     [FUNC_I2S1]     = "i2s1",
0156     [FUNC_LCD]      = "lcd",
0157     [FUNC_LCD_ALT]      = "lcd_alt",
0158     [FUNC_MCTRL]        = "mctrl",
0159     [FUNC_NMI]      = "nmi",
0160     [FUNC_QEI]      = "qei",
0161     [FUNC_SDMMC]        = "sdmmc",
0162     [FUNC_SGPIO]        = "sgpio",
0163     [FUNC_SPI]      = "spi",
0164     [FUNC_SPIFI]        = "spifi",
0165     [FUNC_SSP0]     = "ssp0",
0166     [FUNC_SSP0_ALT]     = "ssp0_alt",
0167     [FUNC_SSP1]     = "ssp1",
0168     [FUNC_TIMER0]       = "timer0",
0169     [FUNC_TIMER1]       = "timer1",
0170     [FUNC_TIMER2]       = "timer2",
0171     [FUNC_TIMER3]       = "timer3",
0172     [FUNC_TRACE]        = "trace",
0173     [FUNC_UART0]        = "uart0",
0174     [FUNC_UART1]        = "uart1",
0175     [FUNC_UART2]        = "uart2",
0176     [FUNC_UART3]        = "uart3",
0177     [FUNC_USB0]     = "usb0",
0178     [FUNC_USB1]     = "usb1",
0179 };
0180 
0181 struct lpc18xx_pmx_func {
0182     const char **groups;
0183     unsigned ngroups;
0184 };
0185 
0186 struct lpc18xx_scu_data {
0187     struct pinctrl_dev *pctl;
0188     void __iomem *base;
0189     struct clk *clk;
0190     struct lpc18xx_pmx_func func[FUNC_MAX];
0191 };
0192 
0193 struct lpc18xx_pin_caps {
0194     unsigned int offset;
0195     unsigned char functions[LPC18XX_SCU_FUNC_PER_PIN];
0196     unsigned char analog;
0197     unsigned char type;
0198 };
0199 
0200 /* Analog pins are required to have both bias and input disabled */
0201 #define LPC18XX_SCU_ANALOG_PIN_CFG  0x10
0202 
0203 /* Macros to maniupluate analog member in lpc18xx_pin_caps */
0204 #define LPC18XX_ANALOG_PIN      BIT(7)
0205 #define LPC18XX_ANALOG_ADC(a)       ((a >> 5) & 0x3)
0206 #define LPC18XX_ANALOG_BIT_MASK     0x1f
0207 #define ADC0                (LPC18XX_ANALOG_PIN | (0x00 << 5))
0208 #define ADC1                (LPC18XX_ANALOG_PIN | (0x01 << 5))
0209 #define DAC             LPC18XX_ANALOG_PIN
0210 
0211 #define LPC_P(port, pin, f0, f1, f2, f3, f4, f5, f6, f7, a, t)  \
0212 static struct lpc18xx_pin_caps lpc18xx_pin_p##port##_##pin = {  \
0213     .offset = 0x##port * 32 * 4 + pin * 4,          \
0214     .functions = {                      \
0215             FUNC_##f0, FUNC_##f1, FUNC_##f2,    \
0216             FUNC_##f3, FUNC_##f4, FUNC_##f5,    \
0217             FUNC_##f6, FUNC_##f7,           \
0218     },                          \
0219     .analog = a,                        \
0220     .type = TYPE_##t,                   \
0221 }
0222 
0223 #define LPC_N(pname, off, f0, f1, f2, f3, f4, f5, f6, f7, a, t) \
0224 static struct lpc18xx_pin_caps lpc18xx_pin_##pname = {      \
0225     .offset = off,                      \
0226     .functions = {                      \
0227             FUNC_##f0, FUNC_##f1, FUNC_##f2,    \
0228             FUNC_##f3, FUNC_##f4, FUNC_##f5,    \
0229             FUNC_##f6, FUNC_##f7,           \
0230     },                          \
0231     .analog = a,                        \
0232     .type = TYPE_##t,                   \
0233 }
0234 
0235 
0236 /* Pinmuxing table taken from data sheet */
0237 /*    Pin    FUNC0  FUNC1  FUNC2  FUNC3   FUNC4   FUNC5   FUNC6    FUNC7 ANALOG TYPE */
0238 LPC_P(0,0,   GPIO,  SSP1,  ENET,  SGPIO,      R,      R, I2S0_TX_WS,I2S1,     0, ND);
0239 LPC_P(0,1,   GPIO,  SSP1,ENET_ALT,SGPIO,      R,      R,   ENET,    I2S1,     0, ND);
0240 LPC_P(1,0,   GPIO,  CTIN,   EMC,      R,      R,   SSP0,  SGPIO,       R,     0, ND);
0241 LPC_P(1,1,   GPIO, CTOUT,   EMC,  SGPIO,      R,   SSP0,      R,       R,     0, ND);
0242 LPC_P(1,2,   GPIO, CTOUT,   EMC,  SGPIO,      R,   SSP0,      R,       R,     0, ND);
0243 LPC_P(1,3,   GPIO, CTOUT, SGPIO,    EMC,   USB0,   SSP1,      R,   SDMMC,     0, ND);
0244 LPC_P(1,4,   GPIO, CTOUT, SGPIO,    EMC,   USB0,   SSP1,      R,   SDMMC,     0, ND);
0245 LPC_P(1,5,   GPIO, CTOUT,     R,    EMC,   USB0,   SSP1,  SGPIO,   SDMMC,     0, ND);
0246 LPC_P(1,6,   GPIO,  CTIN,     R,    EMC,      R,      R,  SGPIO,   SDMMC,     0, ND);
0247 LPC_P(1,7,   GPIO, UART1, CTOUT,    EMC,   USB0,      R,      R,       R,     0, ND);
0248 LPC_P(1,8,   GPIO, UART1, CTOUT,    EMC,      R,      R,      R,   SDMMC,     0, ND);
0249 LPC_P(1,9,   GPIO, UART1, CTOUT,    EMC,      R,      R,      R,   SDMMC,     0, ND);
0250 LPC_P(1,10,  GPIO, UART1, CTOUT,    EMC,      R,      R,      R,   SDMMC,     0, ND);
0251 LPC_P(1,11,  GPIO, UART1, CTOUT,    EMC,      R,      R,      R,   SDMMC,     0, ND);
0252 LPC_P(1,12,  GPIO, UART1,     R,    EMC, TIMER0,      R,  SGPIO,   SDMMC,     0, ND);
0253 LPC_P(1,13,  GPIO, UART1,     R,    EMC, TIMER0,      R,  SGPIO,   SDMMC,     0, ND);
0254 LPC_P(1,14,  GPIO, UART1,     R,    EMC, TIMER0,      R,  SGPIO,       R,     0, ND);
0255 LPC_P(1,15,  GPIO, UART2, SGPIO,   ENET, TIMER0,      R,      R,       R,     0, ND);
0256 LPC_P(1,16,  GPIO, UART2, SGPIO,ENET_ALT,TIMER0,      R,      R,    ENET,     0, ND);
0257 LPC_P(1,17,  GPIO, UART2,     R,   ENET, TIMER0,   CAN1,  SGPIO,       R,     0, HD);
0258 LPC_P(1,18,  GPIO, UART2,     R,   ENET, TIMER0,   CAN1,  SGPIO,       R,     0, ND);
0259 LPC_P(1,19,  ENET,  SSP1,     R,      R, CLKOUT,      R, I2S0_RX_MCLK,I2S1,   0, ND);
0260 LPC_P(1,20,  GPIO,  SSP1,     R,   ENET, TIMER0,      R,  SGPIO,       R,     0, ND);
0261 LPC_P(2,0,  SGPIO, UART0,   EMC,   USB0,   GPIO,      R, TIMER3,    ENET,     0, ND);
0262 LPC_P(2,1,  SGPIO, UART0,   EMC,   USB0,   GPIO,      R, TIMER3,       R,     0, ND);
0263 LPC_P(2,2,  SGPIO, UART0,   EMC,   USB0,   GPIO,   CTIN, TIMER3,       R,     0, ND);
0264 LPC_P(2,3,  SGPIO,  I2C1, UART3,   CTIN,   GPIO,      R, TIMER3,    USB0,     0, HD);
0265 LPC_P(2,4,  SGPIO,  I2C1, UART3,   CTIN,   GPIO,      R, TIMER3,    USB0,     0, HD);
0266 LPC_P(2,5,  SGPIO,  CTIN,  USB1, ADCTRIG,  GPIO,      R, TIMER3,    USB0,     0, HD);
0267 LPC_P(2,6,  SGPIO, UART0,   EMC,   USB0,   GPIO,   CTIN, TIMER3,       R,     0, ND);
0268 LPC_P(2,7,   GPIO, CTOUT, UART3,    EMC,      R,      R, TIMER3,       R,     0, ND);
0269 LPC_P(2,8,  SGPIO, CTOUT, UART3,    EMC,   GPIO,      R,      R,       R,     0, ND);
0270 LPC_P(2,9,   GPIO, CTOUT, UART3,    EMC,      R,      R,      R,       R,     0, ND);
0271 LPC_P(2,10,  GPIO, CTOUT, UART2,    EMC,      R,      R,      R,       R,     0, ND);
0272 LPC_P(2,11,  GPIO, CTOUT, UART2,    EMC,      R,      R,      R,       R,     0, ND);
0273 LPC_P(2,12,  GPIO, CTOUT,     R,    EMC,      R,      R,      R,   UART2,     0, ND);
0274 LPC_P(2,13,  GPIO,  CTIN,     R,    EMC,      R,      R,      R,   UART2,     0, ND);
0275 LPC_P(3,0,  I2S0_RX_SCK, I2S0_RX_MCLK, I2S0_TX_SCK, I2S0_TX_MCLK,SSP0,R,R,R,  0, ND);
0276 LPC_P(3,1,  I2S0_TX_WS, I2S0_RX_WS,CAN0,USB1,GPIO,    R,    LCD,       R,     0, ND);
0277 LPC_P(3,2,  I2S0_TX_SDA, I2S0_RX_SDA,CAN0,USB1,GPIO,  R,    LCD,      R,      0, ND);
0278 LPC_P(3,3,      R,   SPI,  SSP0,  SPIFI, CGU_OUT,R, I2S0_TX_MCLK,  I2S1,      0, HS);
0279 LPC_P(3,4,   GPIO,     R,     R,  SPIFI,  UART1, I2S0_TX_WS, I2S1,  LCD,      0, ND);
0280 LPC_P(3,5,   GPIO,     R,     R,  SPIFI,  UART1, I2S0_TX_SDA,I2S1,  LCD,      0, ND);
0281 LPC_P(3,6,   GPIO,   SPI,  SSP0,  SPIFI,      R,  SSP0_ALT,   R,      R,      0, ND);
0282 LPC_P(3,7,      R,   SPI,  SSP0,  SPIFI,   GPIO,  SSP0_ALT,   R,      R,      0, ND);
0283 LPC_P(3,8,      R,   SPI,  SSP0,  SPIFI,   GPIO,  SSP0_ALT,   R,      R,      0, ND);
0284 LPC_P(4,0,   GPIO, MCTRL,   NMI,      R,      R,    LCD,  UART3,      R,      0, ND);
0285 LPC_P(4,1,   GPIO, CTOUT,   LCD,      R,      R, LCD_ALT, UART3,   ENET, ADC0|1, ND);
0286 LPC_P(4,2,   GPIO, CTOUT,   LCD,      R,      R, LCD_ALT, UART3,  SGPIO,      0, ND);
0287 LPC_P(4,3,   GPIO, CTOUT,   LCD,      R,      R, LCD_ALT, UART3,  SGPIO, ADC0|0, ND);
0288 LPC_P(4,4,   GPIO, CTOUT,   LCD,      R,      R, LCD_ALT, UART3,  SGPIO,    DAC, ND);
0289 LPC_P(4,5,   GPIO, CTOUT,   LCD,      R,      R,      R,      R,  SGPIO,      0, ND);
0290 LPC_P(4,6,   GPIO, CTOUT,   LCD,      R,      R,      R,      R,  SGPIO,      0, ND);
0291 LPC_P(4,7,    LCD, CLKIN,     R,      R,      R,      R,   I2S1,I2S0_TX_SCK,  0, ND);
0292 LPC_P(4,8,      R,  CTIN,   LCD,      R,   GPIO, LCD_ALT,  CAN1,  SGPIO,      0, ND);
0293 LPC_P(4,9,      R,  CTIN,   LCD,      R,   GPIO, LCD_ALT,  CAN1,  SGPIO,      0, ND);
0294 LPC_P(4,10,     R,  CTIN,   LCD,      R,   GPIO, LCD_ALT,     R,  SGPIO,      0, ND);
0295 LPC_P(5,0,   GPIO, MCTRL,   EMC,      R,  UART1, TIMER1,      R,      R,      0, ND);
0296 LPC_P(5,1,   GPIO, MCTRL,   EMC,      R,  UART1, TIMER1,      R,      R,      0, ND);
0297 LPC_P(5,2,   GPIO, MCTRL,   EMC,      R,  UART1, TIMER1,      R,      R,      0, ND);
0298 LPC_P(5,3,   GPIO, MCTRL,   EMC,      R,  UART1, TIMER1,      R,      R,      0, ND);
0299 LPC_P(5,4,   GPIO, MCTRL,   EMC,      R,  UART1, TIMER1,      R,      R,      0, ND);
0300 LPC_P(5,5,   GPIO, MCTRL,   EMC,      R,  UART1, TIMER1,      R,      R,      0, ND);
0301 LPC_P(5,6,   GPIO, MCTRL,   EMC,      R,  UART1, TIMER1,      R,      R,      0, ND);
0302 LPC_P(5,7,   GPIO, MCTRL,   EMC,      R,  UART1, TIMER1,      R,      R,      0, ND);
0303 LPC_P(6,0,      R, I2S0_RX_MCLK,R,    R, I2S0_RX_SCK, R,      R,      R,      0, ND);
0304 LPC_P(6,1,   GPIO,   EMC, UART0, I2S0_RX_WS,  R, TIMER2,      R,      R,      0, ND);
0305 LPC_P(6,2,   GPIO,   EMC, UART0, I2S0_RX_SDA, R, TIMER2,      R,      R,      0, ND);
0306 LPC_P(6,3,   GPIO,  USB0, SGPIO,    EMC,      R, TIMER2,      R,      R,      0, ND);
0307 LPC_P(6,4,   GPIO,  CTIN, UART0,    EMC,      R,      R,      R,      R,      0, ND);
0308 LPC_P(6,5,   GPIO, CTOUT, UART0,    EMC,      R,      R,      R,      R,      0, ND);
0309 LPC_P(6,6,   GPIO,   EMC, SGPIO,   USB0,      R, TIMER2,      R,      R,      0, ND);
0310 LPC_P(6,7,      R,   EMC, SGPIO,   USB0,   GPIO, TIMER2,      R,      R,      0, ND);
0311 LPC_P(6,8,      R,   EMC, SGPIO,   USB0,   GPIO, TIMER2,      R,      R,      0, ND);
0312 LPC_P(6,9,   GPIO,     R,     R,    EMC,      R, TIMER2,      R,      R,      0, ND);
0313 LPC_P(6,10,  GPIO, MCTRL,     R,    EMC,      R,      R,      R,      R,      0, ND);
0314 LPC_P(6,11,  GPIO,     R,     R,    EMC,      R, TIMER2,      R,      R,      0, ND);
0315 LPC_P(6,12,  GPIO, CTOUT,     R,    EMC,      R,      R,      R,      R,      0, ND);
0316 LPC_P(7,0,   GPIO, CTOUT,     R,    LCD,      R,      R,      R,  SGPIO,      0, ND);
0317 LPC_P(7,1,   GPIO, CTOUT,I2S0_TX_WS,LCD,LCD_ALT,      R,  UART2,  SGPIO,      0, ND);
0318 LPC_P(7,2,   GPIO, CTIN,I2S0_TX_SDA,LCD,LCD_ALT,      R,  UART2,  SGPIO,      0, ND);
0319 LPC_P(7,3,   GPIO, CTIN,      R,    LCD,LCD_ALT,      R,      R,      R,      0, ND);
0320 LPC_P(7,4,   GPIO, CTOUT,     R,    LCD,LCD_ALT,  TRACE,      R,      R, ADC0|4, ND);
0321 LPC_P(7,5,   GPIO, CTOUT,     R,    LCD,LCD_ALT,  TRACE,      R,      R, ADC0|3, ND);
0322 LPC_P(7,6,   GPIO, CTOUT,     R,    LCD,      R,  TRACE,      R,      R,      0, ND);
0323 LPC_P(7,7,   GPIO, CTOUT,     R,    LCD,      R,  TRACE,   ENET,  SGPIO, ADC1|6, ND);
0324 LPC_P(8,0,   GPIO,  USB0,     R,  MCTRL,  SGPIO,      R,      R, TIMER0,      0, HD);
0325 LPC_P(8,1,   GPIO,  USB0,     R,  MCTRL,  SGPIO,      R,      R, TIMER0,      0, HD);
0326 LPC_P(8,2,   GPIO,  USB0,     R,  MCTRL,  SGPIO,      R,      R, TIMER0,      0, HD);
0327 LPC_P(8,3,   GPIO,  USB1,     R,    LCD, LCD_ALT,     R,      R, TIMER0,      0, ND);
0328 LPC_P(8,4,   GPIO,  USB1,     R,    LCD, LCD_ALT,     R,      R, TIMER0,      0, ND);
0329 LPC_P(8,5,   GPIO,  USB1,     R,    LCD, LCD_ALT,     R,      R, TIMER0,      0, ND);
0330 LPC_P(8,6,   GPIO,  USB1,     R,    LCD, LCD_ALT,     R,      R, TIMER0,      0, ND);
0331 LPC_P(8,7,   GPIO,  USB1,     R,    LCD, LCD_ALT,     R,      R, TIMER0,      0, ND);
0332 LPC_P(8,8,      R,  USB1,     R,      R,      R,      R,CGU_OUT,   I2S1,      0, ND);
0333 LPC_P(9,0,   GPIO, MCTRL,     R,      R,      R,   ENET,  SGPIO,   SSP0,      0, ND);
0334 LPC_P(9,1,   GPIO, MCTRL,     R,      R, I2S0_TX_WS,ENET, SGPIO,   SSP0,      0, ND);
0335 LPC_P(9,2,   GPIO, MCTRL,     R,      R, I2S0_TX_SDA,ENET,SGPIO,   SSP0,      0, ND);
0336 LPC_P(9,3,   GPIO, MCTRL,  USB1,      R,      R,   ENET,  SGPIO,  UART3,      0, ND);
0337 LPC_P(9,4,      R, MCTRL,  USB1,      R,   GPIO,   ENET,  SGPIO,  UART3,      0, ND);
0338 LPC_P(9,5,      R, MCTRL,  USB1,      R,   GPIO,   ENET,  SGPIO,  UART0,      0, ND);
0339 LPC_P(9,6,   GPIO, MCTRL,  USB1,      R,      R,   ENET,  SGPIO,  UART0,      0, ND);
0340 LPC_P(a,0,      R,     R,     R,      R,      R,   I2S1, CGU_OUT,     R,      0, ND);
0341 LPC_P(a,1,   GPIO,   QEI,     R,  UART2,      R,      R,      R,      R,      0, HD);
0342 LPC_P(a,2,   GPIO,   QEI,     R,  UART2,      R,      R,      R,      R,      0, HD);
0343 LPC_P(a,3,   GPIO,   QEI,     R,      R,      R,      R,      R,      R,      0, HD);
0344 LPC_P(a,4,      R, CTOUT,     R,    EMC,   GPIO,      R,      R,      R,      0, ND);
0345 LPC_P(b,0,      R, CTOUT,   LCD,      R,   GPIO,      R,      R,      R,      0, ND);
0346 LPC_P(b,1,      R,  USB1,   LCD,      R,   GPIO,  CTOUT,      R,      R,      0, ND);
0347 LPC_P(b,2,      R,  USB1,   LCD,      R,   GPIO,  CTOUT,      R,      R,      0, ND);
0348 LPC_P(b,3,      R,  USB1,   LCD,      R,   GPIO,  CTOUT,      R,      R,      0, ND);
0349 LPC_P(b,4,      R,  USB1,   LCD,      R,   GPIO,   CTIN,      R,      R,      0, ND);
0350 LPC_P(b,5,      R,  USB1,   LCD,      R,   GPIO,   CTIN, LCD_ALT,     R,      0, ND);
0351 LPC_P(b,6,      R,  USB1,   LCD,      R,   GPIO,   CTIN, LCD_ALT,     R, ADC0|6, ND);
0352 LPC_P(c,0,      R,  USB1,     R,   ENET,    LCD,      R,      R,  SDMMC, ADC1|1, ND);
0353 LPC_P(c,1,   USB1,     R, UART1,   ENET,   GPIO,      R, TIMER3,  SDMMC,      0, ND);
0354 LPC_P(c,2,   USB1,     R, UART1,   ENET,   GPIO,      R,      R,  SDMMC,      0, ND);
0355 LPC_P(c,3,   USB1,     R, UART1,   ENET,   GPIO,      R,      R,  SDMMC, ADC1|0, ND);
0356 LPC_P(c,4,      R,  USB1,     R,   ENET,   GPIO,      R, TIMER3,  SDMMC,      0, ND);
0357 LPC_P(c,5,      R,  USB1,     R,   ENET,   GPIO,      R, TIMER3,  SDMMC,      0, ND);
0358 LPC_P(c,6,      R,  USB1,     R,   ENET,   GPIO,      R, TIMER3,  SDMMC,      0, ND);
0359 LPC_P(c,7,      R,  USB1,     R,   ENET,   GPIO,      R, TIMER3,  SDMMC,      0, ND);
0360 LPC_P(c,8,      R,  USB1,     R,   ENET,   GPIO,      R, TIMER3,  SDMMC,      0, ND);
0361 LPC_P(c,9,      R,  USB1,     R,   ENET,   GPIO,      R, TIMER3,  SDMMC,      0, ND);
0362 LPC_P(c,10,     R,  USB1, UART1,      R,   GPIO,      R, TIMER3,  SDMMC,      0, ND);
0363 LPC_P(c,11,     R,  USB1, UART1,      R,   GPIO,      R,      R,  SDMMC,      0, ND);
0364 LPC_P(c,12,     R,     R, UART1,      R,   GPIO,  SGPIO, I2S0_TX_SDA,SDMMC,   0, ND);
0365 LPC_P(c,13,     R,     R, UART1,      R,   GPIO,  SGPIO, I2S0_TX_WS, SDMMC,   0, ND);
0366 LPC_P(c,14,     R,     R, UART1,      R,   GPIO,  SGPIO,   ENET,  SDMMC,      0, ND);
0367 LPC_P(d,0,      R, CTOUT,   EMC,      R,   GPIO,      R,      R,  SGPIO,      0, ND);
0368 LPC_P(d,1,      R,     R,   EMC,      R,   GPIO,  SDMMC,      R,  SGPIO,      0, ND);
0369 LPC_P(d,2,      R, CTOUT,   EMC,      R,   GPIO,      R,      R,  SGPIO,      0, ND);
0370 LPC_P(d,3,      R, CTOUT,   EMC,      R,   GPIO,      R,      R,  SGPIO,      0, ND);
0371 LPC_P(d,4,      R, CTOUT,   EMC,      R,   GPIO,      R,      R,  SGPIO,      0, ND);
0372 LPC_P(d,5,      R, CTOUT,   EMC,      R,   GPIO,      R,      R,  SGPIO,      0, ND);
0373 LPC_P(d,6,      R, CTOUT,   EMC,      R,   GPIO,      R,      R,  SGPIO,      0, ND);
0374 LPC_P(d,7,      R,  CTIN,   EMC,      R,   GPIO,      R,      R,  SGPIO,      0, ND);
0375 LPC_P(d,8,      R,  CTIN,   EMC,      R,   GPIO,      R,      R,  SGPIO,      0, ND);
0376 LPC_P(d,9,      R, CTOUT,   EMC,      R,   GPIO,      R,      R,  SGPIO,      0, ND);
0377 LPC_P(d,10,     R,  CTIN,   EMC,      R,   GPIO,      R,      R,      R,      0, ND);
0378 LPC_P(d,11,     R,     R,   EMC,      R,   GPIO,   USB1,  CTOUT,      R,      0, ND);
0379 LPC_P(d,12,     R,     R,   EMC,      R,   GPIO,      R,  CTOUT,      R,      0, ND);
0380 LPC_P(d,13,     R,  CTIN,   EMC,      R,   GPIO,      R,  CTOUT,      R,      0, ND);
0381 LPC_P(d,14,     R,     R,   EMC,      R,   GPIO,      R,  CTOUT,      R,      0, ND);
0382 LPC_P(d,15,     R,     R,   EMC,      R,   GPIO,  SDMMC,  CTOUT,      R,      0, ND);
0383 LPC_P(d,16,     R,     R,   EMC,      R,   GPIO,  SDMMC,  CTOUT,      R,      0, ND);
0384 LPC_P(e,0,      R,     R,     R,    EMC,   GPIO,   CAN1,      R,      R,      0, ND);
0385 LPC_P(e,1,      R,     R,     R,    EMC,   GPIO,   CAN1,      R,      R,      0, ND);
0386 LPC_P(e,2,ADCTRIG,  CAN0,     R,    EMC,   GPIO,      R,      R,      R,      0, ND);
0387 LPC_P(e,3,      R,  CAN0,ADCTRIG,   EMC,   GPIO,      R,      R,      R,      0, ND);
0388 LPC_P(e,4,      R,   NMI,     R,    EMC,   GPIO,      R,      R,      R,      0, ND);
0389 LPC_P(e,5,      R, CTOUT, UART1,    EMC,   GPIO,      R,      R,      R,      0, ND);
0390 LPC_P(e,6,      R, CTOUT, UART1,    EMC,   GPIO,      R,      R,      R,      0, ND);
0391 LPC_P(e,7,      R, CTOUT, UART1,    EMC,   GPIO,      R,      R,      R,      0, ND);
0392 LPC_P(e,8,      R, CTOUT, UART1,    EMC,   GPIO,      R,      R,      R,      0, ND);
0393 LPC_P(e,9,      R,  CTIN, UART1,    EMC,   GPIO,      R,      R,      R,      0, ND);
0394 LPC_P(e,10,     R,  CTIN, UART1,    EMC,   GPIO,      R,      R,      R,      0, ND);
0395 LPC_P(e,11,     R, CTOUT, UART1,    EMC,   GPIO,      R,      R,      R,      0, ND);
0396 LPC_P(e,12,     R, CTOUT, UART1,    EMC,   GPIO,      R,      R,      R,      0, ND);
0397 LPC_P(e,13,     R, CTOUT,  I2C1,    EMC,   GPIO,      R,      R,      R,      0, ND);
0398 LPC_P(e,14,     R,     R,     R,    EMC,   GPIO,      R,      R,      R,      0, ND);
0399 LPC_P(e,15,     R, CTOUT,  I2C1,    EMC,   GPIO,      R,      R,      R,      0, ND);
0400 LPC_P(f,0,   SSP0, CLKIN,     R,      R,      R,      R,      R,   I2S1,      0, ND);
0401 LPC_P(f,1,      R,     R,  SSP0,      R,   GPIO,      R,  SGPIO,      R,      0, ND);
0402 LPC_P(f,2,      R, UART3,  SSP0,      R,   GPIO,      R,  SGPIO,      R,      0, ND);
0403 LPC_P(f,3,      R, UART3,  SSP0,      R,   GPIO,      R,  SGPIO,      R,      0, ND);
0404 LPC_P(f,4,   SSP1, CLKIN, TRACE,      R,      R, R, I2S0_TX_MCLK,I2S0_RX_SCK, 0, ND);
0405 LPC_P(f,5,      R, UART3,  SSP1,  TRACE,   GPIO,      R,  SGPIO,      R, ADC1|4, ND);
0406 LPC_P(f,6,      R, UART3,  SSP1,  TRACE,   GPIO,      R,  SGPIO,   I2S1, ADC1|3, ND);
0407 LPC_P(f,7,      R, UART3,  SSP1,  TRACE,   GPIO,      R,  SGPIO,   I2S1, ADC1|7, ND);
0408 LPC_P(f,8,      R, UART0,  CTIN,  TRACE,   GPIO,      R,  SGPIO,      R, ADC0|2, ND);
0409 LPC_P(f,9,      R, UART0, CTOUT,      R,   GPIO,      R,  SGPIO,      R, ADC1|2, ND);
0410 LPC_P(f,10,     R, UART0,     R,      R,   GPIO,      R,  SDMMC,      R, ADC0|5, ND);
0411 LPC_P(f,11,     R, UART0,     R,      R,   GPIO,      R,  SDMMC,      R, ADC1|5, ND);
0412 
0413 /*    Pin      Offset FUNC0  FUNC1  FUNC2  FUNC3  FUNC4    FUNC5   FUNC6      FUNC7 ANALOG TYPE */
0414 LPC_N(clk0,     0xc00, EMC, CLKOUT,   R,     R,  SDMMC,   EMC_ALT,  SSP1,      ENET,  0, HS);
0415 LPC_N(clk1,     0xc04, EMC, CLKOUT,   R,     R,      R,   CGU_OUT,   R,        I2S1,  0, HS);
0416 LPC_N(clk2,     0xc08, EMC, CLKOUT,   R,     R,  SDMMC,   EMC_ALT,I2S0_TX_MCLK,I2S1,  0, HS);
0417 LPC_N(clk3,     0xc0c, EMC, CLKOUT,   R,     R,      R,   CGU_OUT,   R,        I2S1,  0, HS);
0418 LPC_N(usb1_dm,  0xc80, R,      R,     R,     R,      R,      R,      R,          R,   0, USB1);
0419 LPC_N(usb1_dp,  0xc80, R,      R,     R,     R,      R,      R,      R,          R,   0, USB1);
0420 LPC_N(i2c0_scl, 0xc84, R,      R,     R,     R,      R,      R,      R,          R,   0, I2C0);
0421 LPC_N(i2c0_sda, 0xc84, R,      R,     R,     R,      R,      R,      R,          R,   0, I2C0);
0422 
0423 #define LPC18XX_PIN_P(port, pin) {          \
0424     .number = 0x##port * 32 + pin,          \
0425     .name = "p"#port"_"#pin,            \
0426     .drv_data = &lpc18xx_pin_p##port##_##pin    \
0427 }
0428 
0429 /* Pin numbers for special pins */
0430 enum {
0431     PIN_CLK0 = 600,
0432     PIN_CLK1,
0433     PIN_CLK2,
0434     PIN_CLK3,
0435     PIN_USB1_DM,
0436     PIN_USB1_DP,
0437     PIN_I2C0_SCL,
0438     PIN_I2C0_SDA,
0439 };
0440 
0441 #define LPC18XX_PIN(pname, n) {             \
0442     .number = n,                    \
0443     .name = #pname,                 \
0444     .drv_data = &lpc18xx_pin_##pname        \
0445 }
0446 
0447 static const struct pinctrl_pin_desc lpc18xx_pins[] = {
0448     LPC18XX_PIN_P(0,0),
0449     LPC18XX_PIN_P(0,1),
0450     LPC18XX_PIN_P(1,0),
0451     LPC18XX_PIN_P(1,1),
0452     LPC18XX_PIN_P(1,2),
0453     LPC18XX_PIN_P(1,3),
0454     LPC18XX_PIN_P(1,4),
0455     LPC18XX_PIN_P(1,5),
0456     LPC18XX_PIN_P(1,6),
0457     LPC18XX_PIN_P(1,7),
0458     LPC18XX_PIN_P(1,8),
0459     LPC18XX_PIN_P(1,9),
0460     LPC18XX_PIN_P(1,10),
0461     LPC18XX_PIN_P(1,11),
0462     LPC18XX_PIN_P(1,12),
0463     LPC18XX_PIN_P(1,13),
0464     LPC18XX_PIN_P(1,14),
0465     LPC18XX_PIN_P(1,15),
0466     LPC18XX_PIN_P(1,16),
0467     LPC18XX_PIN_P(1,17),
0468     LPC18XX_PIN_P(1,18),
0469     LPC18XX_PIN_P(1,19),
0470     LPC18XX_PIN_P(1,20),
0471     LPC18XX_PIN_P(2,0),
0472     LPC18XX_PIN_P(2,1),
0473     LPC18XX_PIN_P(2,2),
0474     LPC18XX_PIN_P(2,3),
0475     LPC18XX_PIN_P(2,4),
0476     LPC18XX_PIN_P(2,5),
0477     LPC18XX_PIN_P(2,6),
0478     LPC18XX_PIN_P(2,7),
0479     LPC18XX_PIN_P(2,8),
0480     LPC18XX_PIN_P(2,9),
0481     LPC18XX_PIN_P(2,10),
0482     LPC18XX_PIN_P(2,11),
0483     LPC18XX_PIN_P(2,12),
0484     LPC18XX_PIN_P(2,13),
0485     LPC18XX_PIN_P(3,0),
0486     LPC18XX_PIN_P(3,1),
0487     LPC18XX_PIN_P(3,2),
0488     LPC18XX_PIN_P(3,3),
0489     LPC18XX_PIN_P(3,4),
0490     LPC18XX_PIN_P(3,5),
0491     LPC18XX_PIN_P(3,6),
0492     LPC18XX_PIN_P(3,7),
0493     LPC18XX_PIN_P(3,8),
0494     LPC18XX_PIN_P(4,0),
0495     LPC18XX_PIN_P(4,1),
0496     LPC18XX_PIN_P(4,2),
0497     LPC18XX_PIN_P(4,3),
0498     LPC18XX_PIN_P(4,4),
0499     LPC18XX_PIN_P(4,5),
0500     LPC18XX_PIN_P(4,6),
0501     LPC18XX_PIN_P(4,7),
0502     LPC18XX_PIN_P(4,8),
0503     LPC18XX_PIN_P(4,9),
0504     LPC18XX_PIN_P(4,10),
0505     LPC18XX_PIN_P(5,0),
0506     LPC18XX_PIN_P(5,1),
0507     LPC18XX_PIN_P(5,2),
0508     LPC18XX_PIN_P(5,3),
0509     LPC18XX_PIN_P(5,4),
0510     LPC18XX_PIN_P(5,5),
0511     LPC18XX_PIN_P(5,6),
0512     LPC18XX_PIN_P(5,7),
0513     LPC18XX_PIN_P(6,0),
0514     LPC18XX_PIN_P(6,1),
0515     LPC18XX_PIN_P(6,2),
0516     LPC18XX_PIN_P(6,3),
0517     LPC18XX_PIN_P(6,4),
0518     LPC18XX_PIN_P(6,5),
0519     LPC18XX_PIN_P(6,6),
0520     LPC18XX_PIN_P(6,7),
0521     LPC18XX_PIN_P(6,8),
0522     LPC18XX_PIN_P(6,9),
0523     LPC18XX_PIN_P(6,10),
0524     LPC18XX_PIN_P(6,11),
0525     LPC18XX_PIN_P(6,12),
0526     LPC18XX_PIN_P(7,0),
0527     LPC18XX_PIN_P(7,1),
0528     LPC18XX_PIN_P(7,2),
0529     LPC18XX_PIN_P(7,3),
0530     LPC18XX_PIN_P(7,4),
0531     LPC18XX_PIN_P(7,5),
0532     LPC18XX_PIN_P(7,6),
0533     LPC18XX_PIN_P(7,7),
0534     LPC18XX_PIN_P(8,0),
0535     LPC18XX_PIN_P(8,1),
0536     LPC18XX_PIN_P(8,2),
0537     LPC18XX_PIN_P(8,3),
0538     LPC18XX_PIN_P(8,4),
0539     LPC18XX_PIN_P(8,5),
0540     LPC18XX_PIN_P(8,6),
0541     LPC18XX_PIN_P(8,7),
0542     LPC18XX_PIN_P(8,8),
0543     LPC18XX_PIN_P(9,0),
0544     LPC18XX_PIN_P(9,1),
0545     LPC18XX_PIN_P(9,2),
0546     LPC18XX_PIN_P(9,3),
0547     LPC18XX_PIN_P(9,4),
0548     LPC18XX_PIN_P(9,5),
0549     LPC18XX_PIN_P(9,6),
0550     LPC18XX_PIN_P(a,0),
0551     LPC18XX_PIN_P(a,1),
0552     LPC18XX_PIN_P(a,2),
0553     LPC18XX_PIN_P(a,3),
0554     LPC18XX_PIN_P(a,4),
0555     LPC18XX_PIN_P(b,0),
0556     LPC18XX_PIN_P(b,1),
0557     LPC18XX_PIN_P(b,2),
0558     LPC18XX_PIN_P(b,3),
0559     LPC18XX_PIN_P(b,4),
0560     LPC18XX_PIN_P(b,5),
0561     LPC18XX_PIN_P(b,6),
0562     LPC18XX_PIN_P(c,0),
0563     LPC18XX_PIN_P(c,1),
0564     LPC18XX_PIN_P(c,2),
0565     LPC18XX_PIN_P(c,3),
0566     LPC18XX_PIN_P(c,4),
0567     LPC18XX_PIN_P(c,5),
0568     LPC18XX_PIN_P(c,6),
0569     LPC18XX_PIN_P(c,7),
0570     LPC18XX_PIN_P(c,8),
0571     LPC18XX_PIN_P(c,9),
0572     LPC18XX_PIN_P(c,10),
0573     LPC18XX_PIN_P(c,11),
0574     LPC18XX_PIN_P(c,12),
0575     LPC18XX_PIN_P(c,13),
0576     LPC18XX_PIN_P(c,14),
0577     LPC18XX_PIN_P(d,0),
0578     LPC18XX_PIN_P(d,1),
0579     LPC18XX_PIN_P(d,2),
0580     LPC18XX_PIN_P(d,3),
0581     LPC18XX_PIN_P(d,4),
0582     LPC18XX_PIN_P(d,5),
0583     LPC18XX_PIN_P(d,6),
0584     LPC18XX_PIN_P(d,7),
0585     LPC18XX_PIN_P(d,8),
0586     LPC18XX_PIN_P(d,9),
0587     LPC18XX_PIN_P(d,10),
0588     LPC18XX_PIN_P(d,11),
0589     LPC18XX_PIN_P(d,12),
0590     LPC18XX_PIN_P(d,13),
0591     LPC18XX_PIN_P(d,14),
0592     LPC18XX_PIN_P(d,15),
0593     LPC18XX_PIN_P(d,16),
0594     LPC18XX_PIN_P(e,0),
0595     LPC18XX_PIN_P(e,1),
0596     LPC18XX_PIN_P(e,2),
0597     LPC18XX_PIN_P(e,3),
0598     LPC18XX_PIN_P(e,4),
0599     LPC18XX_PIN_P(e,5),
0600     LPC18XX_PIN_P(e,6),
0601     LPC18XX_PIN_P(e,7),
0602     LPC18XX_PIN_P(e,8),
0603     LPC18XX_PIN_P(e,9),
0604     LPC18XX_PIN_P(e,10),
0605     LPC18XX_PIN_P(e,11),
0606     LPC18XX_PIN_P(e,12),
0607     LPC18XX_PIN_P(e,13),
0608     LPC18XX_PIN_P(e,14),
0609     LPC18XX_PIN_P(e,15),
0610     LPC18XX_PIN_P(f,0),
0611     LPC18XX_PIN_P(f,1),
0612     LPC18XX_PIN_P(f,2),
0613     LPC18XX_PIN_P(f,3),
0614     LPC18XX_PIN_P(f,4),
0615     LPC18XX_PIN_P(f,5),
0616     LPC18XX_PIN_P(f,6),
0617     LPC18XX_PIN_P(f,7),
0618     LPC18XX_PIN_P(f,8),
0619     LPC18XX_PIN_P(f,9),
0620     LPC18XX_PIN_P(f,10),
0621     LPC18XX_PIN_P(f,11),
0622 
0623     LPC18XX_PIN(clk0, PIN_CLK0),
0624     LPC18XX_PIN(clk1, PIN_CLK1),
0625     LPC18XX_PIN(clk2, PIN_CLK2),
0626     LPC18XX_PIN(clk3, PIN_CLK3),
0627     LPC18XX_PIN(usb1_dm,  PIN_USB1_DM),
0628     LPC18XX_PIN(usb1_dp,  PIN_USB1_DP),
0629     LPC18XX_PIN(i2c0_scl, PIN_I2C0_SCL),
0630     LPC18XX_PIN(i2c0_sda, PIN_I2C0_SDA),
0631 };
0632 
0633 /* PIN_CONFIG_GPIO_PIN_INT: route gpio to the gpio pin interrupt controller */
0634 #define PIN_CONFIG_GPIO_PIN_INT     (PIN_CONFIG_END + 1)
0635 
0636 static const struct pinconf_generic_params lpc18xx_params[] = {
0637     {"nxp,gpio-pin-interrupt", PIN_CONFIG_GPIO_PIN_INT, 0},
0638 };
0639 
0640 #ifdef CONFIG_DEBUG_FS
0641 static const struct pin_config_item lpc18xx_conf_items[ARRAY_SIZE(lpc18xx_params)] = {
0642     PCONFDUMP(PIN_CONFIG_GPIO_PIN_INT, "gpio pin int", NULL, true),
0643 };
0644 #endif
0645 
0646 static int lpc18xx_pconf_get_usb1(enum pin_config_param param, int *arg, u32 reg)
0647 {
0648     switch (param) {
0649     case PIN_CONFIG_MODE_LOW_POWER:
0650         if (reg & LPC18XX_SCU_USB1_EPWR)
0651             *arg = 0;
0652         else
0653             *arg = 1;
0654         break;
0655 
0656     case PIN_CONFIG_BIAS_DISABLE:
0657         if (reg & LPC18XX_SCU_USB1_EPD)
0658             return -EINVAL;
0659         break;
0660 
0661     case PIN_CONFIG_BIAS_PULL_DOWN:
0662         if (reg & LPC18XX_SCU_USB1_EPD)
0663             *arg = 1;
0664         else
0665             return -EINVAL;
0666         break;
0667 
0668     default:
0669         return -ENOTSUPP;
0670     }
0671 
0672     return 0;
0673 }
0674 
0675 static int lpc18xx_pconf_get_i2c0(enum pin_config_param param, int *arg, u32 reg,
0676                   unsigned pin)
0677 {
0678     u8 shift;
0679 
0680     if (pin == PIN_I2C0_SCL)
0681         shift = LPC18XX_SCU_I2C0_SCL_SHIFT;
0682     else
0683         shift = LPC18XX_SCU_I2C0_SDA_SHIFT;
0684 
0685     switch (param) {
0686     case PIN_CONFIG_INPUT_ENABLE:
0687         if (reg & (LPC18XX_SCU_I2C0_EZI << shift))
0688             *arg = 1;
0689         else
0690             return -EINVAL;
0691         break;
0692 
0693     case PIN_CONFIG_SLEW_RATE:
0694         if (reg & (LPC18XX_SCU_I2C0_EHD << shift))
0695             *arg = 1;
0696         else
0697             *arg = 0;
0698         break;
0699 
0700     case PIN_CONFIG_INPUT_SCHMITT:
0701         if (reg & (LPC18XX_SCU_I2C0_EFP << shift))
0702             *arg = 3;
0703         else
0704             *arg = 50;
0705         break;
0706 
0707     case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
0708         if (reg & (LPC18XX_SCU_I2C0_ZIF << shift))
0709             return -EINVAL;
0710         else
0711             *arg = 1;
0712         break;
0713 
0714     default:
0715         return -ENOTSUPP;
0716     }
0717 
0718     return 0;
0719 }
0720 
0721 static int lpc18xx_pin_to_gpio(struct pinctrl_dev *pctldev, unsigned pin)
0722 {
0723     struct pinctrl_gpio_range *range;
0724 
0725     range = pinctrl_find_gpio_range_from_pin_nolock(pctldev, pin);
0726     if (!range)
0727         return -EINVAL;
0728 
0729     return pin - range->pin_base + range->base;
0730 }
0731 
0732 static int lpc18xx_get_pintsel(void __iomem *addr, u32 val, int *arg)
0733 {
0734     u32 reg_val;
0735     int i;
0736 
0737     reg_val = readl(addr);
0738     for (i = 0; i < LPC18XX_SCU_IRQ_PER_PINTSEL; i++) {
0739         if ((reg_val & LPC18XX_SCU_PINTSEL_VAL_MASK) == val)
0740             return 0;
0741 
0742         reg_val >>= BITS_PER_BYTE;
0743         *arg += 1;
0744     }
0745 
0746     return -EINVAL;
0747 }
0748 
0749 static u32 lpc18xx_gpio_to_pintsel_val(int gpio)
0750 {
0751     unsigned int gpio_port, gpio_pin;
0752 
0753     gpio_port = gpio / LPC18XX_GPIO_PINS_PER_PORT;
0754     gpio_pin  = gpio % LPC18XX_GPIO_PINS_PER_PORT;
0755 
0756     return gpio_pin | (gpio_port << LPC18XX_SCU_PINTSEL_PORT_SHIFT);
0757 }
0758 
0759 static int lpc18xx_pconf_get_gpio_pin_int(struct pinctrl_dev *pctldev,
0760                       int *arg, unsigned pin)
0761 {
0762     struct lpc18xx_scu_data *scu = pinctrl_dev_get_drvdata(pctldev);
0763     int gpio, ret;
0764     u32 val;
0765 
0766     gpio = lpc18xx_pin_to_gpio(pctldev, pin);
0767     if (gpio < 0)
0768         return -ENOTSUPP;
0769 
0770     val = lpc18xx_gpio_to_pintsel_val(gpio);
0771 
0772     /*
0773      * Check if this pin has been enabled as a interrupt in any of the two
0774      * PINTSEL registers. *arg indicates which interrupt number (0-7).
0775      */
0776     *arg = 0;
0777     ret = lpc18xx_get_pintsel(scu->base + LPC18XX_SCU_PINTSEL0, val, arg);
0778     if (ret == 0)
0779         return ret;
0780 
0781     return lpc18xx_get_pintsel(scu->base + LPC18XX_SCU_PINTSEL1, val, arg);
0782 }
0783 
0784 static int lpc18xx_pconf_get_pin(struct pinctrl_dev *pctldev, unsigned param,
0785                  int *arg, u32 reg, unsigned pin,
0786                  struct lpc18xx_pin_caps *pin_cap)
0787 {
0788     switch (param) {
0789     case PIN_CONFIG_BIAS_DISABLE:
0790         if ((!(reg & LPC18XX_SCU_PIN_EPD)) && (reg & LPC18XX_SCU_PIN_EPUN))
0791             ;
0792         else
0793             return -EINVAL;
0794         break;
0795 
0796     case PIN_CONFIG_BIAS_PULL_UP:
0797         if (reg & LPC18XX_SCU_PIN_EPUN)
0798             return -EINVAL;
0799         else
0800             *arg = 1;
0801         break;
0802 
0803     case PIN_CONFIG_BIAS_PULL_DOWN:
0804         if (reg & LPC18XX_SCU_PIN_EPD)
0805             *arg = 1;
0806         else
0807             return -EINVAL;
0808         break;
0809 
0810     case PIN_CONFIG_INPUT_ENABLE:
0811         if (reg & LPC18XX_SCU_PIN_EZI)
0812             *arg = 1;
0813         else
0814             return -EINVAL;
0815         break;
0816 
0817     case PIN_CONFIG_SLEW_RATE:
0818         if (pin_cap->type == TYPE_HD)
0819             return -ENOTSUPP;
0820 
0821         if (reg & LPC18XX_SCU_PIN_EHS)
0822             *arg = 1;
0823         else
0824             *arg = 0;
0825         break;
0826 
0827     case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
0828         if (reg & LPC18XX_SCU_PIN_ZIF)
0829             return -EINVAL;
0830         else
0831             *arg = 1;
0832         break;
0833 
0834     case PIN_CONFIG_DRIVE_STRENGTH:
0835         if (pin_cap->type != TYPE_HD)
0836             return -ENOTSUPP;
0837 
0838         *arg = (reg & LPC18XX_SCU_PIN_EHD_MASK) >> LPC18XX_SCU_PIN_EHD_POS;
0839         switch (*arg) {
0840         case 3: *arg += 5;
0841             fallthrough;
0842         case 2: *arg += 5;
0843             fallthrough;
0844         case 1: *arg += 3;
0845             fallthrough;
0846         case 0: *arg += 4;
0847         }
0848         break;
0849 
0850     case PIN_CONFIG_GPIO_PIN_INT:
0851         return lpc18xx_pconf_get_gpio_pin_int(pctldev, arg, pin);
0852 
0853     default:
0854         return -ENOTSUPP;
0855     }
0856 
0857     return 0;
0858 }
0859 
0860 static struct lpc18xx_pin_caps *lpc18xx_get_pin_caps(unsigned pin)
0861 {
0862     int i;
0863 
0864     for (i = 0; i < ARRAY_SIZE(lpc18xx_pins); i++) {
0865         if (lpc18xx_pins[i].number == pin)
0866             return lpc18xx_pins[i].drv_data;
0867     }
0868 
0869     return NULL;
0870 }
0871 
0872 static int lpc18xx_pconf_get(struct pinctrl_dev *pctldev, unsigned pin,
0873                  unsigned long *config)
0874 {
0875     struct lpc18xx_scu_data *scu = pinctrl_dev_get_drvdata(pctldev);
0876     enum pin_config_param param = pinconf_to_config_param(*config);
0877     struct lpc18xx_pin_caps *pin_cap;
0878     int ret, arg = 0;
0879     u32 reg;
0880 
0881     pin_cap = lpc18xx_get_pin_caps(pin);
0882     if (!pin_cap)
0883         return -EINVAL;
0884 
0885     reg = readl(scu->base + pin_cap->offset);
0886 
0887     if (pin_cap->type == TYPE_I2C0)
0888         ret = lpc18xx_pconf_get_i2c0(param, &arg, reg, pin);
0889     else if (pin_cap->type == TYPE_USB1)
0890         ret = lpc18xx_pconf_get_usb1(param, &arg, reg);
0891     else
0892         ret = lpc18xx_pconf_get_pin(pctldev, param, &arg, reg, pin, pin_cap);
0893 
0894     if (ret < 0)
0895         return ret;
0896 
0897     *config = pinconf_to_config_packed(param, (u16)arg);
0898 
0899     return 0;
0900 }
0901 
0902 static int lpc18xx_pconf_set_usb1(struct pinctrl_dev *pctldev,
0903                   enum pin_config_param param,
0904                   u32 param_val, u32 *reg)
0905 {
0906     switch (param) {
0907     case PIN_CONFIG_MODE_LOW_POWER:
0908         if (param_val)
0909             *reg &= ~LPC18XX_SCU_USB1_EPWR;
0910         else
0911             *reg |= LPC18XX_SCU_USB1_EPWR;
0912         break;
0913 
0914     case PIN_CONFIG_BIAS_DISABLE:
0915         *reg &= ~LPC18XX_SCU_USB1_EPD;
0916         break;
0917 
0918     case PIN_CONFIG_BIAS_PULL_DOWN:
0919         *reg |= LPC18XX_SCU_USB1_EPD;
0920         break;
0921 
0922     default:
0923         dev_err(pctldev->dev, "Property not supported\n");
0924         return -ENOTSUPP;
0925     }
0926 
0927     return 0;
0928 }
0929 
0930 static int lpc18xx_pconf_set_i2c0(struct pinctrl_dev *pctldev,
0931                   enum pin_config_param param,
0932                   u32 param_val, u32 *reg,
0933                   unsigned pin)
0934 {
0935     u8 shift;
0936 
0937     if (pin == PIN_I2C0_SCL)
0938         shift = LPC18XX_SCU_I2C0_SCL_SHIFT;
0939     else
0940         shift = LPC18XX_SCU_I2C0_SDA_SHIFT;
0941 
0942     switch (param) {
0943     case PIN_CONFIG_INPUT_ENABLE:
0944         if (param_val)
0945             *reg |= (LPC18XX_SCU_I2C0_EZI << shift);
0946         else
0947             *reg &= ~(LPC18XX_SCU_I2C0_EZI << shift);
0948         break;
0949 
0950     case PIN_CONFIG_SLEW_RATE:
0951         if (param_val)
0952             *reg |= (LPC18XX_SCU_I2C0_EHD << shift);
0953         else
0954             *reg &= ~(LPC18XX_SCU_I2C0_EHD << shift);
0955         break;
0956 
0957     case PIN_CONFIG_INPUT_SCHMITT:
0958         if (param_val == 3)
0959             *reg |= (LPC18XX_SCU_I2C0_EFP << shift);
0960         else if (param_val == 50)
0961             *reg &= ~(LPC18XX_SCU_I2C0_EFP << shift);
0962         else
0963             return -ENOTSUPP;
0964         break;
0965 
0966     case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
0967         if (param_val)
0968             *reg &= ~(LPC18XX_SCU_I2C0_ZIF << shift);
0969         else
0970             *reg |= (LPC18XX_SCU_I2C0_ZIF << shift);
0971         break;
0972 
0973     default:
0974         dev_err(pctldev->dev, "Property not supported\n");
0975         return -ENOTSUPP;
0976     }
0977 
0978     return 0;
0979 }
0980 
0981 static int lpc18xx_pconf_set_gpio_pin_int(struct pinctrl_dev *pctldev,
0982                       u32 param_val, unsigned pin)
0983 {
0984     struct lpc18xx_scu_data *scu = pinctrl_dev_get_drvdata(pctldev);
0985     u32 val, reg_val, reg_offset = LPC18XX_SCU_PINTSEL0;
0986     int gpio;
0987 
0988     if (param_val >= LPC18XX_GPIO_PIN_INT_MAX)
0989         return -EINVAL;
0990 
0991     gpio = lpc18xx_pin_to_gpio(pctldev, pin);
0992     if (gpio < 0)
0993         return -ENOTSUPP;
0994 
0995     val = lpc18xx_gpio_to_pintsel_val(gpio);
0996 
0997     reg_offset += (param_val / LPC18XX_SCU_IRQ_PER_PINTSEL) * sizeof(u32);
0998 
0999     reg_val = readl(scu->base + reg_offset);
1000     reg_val &= ~LPC18XX_SCU_PINTSEL_VAL(LPC18XX_SCU_PINTSEL_VAL_MASK, param_val);
1001     reg_val |= LPC18XX_SCU_PINTSEL_VAL(val, param_val);
1002     writel(reg_val, scu->base + reg_offset);
1003 
1004     return 0;
1005 }
1006 
1007 static int lpc18xx_pconf_set_pin(struct pinctrl_dev *pctldev, unsigned param,
1008                  u32 param_val, u32 *reg, unsigned pin,
1009                  struct lpc18xx_pin_caps *pin_cap)
1010 {
1011     switch (param) {
1012     case PIN_CONFIG_BIAS_DISABLE:
1013         *reg &= ~LPC18XX_SCU_PIN_EPD;
1014         *reg |= LPC18XX_SCU_PIN_EPUN;
1015         break;
1016 
1017     case PIN_CONFIG_BIAS_PULL_UP:
1018         *reg &= ~LPC18XX_SCU_PIN_EPUN;
1019         break;
1020 
1021     case PIN_CONFIG_BIAS_PULL_DOWN:
1022         *reg |= LPC18XX_SCU_PIN_EPD;
1023         break;
1024 
1025     case PIN_CONFIG_INPUT_ENABLE:
1026         if (param_val)
1027             *reg |= LPC18XX_SCU_PIN_EZI;
1028         else
1029             *reg &= ~LPC18XX_SCU_PIN_EZI;
1030         break;
1031 
1032     case PIN_CONFIG_SLEW_RATE:
1033         if (pin_cap->type == TYPE_HD) {
1034             dev_err(pctldev->dev, "Slew rate unsupported on high-drive pins\n");
1035             return -ENOTSUPP;
1036         }
1037 
1038         if (param_val == 0)
1039             *reg &= ~LPC18XX_SCU_PIN_EHS;
1040         else
1041             *reg |= LPC18XX_SCU_PIN_EHS;
1042         break;
1043 
1044     case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
1045         if (param_val)
1046             *reg &= ~LPC18XX_SCU_PIN_ZIF;
1047         else
1048             *reg |= LPC18XX_SCU_PIN_ZIF;
1049         break;
1050 
1051     case PIN_CONFIG_DRIVE_STRENGTH:
1052         if (pin_cap->type != TYPE_HD) {
1053             dev_err(pctldev->dev, "Drive strength available only on high-drive pins\n");
1054             return -ENOTSUPP;
1055         }
1056         *reg &= ~LPC18XX_SCU_PIN_EHD_MASK;
1057 
1058         switch (param_val) {
1059         case 20: param_val -= 5;
1060             fallthrough;
1061         case 14: param_val -= 5;
1062             fallthrough;
1063         case  8: param_val -= 3;
1064             fallthrough;
1065         case  4: param_val -= 4;
1066              break;
1067         default:
1068             dev_err(pctldev->dev, "Drive strength %u unsupported\n", param_val);
1069             return -ENOTSUPP;
1070         }
1071         *reg |= param_val << LPC18XX_SCU_PIN_EHD_POS;
1072         break;
1073 
1074     case PIN_CONFIG_GPIO_PIN_INT:
1075         return lpc18xx_pconf_set_gpio_pin_int(pctldev, param_val, pin);
1076 
1077     default:
1078         dev_err(pctldev->dev, "Property not supported\n");
1079         return -ENOTSUPP;
1080     }
1081 
1082     return 0;
1083 }
1084 
1085 static int lpc18xx_pconf_set(struct pinctrl_dev *pctldev, unsigned pin,
1086                  unsigned long *configs, unsigned num_configs)
1087 {
1088     struct lpc18xx_scu_data *scu = pinctrl_dev_get_drvdata(pctldev);
1089     struct lpc18xx_pin_caps *pin_cap;
1090     enum pin_config_param param;
1091     u32 param_val;
1092     u32 reg;
1093     int ret;
1094     int i;
1095 
1096     pin_cap = lpc18xx_get_pin_caps(pin);
1097     if (!pin_cap)
1098         return -EINVAL;
1099 
1100     reg = readl(scu->base + pin_cap->offset);
1101 
1102     for (i = 0; i < num_configs; i++) {
1103         param = pinconf_to_config_param(configs[i]);
1104         param_val = pinconf_to_config_argument(configs[i]);
1105 
1106         if (pin_cap->type == TYPE_I2C0)
1107             ret = lpc18xx_pconf_set_i2c0(pctldev, param, param_val, &reg, pin);
1108         else if (pin_cap->type == TYPE_USB1)
1109             ret = lpc18xx_pconf_set_usb1(pctldev, param, param_val, &reg);
1110         else
1111             ret = lpc18xx_pconf_set_pin(pctldev, param, param_val, &reg, pin, pin_cap);
1112 
1113         if (ret)
1114             return ret;
1115     }
1116 
1117     writel(reg, scu->base + pin_cap->offset);
1118 
1119     return 0;
1120 }
1121 
1122 static const struct pinconf_ops lpc18xx_pconf_ops = {
1123     .is_generic = true,
1124     .pin_config_get = lpc18xx_pconf_get,
1125     .pin_config_set = lpc18xx_pconf_set,
1126 };
1127 
1128 static int lpc18xx_pmx_get_funcs_count(struct pinctrl_dev *pctldev)
1129 {
1130     return ARRAY_SIZE(lpc18xx_function_names);
1131 }
1132 
1133 static const char *lpc18xx_pmx_get_func_name(struct pinctrl_dev *pctldev,
1134                          unsigned function)
1135 {
1136     return lpc18xx_function_names[function];
1137 }
1138 
1139 static int lpc18xx_pmx_get_func_groups(struct pinctrl_dev *pctldev,
1140                        unsigned function,
1141                        const char *const **groups,
1142                        unsigned *const num_groups)
1143 {
1144     struct lpc18xx_scu_data *scu = pinctrl_dev_get_drvdata(pctldev);
1145 
1146     *groups  = scu->func[function].groups;
1147     *num_groups = scu->func[function].ngroups;
1148 
1149     return 0;
1150 }
1151 
1152 static int lpc18xx_pmx_set(struct pinctrl_dev *pctldev, unsigned function,
1153                unsigned group)
1154 {
1155     struct lpc18xx_scu_data *scu = pinctrl_dev_get_drvdata(pctldev);
1156     struct lpc18xx_pin_caps *pin = lpc18xx_pins[group].drv_data;
1157     int func;
1158     u32 reg;
1159 
1160     /* Dedicated USB1 and I2C0 pins doesn't support muxing */
1161     if (pin->type == TYPE_USB1) {
1162         if (function == FUNC_USB1)
1163             return 0;
1164 
1165         goto fail;
1166     }
1167 
1168     if (pin->type == TYPE_I2C0) {
1169         if (function == FUNC_I2C0)
1170             return 0;
1171 
1172         goto fail;
1173     }
1174 
1175     if (function == FUNC_ADC && (pin->analog & LPC18XX_ANALOG_PIN)) {
1176         u32 offset;
1177 
1178         writel(LPC18XX_SCU_ANALOG_PIN_CFG, scu->base + pin->offset);
1179 
1180         if (LPC18XX_ANALOG_ADC(pin->analog) == 0)
1181             offset = LPC18XX_SCU_REG_ENAIO0;
1182         else
1183             offset = LPC18XX_SCU_REG_ENAIO1;
1184 
1185         reg = readl(scu->base + offset);
1186         reg |= pin->analog & LPC18XX_ANALOG_BIT_MASK;
1187         writel(reg, scu->base + offset);
1188 
1189         return 0;
1190     }
1191 
1192     if (function == FUNC_DAC && (pin->analog & LPC18XX_ANALOG_PIN)) {
1193         writel(LPC18XX_SCU_ANALOG_PIN_CFG, scu->base + pin->offset);
1194 
1195         reg = readl(scu->base + LPC18XX_SCU_REG_ENAIO2);
1196         reg |= LPC18XX_SCU_REG_ENAIO2_DAC;
1197         writel(reg, scu->base + LPC18XX_SCU_REG_ENAIO2);
1198 
1199         return 0;
1200     }
1201 
1202     for (func = 0; func < LPC18XX_SCU_FUNC_PER_PIN; func++) {
1203         if (function == pin->functions[func])
1204             break;
1205     }
1206 
1207     if (func >= LPC18XX_SCU_FUNC_PER_PIN)
1208         goto fail;
1209 
1210     reg = readl(scu->base + pin->offset);
1211     reg &= ~LPC18XX_SCU_PIN_MODE_MASK;
1212     writel(reg | func, scu->base + pin->offset);
1213 
1214     return 0;
1215 fail:
1216     dev_err(pctldev->dev, "Pin %s can't be %s\n", lpc18xx_pins[group].name,
1217                               lpc18xx_function_names[function]);
1218     return -EINVAL;
1219 }
1220 
1221 static const struct pinmux_ops lpc18xx_pmx_ops = {
1222     .get_functions_count    = lpc18xx_pmx_get_funcs_count,
1223     .get_function_name  = lpc18xx_pmx_get_func_name,
1224     .get_function_groups    = lpc18xx_pmx_get_func_groups,
1225     .set_mux        = lpc18xx_pmx_set,
1226 };
1227 
1228 static int lpc18xx_pctl_get_groups_count(struct pinctrl_dev *pctldev)
1229 {
1230     return ARRAY_SIZE(lpc18xx_pins);
1231 }
1232 
1233 static const char *lpc18xx_pctl_get_group_name(struct pinctrl_dev *pctldev,
1234                            unsigned group)
1235 {
1236     return lpc18xx_pins[group].name;
1237 }
1238 
1239 static int lpc18xx_pctl_get_group_pins(struct pinctrl_dev *pctldev,
1240                        unsigned group,
1241                        const unsigned **pins,
1242                        unsigned *num_pins)
1243 {
1244     *pins = &lpc18xx_pins[group].number;
1245     *num_pins = 1;
1246 
1247     return 0;
1248 }
1249 
1250 static const struct pinctrl_ops lpc18xx_pctl_ops = {
1251     .get_groups_count   = lpc18xx_pctl_get_groups_count,
1252     .get_group_name     = lpc18xx_pctl_get_group_name,
1253     .get_group_pins     = lpc18xx_pctl_get_group_pins,
1254     .dt_node_to_map     = pinconf_generic_dt_node_to_map_pin,
1255     .dt_free_map        = pinctrl_utils_free_map,
1256 };
1257 
1258 static struct pinctrl_desc lpc18xx_scu_desc = {
1259     .name = "lpc18xx/43xx-scu",
1260     .pins = lpc18xx_pins,
1261     .npins = ARRAY_SIZE(lpc18xx_pins),
1262     .pctlops = &lpc18xx_pctl_ops,
1263     .pmxops = &lpc18xx_pmx_ops,
1264     .confops = &lpc18xx_pconf_ops,
1265     .num_custom_params = ARRAY_SIZE(lpc18xx_params),
1266     .custom_params = lpc18xx_params,
1267 #ifdef CONFIG_DEBUG_FS
1268     .custom_conf_items = lpc18xx_conf_items,
1269 #endif
1270     .owner = THIS_MODULE,
1271 };
1272 
1273 static bool lpc18xx_valid_pin_function(unsigned pin, unsigned function)
1274 {
1275     struct lpc18xx_pin_caps *p = lpc18xx_pins[pin].drv_data;
1276     int i;
1277 
1278     if (function == FUNC_DAC && p->analog == DAC)
1279         return true;
1280 
1281     if (function == FUNC_ADC && p->analog)
1282         return true;
1283 
1284     if (function == FUNC_I2C0 && p->type == TYPE_I2C0)
1285         return true;
1286 
1287     if (function == FUNC_USB1 && p->type == TYPE_USB1)
1288         return true;
1289 
1290     for (i = 0; i < LPC18XX_SCU_FUNC_PER_PIN; i++) {
1291         if (function == p->functions[i])
1292             return true;
1293     }
1294 
1295     return false;
1296 }
1297 
1298 static int lpc18xx_create_group_func_map(struct device *dev,
1299                      struct lpc18xx_scu_data *scu)
1300 {
1301     u16 pins[ARRAY_SIZE(lpc18xx_pins)];
1302     int func, ngroups, i;
1303 
1304     for (func = 0; func < FUNC_MAX; func++) {
1305         for (ngroups = 0, i = 0; i < ARRAY_SIZE(lpc18xx_pins); i++) {
1306             if (lpc18xx_valid_pin_function(i, func))
1307                 pins[ngroups++] = i;
1308         }
1309 
1310         scu->func[func].ngroups = ngroups;
1311         scu->func[func].groups = devm_kcalloc(dev,
1312                               ngroups, sizeof(char *),
1313                               GFP_KERNEL);
1314         if (!scu->func[func].groups)
1315             return -ENOMEM;
1316 
1317         for (i = 0; i < ngroups; i++)
1318             scu->func[func].groups[i] = lpc18xx_pins[pins[i]].name;
1319     }
1320 
1321     return 0;
1322 }
1323 
1324 static int lpc18xx_scu_probe(struct platform_device *pdev)
1325 {
1326     struct lpc18xx_scu_data *scu;
1327     int ret;
1328 
1329     scu = devm_kzalloc(&pdev->dev, sizeof(*scu), GFP_KERNEL);
1330     if (!scu)
1331         return -ENOMEM;
1332 
1333     scu->base = devm_platform_ioremap_resource(pdev, 0);
1334     if (IS_ERR(scu->base))
1335         return PTR_ERR(scu->base);
1336 
1337     scu->clk = devm_clk_get(&pdev->dev, NULL);
1338     if (IS_ERR(scu->clk)) {
1339         dev_err(&pdev->dev, "Input clock not found.\n");
1340         return PTR_ERR(scu->clk);
1341     }
1342 
1343     ret = lpc18xx_create_group_func_map(&pdev->dev, scu);
1344     if (ret) {
1345         dev_err(&pdev->dev, "Unable to create group func map.\n");
1346         return ret;
1347     }
1348 
1349     ret = clk_prepare_enable(scu->clk);
1350     if (ret) {
1351         dev_err(&pdev->dev, "Unable to enable clock.\n");
1352         return ret;
1353     }
1354 
1355     platform_set_drvdata(pdev, scu);
1356 
1357     scu->pctl = devm_pinctrl_register(&pdev->dev, &lpc18xx_scu_desc, scu);
1358     if (IS_ERR(scu->pctl)) {
1359         dev_err(&pdev->dev, "Could not register pinctrl driver\n");
1360         clk_disable_unprepare(scu->clk);
1361         return PTR_ERR(scu->pctl);
1362     }
1363 
1364     return 0;
1365 }
1366 
1367 static const struct of_device_id lpc18xx_scu_match[] = {
1368     { .compatible = "nxp,lpc1850-scu" },
1369     {},
1370 };
1371 
1372 static struct platform_driver lpc18xx_scu_driver = {
1373     .probe      = lpc18xx_scu_probe,
1374     .driver = {
1375         .name       = "lpc18xx-scu",
1376         .of_match_table = lpc18xx_scu_match,
1377         .suppress_bind_attrs = true,
1378     },
1379 };
1380 builtin_platform_driver(lpc18xx_scu_driver);
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