drivers/pinctrl/pinctrl-digicolor.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  *  Driver for Conexant Digicolor General Purpose Pin Mapping
0004  *
0005  * Author: Baruch Siach <baruch@tkos.co.il>
0006  *
0007  * Copyright (C) 2015 Paradox Innovation Ltd.
0008  *
0009  * TODO:
0010  * - GPIO interrupt support
0011  * - Pin pad configuration (pull up/down, strength)
0012  */
0013
0014 #include <linux/init.h>
0015 #include <linux/platform_device.h>
0016 #include <linux/of.h>
0017 #include <linux/of_device.h>
0018 #include <linux/io.h>
0019 #include <linux/gpio/driver.h>
0020 #include <linux/spinlock.h>
0021 #include <linux/pinctrl/machine.h>
0022 #include <linux/pinctrl/pinconf.h>
0023 #include <linux/pinctrl/pinconf-generic.h>
0024 #include <linux/pinctrl/pinctrl.h>
0025 #include <linux/pinctrl/pinmux.h>
0026 #include "pinctrl-utils.h"
0027
0028 #define DRIVER_NAME "pinctrl-digicolor"
0029
0030 #define GP_CLIENTSEL(clct)  ((clct)*8 + 0x20)
0031 #define GP_DRIVE0(clct)     (GP_CLIENTSEL(clct) + 2)
0032 #define GP_OUTPUT0(clct)    (GP_CLIENTSEL(clct) + 3)
0033 #define GP_INPUT(clct)      (GP_CLIENTSEL(clct) + 6)
0034
0035 #define PIN_COLLECTIONS     ('R' - 'A' + 1)
0036 #define PINS_PER_COLLECTION 8
0037 #define PINS_COUNT      (PIN_COLLECTIONS * PINS_PER_COLLECTION)
0038
0039 struct dc_pinmap {
0040     void __iomem        *regs;
0041     struct device       *dev;
0042     struct pinctrl_dev  *pctl;
0043
0044     struct pinctrl_desc *desc;
0045     const char      *pin_names[PINS_COUNT];
0046
0047     struct gpio_chip    chip;
0048     spinlock_t      lock;
0049 };
0050
0051 static int dc_get_groups_count(struct pinctrl_dev *pctldev)
0052 {
0053     return PINS_COUNT;
0054 }
0055
0056 static const char *dc_get_group_name(struct pinctrl_dev *pctldev,
0057                      unsigned selector)
0058 {
0059     struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
0060
0061     /* Exactly one group per pin */
0062     return pmap->desc->pins[selector].name;
0063 }
0064
0065 static int dc_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
0066                  const unsigned **pins,
0067                  unsigned *num_pins)
0068 {
0069     struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
0070
0071     *pins = &pmap->desc->pins[selector].number;
0072     *num_pins = 1;
0073
0074     return 0;
0075 }
0076
0077 static const struct pinctrl_ops dc_pinctrl_ops = {
0078     .get_groups_count   = dc_get_groups_count,
0079     .get_group_name     = dc_get_group_name,
0080     .get_group_pins     = dc_get_group_pins,
0081     .dt_node_to_map     = pinconf_generic_dt_node_to_map_pin,
0082     .dt_free_map        = pinctrl_utils_free_map,
0083 };
0084
0085 static const char *const dc_functions[] = {
0086     "gpio",
0087     "client_a",
0088     "client_b",
0089     "client_c",
0090 };
0091
0092 static int dc_get_functions_count(struct pinctrl_dev *pctldev)
0093 {
0094     return ARRAY_SIZE(dc_functions);
0095 }
0096
0097 static const char *dc_get_fname(struct pinctrl_dev *pctldev, unsigned selector)
0098 {
0099     return dc_functions[selector];
0100 }
0101
0102 static int dc_get_groups(struct pinctrl_dev *pctldev, unsigned selector,
0103              const char * const **groups,
0104              unsigned * const num_groups)
0105 {
0106     struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
0107
0108     *groups = pmap->pin_names;
0109     *num_groups = PINS_COUNT;
0110
0111     return 0;
0112 }
0113
0114 static void dc_client_sel(int pin_num, int *reg, int *bit)
0115 {
0116     *bit = (pin_num % PINS_PER_COLLECTION) * 2;
0117     *reg = GP_CLIENTSEL(pin_num/PINS_PER_COLLECTION);
0118
0119     if (*bit >= PINS_PER_COLLECTION) {
0120         *bit -= PINS_PER_COLLECTION;
0121         *reg += 1;
0122     }
0123 }
0124
0125 static int dc_set_mux(struct pinctrl_dev *pctldev, unsigned selector,
0126               unsigned group)
0127 {
0128     struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
0129     int bit_off, reg_off;
0130     u8 reg;
0131
0132     dc_client_sel(group, &reg_off, &bit_off);
0133
0134     reg = readb_relaxed(pmap->regs + reg_off);
0135     reg &= ~(3 << bit_off);
0136     reg |= (selector << bit_off);
0137     writeb_relaxed(reg, pmap->regs + reg_off);
0138
0139     return 0;
0140 }
0141
0142 static int dc_pmx_request_gpio(struct pinctrl_dev *pcdev,
0143                    struct pinctrl_gpio_range *range,
0144                    unsigned offset)
0145 {
0146     struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pcdev);
0147     int bit_off, reg_off;
0148     u8 reg;
0149
0150     dc_client_sel(offset, &reg_off, &bit_off);
0151
0152     reg = readb_relaxed(pmap->regs + reg_off);
0153     if ((reg & (3 << bit_off)) != 0)
0154         return -EBUSY;
0155
0156     return 0;
0157 }
0158
0159 static const struct pinmux_ops dc_pmxops = {
0160     .get_functions_count    = dc_get_functions_count,
0161     .get_function_name  = dc_get_fname,
0162     .get_function_groups    = dc_get_groups,
0163     .set_mux        = dc_set_mux,
0164     .gpio_request_enable    = dc_pmx_request_gpio,
0165 };
0166
0167 static int dc_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
0168 {
0169     struct dc_pinmap *pmap = gpiochip_get_data(chip);
0170     int reg_off = GP_DRIVE0(gpio/PINS_PER_COLLECTION);
0171     int bit_off = gpio % PINS_PER_COLLECTION;
0172     u8 drive;
0173     unsigned long flags;
0174
0175     spin_lock_irqsave(&pmap->lock, flags);
0176     drive = readb_relaxed(pmap->regs + reg_off);
0177     drive &= ~BIT(bit_off);
0178     writeb_relaxed(drive, pmap->regs + reg_off);
0179     spin_unlock_irqrestore(&pmap->lock, flags);
0180
0181     return 0;
0182 }
0183
0184 static void dc_gpio_set(struct gpio_chip *chip, unsigned gpio, int value);
0185
0186 static int dc_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
0187                     int value)
0188 {
0189     struct dc_pinmap *pmap = gpiochip_get_data(chip);
0190     int reg_off = GP_DRIVE0(gpio/PINS_PER_COLLECTION);
0191     int bit_off = gpio % PINS_PER_COLLECTION;
0192     u8 drive;
0193     unsigned long flags;
0194
0195     dc_gpio_set(chip, gpio, value);
0196
0197     spin_lock_irqsave(&pmap->lock, flags);
0198     drive = readb_relaxed(pmap->regs + reg_off);
0199     drive |= BIT(bit_off);
0200     writeb_relaxed(drive, pmap->regs + reg_off);
0201     spin_unlock_irqrestore(&pmap->lock, flags);
0202
0203     return 0;
0204 }
0205
0206 static int dc_gpio_get(struct gpio_chip *chip, unsigned gpio)
0207 {
0208     struct dc_pinmap *pmap = gpiochip_get_data(chip);
0209     int reg_off = GP_INPUT(gpio/PINS_PER_COLLECTION);
0210     int bit_off = gpio % PINS_PER_COLLECTION;
0211     u8 input;
0212
0213     input = readb_relaxed(pmap->regs + reg_off);
0214
0215     return !!(input & BIT(bit_off));
0216 }
0217
0218 static void dc_gpio_set(struct gpio_chip *chip, unsigned gpio, int value)
0219 {
0220     struct dc_pinmap *pmap = gpiochip_get_data(chip);
0221     int reg_off = GP_OUTPUT0(gpio/PINS_PER_COLLECTION);
0222     int bit_off = gpio % PINS_PER_COLLECTION;
0223     u8 output;
0224     unsigned long flags;
0225
0226     spin_lock_irqsave(&pmap->lock, flags);
0227     output = readb_relaxed(pmap->regs + reg_off);
0228     if (value)
0229         output |= BIT(bit_off);
0230     else
0231         output &= ~BIT(bit_off);
0232     writeb_relaxed(output, pmap->regs + reg_off);
0233     spin_unlock_irqrestore(&pmap->lock, flags);
0234 }
0235
0236 static int dc_gpiochip_add(struct dc_pinmap *pmap)
0237 {
0238     struct gpio_chip *chip = &pmap->chip;
0239     int ret;
0240
0241     chip->label     = DRIVER_NAME;
0242     chip->parent        = pmap->dev;
0243     chip->request       = gpiochip_generic_request;
0244     chip->free      = gpiochip_generic_free;
0245     chip->direction_input   = dc_gpio_direction_input;
0246     chip->direction_output  = dc_gpio_direction_output;
0247     chip->get       = dc_gpio_get;
0248     chip->set       = dc_gpio_set;
0249     chip->base      = -1;
0250     chip->ngpio     = PINS_COUNT;
0251     chip->of_gpio_n_cells   = 2;
0252
0253     spin_lock_init(&pmap->lock);
0254
0255     ret = gpiochip_add_data(chip, pmap);
0256     if (ret < 0)
0257         return ret;
0258
0259     ret = gpiochip_add_pin_range(chip, dev_name(pmap->dev), 0, 0,
0260                      PINS_COUNT);
0261     if (ret < 0) {
0262         gpiochip_remove(chip);
0263         return ret;
0264     }
0265
0266     return 0;
0267 }
0268
0269 static int dc_pinctrl_probe(struct platform_device *pdev)
0270 {
0271     struct dc_pinmap *pmap;
0272     struct pinctrl_pin_desc *pins;
0273     struct pinctrl_desc *pctl_desc;
0274     char *pin_names;
0275     int name_len = strlen("GP_xx") + 1;
0276     int i, j;
0277
0278     pmap = devm_kzalloc(&pdev->dev, sizeof(*pmap), GFP_KERNEL);
0279     if (!pmap)
0280         return -ENOMEM;
0281
0282     pmap->regs = devm_platform_ioremap_resource(pdev, 0);
0283     if (IS_ERR(pmap->regs))
0284         return PTR_ERR(pmap->regs);
0285
0286     pins = devm_kcalloc(&pdev->dev, PINS_COUNT, sizeof(*pins),
0287                 GFP_KERNEL);
0288     if (!pins)
0289         return -ENOMEM;
0290     pin_names = devm_kcalloc(&pdev->dev, PINS_COUNT, name_len,
0291                  GFP_KERNEL);
0292     if (!pin_names)
0293         return -ENOMEM;
0294
0295     for (i = 0; i < PIN_COLLECTIONS; i++) {
0296         for (j = 0; j < PINS_PER_COLLECTION; j++) {
0297             int pin_id = i*PINS_PER_COLLECTION + j;
0298             char *name = &pin_names[pin_id * name_len];
0299
0300             snprintf(name, name_len, "GP_%c%c", 'A'+i, '0'+j);
0301
0302             pins[pin_id].number = pin_id;
0303             pins[pin_id].name = name;
0304             pmap->pin_names[pin_id] = name;
0305         }
0306     }
0307
0308     pctl_desc = devm_kzalloc(&pdev->dev, sizeof(*pctl_desc), GFP_KERNEL);
0309     if (!pctl_desc)
0310         return -ENOMEM;
0311
0312     pctl_desc->name = DRIVER_NAME,
0313     pctl_desc->owner = THIS_MODULE,
0314     pctl_desc->pctlops = &dc_pinctrl_ops,
0315     pctl_desc->pmxops = &dc_pmxops,
0316     pctl_desc->npins = PINS_COUNT;
0317     pctl_desc->pins = pins;
0318     pmap->desc = pctl_desc;
0319
0320     pmap->dev = &pdev->dev;
0321
0322     pmap->pctl = devm_pinctrl_register(&pdev->dev, pctl_desc, pmap);
0323     if (IS_ERR(pmap->pctl)) {
0324         dev_err(&pdev->dev, "pinctrl driver registration failed\n");
0325         return PTR_ERR(pmap->pctl);
0326     }
0327
0328     return dc_gpiochip_add(pmap);
0329 }
0330
0331 static const struct of_device_id dc_pinctrl_ids[] = {
0332     { .compatible = "cnxt,cx92755-pinctrl" },
0333     { /* sentinel */ }
0334 };
0335
0336 static struct platform_driver dc_pinctrl_driver = {
0337     .driver = {
0338         .name = DRIVER_NAME,
0339         .of_match_table = dc_pinctrl_ids,
0340         .suppress_bind_attrs = true,
0341     },
0342     .probe = dc_pinctrl_probe,
0343 };
0344 builtin_platform_driver(dc_pinctrl_driver);