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0009 #include <linux/io.h>
0010 #include <linux/of.h>
0011 #include <linux/platform_device.h>
0012 #include <linux/pinctrl/pinctrl.h>
0013 #include <linux/pinctrl/pinmux.h>
0014 #include <linux/pinctrl/pinconf-generic.h>
0015 #include <linux/slab.h>
0016
0017 #include "core.h"
0018 #include "pinctrl-utils.h"
0019
0020 #define BM1880_REG_MUX 0x20
0021
0022
0023
0024
0025
0026
0027
0028
0029
0030
0031
0032 struct bm1880_pinctrl {
0033 void __iomem *base;
0034 struct pinctrl_dev *pctrldev;
0035 const struct bm1880_pctrl_group *groups;
0036 unsigned int ngroups;
0037 const struct bm1880_pinmux_function *funcs;
0038 unsigned int nfuncs;
0039 const struct bm1880_pinconf_data *pinconf;
0040 };
0041
0042
0043
0044
0045
0046
0047
0048 struct bm1880_pctrl_group {
0049 const char *name;
0050 const unsigned int *pins;
0051 const unsigned int npins;
0052 };
0053
0054
0055
0056
0057
0058
0059
0060
0061
0062
0063 struct bm1880_pinmux_function {
0064 const char *name;
0065 const char * const *groups;
0066 unsigned int ngroups;
0067 u32 mux_val;
0068 u32 mux;
0069 u8 mux_shift;
0070 };
0071
0072
0073
0074
0075
0076 struct bm1880_pinconf_data {
0077 u32 drv_bits;
0078 };
0079
0080 static const struct pinctrl_pin_desc bm1880_pins[] = {
0081 PINCTRL_PIN(0, "MIO0"),
0082 PINCTRL_PIN(1, "MIO1"),
0083 PINCTRL_PIN(2, "MIO2"),
0084 PINCTRL_PIN(3, "MIO3"),
0085 PINCTRL_PIN(4, "MIO4"),
0086 PINCTRL_PIN(5, "MIO5"),
0087 PINCTRL_PIN(6, "MIO6"),
0088 PINCTRL_PIN(7, "MIO7"),
0089 PINCTRL_PIN(8, "MIO8"),
0090 PINCTRL_PIN(9, "MIO9"),
0091 PINCTRL_PIN(10, "MIO10"),
0092 PINCTRL_PIN(11, "MIO11"),
0093 PINCTRL_PIN(12, "MIO12"),
0094 PINCTRL_PIN(13, "MIO13"),
0095 PINCTRL_PIN(14, "MIO14"),
0096 PINCTRL_PIN(15, "MIO15"),
0097 PINCTRL_PIN(16, "MIO16"),
0098 PINCTRL_PIN(17, "MIO17"),
0099 PINCTRL_PIN(18, "MIO18"),
0100 PINCTRL_PIN(19, "MIO19"),
0101 PINCTRL_PIN(20, "MIO20"),
0102 PINCTRL_PIN(21, "MIO21"),
0103 PINCTRL_PIN(22, "MIO22"),
0104 PINCTRL_PIN(23, "MIO23"),
0105 PINCTRL_PIN(24, "MIO24"),
0106 PINCTRL_PIN(25, "MIO25"),
0107 PINCTRL_PIN(26, "MIO26"),
0108 PINCTRL_PIN(27, "MIO27"),
0109 PINCTRL_PIN(28, "MIO28"),
0110 PINCTRL_PIN(29, "MIO29"),
0111 PINCTRL_PIN(30, "MIO30"),
0112 PINCTRL_PIN(31, "MIO31"),
0113 PINCTRL_PIN(32, "MIO32"),
0114 PINCTRL_PIN(33, "MIO33"),
0115 PINCTRL_PIN(34, "MIO34"),
0116 PINCTRL_PIN(35, "MIO35"),
0117 PINCTRL_PIN(36, "MIO36"),
0118 PINCTRL_PIN(37, "MIO37"),
0119 PINCTRL_PIN(38, "MIO38"),
0120 PINCTRL_PIN(39, "MIO39"),
0121 PINCTRL_PIN(40, "MIO40"),
0122 PINCTRL_PIN(41, "MIO41"),
0123 PINCTRL_PIN(42, "MIO42"),
0124 PINCTRL_PIN(43, "MIO43"),
0125 PINCTRL_PIN(44, "MIO44"),
0126 PINCTRL_PIN(45, "MIO45"),
0127 PINCTRL_PIN(46, "MIO46"),
0128 PINCTRL_PIN(47, "MIO47"),
0129 PINCTRL_PIN(48, "MIO48"),
0130 PINCTRL_PIN(49, "MIO49"),
0131 PINCTRL_PIN(50, "MIO50"),
0132 PINCTRL_PIN(51, "MIO51"),
0133 PINCTRL_PIN(52, "MIO52"),
0134 PINCTRL_PIN(53, "MIO53"),
0135 PINCTRL_PIN(54, "MIO54"),
0136 PINCTRL_PIN(55, "MIO55"),
0137 PINCTRL_PIN(56, "MIO56"),
0138 PINCTRL_PIN(57, "MIO57"),
0139 PINCTRL_PIN(58, "MIO58"),
0140 PINCTRL_PIN(59, "MIO59"),
0141 PINCTRL_PIN(60, "MIO60"),
0142 PINCTRL_PIN(61, "MIO61"),
0143 PINCTRL_PIN(62, "MIO62"),
0144 PINCTRL_PIN(63, "MIO63"),
0145 PINCTRL_PIN(64, "MIO64"),
0146 PINCTRL_PIN(65, "MIO65"),
0147 PINCTRL_PIN(66, "MIO66"),
0148 PINCTRL_PIN(67, "MIO67"),
0149 PINCTRL_PIN(68, "MIO68"),
0150 PINCTRL_PIN(69, "MIO69"),
0151 PINCTRL_PIN(70, "MIO70"),
0152 PINCTRL_PIN(71, "MIO71"),
0153 PINCTRL_PIN(72, "MIO72"),
0154 PINCTRL_PIN(73, "MIO73"),
0155 PINCTRL_PIN(74, "MIO74"),
0156 PINCTRL_PIN(75, "MIO75"),
0157 PINCTRL_PIN(76, "MIO76"),
0158 PINCTRL_PIN(77, "MIO77"),
0159 PINCTRL_PIN(78, "MIO78"),
0160 PINCTRL_PIN(79, "MIO79"),
0161 PINCTRL_PIN(80, "MIO80"),
0162 PINCTRL_PIN(81, "MIO81"),
0163 PINCTRL_PIN(82, "MIO82"),
0164 PINCTRL_PIN(83, "MIO83"),
0165 PINCTRL_PIN(84, "MIO84"),
0166 PINCTRL_PIN(85, "MIO85"),
0167 PINCTRL_PIN(86, "MIO86"),
0168 PINCTRL_PIN(87, "MIO87"),
0169 PINCTRL_PIN(88, "MIO88"),
0170 PINCTRL_PIN(89, "MIO89"),
0171 PINCTRL_PIN(90, "MIO90"),
0172 PINCTRL_PIN(91, "MIO91"),
0173 PINCTRL_PIN(92, "MIO92"),
0174 PINCTRL_PIN(93, "MIO93"),
0175 PINCTRL_PIN(94, "MIO94"),
0176 PINCTRL_PIN(95, "MIO95"),
0177 PINCTRL_PIN(96, "MIO96"),
0178 PINCTRL_PIN(97, "MIO97"),
0179 PINCTRL_PIN(98, "MIO98"),
0180 PINCTRL_PIN(99, "MIO99"),
0181 PINCTRL_PIN(100, "MIO100"),
0182 PINCTRL_PIN(101, "MIO101"),
0183 PINCTRL_PIN(102, "MIO102"),
0184 PINCTRL_PIN(103, "MIO103"),
0185 PINCTRL_PIN(104, "MIO104"),
0186 PINCTRL_PIN(105, "MIO105"),
0187 PINCTRL_PIN(106, "MIO106"),
0188 PINCTRL_PIN(107, "MIO107"),
0189 PINCTRL_PIN(108, "MIO108"),
0190 PINCTRL_PIN(109, "MIO109"),
0191 PINCTRL_PIN(110, "MIO110"),
0192 PINCTRL_PIN(111, "MIO111"),
0193 };
0194
0195 enum bm1880_pinmux_functions {
0196 F_nand, F_spi, F_emmc, F_sdio, F_eth0, F_pwm0, F_pwm1, F_pwm2,
0197 F_pwm3, F_pwm4, F_pwm5, F_pwm6, F_pwm7, F_pwm8, F_pwm9, F_pwm10,
0198 F_pwm11, F_pwm12, F_pwm13, F_pwm14, F_pwm15, F_pwm16, F_pwm17,
0199 F_pwm18, F_pwm19, F_pwm20, F_pwm21, F_pwm22, F_pwm23, F_pwm24,
0200 F_pwm25, F_pwm26, F_pwm27, F_pwm28, F_pwm29, F_pwm30, F_pwm31,
0201 F_pwm32, F_pwm33, F_pwm34, F_pwm35, F_pwm36, F_pwm37, F_i2c0, F_i2c1,
0202 F_i2c2, F_i2c3, F_i2c4, F_uart0, F_uart1, F_uart2, F_uart3, F_uart4,
0203 F_uart5, F_uart6, F_uart7, F_uart8, F_uart9, F_uart10, F_uart11,
0204 F_uart12, F_uart13, F_uart14, F_uart15, F_gpio0, F_gpio1, F_gpio2,
0205 F_gpio3, F_gpio4, F_gpio5, F_gpio6, F_gpio7, F_gpio8, F_gpio9, F_gpio10,
0206 F_gpio11, F_gpio12, F_gpio13, F_gpio14, F_gpio15, F_gpio16, F_gpio17,
0207 F_gpio18, F_gpio19, F_gpio20, F_gpio21, F_gpio22, F_gpio23, F_gpio24,
0208 F_gpio25, F_gpio26, F_gpio27, F_gpio28, F_gpio29, F_gpio30, F_gpio31,
0209 F_gpio32, F_gpio33, F_gpio34, F_gpio35, F_gpio36, F_gpio37, F_gpio38,
0210 F_gpio39, F_gpio40, F_gpio41, F_gpio42, F_gpio43, F_gpio44, F_gpio45,
0211 F_gpio46, F_gpio47, F_gpio48, F_gpio49, F_gpio50, F_gpio51, F_gpio52,
0212 F_gpio53, F_gpio54, F_gpio55, F_gpio56, F_gpio57, F_gpio58, F_gpio59,
0213 F_gpio60, F_gpio61, F_gpio62, F_gpio63, F_gpio64, F_gpio65, F_gpio66,
0214 F_gpio67, F_eth1, F_i2s0, F_i2s0_mclkin, F_i2s1, F_i2s1_mclkin, F_spi0,
0215 F_max
0216 };
0217
0218 static const unsigned int nand_pins[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
0219 10, 11, 12, 13, 14, 15, 16 };
0220 static const unsigned int spi_pins[] = { 0, 1, 8, 10, 11, 12, 13 };
0221 static const unsigned int emmc_pins[] = { 2, 3, 4, 5, 6, 7, 9, 14, 15, 16 };
0222 static const unsigned int sdio_pins[] = { 17, 18, 19, 20, 21, 22, 23, 24,
0223 25, 26 };
0224 static const unsigned int eth0_pins[] = { 27, 28, 29, 30, 31, 32, 33, 34, 35,
0225 36, 37, 38, 39, 40, 41, 42 };
0226 static const unsigned int pwm0_pins[] = { 29 };
0227 static const unsigned int pwm1_pins[] = { 30 };
0228 static const unsigned int pwm2_pins[] = { 34 };
0229 static const unsigned int pwm3_pins[] = { 35 };
0230 static const unsigned int pwm4_pins[] = { 43 };
0231 static const unsigned int pwm5_pins[] = { 44 };
0232 static const unsigned int pwm6_pins[] = { 45 };
0233 static const unsigned int pwm7_pins[] = { 46 };
0234 static const unsigned int pwm8_pins[] = { 47 };
0235 static const unsigned int pwm9_pins[] = { 48 };
0236 static const unsigned int pwm10_pins[] = { 49 };
0237 static const unsigned int pwm11_pins[] = { 50 };
0238 static const unsigned int pwm12_pins[] = { 51 };
0239 static const unsigned int pwm13_pins[] = { 52 };
0240 static const unsigned int pwm14_pins[] = { 53 };
0241 static const unsigned int pwm15_pins[] = { 54 };
0242 static const unsigned int pwm16_pins[] = { 55 };
0243 static const unsigned int pwm17_pins[] = { 56 };
0244 static const unsigned int pwm18_pins[] = { 57 };
0245 static const unsigned int pwm19_pins[] = { 58 };
0246 static const unsigned int pwm20_pins[] = { 59 };
0247 static const unsigned int pwm21_pins[] = { 60 };
0248 static const unsigned int pwm22_pins[] = { 61 };
0249 static const unsigned int pwm23_pins[] = { 62 };
0250 static const unsigned int pwm24_pins[] = { 97 };
0251 static const unsigned int pwm25_pins[] = { 98 };
0252 static const unsigned int pwm26_pins[] = { 99 };
0253 static const unsigned int pwm27_pins[] = { 100 };
0254 static const unsigned int pwm28_pins[] = { 101 };
0255 static const unsigned int pwm29_pins[] = { 102 };
0256 static const unsigned int pwm30_pins[] = { 103 };
0257 static const unsigned int pwm31_pins[] = { 104 };
0258 static const unsigned int pwm32_pins[] = { 105 };
0259 static const unsigned int pwm33_pins[] = { 106 };
0260 static const unsigned int pwm34_pins[] = { 107 };
0261 static const unsigned int pwm35_pins[] = { 108 };
0262 static const unsigned int pwm36_pins[] = { 109 };
0263 static const unsigned int pwm37_pins[] = { 110 };
0264 static const unsigned int i2c0_pins[] = { 63, 64 };
0265 static const unsigned int i2c1_pins[] = { 65, 66 };
0266 static const unsigned int i2c2_pins[] = { 67, 68 };
0267 static const unsigned int i2c3_pins[] = { 69, 70 };
0268 static const unsigned int i2c4_pins[] = { 71, 72 };
0269 static const unsigned int uart0_pins[] = { 73, 74 };
0270 static const unsigned int uart1_pins[] = { 75, 76 };
0271 static const unsigned int uart2_pins[] = { 77, 78 };
0272 static const unsigned int uart3_pins[] = { 79, 80 };
0273 static const unsigned int uart4_pins[] = { 81, 82 };
0274 static const unsigned int uart5_pins[] = { 83, 84 };
0275 static const unsigned int uart6_pins[] = { 85, 86 };
0276 static const unsigned int uart7_pins[] = { 87, 88 };
0277 static const unsigned int uart8_pins[] = { 89, 90 };
0278 static const unsigned int uart9_pins[] = { 91, 92 };
0279 static const unsigned int uart10_pins[] = { 93, 94 };
0280 static const unsigned int uart11_pins[] = { 95, 96 };
0281 static const unsigned int uart12_pins[] = { 73, 74, 75, 76 };
0282 static const unsigned int uart13_pins[] = { 77, 78, 83, 84 };
0283 static const unsigned int uart14_pins[] = { 79, 80, 85, 86 };
0284 static const unsigned int uart15_pins[] = { 81, 82, 87, 88 };
0285 static const unsigned int gpio0_pins[] = { 97 };
0286 static const unsigned int gpio1_pins[] = { 98 };
0287 static const unsigned int gpio2_pins[] = { 99 };
0288 static const unsigned int gpio3_pins[] = { 100 };
0289 static const unsigned int gpio4_pins[] = { 101 };
0290 static const unsigned int gpio5_pins[] = { 102 };
0291 static const unsigned int gpio6_pins[] = { 103 };
0292 static const unsigned int gpio7_pins[] = { 104 };
0293 static const unsigned int gpio8_pins[] = { 105 };
0294 static const unsigned int gpio9_pins[] = { 106 };
0295 static const unsigned int gpio10_pins[] = { 107 };
0296 static const unsigned int gpio11_pins[] = { 108 };
0297 static const unsigned int gpio12_pins[] = { 109 };
0298 static const unsigned int gpio13_pins[] = { 110 };
0299 static const unsigned int gpio14_pins[] = { 43 };
0300 static const unsigned int gpio15_pins[] = { 44 };
0301 static const unsigned int gpio16_pins[] = { 45 };
0302 static const unsigned int gpio17_pins[] = { 46 };
0303 static const unsigned int gpio18_pins[] = { 47 };
0304 static const unsigned int gpio19_pins[] = { 48 };
0305 static const unsigned int gpio20_pins[] = { 49 };
0306 static const unsigned int gpio21_pins[] = { 50 };
0307 static const unsigned int gpio22_pins[] = { 51 };
0308 static const unsigned int gpio23_pins[] = { 52 };
0309 static const unsigned int gpio24_pins[] = { 53 };
0310 static const unsigned int gpio25_pins[] = { 54 };
0311 static const unsigned int gpio26_pins[] = { 55 };
0312 static const unsigned int gpio27_pins[] = { 56 };
0313 static const unsigned int gpio28_pins[] = { 57 };
0314 static const unsigned int gpio29_pins[] = { 58 };
0315 static const unsigned int gpio30_pins[] = { 59 };
0316 static const unsigned int gpio31_pins[] = { 60 };
0317 static const unsigned int gpio32_pins[] = { 61 };
0318 static const unsigned int gpio33_pins[] = { 62 };
0319 static const unsigned int gpio34_pins[] = { 63 };
0320 static const unsigned int gpio35_pins[] = { 64 };
0321 static const unsigned int gpio36_pins[] = { 65 };
0322 static const unsigned int gpio37_pins[] = { 66 };
0323 static const unsigned int gpio38_pins[] = { 67 };
0324 static const unsigned int gpio39_pins[] = { 68 };
0325 static const unsigned int gpio40_pins[] = { 69 };
0326 static const unsigned int gpio41_pins[] = { 70 };
0327 static const unsigned int gpio42_pins[] = { 71 };
0328 static const unsigned int gpio43_pins[] = { 72 };
0329 static const unsigned int gpio44_pins[] = { 73 };
0330 static const unsigned int gpio45_pins[] = { 74 };
0331 static const unsigned int gpio46_pins[] = { 75 };
0332 static const unsigned int gpio47_pins[] = { 76 };
0333 static const unsigned int gpio48_pins[] = { 77 };
0334 static const unsigned int gpio49_pins[] = { 78 };
0335 static const unsigned int gpio50_pins[] = { 79 };
0336 static const unsigned int gpio51_pins[] = { 80 };
0337 static const unsigned int gpio52_pins[] = { 81 };
0338 static const unsigned int gpio53_pins[] = { 82 };
0339 static const unsigned int gpio54_pins[] = { 83 };
0340 static const unsigned int gpio55_pins[] = { 84 };
0341 static const unsigned int gpio56_pins[] = { 85 };
0342 static const unsigned int gpio57_pins[] = { 86 };
0343 static const unsigned int gpio58_pins[] = { 87 };
0344 static const unsigned int gpio59_pins[] = { 88 };
0345 static const unsigned int gpio60_pins[] = { 89 };
0346 static const unsigned int gpio61_pins[] = { 90 };
0347 static const unsigned int gpio62_pins[] = { 91 };
0348 static const unsigned int gpio63_pins[] = { 92 };
0349 static const unsigned int gpio64_pins[] = { 93 };
0350 static const unsigned int gpio65_pins[] = { 94 };
0351 static const unsigned int gpio66_pins[] = { 95 };
0352 static const unsigned int gpio67_pins[] = { 96 };
0353 static const unsigned int eth1_pins[] = { 43, 44, 45, 46, 47, 48, 49, 50, 51,
0354 52, 53, 54, 55, 56, 57, 58 };
0355 static const unsigned int i2s0_pins[] = { 87, 88, 89, 90, 91 };
0356 static const unsigned int i2s0_mclkin_pins[] = { 97 };
0357 static const unsigned int i2s1_pins[] = { 92, 93, 94, 95, 96 };
0358 static const unsigned int i2s1_mclkin_pins[] = { 98 };
0359 static const unsigned int spi0_pins[] = { 59, 60, 61, 62 };
0360
0361 #define BM1880_PINCTRL_GRP(nm) \
0362 { \
0363 .name = #nm "_grp", \
0364 .pins = nm ## _pins, \
0365 .npins = ARRAY_SIZE(nm ## _pins), \
0366 }
0367
0368 static const struct bm1880_pctrl_group bm1880_pctrl_groups[] = {
0369 BM1880_PINCTRL_GRP(nand),
0370 BM1880_PINCTRL_GRP(spi),
0371 BM1880_PINCTRL_GRP(emmc),
0372 BM1880_PINCTRL_GRP(sdio),
0373 BM1880_PINCTRL_GRP(eth0),
0374 BM1880_PINCTRL_GRP(pwm0),
0375 BM1880_PINCTRL_GRP(pwm1),
0376 BM1880_PINCTRL_GRP(pwm2),
0377 BM1880_PINCTRL_GRP(pwm3),
0378 BM1880_PINCTRL_GRP(pwm4),
0379 BM1880_PINCTRL_GRP(pwm5),
0380 BM1880_PINCTRL_GRP(pwm6),
0381 BM1880_PINCTRL_GRP(pwm7),
0382 BM1880_PINCTRL_GRP(pwm8),
0383 BM1880_PINCTRL_GRP(pwm9),
0384 BM1880_PINCTRL_GRP(pwm10),
0385 BM1880_PINCTRL_GRP(pwm11),
0386 BM1880_PINCTRL_GRP(pwm12),
0387 BM1880_PINCTRL_GRP(pwm13),
0388 BM1880_PINCTRL_GRP(pwm14),
0389 BM1880_PINCTRL_GRP(pwm15),
0390 BM1880_PINCTRL_GRP(pwm16),
0391 BM1880_PINCTRL_GRP(pwm17),
0392 BM1880_PINCTRL_GRP(pwm18),
0393 BM1880_PINCTRL_GRP(pwm19),
0394 BM1880_PINCTRL_GRP(pwm20),
0395 BM1880_PINCTRL_GRP(pwm21),
0396 BM1880_PINCTRL_GRP(pwm22),
0397 BM1880_PINCTRL_GRP(pwm23),
0398 BM1880_PINCTRL_GRP(pwm24),
0399 BM1880_PINCTRL_GRP(pwm25),
0400 BM1880_PINCTRL_GRP(pwm26),
0401 BM1880_PINCTRL_GRP(pwm27),
0402 BM1880_PINCTRL_GRP(pwm28),
0403 BM1880_PINCTRL_GRP(pwm29),
0404 BM1880_PINCTRL_GRP(pwm30),
0405 BM1880_PINCTRL_GRP(pwm31),
0406 BM1880_PINCTRL_GRP(pwm32),
0407 BM1880_PINCTRL_GRP(pwm33),
0408 BM1880_PINCTRL_GRP(pwm34),
0409 BM1880_PINCTRL_GRP(pwm35),
0410 BM1880_PINCTRL_GRP(pwm36),
0411 BM1880_PINCTRL_GRP(pwm37),
0412 BM1880_PINCTRL_GRP(i2c0),
0413 BM1880_PINCTRL_GRP(i2c1),
0414 BM1880_PINCTRL_GRP(i2c2),
0415 BM1880_PINCTRL_GRP(i2c3),
0416 BM1880_PINCTRL_GRP(i2c4),
0417 BM1880_PINCTRL_GRP(uart0),
0418 BM1880_PINCTRL_GRP(uart1),
0419 BM1880_PINCTRL_GRP(uart2),
0420 BM1880_PINCTRL_GRP(uart3),
0421 BM1880_PINCTRL_GRP(uart4),
0422 BM1880_PINCTRL_GRP(uart5),
0423 BM1880_PINCTRL_GRP(uart6),
0424 BM1880_PINCTRL_GRP(uart7),
0425 BM1880_PINCTRL_GRP(uart8),
0426 BM1880_PINCTRL_GRP(uart9),
0427 BM1880_PINCTRL_GRP(uart10),
0428 BM1880_PINCTRL_GRP(uart11),
0429 BM1880_PINCTRL_GRP(uart12),
0430 BM1880_PINCTRL_GRP(uart13),
0431 BM1880_PINCTRL_GRP(uart14),
0432 BM1880_PINCTRL_GRP(uart15),
0433 BM1880_PINCTRL_GRP(gpio0),
0434 BM1880_PINCTRL_GRP(gpio1),
0435 BM1880_PINCTRL_GRP(gpio2),
0436 BM1880_PINCTRL_GRP(gpio3),
0437 BM1880_PINCTRL_GRP(gpio4),
0438 BM1880_PINCTRL_GRP(gpio5),
0439 BM1880_PINCTRL_GRP(gpio6),
0440 BM1880_PINCTRL_GRP(gpio7),
0441 BM1880_PINCTRL_GRP(gpio8),
0442 BM1880_PINCTRL_GRP(gpio9),
0443 BM1880_PINCTRL_GRP(gpio10),
0444 BM1880_PINCTRL_GRP(gpio11),
0445 BM1880_PINCTRL_GRP(gpio12),
0446 BM1880_PINCTRL_GRP(gpio13),
0447 BM1880_PINCTRL_GRP(gpio14),
0448 BM1880_PINCTRL_GRP(gpio15),
0449 BM1880_PINCTRL_GRP(gpio16),
0450 BM1880_PINCTRL_GRP(gpio17),
0451 BM1880_PINCTRL_GRP(gpio18),
0452 BM1880_PINCTRL_GRP(gpio19),
0453 BM1880_PINCTRL_GRP(gpio20),
0454 BM1880_PINCTRL_GRP(gpio21),
0455 BM1880_PINCTRL_GRP(gpio22),
0456 BM1880_PINCTRL_GRP(gpio23),
0457 BM1880_PINCTRL_GRP(gpio24),
0458 BM1880_PINCTRL_GRP(gpio25),
0459 BM1880_PINCTRL_GRP(gpio26),
0460 BM1880_PINCTRL_GRP(gpio27),
0461 BM1880_PINCTRL_GRP(gpio28),
0462 BM1880_PINCTRL_GRP(gpio29),
0463 BM1880_PINCTRL_GRP(gpio30),
0464 BM1880_PINCTRL_GRP(gpio31),
0465 BM1880_PINCTRL_GRP(gpio32),
0466 BM1880_PINCTRL_GRP(gpio33),
0467 BM1880_PINCTRL_GRP(gpio34),
0468 BM1880_PINCTRL_GRP(gpio35),
0469 BM1880_PINCTRL_GRP(gpio36),
0470 BM1880_PINCTRL_GRP(gpio37),
0471 BM1880_PINCTRL_GRP(gpio38),
0472 BM1880_PINCTRL_GRP(gpio39),
0473 BM1880_PINCTRL_GRP(gpio40),
0474 BM1880_PINCTRL_GRP(gpio41),
0475 BM1880_PINCTRL_GRP(gpio42),
0476 BM1880_PINCTRL_GRP(gpio43),
0477 BM1880_PINCTRL_GRP(gpio44),
0478 BM1880_PINCTRL_GRP(gpio45),
0479 BM1880_PINCTRL_GRP(gpio46),
0480 BM1880_PINCTRL_GRP(gpio47),
0481 BM1880_PINCTRL_GRP(gpio48),
0482 BM1880_PINCTRL_GRP(gpio49),
0483 BM1880_PINCTRL_GRP(gpio50),
0484 BM1880_PINCTRL_GRP(gpio51),
0485 BM1880_PINCTRL_GRP(gpio52),
0486 BM1880_PINCTRL_GRP(gpio53),
0487 BM1880_PINCTRL_GRP(gpio54),
0488 BM1880_PINCTRL_GRP(gpio55),
0489 BM1880_PINCTRL_GRP(gpio56),
0490 BM1880_PINCTRL_GRP(gpio57),
0491 BM1880_PINCTRL_GRP(gpio58),
0492 BM1880_PINCTRL_GRP(gpio59),
0493 BM1880_PINCTRL_GRP(gpio60),
0494 BM1880_PINCTRL_GRP(gpio61),
0495 BM1880_PINCTRL_GRP(gpio62),
0496 BM1880_PINCTRL_GRP(gpio63),
0497 BM1880_PINCTRL_GRP(gpio64),
0498 BM1880_PINCTRL_GRP(gpio65),
0499 BM1880_PINCTRL_GRP(gpio66),
0500 BM1880_PINCTRL_GRP(gpio67),
0501 BM1880_PINCTRL_GRP(eth1),
0502 BM1880_PINCTRL_GRP(i2s0),
0503 BM1880_PINCTRL_GRP(i2s0_mclkin),
0504 BM1880_PINCTRL_GRP(i2s1),
0505 BM1880_PINCTRL_GRP(i2s1_mclkin),
0506 BM1880_PINCTRL_GRP(spi0),
0507 };
0508
0509 static const char * const nand_group[] = { "nand_grp" };
0510 static const char * const spi_group[] = { "spi_grp" };
0511 static const char * const emmc_group[] = { "emmc_grp" };
0512 static const char * const sdio_group[] = { "sdio_grp" };
0513 static const char * const eth0_group[] = { "eth0_grp" };
0514 static const char * const pwm0_group[] = { "pwm0_grp" };
0515 static const char * const pwm1_group[] = { "pwm1_grp" };
0516 static const char * const pwm2_group[] = { "pwm2_grp" };
0517 static const char * const pwm3_group[] = { "pwm3_grp" };
0518 static const char * const pwm4_group[] = { "pwm4_grp" };
0519 static const char * const pwm5_group[] = { "pwm5_grp" };
0520 static const char * const pwm6_group[] = { "pwm6_grp" };
0521 static const char * const pwm7_group[] = { "pwm7_grp" };
0522 static const char * const pwm8_group[] = { "pwm8_grp" };
0523 static const char * const pwm9_group[] = { "pwm9_grp" };
0524 static const char * const pwm10_group[] = { "pwm10_grp" };
0525 static const char * const pwm11_group[] = { "pwm11_grp" };
0526 static const char * const pwm12_group[] = { "pwm12_grp" };
0527 static const char * const pwm13_group[] = { "pwm13_grp" };
0528 static const char * const pwm14_group[] = { "pwm14_grp" };
0529 static const char * const pwm15_group[] = { "pwm15_grp" };
0530 static const char * const pwm16_group[] = { "pwm16_grp" };
0531 static const char * const pwm17_group[] = { "pwm17_grp" };
0532 static const char * const pwm18_group[] = { "pwm18_grp" };
0533 static const char * const pwm19_group[] = { "pwm19_grp" };
0534 static const char * const pwm20_group[] = { "pwm20_grp" };
0535 static const char * const pwm21_group[] = { "pwm21_grp" };
0536 static const char * const pwm22_group[] = { "pwm22_grp" };
0537 static const char * const pwm23_group[] = { "pwm23_grp" };
0538 static const char * const pwm24_group[] = { "pwm24_grp" };
0539 static const char * const pwm25_group[] = { "pwm25_grp" };
0540 static const char * const pwm26_group[] = { "pwm26_grp" };
0541 static const char * const pwm27_group[] = { "pwm27_grp" };
0542 static const char * const pwm28_group[] = { "pwm28_grp" };
0543 static const char * const pwm29_group[] = { "pwm29_grp" };
0544 static const char * const pwm30_group[] = { "pwm30_grp" };
0545 static const char * const pwm31_group[] = { "pwm31_grp" };
0546 static const char * const pwm32_group[] = { "pwm32_grp" };
0547 static const char * const pwm33_group[] = { "pwm33_grp" };
0548 static const char * const pwm34_group[] = { "pwm34_grp" };
0549 static const char * const pwm35_group[] = { "pwm35_grp" };
0550 static const char * const pwm36_group[] = { "pwm36_grp" };
0551 static const char * const pwm37_group[] = { "pwm37_grp" };
0552 static const char * const i2c0_group[] = { "i2c0_grp" };
0553 static const char * const i2c1_group[] = { "i2c1_grp" };
0554 static const char * const i2c2_group[] = { "i2c2_grp" };
0555 static const char * const i2c3_group[] = { "i2c3_grp" };
0556 static const char * const i2c4_group[] = { "i2c4_grp" };
0557 static const char * const uart0_group[] = { "uart0_grp" };
0558 static const char * const uart1_group[] = { "uart1_grp" };
0559 static const char * const uart2_group[] = { "uart2_grp" };
0560 static const char * const uart3_group[] = { "uart3_grp" };
0561 static const char * const uart4_group[] = { "uart4_grp" };
0562 static const char * const uart5_group[] = { "uart5_grp" };
0563 static const char * const uart6_group[] = { "uart6_grp" };
0564 static const char * const uart7_group[] = { "uart7_grp" };
0565 static const char * const uart8_group[] = { "uart8_grp" };
0566 static const char * const uart9_group[] = { "uart9_grp" };
0567 static const char * const uart10_group[] = { "uart10_grp" };
0568 static const char * const uart11_group[] = { "uart11_grp" };
0569 static const char * const uart12_group[] = { "uart12_grp" };
0570 static const char * const uart13_group[] = { "uart13_grp" };
0571 static const char * const uart14_group[] = { "uart14_grp" };
0572 static const char * const uart15_group[] = { "uart15_grp" };
0573 static const char * const gpio0_group[] = { "gpio0_grp" };
0574 static const char * const gpio1_group[] = { "gpio1_grp" };
0575 static const char * const gpio2_group[] = { "gpio2_grp" };
0576 static const char * const gpio3_group[] = { "gpio3_grp" };
0577 static const char * const gpio4_group[] = { "gpio4_grp" };
0578 static const char * const gpio5_group[] = { "gpio5_grp" };
0579 static const char * const gpio6_group[] = { "gpio6_grp" };
0580 static const char * const gpio7_group[] = { "gpio7_grp" };
0581 static const char * const gpio8_group[] = { "gpio8_grp" };
0582 static const char * const gpio9_group[] = { "gpio9_grp" };
0583 static const char * const gpio10_group[] = { "gpio10_grp" };
0584 static const char * const gpio11_group[] = { "gpio11_grp" };
0585 static const char * const gpio12_group[] = { "gpio12_grp" };
0586 static const char * const gpio13_group[] = { "gpio13_grp" };
0587 static const char * const gpio14_group[] = { "gpio14_grp" };
0588 static const char * const gpio15_group[] = { "gpio15_grp" };
0589 static const char * const gpio16_group[] = { "gpio16_grp" };
0590 static const char * const gpio17_group[] = { "gpio17_grp" };
0591 static const char * const gpio18_group[] = { "gpio18_grp" };
0592 static const char * const gpio19_group[] = { "gpio19_grp" };
0593 static const char * const gpio20_group[] = { "gpio20_grp" };
0594 static const char * const gpio21_group[] = { "gpio21_grp" };
0595 static const char * const gpio22_group[] = { "gpio22_grp" };
0596 static const char * const gpio23_group[] = { "gpio23_grp" };
0597 static const char * const gpio24_group[] = { "gpio24_grp" };
0598 static const char * const gpio25_group[] = { "gpio25_grp" };
0599 static const char * const gpio26_group[] = { "gpio26_grp" };
0600 static const char * const gpio27_group[] = { "gpio27_grp" };
0601 static const char * const gpio28_group[] = { "gpio28_grp" };
0602 static const char * const gpio29_group[] = { "gpio29_grp" };
0603 static const char * const gpio30_group[] = { "gpio30_grp" };
0604 static const char * const gpio31_group[] = { "gpio31_grp" };
0605 static const char * const gpio32_group[] = { "gpio32_grp" };
0606 static const char * const gpio33_group[] = { "gpio33_grp" };
0607 static const char * const gpio34_group[] = { "gpio34_grp" };
0608 static const char * const gpio35_group[] = { "gpio35_grp" };
0609 static const char * const gpio36_group[] = { "gpio36_grp" };
0610 static const char * const gpio37_group[] = { "gpio37_grp" };
0611 static const char * const gpio38_group[] = { "gpio38_grp" };
0612 static const char * const gpio39_group[] = { "gpio39_grp" };
0613 static const char * const gpio40_group[] = { "gpio40_grp" };
0614 static const char * const gpio41_group[] = { "gpio41_grp" };
0615 static const char * const gpio42_group[] = { "gpio42_grp" };
0616 static const char * const gpio43_group[] = { "gpio43_grp" };
0617 static const char * const gpio44_group[] = { "gpio44_grp" };
0618 static const char * const gpio45_group[] = { "gpio45_grp" };
0619 static const char * const gpio46_group[] = { "gpio46_grp" };
0620 static const char * const gpio47_group[] = { "gpio47_grp" };
0621 static const char * const gpio48_group[] = { "gpio48_grp" };
0622 static const char * const gpio49_group[] = { "gpio49_grp" };
0623 static const char * const gpio50_group[] = { "gpio50_grp" };
0624 static const char * const gpio51_group[] = { "gpio51_grp" };
0625 static const char * const gpio52_group[] = { "gpio52_grp" };
0626 static const char * const gpio53_group[] = { "gpio53_grp" };
0627 static const char * const gpio54_group[] = { "gpio54_grp" };
0628 static const char * const gpio55_group[] = { "gpio55_grp" };
0629 static const char * const gpio56_group[] = { "gpio56_grp" };
0630 static const char * const gpio57_group[] = { "gpio57_grp" };
0631 static const char * const gpio58_group[] = { "gpio58_grp" };
0632 static const char * const gpio59_group[] = { "gpio59_grp" };
0633 static const char * const gpio60_group[] = { "gpio60_grp" };
0634 static const char * const gpio61_group[] = { "gpio61_grp" };
0635 static const char * const gpio62_group[] = { "gpio62_grp" };
0636 static const char * const gpio63_group[] = { "gpio63_grp" };
0637 static const char * const gpio64_group[] = { "gpio64_grp" };
0638 static const char * const gpio65_group[] = { "gpio65_grp" };
0639 static const char * const gpio66_group[] = { "gpio66_grp" };
0640 static const char * const gpio67_group[] = { "gpio67_grp" };
0641 static const char * const eth1_group[] = { "eth1_grp" };
0642 static const char * const i2s0_group[] = { "i2s0_grp" };
0643 static const char * const i2s0_mclkin_group[] = { "i2s0_mclkin_grp" };
0644 static const char * const i2s1_group[] = { "i2s1_grp" };
0645 static const char * const i2s1_mclkin_group[] = { "i2s1_mclkin_grp" };
0646 static const char * const spi0_group[] = { "spi0_grp" };
0647
0648 #define BM1880_PINMUX_FUNCTION(fname, mval) \
0649 [F_##fname] = { \
0650 .name = #fname, \
0651 .groups = fname##_group, \
0652 .ngroups = ARRAY_SIZE(fname##_group), \
0653 .mux_val = mval, \
0654 }
0655
0656 static const struct bm1880_pinmux_function bm1880_pmux_functions[] = {
0657 BM1880_PINMUX_FUNCTION(nand, 2),
0658 BM1880_PINMUX_FUNCTION(spi, 0),
0659 BM1880_PINMUX_FUNCTION(emmc, 1),
0660 BM1880_PINMUX_FUNCTION(sdio, 0),
0661 BM1880_PINMUX_FUNCTION(eth0, 0),
0662 BM1880_PINMUX_FUNCTION(pwm0, 2),
0663 BM1880_PINMUX_FUNCTION(pwm1, 2),
0664 BM1880_PINMUX_FUNCTION(pwm2, 2),
0665 BM1880_PINMUX_FUNCTION(pwm3, 2),
0666 BM1880_PINMUX_FUNCTION(pwm4, 2),
0667 BM1880_PINMUX_FUNCTION(pwm5, 2),
0668 BM1880_PINMUX_FUNCTION(pwm6, 2),
0669 BM1880_PINMUX_FUNCTION(pwm7, 2),
0670 BM1880_PINMUX_FUNCTION(pwm8, 2),
0671 BM1880_PINMUX_FUNCTION(pwm9, 2),
0672 BM1880_PINMUX_FUNCTION(pwm10, 2),
0673 BM1880_PINMUX_FUNCTION(pwm11, 2),
0674 BM1880_PINMUX_FUNCTION(pwm12, 2),
0675 BM1880_PINMUX_FUNCTION(pwm13, 2),
0676 BM1880_PINMUX_FUNCTION(pwm14, 2),
0677 BM1880_PINMUX_FUNCTION(pwm15, 2),
0678 BM1880_PINMUX_FUNCTION(pwm16, 2),
0679 BM1880_PINMUX_FUNCTION(pwm17, 2),
0680 BM1880_PINMUX_FUNCTION(pwm18, 2),
0681 BM1880_PINMUX_FUNCTION(pwm19, 2),
0682 BM1880_PINMUX_FUNCTION(pwm20, 2),
0683 BM1880_PINMUX_FUNCTION(pwm21, 2),
0684 BM1880_PINMUX_FUNCTION(pwm22, 2),
0685 BM1880_PINMUX_FUNCTION(pwm23, 2),
0686 BM1880_PINMUX_FUNCTION(pwm24, 2),
0687 BM1880_PINMUX_FUNCTION(pwm25, 2),
0688 BM1880_PINMUX_FUNCTION(pwm26, 2),
0689 BM1880_PINMUX_FUNCTION(pwm27, 2),
0690 BM1880_PINMUX_FUNCTION(pwm28, 2),
0691 BM1880_PINMUX_FUNCTION(pwm29, 2),
0692 BM1880_PINMUX_FUNCTION(pwm30, 2),
0693 BM1880_PINMUX_FUNCTION(pwm31, 2),
0694 BM1880_PINMUX_FUNCTION(pwm32, 2),
0695 BM1880_PINMUX_FUNCTION(pwm33, 2),
0696 BM1880_PINMUX_FUNCTION(pwm34, 2),
0697 BM1880_PINMUX_FUNCTION(pwm35, 2),
0698 BM1880_PINMUX_FUNCTION(pwm36, 2),
0699 BM1880_PINMUX_FUNCTION(pwm37, 2),
0700 BM1880_PINMUX_FUNCTION(i2c0, 1),
0701 BM1880_PINMUX_FUNCTION(i2c1, 1),
0702 BM1880_PINMUX_FUNCTION(i2c2, 1),
0703 BM1880_PINMUX_FUNCTION(i2c3, 1),
0704 BM1880_PINMUX_FUNCTION(i2c4, 1),
0705 BM1880_PINMUX_FUNCTION(uart0, 3),
0706 BM1880_PINMUX_FUNCTION(uart1, 3),
0707 BM1880_PINMUX_FUNCTION(uart2, 3),
0708 BM1880_PINMUX_FUNCTION(uart3, 3),
0709 BM1880_PINMUX_FUNCTION(uart4, 1),
0710 BM1880_PINMUX_FUNCTION(uart5, 1),
0711 BM1880_PINMUX_FUNCTION(uart6, 1),
0712 BM1880_PINMUX_FUNCTION(uart7, 1),
0713 BM1880_PINMUX_FUNCTION(uart8, 1),
0714 BM1880_PINMUX_FUNCTION(uart9, 1),
0715 BM1880_PINMUX_FUNCTION(uart10, 1),
0716 BM1880_PINMUX_FUNCTION(uart11, 1),
0717 BM1880_PINMUX_FUNCTION(uart12, 3),
0718 BM1880_PINMUX_FUNCTION(uart13, 3),
0719 BM1880_PINMUX_FUNCTION(uart14, 3),
0720 BM1880_PINMUX_FUNCTION(uart15, 3),
0721 BM1880_PINMUX_FUNCTION(gpio0, 0),
0722 BM1880_PINMUX_FUNCTION(gpio1, 0),
0723 BM1880_PINMUX_FUNCTION(gpio2, 0),
0724 BM1880_PINMUX_FUNCTION(gpio3, 0),
0725 BM1880_PINMUX_FUNCTION(gpio4, 0),
0726 BM1880_PINMUX_FUNCTION(gpio5, 0),
0727 BM1880_PINMUX_FUNCTION(gpio6, 0),
0728 BM1880_PINMUX_FUNCTION(gpio7, 0),
0729 BM1880_PINMUX_FUNCTION(gpio8, 0),
0730 BM1880_PINMUX_FUNCTION(gpio9, 0),
0731 BM1880_PINMUX_FUNCTION(gpio10, 0),
0732 BM1880_PINMUX_FUNCTION(gpio11, 0),
0733 BM1880_PINMUX_FUNCTION(gpio12, 1),
0734 BM1880_PINMUX_FUNCTION(gpio13, 1),
0735 BM1880_PINMUX_FUNCTION(gpio14, 0),
0736 BM1880_PINMUX_FUNCTION(gpio15, 0),
0737 BM1880_PINMUX_FUNCTION(gpio16, 0),
0738 BM1880_PINMUX_FUNCTION(gpio17, 0),
0739 BM1880_PINMUX_FUNCTION(gpio18, 0),
0740 BM1880_PINMUX_FUNCTION(gpio19, 0),
0741 BM1880_PINMUX_FUNCTION(gpio20, 0),
0742 BM1880_PINMUX_FUNCTION(gpio21, 0),
0743 BM1880_PINMUX_FUNCTION(gpio22, 0),
0744 BM1880_PINMUX_FUNCTION(gpio23, 0),
0745 BM1880_PINMUX_FUNCTION(gpio24, 0),
0746 BM1880_PINMUX_FUNCTION(gpio25, 0),
0747 BM1880_PINMUX_FUNCTION(gpio26, 0),
0748 BM1880_PINMUX_FUNCTION(gpio27, 0),
0749 BM1880_PINMUX_FUNCTION(gpio28, 0),
0750 BM1880_PINMUX_FUNCTION(gpio29, 0),
0751 BM1880_PINMUX_FUNCTION(gpio30, 0),
0752 BM1880_PINMUX_FUNCTION(gpio31, 0),
0753 BM1880_PINMUX_FUNCTION(gpio32, 0),
0754 BM1880_PINMUX_FUNCTION(gpio33, 0),
0755 BM1880_PINMUX_FUNCTION(gpio34, 0),
0756 BM1880_PINMUX_FUNCTION(gpio35, 0),
0757 BM1880_PINMUX_FUNCTION(gpio36, 0),
0758 BM1880_PINMUX_FUNCTION(gpio37, 0),
0759 BM1880_PINMUX_FUNCTION(gpio38, 0),
0760 BM1880_PINMUX_FUNCTION(gpio39, 0),
0761 BM1880_PINMUX_FUNCTION(gpio40, 0),
0762 BM1880_PINMUX_FUNCTION(gpio41, 0),
0763 BM1880_PINMUX_FUNCTION(gpio42, 0),
0764 BM1880_PINMUX_FUNCTION(gpio43, 0),
0765 BM1880_PINMUX_FUNCTION(gpio44, 0),
0766 BM1880_PINMUX_FUNCTION(gpio45, 0),
0767 BM1880_PINMUX_FUNCTION(gpio46, 0),
0768 BM1880_PINMUX_FUNCTION(gpio47, 0),
0769 BM1880_PINMUX_FUNCTION(gpio48, 0),
0770 BM1880_PINMUX_FUNCTION(gpio49, 0),
0771 BM1880_PINMUX_FUNCTION(gpio50, 0),
0772 BM1880_PINMUX_FUNCTION(gpio51, 0),
0773 BM1880_PINMUX_FUNCTION(gpio52, 0),
0774 BM1880_PINMUX_FUNCTION(gpio53, 0),
0775 BM1880_PINMUX_FUNCTION(gpio54, 0),
0776 BM1880_PINMUX_FUNCTION(gpio55, 0),
0777 BM1880_PINMUX_FUNCTION(gpio56, 0),
0778 BM1880_PINMUX_FUNCTION(gpio57, 0),
0779 BM1880_PINMUX_FUNCTION(gpio58, 0),
0780 BM1880_PINMUX_FUNCTION(gpio59, 0),
0781 BM1880_PINMUX_FUNCTION(gpio60, 0),
0782 BM1880_PINMUX_FUNCTION(gpio61, 0),
0783 BM1880_PINMUX_FUNCTION(gpio62, 0),
0784 BM1880_PINMUX_FUNCTION(gpio63, 0),
0785 BM1880_PINMUX_FUNCTION(gpio64, 0),
0786 BM1880_PINMUX_FUNCTION(gpio65, 0),
0787 BM1880_PINMUX_FUNCTION(gpio66, 0),
0788 BM1880_PINMUX_FUNCTION(gpio67, 0),
0789 BM1880_PINMUX_FUNCTION(eth1, 1),
0790 BM1880_PINMUX_FUNCTION(i2s0, 2),
0791 BM1880_PINMUX_FUNCTION(i2s0_mclkin, 1),
0792 BM1880_PINMUX_FUNCTION(i2s1, 2),
0793 BM1880_PINMUX_FUNCTION(i2s1_mclkin, 1),
0794 BM1880_PINMUX_FUNCTION(spi0, 1),
0795 };
0796
0797 #define BM1880_PINCONF_DAT(_width) \
0798 { \
0799 .drv_bits = _width, \
0800 }
0801
0802 static const struct bm1880_pinconf_data bm1880_pinconf[] = {
0803 BM1880_PINCONF_DAT(0x03),
0804 BM1880_PINCONF_DAT(0x03),
0805 BM1880_PINCONF_DAT(0x03),
0806 BM1880_PINCONF_DAT(0x03),
0807 BM1880_PINCONF_DAT(0x03),
0808 BM1880_PINCONF_DAT(0x03),
0809 BM1880_PINCONF_DAT(0x03),
0810 BM1880_PINCONF_DAT(0x03),
0811 BM1880_PINCONF_DAT(0x03),
0812 BM1880_PINCONF_DAT(0x03),
0813 BM1880_PINCONF_DAT(0x03),
0814 BM1880_PINCONF_DAT(0x03),
0815 BM1880_PINCONF_DAT(0x03),
0816 BM1880_PINCONF_DAT(0x03),
0817 BM1880_PINCONF_DAT(0x03),
0818 BM1880_PINCONF_DAT(0x03),
0819 BM1880_PINCONF_DAT(0x03),
0820 BM1880_PINCONF_DAT(0x03),
0821 BM1880_PINCONF_DAT(0x03),
0822 BM1880_PINCONF_DAT(0x03),
0823 BM1880_PINCONF_DAT(0x03),
0824 BM1880_PINCONF_DAT(0x03),
0825 BM1880_PINCONF_DAT(0x03),
0826 BM1880_PINCONF_DAT(0x03),
0827 BM1880_PINCONF_DAT(0x03),
0828 BM1880_PINCONF_DAT(0x03),
0829 BM1880_PINCONF_DAT(0x03),
0830 BM1880_PINCONF_DAT(0x03),
0831 BM1880_PINCONF_DAT(0x03),
0832 BM1880_PINCONF_DAT(0x03),
0833 BM1880_PINCONF_DAT(0x03),
0834 BM1880_PINCONF_DAT(0x03),
0835 BM1880_PINCONF_DAT(0x03),
0836 BM1880_PINCONF_DAT(0x03),
0837 BM1880_PINCONF_DAT(0x03),
0838 BM1880_PINCONF_DAT(0x03),
0839 BM1880_PINCONF_DAT(0x03),
0840 BM1880_PINCONF_DAT(0x03),
0841 BM1880_PINCONF_DAT(0x03),
0842 BM1880_PINCONF_DAT(0x03),
0843 BM1880_PINCONF_DAT(0x03),
0844 BM1880_PINCONF_DAT(0x03),
0845 BM1880_PINCONF_DAT(0x03),
0846 BM1880_PINCONF_DAT(0x03),
0847 BM1880_PINCONF_DAT(0x03),
0848 BM1880_PINCONF_DAT(0x03),
0849 BM1880_PINCONF_DAT(0x03),
0850 BM1880_PINCONF_DAT(0x03),
0851 BM1880_PINCONF_DAT(0x03),
0852 BM1880_PINCONF_DAT(0x03),
0853 BM1880_PINCONF_DAT(0x03),
0854 BM1880_PINCONF_DAT(0x03),
0855 BM1880_PINCONF_DAT(0x03),
0856 BM1880_PINCONF_DAT(0x03),
0857 BM1880_PINCONF_DAT(0x03),
0858 BM1880_PINCONF_DAT(0x03),
0859 BM1880_PINCONF_DAT(0x03),
0860 BM1880_PINCONF_DAT(0x03),
0861 BM1880_PINCONF_DAT(0x03),
0862 BM1880_PINCONF_DAT(0x03),
0863 BM1880_PINCONF_DAT(0x02),
0864 BM1880_PINCONF_DAT(0x02),
0865 BM1880_PINCONF_DAT(0x02),
0866 BM1880_PINCONF_DAT(0x02),
0867 BM1880_PINCONF_DAT(0x02),
0868 BM1880_PINCONF_DAT(0x02),
0869 BM1880_PINCONF_DAT(0x02),
0870 BM1880_PINCONF_DAT(0x02),
0871 BM1880_PINCONF_DAT(0x02),
0872 BM1880_PINCONF_DAT(0x02),
0873 BM1880_PINCONF_DAT(0x02),
0874 BM1880_PINCONF_DAT(0x02),
0875 BM1880_PINCONF_DAT(0x02),
0876 BM1880_PINCONF_DAT(0x02),
0877 BM1880_PINCONF_DAT(0x02),
0878 BM1880_PINCONF_DAT(0x02),
0879 BM1880_PINCONF_DAT(0x02),
0880 BM1880_PINCONF_DAT(0x02),
0881 BM1880_PINCONF_DAT(0x02),
0882 BM1880_PINCONF_DAT(0x02),
0883 BM1880_PINCONF_DAT(0x02),
0884 BM1880_PINCONF_DAT(0x02),
0885 BM1880_PINCONF_DAT(0x02),
0886 BM1880_PINCONF_DAT(0x02),
0887 BM1880_PINCONF_DAT(0x02),
0888 BM1880_PINCONF_DAT(0x02),
0889 BM1880_PINCONF_DAT(0x02),
0890 BM1880_PINCONF_DAT(0x02),
0891 BM1880_PINCONF_DAT(0x02),
0892 BM1880_PINCONF_DAT(0x02),
0893 BM1880_PINCONF_DAT(0x02),
0894 BM1880_PINCONF_DAT(0x02),
0895 BM1880_PINCONF_DAT(0x02),
0896 BM1880_PINCONF_DAT(0x02),
0897 BM1880_PINCONF_DAT(0x02),
0898 BM1880_PINCONF_DAT(0x02),
0899 BM1880_PINCONF_DAT(0x02),
0900 BM1880_PINCONF_DAT(0x02),
0901 BM1880_PINCONF_DAT(0x02),
0902 BM1880_PINCONF_DAT(0x02),
0903 BM1880_PINCONF_DAT(0x02),
0904 BM1880_PINCONF_DAT(0x02),
0905 BM1880_PINCONF_DAT(0x02),
0906 BM1880_PINCONF_DAT(0x02),
0907 BM1880_PINCONF_DAT(0x02),
0908 BM1880_PINCONF_DAT(0x02),
0909 BM1880_PINCONF_DAT(0x02),
0910 BM1880_PINCONF_DAT(0x02),
0911 BM1880_PINCONF_DAT(0x02),
0912 BM1880_PINCONF_DAT(0x02),
0913 BM1880_PINCONF_DAT(0x02),
0914 BM1880_PINCONF_DAT(0x02),
0915 };
0916
0917 static int bm1880_pctrl_get_groups_count(struct pinctrl_dev *pctldev)
0918 {
0919 struct bm1880_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
0920
0921 return pctrl->ngroups;
0922 }
0923
0924 static const char *bm1880_pctrl_get_group_name(struct pinctrl_dev *pctldev,
0925 unsigned int selector)
0926 {
0927 struct bm1880_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
0928
0929 return pctrl->groups[selector].name;
0930 }
0931
0932 static int bm1880_pctrl_get_group_pins(struct pinctrl_dev *pctldev,
0933 unsigned int selector,
0934 const unsigned int **pins,
0935 unsigned int *num_pins)
0936 {
0937 struct bm1880_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
0938
0939 *pins = pctrl->groups[selector].pins;
0940 *num_pins = pctrl->groups[selector].npins;
0941
0942 return 0;
0943 }
0944
0945 static const struct pinctrl_ops bm1880_pctrl_ops = {
0946 .get_groups_count = bm1880_pctrl_get_groups_count,
0947 .get_group_name = bm1880_pctrl_get_group_name,
0948 .get_group_pins = bm1880_pctrl_get_group_pins,
0949 .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
0950 .dt_free_map = pinctrl_utils_free_map,
0951 };
0952
0953
0954 static int bm1880_pmux_get_functions_count(struct pinctrl_dev *pctldev)
0955 {
0956 struct bm1880_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
0957
0958 return pctrl->nfuncs;
0959 }
0960
0961 static const char *bm1880_pmux_get_function_name(struct pinctrl_dev *pctldev,
0962 unsigned int selector)
0963 {
0964 struct bm1880_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
0965
0966 return pctrl->funcs[selector].name;
0967 }
0968
0969 static int bm1880_pmux_get_function_groups(struct pinctrl_dev *pctldev,
0970 unsigned int selector,
0971 const char * const **groups,
0972 unsigned * const num_groups)
0973 {
0974 struct bm1880_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
0975
0976 *groups = pctrl->funcs[selector].groups;
0977 *num_groups = pctrl->funcs[selector].ngroups;
0978 return 0;
0979 }
0980
0981 static int bm1880_pinmux_set_mux(struct pinctrl_dev *pctldev,
0982 unsigned int function,
0983 unsigned int group)
0984 {
0985 struct bm1880_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
0986 const struct bm1880_pctrl_group *pgrp = &pctrl->groups[group];
0987 const struct bm1880_pinmux_function *func = &pctrl->funcs[function];
0988 int i;
0989
0990 for (i = 0; i < pgrp->npins; i++) {
0991 unsigned int pin = pgrp->pins[i];
0992 u32 offset = (pin >> 1) << 2;
0993 u32 mux_offset = ((!((pin + 1) & 1) << 4) + 4);
0994 u32 regval = readl_relaxed(pctrl->base + BM1880_REG_MUX +
0995 offset);
0996
0997 regval &= ~(0x03 << mux_offset);
0998 regval |= func->mux_val << mux_offset;
0999
1000 writel_relaxed(regval, pctrl->base + BM1880_REG_MUX + offset);
1001 }
1002
1003 return 0;
1004 }
1005
1006 #define BM1880_PINCONF(pin, idx) ((!((pin + 1) & 1) << 4) + idx)
1007 #define BM1880_PINCONF_PULLCTRL(pin) BM1880_PINCONF(pin, 0)
1008 #define BM1880_PINCONF_PULLUP(pin) BM1880_PINCONF(pin, 1)
1009 #define BM1880_PINCONF_PULLDOWN(pin) BM1880_PINCONF(pin, 2)
1010 #define BM1880_PINCONF_DRV(pin) BM1880_PINCONF(pin, 6)
1011 #define BM1880_PINCONF_SCHMITT(pin) BM1880_PINCONF(pin, 9)
1012 #define BM1880_PINCONF_SLEW(pin) BM1880_PINCONF(pin, 10)
1013
1014 static int bm1880_pinconf_drv_set(unsigned int mA, u32 width,
1015 u32 *regval, u32 bit_offset)
1016 {
1017 u32 _regval;
1018
1019 _regval = *regval;
1020
1021
1022
1023
1024
1025 if (width == 0x03) {
1026 switch (mA) {
1027 case 4:
1028 _regval &= ~(width << bit_offset);
1029 _regval |= (0 << bit_offset);
1030 break;
1031 case 8:
1032 _regval &= ~(width << bit_offset);
1033 _regval |= (1 << bit_offset);
1034 break;
1035 case 12:
1036 _regval &= ~(width << bit_offset);
1037 _regval |= (2 << bit_offset);
1038 break;
1039 case 16:
1040 _regval &= ~(width << bit_offset);
1041 _regval |= (3 << bit_offset);
1042 break;
1043 case 20:
1044 _regval &= ~(width << bit_offset);
1045 _regval |= (4 << bit_offset);
1046 break;
1047 case 24:
1048 _regval &= ~(width << bit_offset);
1049 _regval |= (5 << bit_offset);
1050 break;
1051 case 28:
1052 _regval &= ~(width << bit_offset);
1053 _regval |= (6 << bit_offset);
1054 break;
1055 case 32:
1056 _regval &= ~(width << bit_offset);
1057 _regval |= (7 << bit_offset);
1058 break;
1059 default:
1060 return -EINVAL;
1061 }
1062 } else {
1063 switch (mA) {
1064 case 4:
1065 _regval &= ~(width << bit_offset);
1066 _regval |= (0 << bit_offset);
1067 break;
1068 case 8:
1069 _regval &= ~(width << bit_offset);
1070 _regval |= (1 << bit_offset);
1071 break;
1072 case 12:
1073 _regval &= ~(width << bit_offset);
1074 _regval |= (2 << bit_offset);
1075 break;
1076 case 16:
1077 _regval &= ~(width << bit_offset);
1078 _regval |= (3 << bit_offset);
1079 break;
1080 default:
1081 return -EINVAL;
1082 }
1083 }
1084
1085 *regval = _regval;
1086
1087 return 0;
1088 }
1089
1090 static int bm1880_pinconf_drv_get(u32 width, u32 drv)
1091 {
1092 int ret = -ENOTSUPP;
1093
1094
1095
1096
1097
1098 if (width == 0x03) {
1099 switch (drv) {
1100 case 0:
1101 ret = 4;
1102 break;
1103 case 1:
1104 ret = 8;
1105 break;
1106 case 2:
1107 ret = 12;
1108 break;
1109 case 3:
1110 ret = 16;
1111 break;
1112 case 4:
1113 ret = 20;
1114 break;
1115 case 5:
1116 ret = 24;
1117 break;
1118 case 6:
1119 ret = 28;
1120 break;
1121 case 7:
1122 ret = 32;
1123 break;
1124 default:
1125 break;
1126 }
1127 } else {
1128 switch (drv) {
1129 case 0:
1130 ret = 4;
1131 break;
1132 case 1:
1133 ret = 8;
1134 break;
1135 case 2:
1136 ret = 12;
1137 break;
1138 case 3:
1139 ret = 16;
1140 break;
1141 default:
1142 break;
1143 }
1144 }
1145
1146 return ret;
1147 }
1148
1149 static int bm1880_pinconf_cfg_get(struct pinctrl_dev *pctldev,
1150 unsigned int pin,
1151 unsigned long *config)
1152 {
1153 struct bm1880_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
1154 unsigned int param = pinconf_to_config_param(*config);
1155 unsigned int arg = 0;
1156 u32 regval, offset, bit_offset;
1157 int ret;
1158
1159 offset = (pin >> 1) << 2;
1160 regval = readl_relaxed(pctrl->base + BM1880_REG_MUX + offset);
1161
1162 switch (param) {
1163 case PIN_CONFIG_BIAS_PULL_UP:
1164 bit_offset = BM1880_PINCONF_PULLUP(pin);
1165 arg = !!(regval & BIT(bit_offset));
1166 break;
1167 case PIN_CONFIG_BIAS_PULL_DOWN:
1168 bit_offset = BM1880_PINCONF_PULLDOWN(pin);
1169 arg = !!(regval & BIT(bit_offset));
1170 break;
1171 case PIN_CONFIG_BIAS_DISABLE:
1172 bit_offset = BM1880_PINCONF_PULLCTRL(pin);
1173 arg = !!(regval & BIT(bit_offset));
1174 break;
1175 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
1176 bit_offset = BM1880_PINCONF_SCHMITT(pin);
1177 arg = !!(regval & BIT(bit_offset));
1178 break;
1179 case PIN_CONFIG_SLEW_RATE:
1180 bit_offset = BM1880_PINCONF_SLEW(pin);
1181 arg = !!(regval & BIT(bit_offset));
1182 break;
1183 case PIN_CONFIG_DRIVE_STRENGTH:
1184 bit_offset = BM1880_PINCONF_DRV(pin);
1185 ret = bm1880_pinconf_drv_get(pctrl->pinconf[pin].drv_bits,
1186 !!(regval & BIT(bit_offset)));
1187 if (ret < 0)
1188 return ret;
1189
1190 arg = ret;
1191 break;
1192 default:
1193 return -ENOTSUPP;
1194 }
1195
1196 *config = pinconf_to_config_packed(param, arg);
1197
1198 return 0;
1199 }
1200
1201 static int bm1880_pinconf_cfg_set(struct pinctrl_dev *pctldev,
1202 unsigned int pin,
1203 unsigned long *configs,
1204 unsigned int num_configs)
1205 {
1206 struct bm1880_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
1207 u32 regval, offset, bit_offset;
1208 int i, ret;
1209
1210 offset = (pin >> 1) << 2;
1211 regval = readl_relaxed(pctrl->base + BM1880_REG_MUX + offset);
1212
1213 for (i = 0; i < num_configs; i++) {
1214 unsigned int param = pinconf_to_config_param(configs[i]);
1215 unsigned int arg = pinconf_to_config_argument(configs[i]);
1216
1217 switch (param) {
1218 case PIN_CONFIG_BIAS_PULL_UP:
1219 bit_offset = BM1880_PINCONF_PULLUP(pin);
1220 regval |= BIT(bit_offset);
1221 break;
1222 case PIN_CONFIG_BIAS_PULL_DOWN:
1223 bit_offset = BM1880_PINCONF_PULLDOWN(pin);
1224 regval |= BIT(bit_offset);
1225 break;
1226 case PIN_CONFIG_BIAS_DISABLE:
1227 bit_offset = BM1880_PINCONF_PULLCTRL(pin);
1228 regval |= BIT(bit_offset);
1229 break;
1230 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
1231 bit_offset = BM1880_PINCONF_SCHMITT(pin);
1232 if (arg)
1233 regval |= BIT(bit_offset);
1234 else
1235 regval &= ~BIT(bit_offset);
1236 break;
1237 case PIN_CONFIG_SLEW_RATE:
1238 bit_offset = BM1880_PINCONF_SLEW(pin);
1239 if (arg)
1240 regval |= BIT(bit_offset);
1241 else
1242 regval &= ~BIT(bit_offset);
1243 break;
1244 case PIN_CONFIG_DRIVE_STRENGTH:
1245 bit_offset = BM1880_PINCONF_DRV(pin);
1246 ret = bm1880_pinconf_drv_set(arg,
1247 pctrl->pinconf[pin].drv_bits,
1248 ®val, bit_offset);
1249 if (ret < 0)
1250 return ret;
1251
1252 break;
1253 default:
1254 dev_warn(pctldev->dev,
1255 "unsupported configuration parameter '%u'\n",
1256 param);
1257 continue;
1258 }
1259
1260 writel_relaxed(regval, pctrl->base + BM1880_REG_MUX + offset);
1261 }
1262
1263 return 0;
1264 }
1265
1266 static int bm1880_pinconf_group_set(struct pinctrl_dev *pctldev,
1267 unsigned int selector,
1268 unsigned long *configs,
1269 unsigned int num_configs)
1270 {
1271 int i, ret;
1272 struct bm1880_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
1273 const struct bm1880_pctrl_group *pgrp = &pctrl->groups[selector];
1274
1275 for (i = 0; i < pgrp->npins; i++) {
1276 ret = bm1880_pinconf_cfg_set(pctldev, pgrp->pins[i], configs,
1277 num_configs);
1278 if (ret)
1279 return ret;
1280 }
1281
1282 return 0;
1283 }
1284
1285 static const struct pinconf_ops bm1880_pinconf_ops = {
1286 .is_generic = true,
1287 .pin_config_get = bm1880_pinconf_cfg_get,
1288 .pin_config_set = bm1880_pinconf_cfg_set,
1289 .pin_config_group_set = bm1880_pinconf_group_set,
1290 };
1291
1292 static const struct pinmux_ops bm1880_pinmux_ops = {
1293 .get_functions_count = bm1880_pmux_get_functions_count,
1294 .get_function_name = bm1880_pmux_get_function_name,
1295 .get_function_groups = bm1880_pmux_get_function_groups,
1296 .set_mux = bm1880_pinmux_set_mux,
1297 };
1298
1299 static struct pinctrl_desc bm1880_desc = {
1300 .name = "bm1880_pinctrl",
1301 .pins = bm1880_pins,
1302 .npins = ARRAY_SIZE(bm1880_pins),
1303 .pctlops = &bm1880_pctrl_ops,
1304 .pmxops = &bm1880_pinmux_ops,
1305 .confops = &bm1880_pinconf_ops,
1306 .owner = THIS_MODULE,
1307 };
1308
1309 static int bm1880_pinctrl_probe(struct platform_device *pdev)
1310
1311 {
1312 struct bm1880_pinctrl *pctrl;
1313
1314 pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);
1315 if (!pctrl)
1316 return -ENOMEM;
1317
1318 pctrl->base = devm_platform_ioremap_resource(pdev, 0);
1319 if (IS_ERR(pctrl->base))
1320 return PTR_ERR(pctrl->base);
1321
1322 pctrl->groups = bm1880_pctrl_groups;
1323 pctrl->ngroups = ARRAY_SIZE(bm1880_pctrl_groups);
1324 pctrl->funcs = bm1880_pmux_functions;
1325 pctrl->nfuncs = ARRAY_SIZE(bm1880_pmux_functions);
1326 pctrl->pinconf = bm1880_pinconf;
1327
1328 pctrl->pctrldev = devm_pinctrl_register(&pdev->dev, &bm1880_desc,
1329 pctrl);
1330 if (IS_ERR(pctrl->pctrldev))
1331 return PTR_ERR(pctrl->pctrldev);
1332
1333 platform_set_drvdata(pdev, pctrl);
1334
1335 dev_info(&pdev->dev, "BM1880 pinctrl driver initialized\n");
1336
1337 return 0;
1338 }
1339
1340 static const struct of_device_id bm1880_pinctrl_of_match[] = {
1341 { .compatible = "bitmain,bm1880-pinctrl" },
1342 { }
1343 };
1344
1345 static struct platform_driver bm1880_pinctrl_driver = {
1346 .driver = {
1347 .name = "pinctrl-bm1880",
1348 .of_match_table = of_match_ptr(bm1880_pinctrl_of_match),
1349 },
1350 .probe = bm1880_pinctrl_probe,
1351 };
1352
1353 static int __init bm1880_pinctrl_init(void)
1354 {
1355 return platform_driver_register(&bm1880_pinctrl_driver);
1356 }
1357 arch_initcall(bm1880_pinctrl_init);
