drivers/pinctrl/pinctrl-axp209.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * AXP20x pinctrl and GPIO driver
0004  *
0005  * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com>
0006  * Copyright (C) 2017 Quentin Schulz <quentin.schulz@free-electrons.com>
0007  */
0008
0009 #include <linux/bitops.h>
0010 #include <linux/device.h>
0011 #include <linux/gpio/driver.h>
0012 #include <linux/init.h>
0013 #include <linux/interrupt.h>
0014 #include <linux/kernel.h>
0015 #include <linux/mfd/axp20x.h>
0016 #include <linux/module.h>
0017 #include <linux/of.h>
0018 #include <linux/of_device.h>
0019 #include <linux/pinctrl/pinconf-generic.h>
0020 #include <linux/pinctrl/pinctrl.h>
0021 #include <linux/pinctrl/pinmux.h>
0022 #include <linux/platform_device.h>
0023 #include <linux/regmap.h>
0024 #include <linux/slab.h>
0025
0026 #define AXP20X_GPIO_FUNCTIONS       0x7
0027 #define AXP20X_GPIO_FUNCTION_OUT_LOW    0
0028 #define AXP20X_GPIO_FUNCTION_OUT_HIGH   1
0029 #define AXP20X_GPIO_FUNCTION_INPUT  2
0030
0031 #define AXP20X_FUNC_GPIO_OUT        0
0032 #define AXP20X_FUNC_GPIO_IN     1
0033 #define AXP20X_FUNC_LDO         2
0034 #define AXP20X_FUNC_ADC         3
0035 #define AXP20X_FUNCS_NB         4
0036
0037 #define AXP20X_MUX_GPIO_OUT     0
0038 #define AXP20X_MUX_GPIO_IN      BIT(1)
0039 #define AXP20X_MUX_ADC          BIT(2)
0040
0041 #define AXP813_MUX_ADC          (BIT(2) | BIT(0))
0042
0043 struct axp20x_pctrl_desc {
0044     const struct pinctrl_pin_desc   *pins;
0045     unsigned int            npins;
0046     /* Stores the pins supporting LDO function. Bit offset is pin number. */
0047     u8              ldo_mask;
0048     /* Stores the pins supporting ADC function. Bit offset is pin number. */
0049     u8              adc_mask;
0050     u8              gpio_status_offset;
0051     u8              adc_mux;
0052 };
0053
0054 struct axp20x_pinctrl_function {
0055     const char  *name;
0056     unsigned int    muxval;
0057     const char  **groups;
0058     unsigned int    ngroups;
0059 };
0060
0061 struct axp20x_pctl {
0062     struct gpio_chip    chip;
0063     struct regmap       *regmap;
0064     struct pinctrl_dev          *pctl_dev;
0065     struct device               *dev;
0066     const struct axp20x_pctrl_desc      *desc;
0067     struct axp20x_pinctrl_function      funcs[AXP20X_FUNCS_NB];
0068 };
0069
0070 static const struct pinctrl_pin_desc axp209_pins[] = {
0071     PINCTRL_PIN(0, "GPIO0"),
0072     PINCTRL_PIN(1, "GPIO1"),
0073     PINCTRL_PIN(2, "GPIO2"),
0074 };
0075
0076 static const struct pinctrl_pin_desc axp22x_pins[] = {
0077     PINCTRL_PIN(0, "GPIO0"),
0078     PINCTRL_PIN(1, "GPIO1"),
0079 };
0080
0081 static const struct axp20x_pctrl_desc axp20x_data = {
0082     .pins   = axp209_pins,
0083     .npins  = ARRAY_SIZE(axp209_pins),
0084     .ldo_mask = BIT(0) | BIT(1),
0085     .adc_mask = BIT(0) | BIT(1),
0086     .gpio_status_offset = 4,
0087     .adc_mux = AXP20X_MUX_ADC,
0088 };
0089
0090 static const struct axp20x_pctrl_desc axp22x_data = {
0091     .pins   = axp22x_pins,
0092     .npins  = ARRAY_SIZE(axp22x_pins),
0093     .ldo_mask = BIT(0) | BIT(1),
0094     .gpio_status_offset = 0,
0095 };
0096
0097 static const struct axp20x_pctrl_desc axp813_data = {
0098     .pins   = axp22x_pins,
0099     .npins  = ARRAY_SIZE(axp22x_pins),
0100     .ldo_mask = BIT(0) | BIT(1),
0101     .adc_mask = BIT(0),
0102     .gpio_status_offset = 0,
0103     .adc_mux = AXP813_MUX_ADC,
0104 };
0105
0106 static int axp20x_gpio_get_reg(unsigned int offset)
0107 {
0108     switch (offset) {
0109     case 0:
0110         return AXP20X_GPIO0_CTRL;
0111     case 1:
0112         return AXP20X_GPIO1_CTRL;
0113     case 2:
0114         return AXP20X_GPIO2_CTRL;
0115     }
0116
0117     return -EINVAL;
0118 }
0119
0120 static int axp20x_gpio_input(struct gpio_chip *chip, unsigned int offset)
0121 {
0122     return pinctrl_gpio_direction_input(chip->base + offset);
0123 }
0124
0125 static int axp20x_gpio_get(struct gpio_chip *chip, unsigned int offset)
0126 {
0127     struct axp20x_pctl *pctl = gpiochip_get_data(chip);
0128     unsigned int val;
0129     int ret;
0130
0131     ret = regmap_read(pctl->regmap, AXP20X_GPIO20_SS, &val);
0132     if (ret)
0133         return ret;
0134
0135     return !!(val & BIT(offset + pctl->desc->gpio_status_offset));
0136 }
0137
0138 static int axp20x_gpio_get_direction(struct gpio_chip *chip,
0139                      unsigned int offset)
0140 {
0141     struct axp20x_pctl *pctl = gpiochip_get_data(chip);
0142     unsigned int val;
0143     int reg, ret;
0144
0145     reg = axp20x_gpio_get_reg(offset);
0146     if (reg < 0)
0147         return reg;
0148
0149     ret = regmap_read(pctl->regmap, reg, &val);
0150     if (ret)
0151         return ret;
0152
0153     /*
0154      * This shouldn't really happen if the pin is in use already,
0155      * or if it's not in use yet, it doesn't matter since we're
0156      * going to change the value soon anyway. Default to output.
0157      */
0158     if ((val & AXP20X_GPIO_FUNCTIONS) > 2)
0159         return GPIO_LINE_DIRECTION_OUT;
0160
0161     /*
0162      * The GPIO directions are the three lowest values.
0163      * 2 is input, 0 and 1 are output
0164      */
0165     if (val & 2)
0166         return GPIO_LINE_DIRECTION_IN;
0167
0168     return GPIO_LINE_DIRECTION_OUT;
0169 }
0170
0171 static int axp20x_gpio_output(struct gpio_chip *chip, unsigned int offset,
0172                   int value)
0173 {
0174     chip->set(chip, offset, value);
0175
0176     return 0;
0177 }
0178
0179 static void axp20x_gpio_set(struct gpio_chip *chip, unsigned int offset,
0180                 int value)
0181 {
0182     struct axp20x_pctl *pctl = gpiochip_get_data(chip);
0183     int reg;
0184
0185     reg = axp20x_gpio_get_reg(offset);
0186     if (reg < 0)
0187         return;
0188
0189     regmap_update_bits(pctl->regmap, reg,
0190                AXP20X_GPIO_FUNCTIONS,
0191                value ? AXP20X_GPIO_FUNCTION_OUT_HIGH :
0192                AXP20X_GPIO_FUNCTION_OUT_LOW);
0193 }
0194
0195 static int axp20x_pmx_set(struct pinctrl_dev *pctldev, unsigned int offset,
0196               u8 config)
0197 {
0198     struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
0199     int reg;
0200
0201     reg = axp20x_gpio_get_reg(offset);
0202     if (reg < 0)
0203         return reg;
0204
0205     return regmap_update_bits(pctl->regmap, reg, AXP20X_GPIO_FUNCTIONS,
0206                   config);
0207 }
0208
0209 static int axp20x_pmx_func_cnt(struct pinctrl_dev *pctldev)
0210 {
0211     struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
0212
0213     return ARRAY_SIZE(pctl->funcs);
0214 }
0215
0216 static const char *axp20x_pmx_func_name(struct pinctrl_dev *pctldev,
0217                     unsigned int selector)
0218 {
0219     struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
0220
0221     return pctl->funcs[selector].name;
0222 }
0223
0224 static int axp20x_pmx_func_groups(struct pinctrl_dev *pctldev,
0225                   unsigned int selector,
0226                   const char * const **groups,
0227                   unsigned int *num_groups)
0228 {
0229     struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
0230
0231     *groups = pctl->funcs[selector].groups;
0232     *num_groups = pctl->funcs[selector].ngroups;
0233
0234     return 0;
0235 }
0236
0237 static int axp20x_pmx_set_mux(struct pinctrl_dev *pctldev,
0238                   unsigned int function, unsigned int group)
0239 {
0240     struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
0241     unsigned int mask;
0242
0243     /* Every pin supports GPIO_OUT and GPIO_IN functions */
0244     if (function <= AXP20X_FUNC_GPIO_IN)
0245         return axp20x_pmx_set(pctldev, group,
0246                       pctl->funcs[function].muxval);
0247
0248     if (function == AXP20X_FUNC_LDO)
0249         mask = pctl->desc->ldo_mask;
0250     else
0251         mask = pctl->desc->adc_mask;
0252
0253     if (!(BIT(group) & mask))
0254         return -EINVAL;
0255
0256     /*
0257      * We let the regulator framework handle the LDO muxing as muxing bits
0258      * are basically also regulators on/off bits. It's better not to enforce
0259      * any state of the regulator when selecting LDO mux so that we don't
0260      * interfere with the regulator driver.
0261      */
0262     if (function == AXP20X_FUNC_LDO)
0263         return 0;
0264
0265     return axp20x_pmx_set(pctldev, group, pctl->funcs[function].muxval);
0266 }
0267
0268 static int axp20x_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
0269                      struct pinctrl_gpio_range *range,
0270                      unsigned int offset, bool input)
0271 {
0272     struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
0273
0274     if (input)
0275         return axp20x_pmx_set(pctldev, offset,
0276                       pctl->funcs[AXP20X_FUNC_GPIO_IN].muxval);
0277
0278     return axp20x_pmx_set(pctldev, offset,
0279                   pctl->funcs[AXP20X_FUNC_GPIO_OUT].muxval);
0280 }
0281
0282 static const struct pinmux_ops axp20x_pmx_ops = {
0283     .get_functions_count    = axp20x_pmx_func_cnt,
0284     .get_function_name  = axp20x_pmx_func_name,
0285     .get_function_groups    = axp20x_pmx_func_groups,
0286     .set_mux        = axp20x_pmx_set_mux,
0287     .gpio_set_direction = axp20x_pmx_gpio_set_direction,
0288     .strict         = true,
0289 };
0290
0291 static int axp20x_groups_cnt(struct pinctrl_dev *pctldev)
0292 {
0293     struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
0294
0295     return pctl->desc->npins;
0296 }
0297
0298 static int axp20x_group_pins(struct pinctrl_dev *pctldev, unsigned int selector,
0299                  const unsigned int **pins, unsigned int *num_pins)
0300 {
0301     struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
0302
0303     *pins = (unsigned int *)&pctl->desc->pins[selector];
0304     *num_pins = 1;
0305
0306     return 0;
0307 }
0308
0309 static const char *axp20x_group_name(struct pinctrl_dev *pctldev,
0310                      unsigned int selector)
0311 {
0312     struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
0313
0314     return pctl->desc->pins[selector].name;
0315 }
0316
0317 static const struct pinctrl_ops axp20x_pctrl_ops = {
0318     .dt_node_to_map     = pinconf_generic_dt_node_to_map_group,
0319     .dt_free_map        = pinconf_generic_dt_free_map,
0320     .get_groups_count   = axp20x_groups_cnt,
0321     .get_group_name     = axp20x_group_name,
0322     .get_group_pins     = axp20x_group_pins,
0323 };
0324
0325 static int axp20x_funcs_groups_from_mask(struct device *dev, unsigned int mask,
0326                       unsigned int mask_len,
0327                       struct axp20x_pinctrl_function *func,
0328                       const struct pinctrl_pin_desc *pins)
0329 {
0330     unsigned long int mask_cpy = mask;
0331     const char **group;
0332     unsigned int ngroups = hweight8(mask);
0333     int bit;
0334
0335     func->ngroups = ngroups;
0336     if (func->ngroups > 0) {
0337         func->groups = devm_kcalloc(dev,
0338                         ngroups, sizeof(const char *),
0339                         GFP_KERNEL);
0340         if (!func->groups)
0341             return -ENOMEM;
0342         group = func->groups;
0343         for_each_set_bit(bit, &mask_cpy, mask_len) {
0344             *group = pins[bit].name;
0345             group++;
0346         }
0347     }
0348
0349     return 0;
0350 }
0351
0352 static int axp20x_build_funcs_groups(struct platform_device *pdev)
0353 {
0354     struct axp20x_pctl *pctl = platform_get_drvdata(pdev);
0355     int i, ret, pin, npins = pctl->desc->npins;
0356
0357     pctl->funcs[AXP20X_FUNC_GPIO_OUT].name = "gpio_out";
0358     pctl->funcs[AXP20X_FUNC_GPIO_OUT].muxval = AXP20X_MUX_GPIO_OUT;
0359     pctl->funcs[AXP20X_FUNC_GPIO_IN].name = "gpio_in";
0360     pctl->funcs[AXP20X_FUNC_GPIO_IN].muxval = AXP20X_MUX_GPIO_IN;
0361     pctl->funcs[AXP20X_FUNC_LDO].name = "ldo";
0362     /*
0363      * Muxval for LDO is useless as we won't use it.
0364      * See comment in axp20x_pmx_set_mux.
0365      */
0366     pctl->funcs[AXP20X_FUNC_ADC].name = "adc";
0367     pctl->funcs[AXP20X_FUNC_ADC].muxval = pctl->desc->adc_mux;
0368
0369     /* Every pin supports GPIO_OUT and GPIO_IN functions */
0370     for (i = 0; i <= AXP20X_FUNC_GPIO_IN; i++) {
0371         pctl->funcs[i].ngroups = npins;
0372         pctl->funcs[i].groups = devm_kcalloc(&pdev->dev,
0373                              npins, sizeof(char *),
0374                              GFP_KERNEL);
0375         if (!pctl->funcs[i].groups)
0376             return -ENOMEM;
0377         for (pin = 0; pin < npins; pin++)
0378             pctl->funcs[i].groups[pin] = pctl->desc->pins[pin].name;
0379     }
0380
0381     ret = axp20x_funcs_groups_from_mask(&pdev->dev, pctl->desc->ldo_mask,
0382                       npins, &pctl->funcs[AXP20X_FUNC_LDO],
0383                       pctl->desc->pins);
0384     if (ret)
0385         return ret;
0386
0387     ret = axp20x_funcs_groups_from_mask(&pdev->dev, pctl->desc->adc_mask,
0388                       npins, &pctl->funcs[AXP20X_FUNC_ADC],
0389                       pctl->desc->pins);
0390     if (ret)
0391         return ret;
0392
0393     return 0;
0394 }
0395
0396 static const struct of_device_id axp20x_pctl_match[] = {
0397     { .compatible = "x-powers,axp209-gpio", .data = &axp20x_data, },
0398     { .compatible = "x-powers,axp221-gpio", .data = &axp22x_data, },
0399     { .compatible = "x-powers,axp813-gpio", .data = &axp813_data, },
0400     { }
0401 };
0402 MODULE_DEVICE_TABLE(of, axp20x_pctl_match);
0403
0404 static int axp20x_pctl_probe(struct platform_device *pdev)
0405 {
0406     struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent);
0407     struct axp20x_pctl *pctl;
0408     struct device *dev = &pdev->dev;
0409     struct pinctrl_desc *pctrl_desc;
0410     int ret;
0411
0412     if (!of_device_is_available(pdev->dev.of_node))
0413         return -ENODEV;
0414
0415     if (!axp20x) {
0416         dev_err(&pdev->dev, "Parent drvdata not set\n");
0417         return -EINVAL;
0418     }
0419
0420     pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
0421     if (!pctl)
0422         return -ENOMEM;
0423
0424     pctl->chip.base         = -1;
0425     pctl->chip.can_sleep        = true;
0426     pctl->chip.request      = gpiochip_generic_request;
0427     pctl->chip.free         = gpiochip_generic_free;
0428     pctl->chip.parent       = &pdev->dev;
0429     pctl->chip.label        = dev_name(&pdev->dev);
0430     pctl->chip.owner        = THIS_MODULE;
0431     pctl->chip.get          = axp20x_gpio_get;
0432     pctl->chip.get_direction    = axp20x_gpio_get_direction;
0433     pctl->chip.set          = axp20x_gpio_set;
0434     pctl->chip.direction_input  = axp20x_gpio_input;
0435     pctl->chip.direction_output = axp20x_gpio_output;
0436
0437     pctl->desc = of_device_get_match_data(dev);
0438
0439     pctl->chip.ngpio        = pctl->desc->npins;
0440
0441     pctl->regmap = axp20x->regmap;
0442     pctl->dev = &pdev->dev;
0443
0444     platform_set_drvdata(pdev, pctl);
0445
0446     ret = axp20x_build_funcs_groups(pdev);
0447     if (ret) {
0448         dev_err(&pdev->dev, "failed to build groups\n");
0449         return ret;
0450     }
0451
0452     pctrl_desc = devm_kzalloc(&pdev->dev, sizeof(*pctrl_desc), GFP_KERNEL);
0453     if (!pctrl_desc)
0454         return -ENOMEM;
0455
0456     pctrl_desc->name = dev_name(&pdev->dev);
0457     pctrl_desc->owner = THIS_MODULE;
0458     pctrl_desc->pins = pctl->desc->pins;
0459     pctrl_desc->npins = pctl->desc->npins;
0460     pctrl_desc->pctlops = &axp20x_pctrl_ops;
0461     pctrl_desc->pmxops = &axp20x_pmx_ops;
0462
0463     pctl->pctl_dev = devm_pinctrl_register(&pdev->dev, pctrl_desc, pctl);
0464     if (IS_ERR(pctl->pctl_dev)) {
0465         dev_err(&pdev->dev, "couldn't register pinctrl driver\n");
0466         return PTR_ERR(pctl->pctl_dev);
0467     }
0468
0469     ret = devm_gpiochip_add_data(&pdev->dev, &pctl->chip, pctl);
0470     if (ret) {
0471         dev_err(&pdev->dev, "Failed to register GPIO chip\n");
0472         return ret;
0473     }
0474
0475     ret = gpiochip_add_pin_range(&pctl->chip, dev_name(&pdev->dev),
0476                      pctl->desc->pins->number,
0477                      pctl->desc->pins->number,
0478                      pctl->desc->npins);
0479     if (ret) {
0480         dev_err(&pdev->dev, "failed to add pin range\n");
0481         return ret;
0482     }
0483
0484     dev_info(&pdev->dev, "AXP209 pinctrl and GPIO driver loaded\n");
0485
0486     return 0;
0487 }
0488
0489 static struct platform_driver axp20x_pctl_driver = {
0490     .probe      = axp20x_pctl_probe,
0491     .driver = {
0492         .name       = "axp20x-gpio",
0493         .of_match_table = axp20x_pctl_match,
0494     },
0495 };
0496
0497 module_platform_driver(axp20x_pctl_driver);
0498
0499 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
0500 MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>");
0501 MODULE_DESCRIPTION("AXP20x PMIC pinctrl and GPIO driver");
0502 MODULE_LICENSE("GPL");