drivers/pinctrl/pinctrl-at91.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Copyright (C) 2005 Ivan Kokshaysky
0004  * Copyright (C) SAN People
0005  *
0006  * Parallel I/O Controller (PIO) - System peripherals registers.
0007  */
0008
0009 #ifndef __PINCTRL_AT91_H
0010 #define __PINCTRL_AT91_H
0011
0012 #define PIO_PER     0x00    /* Enable Register */
0013 #define PIO_PDR     0x04    /* Disable Register */
0014 #define PIO_PSR     0x08    /* Status Register */
0015 #define PIO_OER     0x10    /* Output Enable Register */
0016 #define PIO_ODR     0x14    /* Output Disable Register */
0017 #define PIO_OSR     0x18    /* Output Status Register */
0018 #define PIO_IFER    0x20    /* Glitch Input Filter Enable */
0019 #define PIO_IFDR    0x24    /* Glitch Input Filter Disable */
0020 #define PIO_IFSR    0x28    /* Glitch Input Filter Status */
0021 #define PIO_SODR    0x30    /* Set Output Data Register */
0022 #define PIO_CODR    0x34    /* Clear Output Data Register */
0023 #define PIO_ODSR    0x38    /* Output Data Status Register */
0024 #define PIO_PDSR    0x3c    /* Pin Data Status Register */
0025 #define PIO_IER     0x40    /* Interrupt Enable Register */
0026 #define PIO_IDR     0x44    /* Interrupt Disable Register */
0027 #define PIO_IMR     0x48    /* Interrupt Mask Register */
0028 #define PIO_ISR     0x4c    /* Interrupt Status Register */
0029 #define PIO_MDER    0x50    /* Multi-driver Enable Register */
0030 #define PIO_MDDR    0x54    /* Multi-driver Disable Register */
0031 #define PIO_MDSR    0x58    /* Multi-driver Status Register */
0032 #define PIO_PUDR    0x60    /* Pull-up Disable Register */
0033 #define PIO_PUER    0x64    /* Pull-up Enable Register */
0034 #define PIO_PUSR    0x68    /* Pull-up Status Register */
0035 #define PIO_ASR     0x70    /* Peripheral A Select Register */
0036 #define PIO_ABCDSR1 0x70    /* Peripheral ABCD Select Register 1 [some sam9 only] */
0037 #define PIO_BSR     0x74    /* Peripheral B Select Register */
0038 #define PIO_ABCDSR2 0x74    /* Peripheral ABCD Select Register 2 [some sam9 only] */
0039 #define PIO_ABSR    0x78    /* AB Status Register */
0040 #define PIO_IFSCDR  0x80    /* Input Filter Slow Clock Disable Register */
0041 #define PIO_IFSCER  0x84    /* Input Filter Slow Clock Enable Register */
0042 #define PIO_IFSCSR  0x88    /* Input Filter Slow Clock Status Register */
0043 #define PIO_SCDR    0x8c    /* Slow Clock Divider Debouncing Register */
0044 #define     PIO_SCDR_DIV    (0x3fff <<  0)      /* Slow Clock Divider Mask */
0045 #define PIO_PPDDR   0x90    /* Pad Pull-down Disable Register */
0046 #define PIO_PPDER   0x94    /* Pad Pull-down Enable Register */
0047 #define PIO_PPDSR   0x98    /* Pad Pull-down Status Register */
0048 #define PIO_OWER    0xa0    /* Output Write Enable Register */
0049 #define PIO_OWDR    0xa4    /* Output Write Disable Register */
0050 #define PIO_OWSR    0xa8    /* Output Write Status Register */
0051 #define PIO_AIMER   0xb0    /* Additional Interrupt Modes Enable Register */
0052 #define PIO_AIMDR   0xb4    /* Additional Interrupt Modes Disable Register */
0053 #define PIO_AIMMR   0xb8    /* Additional Interrupt Modes Mask Register */
0054 #define PIO_ESR     0xc0    /* Edge Select Register */
0055 #define PIO_LSR     0xc4    /* Level Select Register */
0056 #define PIO_ELSR    0xc8    /* Edge/Level Status Register */
0057 #define PIO_FELLSR  0xd0    /* Falling Edge/Low Level Select Register */
0058 #define PIO_REHLSR  0xd4    /* Rising Edge/ High Level Select Register */
0059 #define PIO_FRLHSR  0xd8    /* Fall/Rise - Low/High Status Register */
0060 #define PIO_SCHMITT 0x100   /* Schmitt Trigger Register */
0061
0062 #define SAMA5D3_PIO_DRIVER1     0x118  /*PIO Driver 1 register offset*/
0063 #define SAMA5D3_PIO_DRIVER2     0x11C  /*PIO Driver 2 register offset*/
0064
0065 #define AT91SAM9X5_PIO_DRIVER1  0x114  /*PIO Driver 1 register offset*/
0066 #define AT91SAM9X5_PIO_DRIVER2  0x118  /*PIO Driver 2 register offset*/
0067
0068 #define SAM9X60_PIO_SLEWR   0x110   /* PIO Slew Rate Control Register */
0069 #define SAM9X60_PIO_DRIVER1 0x118   /* PIO Driver 1 register offset */
0070
0071 #endif