0001
0002 #ifndef PINCTRL_PINCTRL_NOMADIK_H
0003 #define PINCTRL_PINCTRL_NOMADIK_H
0004
0005
0006 #define PINCTRL_NMK_STN8815 0
0007 #define PINCTRL_NMK_DB8500 1
0008 #define PINCTRL_NMK_DB8540 2
0009
0010
0011 #define NMK_GPIO_ALT_GPIO 0
0012 #define NMK_GPIO_ALT_A 1
0013 #define NMK_GPIO_ALT_B 2
0014 #define NMK_GPIO_ALT_C (NMK_GPIO_ALT_A | NMK_GPIO_ALT_B)
0015
0016 #define NMK_GPIO_ALT_CX_SHIFT 2
0017 #define NMK_GPIO_ALT_C1 ((1<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
0018 #define NMK_GPIO_ALT_C2 ((2<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
0019 #define NMK_GPIO_ALT_C3 ((3<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
0020 #define NMK_GPIO_ALT_C4 ((4<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
0021
0022 #define PRCM_GPIOCR_ALTCX(pin_num,\
0023 altc1_used, altc1_ri, altc1_cb,\
0024 altc2_used, altc2_ri, altc2_cb,\
0025 altc3_used, altc3_ri, altc3_cb,\
0026 altc4_used, altc4_ri, altc4_cb)\
0027 {\
0028 .pin = pin_num,\
0029 .altcx[PRCM_IDX_GPIOCR_ALTC1] = {\
0030 .used = altc1_used,\
0031 .reg_index = altc1_ri,\
0032 .control_bit = altc1_cb\
0033 },\
0034 .altcx[PRCM_IDX_GPIOCR_ALTC2] = {\
0035 .used = altc2_used,\
0036 .reg_index = altc2_ri,\
0037 .control_bit = altc2_cb\
0038 },\
0039 .altcx[PRCM_IDX_GPIOCR_ALTC3] = {\
0040 .used = altc3_used,\
0041 .reg_index = altc3_ri,\
0042 .control_bit = altc3_cb\
0043 },\
0044 .altcx[PRCM_IDX_GPIOCR_ALTC4] = {\
0045 .used = altc4_used,\
0046 .reg_index = altc4_ri,\
0047 .control_bit = altc4_cb\
0048 },\
0049 }
0050
0051
0052
0053
0054
0055 enum prcm_gpiocr_reg_index {
0056 PRCM_IDX_GPIOCR1,
0057 PRCM_IDX_GPIOCR2,
0058 PRCM_IDX_GPIOCR3
0059 };
0060
0061
0062
0063
0064 enum prcm_gpiocr_altcx_index {
0065 PRCM_IDX_GPIOCR_ALTC1,
0066 PRCM_IDX_GPIOCR_ALTC2,
0067 PRCM_IDX_GPIOCR_ALTC3,
0068 PRCM_IDX_GPIOCR_ALTC4,
0069 PRCM_IDX_GPIOCR_ALTC_MAX,
0070 };
0071
0072
0073
0074
0075
0076
0077
0078 struct prcm_gpiocr_altcx {
0079 bool used:1;
0080 u8 reg_index:2;
0081 u8 control_bit:5;
0082 } __packed;
0083
0084
0085
0086
0087
0088
0089 struct prcm_gpiocr_altcx_pin_desc {
0090 unsigned short pin;
0091 struct prcm_gpiocr_altcx altcx[PRCM_IDX_GPIOCR_ALTC_MAX];
0092 };
0093
0094
0095
0096
0097
0098
0099
0100 struct nmk_function {
0101 const char *name;
0102 const char * const *groups;
0103 unsigned ngroups;
0104 };
0105
0106
0107
0108
0109
0110
0111
0112
0113
0114
0115
0116 struct nmk_pingroup {
0117 const char *name;
0118 const unsigned int *pins;
0119 const unsigned npins;
0120 int altsetting;
0121 };
0122
0123
0124
0125
0126
0127
0128
0129
0130
0131
0132
0133
0134
0135
0136
0137
0138 struct nmk_pinctrl_soc_data {
0139 const struct pinctrl_pin_desc *pins;
0140 unsigned npins;
0141 const struct nmk_function *functions;
0142 unsigned nfunctions;
0143 const struct nmk_pingroup *groups;
0144 unsigned ngroups;
0145 const struct prcm_gpiocr_altcx_pin_desc *altcx_pins;
0146 unsigned npins_altcx;
0147 const u16 *prcm_gpiocr_registers;
0148 };
0149
0150 #ifdef CONFIG_PINCTRL_STN8815
0151
0152 void nmk_pinctrl_stn8815_init(const struct nmk_pinctrl_soc_data **soc);
0153
0154 #else
0155
0156 static inline void
0157 nmk_pinctrl_stn8815_init(const struct nmk_pinctrl_soc_data **soc)
0158 {
0159 }
0160
0161 #endif
0162
0163 #ifdef CONFIG_PINCTRL_DB8500
0164
0165 void nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc);
0166
0167 #else
0168
0169 static inline void
0170 nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc)
0171 {
0172 }
0173
0174 #endif
0175
0176 #ifdef CONFIG_PINCTRL_DB8540
0177
0178 void nmk_pinctrl_db8540_init(const struct nmk_pinctrl_soc_data **soc);
0179
0180 #else
0181
0182 static inline void
0183 nmk_pinctrl_db8540_init(const struct nmk_pinctrl_soc_data **soc)
0184 {
0185 }
0186
0187 #endif
0188
0189 #endif